LEC # 10B

MEMORY INTERFACING
With
8086 Microprocessor

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Objective:
Upon completion of this lecture the student will be able to
➢ Decode the memory address

➢Explain how to interface both RAM and ROM to 8086

Microprocessor

➢ Interface memory to an 8 and 16 bit data bus

➢ Calculate the chip capacity

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 8086 Memory Addressing
Data can be accessed from the memory in
four different ways. They are:
8 - bit data from Lower (Even) address Bank.
8 - bit data from Higher (Odd) address Bank.
16 - bit data starting from Even Address.
16 - bit data starting from Odd Address.

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8-bit data from Even address Bank

Odd Bank Even Bank

x+1 x
x+3 x+2
x+5 x+4

BHE = 1 A0 = 0
D8-D15 D0-D7
A1-A19

D0-D15

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8-bit Data from Odd Address Bank
Odd Bank Even Bank

x+1 x
x+3 x+2

BHE =0 A0 = 1
A1-A19
D0-D7
D8-D15
D0-D15

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16-bit Data Access starting from Even - Address
Odd Bank Even Bank

x+1 x
x+3 x+2

A0 = 0
BHE =0
A1-A19 D8-D15
D0-D7

D0-D15

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16-bit Data Access starting from Odd Address

Odd Bank Even Bank Odd Bank Even Bank

0005 0004 0005 0004

0007 0006 0007 0006
0009 0008 0009 0008

A1-A19 A1-A19

A1-A9 A1-A9
D0-D7 D0-D7
D8-D15 D8-D15

(a) First Access from Odd Address (b) Next Access from Even Address
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 8086 PHYSICAL MEMORY
THE TOTAL MEMORY (1MB) OF 8086 IS ARRANGED IN TWO
BANKS. AN ODD BANK AND AN EVEN BANK. BOTH THE
BANKS HAVE EQUAL NO. OF LOCATIONS.
THE ODD BANK CONTAINS ODD NUMBERED MEM.
LOCATIONS.IT IS KNOWN AS UPPER BANK.
THE EVEN BANK CONTAINS ONLY EVEN NUMBERED MEM.
LOCATIONS.IT IS KNOWN AS LOWER BANK.
THIS ARRANGE MENT IS DONE IN ORDER TO SPEED UP
THE OPERATION.
THE ARRANGEMENT AND THE SIGNAL FOLLOWED,
EXPLAINS THE SAME.

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 THE 8086 MEMORY BANK
UPPER BANK LOWER BANK

ODD EVEN

CS CS

BHE A1---A19 A0
D15-D8 D7-D0

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 ADDRESSING WITH 8086

PROBLEM:
Two 16k ROM and two 32k RAM are required
to be interfaced with 8086 CPU. The RAM
address must start at 00000h. The ROM
address range must include FFFF0h in its
range. Design a decoder that decode the 8086
address to generate the above memory map.

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SELF STUDY
From Book “ The 80x86 IBM PC and Compatible
Computer V2”
CH 10 : 10.15, 10.17, 10.18,10.19

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