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NAVTTC - SSUET
Lab Manual
Industrial Automation
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Lab No Topics
no.
Installation and Simulation Technique for SIMATICS7 family of
1 Siemens S7-200 CPU
INTERLOCKING OPERATION
6 PLC BASED DETECTING THE DIRECTION OF A
CONVEYOR BELT
INTERLOCKING OPERATION
7 PLC BASED GARAGE DOOR EXERCISE
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DRAIN SYSTEM
17 ON DELAY TIMER
DRAIN SYSTEM
18 OFF DELAY TIMER
TOGGLING CONDITION
19 ON DELAY TIMER
TOGGLING CONDITION
20 OFF DELAY TIMER
TOGGLING CONDITION
21 ON / OFF DELAY TIMER
TOGGLING CONDITION
22 ON DELAY TIMER
TOGGLING CONDITION
29 ON DELAY TIMER WITH COMPARE INSTRUCTION
TOGGLING CONDITION
30 OFF DELAY TIMER WITH COMPARE INSTRUCTION
TOGGLING CONDITION
31 ON / OFF DELAY TIMER WITH COMPARE INSTRUCTION
LAB NO. 1
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S7-200 CPU:
The S7-200 CPU combines a microprocessor, an integrated power supply, input circuits,
and output circuits in a compact housing to create a powerful Micro PLC. See Figure 1-
1. After you have downloaded your program, the S7-200 contains the logic required to
monitor and control the input and output devices in your application.
Siemens provides different S7-200 CPU models with a diversity of features and
capabilities that help you create effective solutions for your varied applications. Table 1-
1 briefly compares some of the features of the CPU. For detailed information about a
specific CPU, see Appendix A.
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COMPUTER REQUIREMENTS:
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OPERATING SYSTEM:
Windows 95, Windows 98,
Windows 2000, Windows Me (Millennium
Edition), Windows NT 4.0 (or later
version), Windows XP Professional
At least 100M bytes of free hard disk Space
Mouse (recommended)
Connecting your S7-200 is easy. For this example, you only need to connect power to
your S7-200 CPU and then connect the communications cable between your
programming device and the S7-200 CPU.
The first step is to connect the S7-200 to a power source. Figure 2-1 shows the wiring
connections for either a DC or an AC model of the S7-200 CPU.
Before you install or remove any electrical device, ensure that the power to that
equipment has been turned off. Always follow appropriate safety precautions and ensure
that power to the S7-200 is disabled before attempting to install or remove the S7-200.
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C
ONNECTING THE RS-232/PPI MULTI-MASTER CABLE:
You can install an S7-200 either on a panel or on a standard rail, and you can orient the
S7-200 either horizontally or vertically.
As a general rule for laying out the devices of your system, always separate the devices
that generate high voltage and high electrical noise from the low-voltage, logic-type
devices such as the S7-200.
When configuring the layout of the S7-200 inside your panel, consider the heat-
generating devices and locate the electronic-type devices in the cooler areas of your
cabinet. Operating any electronic device in a high-temperature environment will reduce
the time to failure.
Consider also the routing of the wiring for the devices in the panel. Avoid placing low
voltage signal wires and communications cables in the same tray with AC power wiring
and high-energy, rapidly-switched DC wiring. Provide Adequate Clearance for Cooling
and Wiring S7-200 devices are designed for natural convection cooling. For proper
cooling, you must provide a clearance of at least 25 mm above and below the devices.
Also, allow at least 75 mm of depth.
S7-200 devices are designed for natural convection cooling. For proper cooling, you
must provide a clearance of at least 25 mm above and below the devices. Also, allow at
least 75 mm of depth.
When planning your layout for the S7-200 system, allow enough clearance for the wiring
and communications cable connections. For additional flexibility in configuring the
layout of the S7-200 system, use the I/O expansion cable.
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REMOVINGACPU OREXPANSIONMODULE
ToremoveanS7-200CPUorexpansionmodule,followthesesteps:
1. RemovepowerfromtheS7-200.
2.
Disconnectallthewiringandcablingthatisattachedtothemodule.M
ostS7-
200CPUandexpansionmoduleshaveremovableconnectorstomak
ethisjobeasier.
3. If youhaveexpansionmodulesconnectedtotheunitthat
youareremoving,opentheaccesscoverdooranddisconnecttheexpan
sionmoduleribboncablefromtheadjacentmodules.
4. UnscrewthemountingscrewsorsnapopentheDINclip.
5. Removethemodule.
REMOVINGANDREINSTALLINGTHETERMINALBLOCKCONNECTOR
MostS7-
200moduleshaveremovableconnectorstomakeinstallingandreplacin
gthemoduleeasy.Refer toAppendixAtodeterminewhetheryourS7-
200modulehasremovableconnectors.Youcanorderanoptionalfan-
out connectorfor
modulesthatdonothaveremovableconnectors.SeeAppendixEforord
ernumbers.
2. Insertasmallscrewdriverinthenotchinthemiddleoftheconnector.
3. Removetheterminal connectorbypryingthescrewdriverawayfromtheS7-
200housing.
SeeFigure.
Figure3-
2RemovingtheConnect
or
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LAB NO: 2
Start All Programs Simatic Step 7 Micro/WIN V4 XX Step 7 Micro/WIN
Open Step 7 Write a Simple Compile Your Download Your Run PLC to
Micro/WIN Code in Ladder Code Code to PLC Perform Code
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You can check the timer types and properties from Table 1.1 and Table 1.2. Procedure of
using timer is as follow;
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Click on timer icon (see red boxes in Figure 1.2) to see all timer commands
Write the T33 (see green boxes in Figure 1.2) instead of the question marks (???)
over the timer box.
Press enter the cursor will go to PT (see blue boxes in Figure 1.2) section
(Time Setting).
When the timer value for T33 is greater than or equal to 40 (40 times 10 milliseconds, or 0.4
seconds), the contact provides power flow to turn on output Q0.0 of the S7-200. To enter the
Compare instruction (see Figure 1.4):
Double-click the Compare icon to display the compare instructions. Select the >=I
instruction (Greater-Than-Or-Equal-To-Integer ).
Hold down the left mouse button and drag the compare instruction onto the second
network.
Click on the “???” above the contact and enter the address for the timer value: T33
Press the Return key to enter the timer number and to move the focus to the other
value to be compared with the timer value.
Enter the following value to be compared with the timer value: 40
Press the Return key to enter the value.
Double-click the Bit Logic icon to display the bit logic instructions and select the
output coil.
Hold down the left mouse button and drag the coil onto the second network.
Click on the “???” above the coil and enter the following address: Q0.0
Press the Return key to enter the address for the coil.
When the timer reaches the preset value (100) and turns the timer bit on, the contact for T33
turns on. Power flow from this contact turns on the M0.0 memory location. Because the timer
is enabled by a Normally Closed contact for M0.0, changing the state of M0.0 from off (0) to
on (1) resets the timer (see Figure 1.5).
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Counters
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The Count Up instruction (CTU) counts up from the current value each time the
count up (CU) input makes the transition from off to on. When the current value Cxx
is greater than or equal to the preset value PV, the counter bit Cxx turns on. The
counter is reset when the Reset (R) input turns on, or when the Reset instruction is
executed. The counter stops counting when it reaches the maximum value
(32,767).
The Count Down instruction (CTD) counts down from the current value of that
counter each time the count down (CD) input makes the transition from off to on.
When the current value Cxx is equal to 0, the counter bit Cxx turns on. The counter
resets the counter bit Cxx and loads the current value with the preset value PV when
the load input LD turns on. The counter stops upon reaching zero, and the counter bit
Cxx turns on.
R input for CTU and LD input for CTD are reset inputs of counters (see Figure
2.1). You can reset counters by using this inputs.
Click OK on opened window to download the elements of the program to the S7-200.
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Click the RUN icon on the toolbar or select the PLC > RUN menu command (See Figure1.8).
REFERENCES
[1] Siemens Simatic S7-200 Programable Controller System Manual, Edition 09, 2007.
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LAB No. 3
The Normally Open (LD, A, O) contact is closed (on) when the bit is equal to 1. In FBD,
normally open instructions are represented by AND/OR boxes. These instructions can be used to
manipulate Boolean signals in the same manner as ladder contacts. In STL, the normally open
contact is represented by the Load, AND, and OR instructions. These instructions load, AND, or
OR the bit value of the address bit to the top of the stack.
The Normally Closed (LDN, AN, ON) contact is closed (on) when the bit is equal to 0. Normally
closed instructions are also represented by boxes. A normally closed instruction is constructed by
placing the negation symbol on the stem of the input signal. In STL, the normally closed contact
isrepresented by the Load NOT, AND NOT, and OR NOT instructions. These instructions load,
AND, or OR the logical NOT of the bit value to the top of the stack.
OUTPUT COIL:
The Output (=) instruction writes the new value for the output bit to the process image register.In
LAD and FBD, when the output instruction is executed, the S7-200 turns the output bit in the
process image register on or off. For LAD and FBD, the specified bit is set equal to power
flow.In STL, the value on the top of the stack is copied to the specified bit.
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Ladder Logic:
STL Logic:
FBD Logic:
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CONTROL DIAGRAM:
SYMBOLIC LOGICAL
EXPLANATION
ADDRESS ADDRESS
H1 Q1.1 LAMP
TRUTH TABLE:
INPUT OUTPUT
0 0 0
0 1 0
1 0 0
1 1 1
Conclusion: Performed simulation of “And” gate using ladder logic in Micro/WIN step 7
software compared the results with the truth table of And gate all the results were found
satisfactory
Task 1(b)
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OR LOGIC GATE
Object: To implement the “OR” gate of two inputs using contacts and coils in
Micro/Win.
Ladder Logic:
STL Logic:
FBD Logic:
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CONTROL DIAGRAM:
ASSIGNMENT LIST:
H1 Q1.1 LAMP
TRUTH TABLE:
INPUT OUTPUT
0 0 0
0 1 1
1 0 1
1 1 1
Conclusion: Performed simulation of “OR” gate using ladder logic in Micro/WIN step 7
software compared the results with the truth table of or gate all the results were found
satisfactory.
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Task 1(c)
XOR LOGIC GATE
Object: To implement the “XOR” gate of two inputs using contacts and coils in
Micro/Win.
Ladder Logic:
STL Logic:
FBD Logic:
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CONTROL DIAGRAM:
ASSIGNMENT LIST:
SYMBOLIC LOGICAL
EXPLANATION
ADDRESS ADDRESS
S1 I0.0 MOMENTARY SWITCH
S2 I1.0 MOMENTARY SWITCH
S3 I0.0 MOMENTARY SWITCH
S4 I1.0 MOMENTARY SWITCH
LAMP Q0.0 LAMP
TRUTH TABLE:
INPUT OUTPUT
0 0 0
0 1 1
1 0 1
1 1 0
Conclusion: Performed simulation of “XOR” gate using ladder logic in Micro/WIN step 7
software compared the results with the truth table of XOR gate in this ladder logic used the
concept of interlocking for the very first time all the results were found satisfactory
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Task 1(d)
Ladder Logic:
STL Logic:
FBD Logic:
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CONTROL DIAGRAM:
ASSIGNMENT LIST:
SYMBOLIC LOGICAL
EXPLANATION
ADDRESS ADDRESS
S1 I0.0 MOMENTARY SWITCH
S2 I1.0 MOMENTARY SWITCH
LAMP Q0.0 LAMP
TRUTH TABLE:
INPUT OUTPUT
0 0 1
0 1 0
1 0 0
1 1 1
Conclusion: Performed simulation of or gate using ladder logic in Micro/WIN step 7 software
compared the results with the truth table of xnor gate all the results were found satisfactory
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Ladder Logic:
STL Logic:
FBD Logic:
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CONTROL DIAGRAM:
ASSIGNMENT LIST:
SYMBOLIC LOGICAL
EXPLANATION
ADDRESS ADDRESS
H1 Q1.1 LAMP
TRUTH TABLE:
INPUT OUTPUT
0 0 1
0 1 1
1 0 1
1 1 0
Conclusion: Performed simulation of “NAND” gate using ladder logic in Micro/WIN step 7
software compared the results with the truth table of Nand gate all the results were found
satisfactory
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Ladder Logic:
STL Logic:
FBD Logic:
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CONTROL DIAGRAM:
ASSIGNMENT LIST:
SYMBOLIC LOGICAL
EXPLANATION
ADDRESS ADDRESS
H1 Q1.1 LAMP
TRUTH TABLE:
INPUT OUTPUT
0 0 1
0 1 0
1 0 0
1 1 0
Conclusion: Performed simulation of “NOR” gate using ladder logic in Micro/WIN step
7 software compared the results with the truth table of NOR gate all the results were
found satisfactory.
DATE:_______________________ SIGNATURE:__________
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LAB NO 04
BINARY OPERATION BASED LOGICS
ACCESS TO CAR WASH
TASK DESCRIPTION: Access to a car wash is prohibited by a Red Lamp when there is
still a vehicle sensed by S1 OR when supervisor presses a latch button S2. If none of these
conditions is met, in other words the access is free; a Green Lamp is to light up.
Red
CAR WASH
Green
ASSIGNMENT LIST:
INPUT OUTPUT
LOGIC
SYMBOL LOGIC ADDRESS SYMBOL
ADDRESS
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DATE:_______________________ SIGNATURE:__________
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LAB NO: 05
PLC BASED CONTROLLING A CONVEYOR
BELT
TASK DESCRIPTION: A conveyor belt that can be activated electrically. There are two
push button switches at the beginning of the belt: S1 for START and S2 for STOP. There are
also two push button switches at the end of the belt: S3 for START and S4 for STOP. It is
possible to start or stop the belt from either end. Also, sensor S5 stops the belt when an item
on the belt reaches the end.
PROCESS SCHEMATIC:
ASSIGNMENT LIST:
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PROGRAMMING (LAD/STL/FBD):
DATE:_______________________ SIGNATURE:__________
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LAB NO.6
INTERLOCKING OPERATION
PLC BASED DETECTING THE DIRECTION OF
A CONVEYOR BELT
TASK DESCRIPTION:A conveyor belt that is equipped with two photoelectric barriers
(PEB1 and PEB2) that are designed to detect the direction in which a package is moving on
the belt. Each photoelectric light barrier functions like a normally open contact.
PROCESS SCHEMATIC:
ASSIGNMENT LIST:
S1 I0.0 Start
S2 I0.1 Stop
PB1 I0.2 Photoelectric barrier 1
PB2 I0.3 Photoelectric barrier 2
F Q4.0 Forward
B Q4.1 Backward
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PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
STL Logic:
Network 1
LD I0.0
O I0.2
O Q4.0
AN I0.3
A I0.1
= Q4.1
Network 2
LD I0.3
O Q4.0
AN I0.2
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A I0.1
= Q4.0
FBD Logic:
Conclusion: In this lab. We performed plc based position detection on a conveyor belt and
control packet using push buttons and sensors .
DATE:_______________________ SIGNATURE:__________
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LAB NO. 07
INTERLOCKING OPERATION
PLC BASED GARAGE DOOR EXERCISE
TASK DESCRIPTION:A garage door is controlled such that there are two operating panels,
one is outside the door and the other is inside. The conditions for open and close are
described in block diagrams shown below. Moreover two limit switches are also installed to
check the status of garage door at both ends.
Motor up
Upper limit switch
M
Motor down
Open Open
Key
Close
Close
ASSIGNMENT LIST:
K I0.0 Key
O_Out I0.1 Open Outside
O_In I0.2 Open Inside
C_Out I0.3 Close Outside
C_In I0.4 Close Inside
ULS I0.5 Upper Limit Switch
LLS I0.6 Lower limit Switch
M_UP Q0.0 Motor Up
M_DN Q0.1 Motor Down
L_Up Q0.2 Lamp Up
L_Dn Q0.3 Lamp Down
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PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
STL Logic:
Network 1 O I0.4
LD I0.0 O Q0.1
A I0.1
O I0.2 AN I0.6
O Q0.0 AN Q0.0
AN I0.5 = Q0.0
AN Q0.1 Network 3
= Q0.0 LD I0.5
= Q0.2
Network 2 Network 4
LD I0.0 LD I0.6
A I0.3 = Q0.3
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FBD Logic:
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DATE:_______________________ SIGNATURE:__________
LAB NO. 08
RS FLIP FLOP OPERATION
PLC BASED GARAGE DOOR EXERCISE
TASK DESCRIPTION: A garage door is controlled such that there are two operating
panels, one is outside the door and the other is inside. The conditions for open and close are
described in block diagrams shown below. Moreover two limit switches are also installed to
check the status of garage door at both ends.
PROCESS SCHEMATIC:
Motor up
Upper limit switch
M
Motor down
Open Open
Key
Close
Close
ASSIGNMENT LIST:
K I0.0 Key
O_Out I0.1 Open Outside
O_In I0.2 Open Inside
C_Out I0.3 Close Outside
C_In I0.4 Close Inside
ULS I0.5 Upper Limit Switch
LLS I0.6 Lower limit Switch
M_UP Q0.0 Motor Up
M_DN Q0.1 Motor Down
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PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
STL Logic:
Network 1 AN Q0.0
LD I0.0 LD I0.6
A I0.1 NOT
O I0.2 LPS
AN Q0.1 A Q0.1
LD I0.5 = Q0.1
NOT LPP
LPS ALD
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A Q0.0 O Q0.1
= Q0.0 = Q0.1
LPP = Q0.1
ALD Network 3
O Q0.0 LD I0.5
= Q0.0 = Q0.2
= Q0.0 Network 4
Network 2 LD I0.6
LD I0.0
A I0.3 = Q0.3
O I0.
FBD Logic:
DATE:_______________________ SIGNATURE:__________
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LAB NO. 09
SET/RESET COIL OPERATIONS
PLC BASED GARAGE DOOR EXERCISE
TASK DESCRIPTION:A garage door is controlled such that there are two operating panels,
one is outside the door and the other is inside. The conditions for open and close are
described in block diagrams shown below. Moreover two limit switches are also installed to
check the status of garage door at both ends.
PROCESS SCHEMATIC:
Motor up
Upper limit switch
M
Motor down
Open Open
Key
Close
Close
ASSIGNMENT LIST:
K I0.0 Key
O_Out I0.1 Open Outside
O_In I0.2 Open Inside
C_Out I0.3 Close Outside
C_In I0.4 Close Inside
ULS I0.5 Upper Limit Switch
LLS I0.6 Lower limit Switch
M_UP Q0.0 Motor Up
M_DN Q0.1 Motor Down
L_Up Q0.2 Lamp Up
L_Dn Q0.3 Lamp Down
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PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic:
Network 1
LD I0.0
A I0.1
O I0.2
AN I0.5
AN Q0.1
S Q0.0, 1
Network 2
LD I0.5
R Q0.0, 1
Network 3
LD I0.0
A I0.3
O I0.4
AN I0.6
AN Q0.0
S Q0.1, 1
Network 4
LD I0.6
= Q0.1
Network 5
LD I0.5
= Q0.2
Network 6
LD I0.6
= Q0.3
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FBD Logic:
DATE:_______________________ SIGNATURE:__________
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LAB NO. 10
MASTER/SLAVE PANELS OPERATION
PLC BASED GARAGE DOOR EXERCISE
TASK DESCRIPTION: A garage door is controlled such that there are two operating
panels, one is outside the door and the other is inside. The conditions for open and close are
described in block diagrams shown below. Moreover, two limit switches are also installed to
check the status of garage door at both ends.
PROCESS SCHEMATIC:
Motor up
Upper limit switch
M
Motor down
Open Open
Key
Close
Close
ASSIGNMENT LIST:
K I0.0 Key
O_Out I0.1 Open Outside
O_In I0.2 Open Inside
C_Out I0.3 Close Outside
C_In I0.4 Close Inside
ULS I0.5 Upper Limit Switch
LLS I0.6 Lower limit Switch
M_UP Q0.0 Motor Up
M_DN Q0.1 Motor Down
L_Up Q0.2 Lamp Up
L_Dn Q0.3 Lamp Down
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PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic:
Network 1:
LD Key
A Up (Outside)
= M0.0
Network 2:
LD Key
A Down (Outside)
= M0.1
Network 3:
LD M0.0
LD Up (Inside)
AN Motor_Down
OLD
O Motor_Up
AN Upper_Limit_Switch
AN M0.1
= Motor_Up
Network 4:
LD M0.1
LD Down (Inside)
AN Motor_Up
OLD
O Motor_Down
AN Down_Limit_Switch
AN M0.0
= Motor_Down
Network 5:
LD Upper_Limit_Switch
= Door_Open_Indicator
Network 6:
LD Down_Limit_Switch
= Door_Close_Indica
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FBD Logic:
Conclusion: In this lab. We performed plc based interlocking operation garage door
exercise using master/slave panels operation
.
NAME: Rafi Ullah Khan Lodhi ROLL # IA-A16
DATE:_______________________ SIGNATURE:__________
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LAB NO. 11
FAST SWITCHING RESPONSE / FULL AUTOMATIC
PLC BASED GARAGE DOOR EXERCISE
TASK DESCRIPTION:A garage door is controlled such that there are two operating panels,
one is outside the door and the other is inside. The conditions for open and close are
described in block diagrams shown below. Moreover, two limit switches are also installed to
check the status of garage door at both ends.
PROCESS SCHEMATIC:
Motor up
Upper limit switch
M
Motor down
Open Open
Key
Close
Close
ASSIGNMENT LIST:
K I0.0 Key
O_Out I0.1 Open Outside
O_In I0.2 Open Inside
C_Out I0.3 Close Outside
C_In I0.4 Close Inside
ULS I0.5 Upper Limit Switch
LLS I0.6 Lower limit Switch
M_UP Q0.0 Motor Up
M_DN Q0.1 Motor Down
L_Up Q0.2 Lamp Up
L_Dn Q0.3 Lamp Down
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PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic:
Network 1
LD I0.0
A I0.1
O I0.2
= M0.0
Network 2
LD I0.0
A I0.3
O I0.4
= M0.2
Network 3
LD M0.0
O Q0.0
AN I0.5
AN M0.2
= Q0.0
Network 4
LD M0.2
O Q0.1
AN I0.6
AN M0.0
= Q0.1
Network 5
LD I0.5
= Q0.2
Network 6
LD I0.6
= Q0.3
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FBD Logic:
Conclusion: In this lab. We performed plc based interlocking operation garage door
exercise using fast switching response / full automatic
.
NAME: Rafi Ullah Khan Lodhi ROLL # IA-A16
DATE:_______________________ SIGNATURE:__________
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NAVTTC-Industrial Automation (IA)
LAB NO. 12
USING INTERNAL MEMORY BIT
CAR WASH
TASK DESCRIPTION: When a car is sensed by vehicle sensor S1 a red lamp H1 lights
up. Now as a operator presses the water nozzle W1 AND W2 both, the water pump P1 is
ON . At the same time water removal outlet A5opens.
When the opened W1 OR W2 & both close, pump P1 and outlet A5 close and dryer T1
goes ON. After the completion of whole process as a car leaves the place a green lamp H2
lights and red lamp and the dryer go OFF.
PROCESS SCHEMATIC:
ASSIGNMENT LIST:
S1 I0.0 Start
W1 I0.1 Nozzle 1
W2 I0.2 Nozzle 2
H1 Q0.0 Red Lamp
H2 Q0.1 Green Lamp
P1 Q0.2 Pump
A5 Q0.3 Water removal outlet
T_1 Q0.4 Drayer
ME1 M0.0 M0.0 Memory Bit 1
ME2 M0.1 M0.0 Memory Bit 2
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PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic:
Network 1
LD I0.0
= Q0.0
Network 2
LDN I0.0
= Q0.1
Network 3
LD I0.1
A I0.2
= M0.0
Network 4
LD M0.0
A Q0.1
= Q0.2
= Q0.3
Network 5
LD Q0.2
O M0.1
= M0.1
Network 6
LD M0.1
AN Q0.2
A Q0.1
= Q0.4
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FBD Logic:
Conclusion: In this lab. We performed plc based Car Wash System using Internal memory
Bit Operation.
DATE:_______________________ SIGNATURE:__________
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Government of Pakistan
NAVTTC-Industrial Automation (IA)
LAB NO.13
RS FLIP FLOP OPERATION
CAR WASH
TASK DESCRIPTION: When a car is sensed by vehicle sensor S1 a red lamp H1 lights
up. Now as a operator presses the water nozzle W1 AND W2 both, the water pump P1 is
ON . At the same time water removal outlet A5opens.
When the opened W1 OR W2 & both close, pump P1 and outlet A5 close and dryer T1
goes ON. After the completion of whole process as a car leaves the place a green lamp H2
lights and red lamp and the dryer go OFF.
PROCESS SCHEMATIC:
ASSIGNMENT LIST:
S1 I0.0 Start
W1 I0.1 Nozzle 1
W2 I0.2 Nozzle 2
H1 Q0.0 Red Lamp
H2 Q0.1 Green Lamp
P1 Q0.2 Pump
A5 Q0.3 Water removal outlet
T_1 Q0.4 Drayer
ME1 M0.0 M0.0 Memory Bit 1
ME2 M0.1 M0.0 Memory Bit 2
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PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic:
Network 1 Network 3 Network 5
LD I0.0 LD I0.1 LD Q0.2
LD Q0.1 A I0.2 LD Q0.1
NOT LDN I0.1 NOT
LPS NOT LPS
A Q0.0 LPS A M0.0
= Q0.0 A M0.0 = M0.0
LPP = M0.0 LPP
ALD LPP ALD
O Q0.0 ALD O M0.0
= Q0.0 O M0.0 = M0.0
= Q0.0 = M0.0 = M0.0
Network 2 = M0.0 Network 6
LDN I0.0 Network 4 LD M0.0
LD Q0.1 LD M0.0 LD Q0.1
NOT = Q0.2 NOT
LPS = Q0.3 LPS
A Q0.1 A Q0.4
= Q0.1 = Q0.4
LPP LPP
ALD ALD
O Q0.1 O Q0.4
= Q0.1 = Q0.4
= Q0.1 AN Q0.2
= Q0.4
FBD Logic:
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DATE:_______________________ SIGNATURE:__________
LAB NO.14
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TASK DESCRIPTION: When a car is sensed by vehicle sensor S1 a red lamp H1 lights
up. Now as a operator presses the water nozzle W1 AND W2 both, the water pump P1 is
ON . At the same time water removal outlet A5opens.
When the opened W1 OR W2 & both close, pump P1 and outlet A5 close and dryer T1
goes ON. After the completion of whole process as a car leaves the place a green lamp H2
lights and red lamp and the dryer go OFF.
PROCESS SCHEMATIC:
ASSIGNMENT LIST:
S1 I0.0 Start
W1 I0.1 Nozzle 1
W2 I0.2 Nozzle 2
H1 Q0.0 Red Lamp
H2 Q0.1 Green Lamp
P1 Q0.2 Pump
A5 Q0.3 Water removal outlet
T_1 Q0.4 Drayer
ME1 M0.0 M0.0 Memory Bit 1
ME2 M0.1 M0.0 Memory Bit 2
PROGRAMMING (LAD/STL/FBD):
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Ladder Logic:
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STL Logic:
Network 1
LD I0.0
S Q0.0, 1
Network 2
LD Q0.1
R Q0.0, 1
Network 3
LDN I0.0
S Q0.1, 1
Network 4
LD Q0.0
R Q0.1, 1
Network 5
LD I0.1
A I0.2
S M0.0, 1
Network 6
LDN I0.1
AN I0.2
R M0.0, 1
Network 7
LD M0.0
= Q0.3
= Q0.2
Network 8
LD Q0.2
S M0.1, 1
Network 9
LD Q0.1
R M0.1, 1
Network 10
LD M0.1
AN Q0.2
S Q0.4, 1
Network 11
LD Q0.1
R Q0.4, 1
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FBD Logic:
DATE:_______________________ SIGNATURE:__________
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LAB NO.15
POSITIVE EDGE /NEGATIVE EDGE OPERATIONS
CAR WASH
TASK DESCRIPTION: When a car is sensed by vehicle sensor S1 a red lamp H1 lights
up. Now as a operator presses the water nozzle W1 AND W2 both, the water pump P1 is
ON . At the same time water removal outlet A5opens.
When the opened W1 OR W2 & both close, pump P1 and outlet A5 close and dryer T1
goes ON. After the completion of whole process as a car leaves the place a green lamp H2
lights and red lamp and the dryer go OFF.
PROCESS SCHEMATIC:
ASSIGNMENT LIST:
S1 I0.0 Start
W1 I0.1 Nozzle 1
W2 I0.2 Nozzle 2
H1 Q0.0 Red Lamp
H2 Q0.1 Green Lamp
P1 Q0.2 Pump
A5 Q0.3 Water removal outlet
T_1 Q0.4 Drayer
ME1 M0.0 M0.0 Memory Bit 1
ME2 M0.1 M0.0 Memory Bit 2
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PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic:
Network 1
LD I0.0
EU
S Q0.0, 1
Network 2
LD Q0.1
ED
R Q0.0, 1
Network 3
LDN I0.0
EU
S Q0.1, 1
Network 4
LD Q0.0
ED
R Q0.1, 1
Network 5
LD I0.1
A I0.2
EU
S M0.0, 1
Network 6
LD I0.1
A I0.1
ED
R M0.0, 1
Network 7
LD M0.0
= Q0.3
= Q0.2
Network 8
LD Q0.2
EU
S M0.1, 1
Network 9
LD Q0.1
ED
R M0.1, 1
Network 10
LD M0.1
AN Q0.2
S Q0.4, 1
Network 11
LD Q0.1
ED
R Q0.4, 1
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FBD Logic:
Conclusion: In this lab. We performed plc based Car Wash System using Positive Edge
/Negative Edge Operations
NAME: Rafi Ullah Khan Lodhi ROLL # IA-A16
DATE:_______________________ SIGNATURE:__________
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Government of Pakistan
NAVTTC-Industrial Automation (IA)
LAB NO. 16
PLC BASED GARAGE VENTILATION CONTROL
TASK DESCRIPTION:An underground garage is equipped with four fans. A light at the
entrance/exit Shows the state of the garage’s ventilation, thus regulates incoming/outgoing
Vehicles.
Green
When three or four fans are operating, ventilation is good and the light is to show
Green.
Yellow
When only two fans are operating, ventilation is adequate and the light is to show
Yellow.
Red
When only one fan is operating, ventilation is no longer adequate and the light is
is to show red.
PROBLEM SCHEMATIC:
ASSIGNMENT LIST:
F1 I0.0 Fan 1
F2 I0.1 Fan 2
F3 I0.2 Fan 3
F4 I0.3 Fan 4
Green Q0.0 Green Light
Yellow Q0.1 Yellow Light
Red Q0.2 Red Light
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PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic:
Network 1
LD I0.0
A I0.1
A I0.2
A I0.3
LD I0.0
A I0.1
A I0.2
OLD
LD I0.0
A I0.1
A I0.3
OLD
LD I0.0
A I0.2
A I0.3
OLD
LD I0.1
A I0.2
A I0.3
OLD
= Q0.0
Network 2
LD I0.0
A I0.1
LD I0.0
A I0.2
OLD
LD I0.0
A I0.3
OLD
LD I0.1
A I0.2
OLD
LD I0.1
A I0.3
OLD
LD I0.2
A I0.3
OLD
= Q0.1
Network 3
LD I0.0
O I0.1
O I0.2
O I0.3
= Q0.2
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FBD Logic:
Conclusion: In this lab. We performed plc based Plc Based Garage Ventilation Control
System
DATE:_______________________ SIGNATURE:__________
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Government of Pakistan
NAVTTC-Industrial Automation (IA)
LAB NO. 17
DRAIN SYSTEM
ON DELAY TIMER
TASK DESCRIPTION:Drain System Figure shows the control diagram of an industrial
drain system. Your task is an automation engineer is to implement given logic on PLC
SIMATIC . Develop the complete program using LAD package of PLC programming
language. Also mention the address of respective I/O’s.
PROCESS SCHEMATIC:
ASSIGNMENT LIST:
S1 I0.0 Start
S2 I0.1 Stop
S3 I0.3 Level Sensor
SV1 Q0.0 Selenoid Valve
H1 Q0.1 Lamp
ME1 M0.0 Memory Bit 1
ME2 M0.1 Memory Bit 2
T_37 On Delay TimerS
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PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
STL Logic:
Network 1
LD I0.0
A I0.1
= M0.0
Network 2
LD M0.0
A I0.3
TON T37, 50
Network 3
LD T37
= M0.1
Network 4
LD M0.1
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= Q0.0
= Q0.1
FBD Logic:
DATE:_______________________ SIGNATURE:__________
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Government of Pakistan
NAVTTC-Industrial Automation (IA)
LAB NO. 18
DRAIN SYSTEM
OFF DELAY TIMER
TASK DESCRIPTION:Drain System Figure shows the control diagram of an industrial
drain system. Your task is an automation engineer is to implement given logic on PLC
SIMATIC . Develop the complete program using LAD package of PLC programming
language. Also mention the address of respective I/O’s.
PROCESS SCHEMATIC:
ASSIGNMENT LIST:
INPUT/OUTPUT SYMBOLS LODIC ADDRESS COMMENTS
S1 I0.0 Start
S2 I0.1 Stop
S3 I0.3 Level Sensor
SV1 Q0.0 Selenoid Valve
H1 Q0.1 Lamp
ME1 M0.0 Memory Bit 1
ME2 M0.1 Memory Bit 2
T_37 On Delay TimerS
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PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
STL Logic:
Network 1
LD I0.0
A I0.1
= M0.0
Network 2
LD M0.0
A I0.3
EU
TOF T37, 50
Network 3
LDN T37
= M0.0
Network 4
LD M0.1
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= Q0.0
= Q0.1
FBD Logic:
DATE:_______________________ SIGNATURE:__________
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Government of Pakistan
NAVTTC-Industrial Automation (IA)
LAB NO. 19
TOGGLING CONDITION
ON DELAY TIMER
TASK DESCRIPTION: Generate a Frequency Generator at 0.10Hz without any external
input.
WAVEFORM DIAGRAM:
ASSIGNMENT LIST:
INPUT/OUTPUT SYMBOLS LODIC ADDRESS COMMENTS
S1 I0.0 Start
H1 Q0.0 Led
T_37 On Delay Timer 1
T_38 On Delay Timer 2
PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic:
Network
LD I0.0
AN T38
TON T37, 100
Network 2
LD T37
TON T38, 100
Network 3
LD T37
= Q0.0
FBD Logic:
DATE:_______________________ SIGNATURE:__________
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NAVTTC-Industrial Automation (IA)
LAB NO. 20
TOGGLING CONDITION
OFF DELAY TIMER
TASK DESCRIPTION: Generate a Frequency Generator at 0.10Hz without any external
input.
WAVEFORM DIAGRAM:
ASSIGNMENT LIST:
INPUT/OUTPUT SYMBOLS LODIC ADDRESS COMMENTS
S1 I0.0 Start
H1 Q0.0 Led
T_37 On Delay Timer 1
T_38 On Delay Timer 2
PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic:
Network 1
LD I0.0
AN T38
TOF T37, 50
Network 2
LD T37
TOF T38, 50
Network 3
LD T37
= Q0.0
FBD Logic:
DATE:_______________________ SIGNATURE:__________
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LAB NO. 21
TOGGLING CONDITION
ON/OFF DELAY TIMER
TASK DESCRIPTION: Generate a Frequency Generator at 0.10Hz without any external
input.
WAVEFORM DIAGRAM:
ASSIGNMENT LIST:
INPUT/OUTPUT SYMBOLS LODIC ADDRESS COMMENTS
S1 I0.0 Start
H1 Q0.0 Led
T_37 On Delay Timer 1
T_38 On Delay Timer 2
PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
STL Logic:
Network 1
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LD I0.0
AN T38
TON T37, 100
Network 2
LD T37
TOF T38, 50
Network 3
LD T38
= Q0.0
FBD Logic:
DATE:_______________________ SIGNATURE:__________
Lab No.22
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TOGGLING CONDITION
ON DELAY TIMER
TASK DESCRIPTION:Waveform of Frequency Generator and Toggle Output` Generate a
toggle Output LED at 40% OFF and 60% ON wave form.
WAVEFORM DIAGRAM:
ASSIGNMENT LIST:
INPUT/OUTPUT SYMBOLS LODIC ADDRESS COMMENTS
S1 I0.0 Start
H1 Q0.0 Led
T_37 On Delay Timer 1
T_38 On Delay Timer 2
PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
STL Logic:
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Network 1
LD I0.0
AN T38
TON T37, 25
Network 2
LD T37
TON T38, 16
Network 3
LD T37
= Q0.0
FBD Logic:
Conclusion: In this lab. We performed plc based Toggling Condition Generate a toggle
Output LED at 40% OFF and 60% ON wave form. Using On Delay Timer
DATE:_______________________ SIGNATURE:__________
LAB NO. 23
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PROCESS SCHEMATIC:
ASSIGNMENT LIST:
PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic:
Network 1
LD I0.0
O Q0.0
A I0.1
A I0.2
AN I0.3
AN Q0.1
AN Q0.3
= Q0.0
Network 2
LD Q0.0
A I0.4
AN I0.3
AN Q0.1
= Q0.2
Network 3
LD I0.3
O Q0.1
A I0.4
= Q0.1
Network 4
LD I0.0
AN I0.2
= M0.0
Network 5
LD M0.0
AN Q0.0
AN Q0.2
AN Q0.1
= Q0.3
AN T37
= Q0.4
Network 6
LD M0.0
TON T37, 20
FBD Logic:
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DATE:_______________________ SIGNATURE:__________
LAB NO. 24
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PROCESS SCHEMATIC:
ASSIGNMENT LIST:
PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic:
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Network 1
LD I0.0
O Q0.0
A I0.1
A I0.2
AN I0.3
AN Q0.1
AN Q0.3
= Q0.0
Network 2
LD Q0.0
A I0.4
AN I0.3
AN Q0.1
= Q0.2
Network 3
LD I0.3
O Q0.1
A I0.4
= Q0.1
Network 4
LD I0.0
AN I0.2
= M0.0
Network 5
LD M0.0
AN Q0.0
AN Q0.2
AN Q0.1
= Q0.3
AN T37
= Q0.4
Network 6
LD M0.0
EU
TOF T37, 20
FBD Logic:
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DATE:_______________________ SIGNATURE:__________
LAB NO. 25
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PROCESS SCHEMATIC:
ASSIGNMENT LIST:
PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic:
Network 1
LD I0.0
O Q0.0
A I0.1
A I0.2
AN I0.3
AN Q0.1
AN Q0.3
= Q0.0
Network 2
LD Q0.0
A I0.4
AN I0.3
AN Q0.1
= Q0.2
Network 3
LD I0.3
O Q0.1
A I0.4
= Q0.1
Network 4
LD I0.0
AN I0.2
= M0.0
Network 5
LD M0.0
AN Q0.0
AN Q0.2
AN Q0.1
= Q0.3
AN T38
= Q0.4
Network 6
LD M0.0
EU
TOF T37, 20
Network 7
LD T37
TOF T38, 20
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FBD Logic:
DATE:_______________________ SIGNATURE:________
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NAVTTC-Industrial Automation (IA)
LAB NO. 26
PLC BASED PEDESTRIAN CROSSING LIGHT EXERCISE
ON DELAY OPERATION
TASK DESCRIPTION:A zebra crossing is equipped with a pedestrian crossing light. When
momentary-contact pushbutton S1 is actuated the light is to switch to “RED” for vehicle and
“GREEN” for pedestrians, and vice versa.
Select the times for this example so that the light is YELLOW (amber) for three seconds and
red for sixteen seconds for vehicles, but the green light for pedestrians only lights up for ten
seconds.
PROCESS SCHEMATIC:
ASSIGNMENT LIST:
S1 I0.0 Start
RV Q0.0 Red Light For Veichle
GV Q0.1 Green Light For Veichle
YV Q0.2 Yellow Light For Veichle
RP Q1.0 Red Light For Pedestrian
GP Q1.1 Green Light For Pedestrian
ME1 M0.0 Memory Bit 1
ME2 M0.1 Memory Bit 2
T_1 T37 Timer 1
T_2 T38 Timer 2
T_3 T39 Timer 3
T_4 T40 Timer 4
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PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic:
Network 1
LD I0.0
O M0.0
= M0.0
Network 2
LD M0.0
LPS
AN T37
= Q0.0
LPP
AN T40
TON T37, 160
Network 3
LD M0.0
AN T40
TON T38, 130
Network 4
LD M0.0
LD T38
AN T37
LD T39
AN T40
OLD
ALD
= Q0.2
Network 5
LD M0.0
A T37
LPS
AN T39
= Q0.1
LPP
TON T39, 100
Network 6
LD M0.0
AN T39
TON T40, 30
Network 7
LD M0.0
LPS
AN Q0.0
= Q1.0
LPP
AN Q0.1
LDN Q0.2
O Q0.0
ALD
= Q1.1
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FBD Logic:
Conclusion: In this lab. We performed plc based plc based pedestrian crossing light exercise
Using On delay operation
DATE:_______________________ SIGNATURE:_________
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Government of Pakistan
NAVTTC-Industrial Automation (IA)
LAB NO. 26
PLC BASED PEDESTRIAN CROSSING LIGHT EXERCISE
OFF DELAY OPERATION
TASK DESCRIPTION:A zebra crossing is equipped with a pedestrian crossing light. When
momentary-contact pushbutton S1 is actuated the light is to switch to “RED” for vehicle and
“GREEN” for pedestrians, and vice versa.
Select the times for this example so that the light is YELLOW (amber) for three seconds and
red for sixteen seconds for vehicles, but the green light for pedestrians only lights up for ten
seconds.
PROCESS SCHEMATIC:
ASSIGNMENT LIST:
S1 I0.0 Start
RV Q0.0 Red Light For Veichle
GV Q0.1 Green Light For Veichle
YV Q0.2 Yellow Light For Veichle
RP Q1.0 Red Light For Pedestrian
GP Q1.1 Green Light For Pedestrian
ME1 M0.0 Memory Bit 1
ME2 M0.1 Memory Bit 2
T_1 T37 Timer 1
T_2 T38 Timer 2
T_3 T39 Timer 3
T_4 T40 Timer 4
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PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic:
Network 1
LD I0.0
O M0.0
= M0.0
Network 2
LD M0.0
LPS
A T37
= Q0.0
LPP
AN T40
EU
TOF T37, 160
Network 3
LD M0.0
AN T40
EU
TOF T38, 130
Network 4
LD M0.0
LDN T38
A T37
LDN T39
A T40
OLD
ALD
= Q0.2
Network 5
LD M0.0
AN T37
LPS
A T39
= Q0.1
= M0.1
LPP
EU
TOF T39, 100
Network 6
LD M0.1
AN T39
EU
TOF T40, 30
Network 7
LD M0.0
LPS
AN Q0.0
= Q1.0
LPP
AN Q0.1
LDN Q0.2
O Q0.0
ALD
= Q1.1
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FBD Logic:
Conclusion: In this lab. We performed plc based plc based pedestrian crossing light exercise
Using Off delay operation
DATE:_______________________ SIGNATURE:__________
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Government of Pakistan
NAVTTC-Industrial Automation (IA)
LAB NO. 28
PLC BASED PEDESTRIAN CROSSING LIGHT EXERCISE
ON/OFF DELAY OPERATION
TASK DESCRIPTION:A zebra crossing is equipped with a pedestrian crossing light. When
momentary-contact pushbutton S1 is actuated the light is to switch to “RED” for vehicle and
“GREEN” for pedestrians, and vice versa.
Select the times for this example so that the light is YELLOW (amber) for three seconds and
red for sixteen seconds for vehicles, but the green light for pedestrians only lights up for ten
seconds.
PROCESS SCHEMATIC:
ASSIGNMENT LIST:
S1 I0.0 Start
RV Q0.0 Red Light For Veichle
GV Q0.1 Green Light For Veichle
YV Q0.2 Yellow Light For Veichle
RP Q1.0 Red Light For Pedestrian
GP Q1.1 Green Light For Pedestrian
ME1 M0.0 Memory Bit 1
ME2 M0.1 Memory Bit 2
T_1 T37 Timer 1
T_2 T38 Timer 2
T_3 T39 Timer 3
T_4 T40 Timer 4
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PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic:
Network 1
LD I0.0
O M0.0
= M0.0
Network 2
LD M0.0
LPS
A T37
= Q0.0
LPP
AN T40
EU
TOF T37, 160
Network 3
LD M0.0
AN T40
TON T38, 130
Network 4
LD M0.0
LD T38
A T37
LDN T39
A T40
OLD
ALD
= Q0.2
Network 5
LD M0.0
AN T37
LPS
A T39
= Q0.1
= M0.1
LPP
EU
TOF T39, 100
Network 6
LD M0.1
AN T39
TON T40, 30
Network 7
LD M0.0
LPS
AN Q0.0
= Q1.0
LPP
AN Q0.1
LDN Q0.2
O Q0.0
ALD
= Q1.1
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FBD Logic:
Conclusion: In this lab. We performed plc based plc based pedestrian crossing light exercise
Using On/Off delay operation
DATE:_______________________ SIGNATURE:__________
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NAVTTC-Industrial Automation (IA)
LAB NO. 29
TOGGLING CONDITION
ON DELAY TIMER WITH COMPARE INSTRUCTION
WAVEFORM DIAGRAM:
ASSIGNMENT LIST:
INPUT/OUTPUT SYMBOLS LODIC ADDRESS COMMENTS
S1 I0.0 Start
H1 Q0.0 Led
T_37 On Delay Timer 1
T_38 On Delay Timer 2
PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic:
Network 1
LD I0.0
AW<= T37, 10
TON T37, 10
Network 2
LDW> T37, 4
= Q0.0
FBD Logic:
Conclusion: In this lab. We performed plc based Toggling Condition Generate a toggle
Output LED at 40% OFF and 60% ON wave form. Using On Delay Timer With Compare
instruction
DATE:_______________________ SIGNATURE:__________
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Government of Pakistan
NAVTTC-Industrial Automation (IA)
LAB NO. 30
TOGGLING CONDITION
OFF DELAY TIMER WITH COMPARE INSTRUCTION
WAVEFORM DIAGRAM:
ASSIGNMENT LIST:
INPUT/OUTPUT SYMBOLS LODIC ADDRESS COMMENTS
S1 I0.0 Start
H1 Q0.0 Led
T_37 On Delay Timer 1
T_38 On Delay Timer 2
PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic:
Network 1
LD I0.0
AN T37
TOF T37, 10
Network 2
LDW> T37, 4
= Q0.0
FBD Logic:
Conclusion: In this lab. We performed plc based Toggling Condition Generate a toggle
Output LED at 40% OFF and 60% ON wave form. Using On Delay Timer With Compare
instruction
DATE:_______________________ SIGNATURE:__________
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Government of Pakistan
NAVTTC-Industrial Automation (IA)
LAB NO. 31
TOGGLING CONDITION
ON/OFF DELAY TIMER WITH COMPARE INSTRUCTION
WAVEFORM DIAGRAM:
ASSIGNMENT LIST:
INPUT/OUTPUT SYMBOLS LODIC ADDRESS COMMENTS
S1 I0.0 Start
H1 Q0.0 Led
T_37 On Delay Timer 1
T_38 On Delay Timer 2
PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic:
Network 1
LD I0.0
AN T37
TON T37, 10
Network 2
LD T37
TOF T38, 10
Network 3
LDW> T_2:T38, 4
= L:Q0.0
FBD Logic:
Conclusion: In this lab. We performed plc based Toggling Condition Generate a toggle
Output LED at 40% OFF and 60% ON wave form. Using On Delay Timer With Compare
instruction
DATE:_______________________ SIGNATURE:__________
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Government of Pakistan
NAVTTC-Industrial Automation (IA)
LAB NO. 32
PLC BASED PROCESS-CONTROLLED SYSTEM
ON DELAY TIMER WITH COMPARE INSTRUCTION
TASK DESCRIPTION:A PLC-controlled system operates as follows. If the Start button is
pressed, MV1 will be opened and dye starts to fill the tank. At the same time mixing-motor begins to
run. As the level of the dye passes TBL2 and reaches to TBL1, MV1 will be closed and mixing-motor
will stop. Then MV2 will be opened and dye begins to run out of the container. After the level of the
dye reaches to the below of TBL2, MV2 will be closed. then the system will stop. We can observe the
stopping of the system with the lamp and the buzzer.
After the system stops, buzzer will continue to run for 2sec and then it stops. But the lamp continues
to light until the reset button is pressed. When the reset button is pressed, the system will be ready to
begin the same process again.
PROCESS SCHEMATIC:
ASSIGNMENT LIST:
PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
STL Logic:
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Network 1
LD I0.0
O Q0.0
A I0.1
A I0.2
AN I0.3
AN Q0.1
AN Q0.3
= Q0.0
Network 2
LD Q0.0
A I0.4
AN I0.3
AN Q0.1
= Q0.2
Network 3
LD I0.3
O Q0.1
A I0.4
= Q0.1
Network 4
LD I0.0
AN I0.2
= M0.0
Network 5
LD M0.0
AN Q0.0
AN Q0.2
AN Q0.1
= Q0.3
AW>= T37, 0
AW<= T37, 2
= Q0.4
Network 6
LD M0.0
TON T37, 20
FBD Logic:
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DATE:_______________________ SIGNATURE:________
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Government of Pakistan
NAVTTC-Industrial Automation (IA)
LAB NO. 33
PLC BASED PROCESS-CONTROLLED SYSTEM
OFF DELAY TIMER WITH COMPARE INSTRUCTION
TASK DESCRIPTION:A PLC-controlled system operates as follows. If the Start button is pressed, MV1
will be opened and dye starts to fill the tank. At the same time mixing-motor begins to run. As the level of the
dye passes TBL2 and reaches to TBL1, MV1 will be closed and mixing-motor will stop. Then MV2 will be
opened and dye begins to run out of the container. After the level of the dye reaches to the below of TBL2, MV2
will be closed. then the system will stop. We can observe the stopping of the system with the lamp and the
buzzer.
After the system stops, buzzer will continue to run for 2sec and then it stops. But the lamp continues to light
until the reset button is pressed. When the reset button is pressed, the system will be ready to begin the same
process again.
PROCESS SCHEMATIC:
ASSIGNMENT LIST:
Ladder Logic:
STL Logic:
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Network 1
LD I0.0
O Q0.0
A I0.1
A I0.2
AN I0.3
AN Q0.1
AN Q0.3
= Q0.0
Network 2
LD Q0.0
A I0.4
AN I0.3
AN Q0.1
= Q0.2
Network 3
LD I0.3
O Q0.1
A I0.4
= Q0.1
Network 4
LD I0.0
AN I0.2
= M0.0
Network 5
LD M0.0
AN Q0.0
AN Q0.2
AN Q0.1
= Q0.3
AW>= T37, 0
AW<= T37, 2
= Q0.4
Network 6
LD M0.0
TOF T37, 20
FBD Logic:
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DATE:_______________________ SIGNATURE:________
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Government of Pakistan
NAVTTC-Industrial Automation (IA)
LAB NO. 34
PLC BASED PROCESS-CONTROLLED SYSTEM
ON DELAY TIMER WITH COMPARE INSTRUCTION
TASK DESCRIPTION:A PLC-controlled system operates as follows. If the Start button is
pressed, MV1 will be opened and dye starts to fill the tank. At the same time mixing-motor begins to
run. As the level of the dye passes TBL2 and reaches to TBL1, MV1 will be closed and mixing-motor
will stop. Then MV2 will be opened and dye begins to run out of the container. After the level of the
dye reaches to the below of TBL2, MV2 will be closed. then the system will stop. We can observe the
stopping of the system with the lamp and the buzzer.
After the system stops, buzzer will continue to run for 2sec and then it stops. But the lamp continues
to light until the reset button is pressed. When the reset button is pressed, the system will be ready to
begin the same process again.
PROCESS SCHEMATIC:
ASSIGNMENT LIST:
PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
STL Logic:
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Network 1
LD I0.0
O Q0.0
A I0.1
A I0.2
AN I0.3
AN Q0.1
AN Q0.3
= Q0.0
Network 2
LD Q0.0
A I0.4
AN I0.3
AN Q0.1
= Q0.2
Network 3
LD I0.3
O Q0.1
A I0.4
= Q0.1
Network 4
LD I0.0
AN I0.2
= M0.0
Network 5
LD M0.0
AN Q0.0
AN Q0.2
AN Q0.1
= Q0.3
AW>= T38, 0
AW<= T38, 2
= Q0.4
Network 6
LD M0.0
EU
TOF T37, 20
Network 7
LD T37
TOF T38, 20
FBD Logic:
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DATE:_______________________ SIGNATURE:________
LAB NO. 35
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PROCESS SCHEMATIC:
ASSIGNMENT LIST:
S1 I0.0 Start
RV Q0.0 Red Light For Veichle
GV Q0.1 Green Light For Veichle
YV Q0.2 Yellow Light For Veichle
RP Q1.0 Red Light For Pedestrian
GP Q1.1 Green Light For Pedestrian
ME1 M0.0 Memory Bit 1
ME2 M0.1 Memory Bit 2
T_1 T37 Timer 1
PROGRAMMING (LAD/STL/FBD):
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Ladder Logic:
STL Logic:
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Network 1
LD I0.0
O M0.0
= M0.0
Network 2
LD M0.0
AN M0.1
TON T37, 290
Network 3
LD M0.0
AW>= T37, 0
AW<= T37, 160
= Q0.0
Network 4
LD M0.0
LDW>= T37, 130
AW<= T37, 160
LDW>= T37, 261
AW<= T37, 290
OLD
ALD
= Q0.2
Network 5
LD M0.0
AW>= T37, 161
AW<= T37, 260
= Q0.1
Network 6
LD M0.0
AW>= T37, 131
AW<= T37, 290
= Q1.0
Network 7
LD M0.0
AW>= T37, 0
AW<= T37, 130
= Q1.1
Network 8
LD T37
= M0.1
FBD Logic:
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NAVTTC-Industrial Automation (IA)
Conclusion: In this lab. We performed plc based plc based pedestrian crossing light exercise
Using On delay operation With Compare Instruction
DATE:_______________________ SIGNATURE:_________
LAB NO. 36
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PROCESS SCHEMATIC:
ASSIGNMENT LIST:
S1 I0.0 Start
RV Q0.0 Red Light For Veichle
GV Q0.1 Green Light For Veichle
YV Q0.2 Yellow Light For Veichle
RP Q1.0 Red Light For Pedestrian
GP Q1.1 Green Light For Pedestrian
ME1 M0.0 Memory Bit 1
ME2 M0.1 Memory Bit 2
T_1 T37 Timer 1
PROGRAMMING (LAD/STL/FBD):
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Ladder Logic:
STL Logic:
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Network 1
LD I0.0
O M0.0
= M0.0
Network 2
LD M0.0
AN M0.1
EU
TOF T37, 290
Network 3
LD M0.0
AW>= T37, 0
AW<= T37, 160
= Q0.0
Network 4
LD M0.0
LDW>= T37, 130
AW<= T37, 160
LDW>= T37, 261
AW<= T37, 290
OLD
ALD
= Q0.2
Network 5
LD M0.0
AW>= T37, 161
AW<= T37, 260
= Q0.1
Network 6
LD M0.0
AW>= T37, 131
AW<= T37, 290
= Q1.0
Network 7
LD M0.0
AW>= T37, 0
AW<= T37, 130
= Q1.1
Network 8
LD T37
= M0.1
FBD Logic:
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NAVTTC-Industrial Automation (IA)
Conclusion: In this lab. We performed plc based plc based pedestrian crossing light exercise
Using On delay operation With Compare Instruction
DATE:_______________________ SIGNATURE:_________
LAB NO. 37
PLC BASED PEDESTRIAN CROSSING LIGHT EXERCISE
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NAVTTC-Industrial Automation (IA)
PROCESS SCHEMATIC:
ASSIGNMENT LIST:
S1 I0.0 Start
RV Q0.0 Red Light For Veichle
GV Q0.1 Green Light For Veichle
YV Q0.2 Yellow Light For Veichle
RP Q1.0 Red Light For Pedestrian
GP Q1.1 Green Light For Pedestrian
ME1 M0.0 Memory Bit 1
ME2 M0.1 Memory Bit 2
T_1 T37 Timer 1
PROGRAMMING (LAD/STL/FBD):
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Ladder Logic:
STL Logic:
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Network 1
LD I0.0
AN T38
TOF T38, 1
Network 2
LD M0.0
AN M0.1
TON T37, 290
Network 3
LD M0.0
AW>= T37, 0
AW<= T37, 160
= Q0.0
Network 4
LD M0.0
LDW>= T37, 130
AW<= T37, 160
LDW>= T37, 261
AW<= T37, 290
OLD
ALD
= Q0.2
Network 5
LD M0.0
AW>= T37, 161
AW<= T37, 260
= Q0.1
Network 6
LD M0.0
AW>= T37, 131
AW<= T37, 290
= Q1.0
Network 7
LD M0.0
AW>= T37, 0
AW<= T37, 130
= Q1.1
Network 8
LD T37
= M0.1
FBD Logic:
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NAVTTC-Industrial Automation (IA)
Conclusion: In this lab. We performed plc based plc based pedestrian crossing light exercise
Using On/Off delay operation With Compare Instruction
DATE:_______________________ SIGNATURE:_________
LAB NO.38
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NAVTTC-Industrial Automation (IA)
TASK DESCRIPTION:The parking lot which has a capacity of 100 cars is to be controlled
by a PLC system. The sensor S1 and S2 are used to count the car at the entrance and exit. If
the number of the cars reaches to 100, red light is lit and the gate arm is closed. The arm stays
closed until one or more parking space is available in the lot. The gate arm is controlled by
activating/deactivating the gate solenoid (GS).
PROCESS SCHEMATIC:
ASSIGNMENT LIST:
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S1 I0.0 Start
S2 I0.1 Stop
PS_Ent I0.2 Position Sensor For Entrance
PS_Ext I0.3 Position Sensor For Exit
Green Q0.0 Green Light
Red Q0.1 Red Light
B_Up_Ent Q0.2 Barrier Up For Entrance
B_Dn_Ent Q0.3 Barrier Down For Entrance
B_Up_Ext Q0.4 Barrier Up For Exit
B_Dn_Ext Q0.5 Barrier Down For Exit
Re I0.4 Reset
ME1 M0.0 Memory Bit 1
C_1 C1 Up & Down Counter
PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic:
Network 1
LD I0.0
O M0.0
AN I0.1
= M0.0
Network 2
LD M0.0
A C1
= Q0.0
Network 3
LD M0.0
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A I0.2
AN Q0.1
LD M0.0
A I0.3
LD I0.4
CTUD C1, 10
Network 4
LD M0.0
A I0.2
AN Q0.1
= Q0.2
Network 5
LD M0.0
AN I0.2
= Q0.3
Network 6
LD M0.0
A C1
= Q0.1
Network 7
LD M0.0
A I0.3
= Q0.4
Network 8
LD M0.0
AN I0.3
= Q0.5
FBD Logic:
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Conclusion: In this lab. We performed plc based position detection on a conveyor belt and
control packet using push buttons and sensors .
DATE:_______________________ SIGNATURE:__________
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Government of Pakistan
NAVTTC-Industrial Automation (IA)
LAB NO.39
PLC BASED REVERSING CONTACTOR EXERCISE FOR THREE-
PHASE AC MOTOR
TASK DESCRIPTION: A three-phase AC motor is started for continuous clockwise rotation via
momentary-contact pushbutton S1, for continuous counter clockwise rotation via momentary-contact
pushbutton S2, and switched off via momentary-contact pushbutton S0.the direction of rotation can be
changed without switching off the motor.
CONTROL CIRCUIT:
ASSIGNMENT LIST:
SYMBOLIC ADDRESS LOGICAL ADDRESS
S0 I0.0
S1 I0.1
S2 I0.2
F2 I0.3
K1 M0.0
K2 M0.1
H1 Q0.1
H2 Q0.2
H3 Q0.3
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PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic :
Network 1:
LD F2
A S0
LD S1
O K1
ALD
AN S2
AN K2
= K1
Network 2:
LD F2
A S0
LD S2
O K2
ALD
AN S1
AN K1
= K2
Network 3:
LDN K1
AN K2
= H1
Network 4:
LD K1
= H2
Network 5:
LD K2
= H3
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FBD Logic:
Conclusion: In this lab. We performed plc based Reversing Contactor Exercise For Three-
Phase Ac Motor.
DATE:_______________________ SIGNATURE:__________
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LAB NO.40
WASTE WATER SYSTEM
TASK DESCRIPTION:
A collecting basin for waste- water is emptied using a 3- pump with the following start and stop
conditions:
Start: The pump is started either manually by pressing momentary contact push-button S1 or
automatically by float switch B1 when the water level is exceeded. If the water level is so high that
float switch B0 is activated, the pump is started in continuous mode; otherwise, jogging is possible.
Stop: If the water level falls below float switch B0, the pump switches off automatically. The pump
can be switched off at any time by pressing pushbutton S0 or by thermal over-current release F1.
Indicator lamps H1 and H2 show the operating states of the pump. Hooter H3 must sound when the
water level reaches float switch B2 or when pump fails because the thermal over-current release F1
has tripped.
The process schematic for this task is shown in Fig: 1. Generate the assignment list for this task and
develop the complete program using LAD and STL package of S7-200 PLC programming language
PROCESS SCHEMATIC:
ASSIGNMENT LIST:
SYMBOLIC ADDRESS LOGICAL ADDRESS
F1 I0.0
S0 I0.1
S1 I0.2
B0 I0.3
B1 I0.4
B2 I0.5
Pump Q0.0
H1 Q0.1
H2 Q0.2
H3 Q0.3
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PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic:
Network 1:
LD F1
A S0
LD S1
O B1
LD B0
A Pump
OLD
ALD
= Pump
Network 2:
LDN Pump
A F1
= H2
Network 3:
LD Pump
= H1
Network 4:
LDN F1
O B2
= H3
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FBD Logic:
DATE:_______________________ SIGNATURE:__________
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LAB NO. 41
BOTTLE FILLING CONTROL USING TIMERS
OBJECT: To perform PLC based exercise continuous bottle filling control
using timer operation
TASK DESCRIPTION: We will implement a control program that detects the position
of a bottle via a position sensor, waits 0.5 seconds, and then fills the bottle until a photo sensor
detects a filled condition. After the bottle is filled, the control program will wait 0.7 seconds
before moving to the next bottle. The program will include start and stop circuits for the out feed
motor and the start of the process.
PROCESS SCHEMATIC:
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AS
SIGNMENT LIST:
S0 I0.0 Start_For_Motor_1
S1 I0.1 Stop_For_Motor_1
S2 I0.2 Start_For_Motor_2
S3 I0.3 Stop_For_Motor_2
M1 Q0.1 Motor 1
M2 Q0.2 Motor 2
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PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic :
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FBD Logic :
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CONCLUSION: In this exercise, we perform PLC based continuous bottle filling system
using different sensors and timer operation.
DATE:_______________________ SIGNATURE:__________
LAB NO. 42
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TASK DESCRIPTION: Green and blue cubes are being packaged. Green cubes
come from the upper conveyor belt while blue cubes come from the lower conveyor belt.
The motors have to be switched on and off as appropriate.
Three green and five blue cubes can be placed in each box. Excess cubes fall out of the
box. A sensor shows if the box is in the correct position and does not contain the correct
number of cubes.
The task has to be solved in such a way that the exact number of cubes is placed in each
box and that not a single excess cubes falls from the conveyor.
2 sensors to detect the number of green and blue cubes in the box.
1 sensor detects if the box is not completely filled
2 actuators start the motors of the conveyor belts.
1 actuator changes the box.
PROCESS SCHEMATIC:
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ASSIGNMENT LIST:
S1 I0.0 Sensor1
S2 I0.1 Sensor2
S3 I0.2 Sensor3
C1 Counter 1
Count_1
Count_2 C2 Counter 2
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PROGRAMMING (LAD/STL/FBD):
Ladder Logic :
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STL Logic :
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FBD Logic :
CONCLUSION: In this Lab, we performed PLC based exercise for packaging and counting of
cubes using up and down counter operation .
DATE:_______________________ SIGNATURE:__________
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LAB NO. 43
PLC BASED STORAGE AREA WITH COUNTER AND
COMPARATOR
OBJECT: To perform HMI and PLC based Storage area with counter and comparator.
TASK DESCRIPTION: Figure shows a system with two conveyor belts and a
temporary storage area in between them. Conveyor belt 1 delivers packages to the
temporary storage area. A photoelectric barrier at the end of conveyor belt 1 near the
storage area determines how many packages are delivered to the storage area. Conveyor
belt 2 transports packages from the temporary storage area to a loading dock where
trucks take the packages away for delivery to customers. A photoelectric barrier at the
end of conveyor belt 2 near the storage area determines how many packages leave the
storage area to go to the loading dock. A display panel with five lamps indicates the fill
level of the temporary storage area.
PROCESS SCHEMATIC:
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ASSIGNMENT LIST:
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PROGRAMMING (LAD/STL/FBD):
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Ladder Logic :
STL Logic :
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TITLE=PROGRAM COMMENTS
Network 2
LD M0.0
A I0.1
LD M0.0
A I0.2
LD I0.3
CTUD C1, 10
Network 3
LDW= C1, 0
= Q0.0
Network 4
LDW>= C1, 1
AW<= C1, 4
= Q0.1
Network 5
LDW>= C1, 5
AW<= C1, 8
= Q0.2
Network 6
LDW>= C1, 9
AW<= C1, 10
= Q0.3
Network 7
LDW= C1, 10
= Q0.4
FBD Logic:
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CONCLUSION: In this task . We perform PLC based Storage area with counter and
comparator and show the status of srorage by different outputs .
DATE:_______________________ SIGNATURE:________
LAB NO. 44
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STEP # 1:
SELECT TYPE: MT8000 I Series/MT6000 I Series
CONNECTION: USB CABLE
AND SELECT EASY BUILDER 8000
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STEP # 5: Go to PLC type MODBUS RTU option and select Siemens S7-200.
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Conclusion: In this lab we learn how to run easy builder software for HMI
DATE:_______________________ SIGNATURE:________
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LAB NO. 45
PROCESS SCHEMATIC:
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HMI:
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PROGRAMMING (LAD/STL/FBD):
Ladder Logic:
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STL Logic :
Network 1:
LD Start
O M0.0
S Motor, 1
Network 2:
LD Reset
O M0.1
R Motor, 1
Network 3:
LD Motor
A PB1
AN 100%
LD Motor
A PB2
LD Reset
O M0.1
CTUD C1, 100
Network 4:
LD Motor
AW= C1, 0
= Empty
Network 5:
LD Motor
AW> C1, 0
AW< C1, 50
= Not_Empty
Network 6:
LD Motor
AW>= C1, 50
AW< C1, 90
= 50%
Network 7:
LD Motor
AW>= C1, 90
AW< C1, 100
= 90%
Network 8:
LD Motor
AW= C1, 100
= 100%
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FBD Logic :
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ASSIGNMENT LIST:
Conclusion: In this lab we Performed HMI Based Storage Area With Counter And
Comparator
DATE:_______________________ SIGNATURE:________
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