SUBJECT NAME: INTEGRATED ELECTRONICS NAME: muzzamil shah

ROLL NO: 2020-EE-076

SECTION: B

Lab No. 8
Objective: Traces the layout of basic microcircuit design using microwind.
Task No.1: To design a layout of NAND gate using CMOS technology and stimulate its
transient characteristic.
LAYOUT:

Output:

DEPARTMENT OF ELECTRONIC ENGINEERING

SIR SYED UNIVERSITY OF ENGINEERING AND TECHNOLOGY
SUBJECT NAME: INTEGRATED ELECTRONICS NAME: muzzamil shah
ROLL NO: 2020-EE-076
SECTION: B

Task No.2: To design a layout of AND gate using CMOS technology and stimulate its
transient characteristic.
LAYOUT:

Output:

DEPARTMENT OF ELECTRONIC ENGINEERING

SIR SYED UNIVERSITY OF ENGINEERING AND TECHNOLOGY
SUBJECT NAME: INTEGRATED ELECTRONICS NAME: muzzamil shah
ROLL NO: 2020-EE-076
SECTION: B

Task No.3: To design a layout of NOR gate using CMOS technology and stimulate its
transient characteristic.
LAYOUT:

DEPARTMENT OF ELECTRONIC ENGINEERING

SIR SYED UNIVERSITY OF ENGINEERING AND TECHNOLOGY
SUBJECT NAME: INTEGRATED ELECTRONICS NAME: muzzamil shah
ROLL NO: 2020-EE-076
SECTION: B

Output:

Task No.4 : To design a layout of OR gate using CMOS technology and stimulate its transient
characteristic.
LAYOUT:

DEPARTMENT OF ELECTRONIC ENGINEERING

SIR SYED UNIVERSITY OF ENGINEERING AND TECHNOLOGY
SUBJECT NAME: INTEGRATED ELECTRONICS NAME: muzzamil shah
ROLL NO: 2020-EE-076
SECTION: B

Output:

DEPARTMENT OF ELECTRONIC ENGINEERING

SIR SYED UNIVERSITY OF ENGINEERING AND TECHNOLOGY