EEE 3423:

MICROPROCESSOR &
MICROCOMPUTERS

WEEK 02: CPU ARCHITECTURE

DR.S 2017/2018
 “ ▪ Push yourself
because no one else
is going to do it for
you…

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CPU Architecture
 CPU Instruction Processing
 Memory devices
 Interrupts
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 Memory & The CPU
▪ Memory has assigned addresses.
▫ Unique address is assigned
depending on its location.
▫ Recall: Data & Programs are
stored in memory in an organized
way.
▪ CPU has full control over the address
space (a.k.a. memory space)
▫ CPU assess all data & programs
by pointing to an address.
▫ The path between CPU & memory
is called BUS.
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 Bus
▪ All data passes through the bus
which is a path that transmits data
inside a computer.
▪ Bus that
▫ transports address pointers  address bus.
▫ transport data  data bus.
▪ Additionally, there are also
▫ external bus that connects CPU
to memory and external devices.
Example: USB
▫ internal data bus passes internally
through the CPU.
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 Mux  still remember this term?
▪ Inside internal bus, there are switches that control the data
flow path  multiplexers (mux)
▪ Simply put, it control the routes of the CPU’s internal data
bus.

▪ Quick exercise: Produces the truth table for 4-to-1 mux.

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 Bus width & Bits
▪ Bus is actually a bundled signal pathways (called bits).
▪ The number of pathways determine how many values those
pathways can represent.
▪ ⸫ The number of pathways = number of bits = bus width.
▪ Example: In the case of 4 signal pathways… it means?
▫ 4 bits
▫ 24 = 16 different numbers

▪ Conclusion:
▫ More pathways = able to process more data
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 Data Bus
▪ For example,
▫ if the ALU can process 4-bit
operations  data bus must also be
4-bits wide.
▪ Most modern ALUs work with 64 bits.
▫ 64-bit CPU have 64-bit ALUs and
64-bit data buses

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 Address Bus
▪ Address Bus determine how large the memory system is.
▫ For example, if address bus width is 4-bits, so there is a
total of 16 different addresses. Got it?

▪ Conclusion:
▫ Size of address bus = memory capacity.
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 Memory Capacity and Data Bus Width
▪ A byte is unit that commonly describe the size of data.

▪ Quick Conceptual Check: Explain this relationship when

the address bus is 12 bits, and each address fills 1 byte of
10 data. What does it means? DR.S 2017/2018
 R/W Control Signals
▪ R/W is an important term in CPU: READ and WRITE.
▫ Read: extract stored data for ‘somewhere’
▫ Write: save it to ‘some place’
▫ How does this different from Load/Store term?
▪ CPU deals with memory and data  reads data to use for
operations and write the results of those operations to
memory.
▪ The control bus is the one
conveying these control
signals from the CPU.

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 I/O Control Signals
▪ Stands for INPUT and OUTPUT.
▫ Simply put: Input data travel from outside world into
computer and Ouput data travel from computer to
outside world.
▪ I/O control signals use to control these external devices
through I/O ports.
▫ Additionally, has its own address port and data port
between CPU & memory.
▫ Connect to address bus and data bus respectively.

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 Instructions
▪ Instructions are part of programs written by human that the
CPU executes.
▫ Program: chain of instructions that made of operands &
opcodes.
▫ Opcode: what to do.
▫ Operand: what the CPU operate on.
▪ Simple example:

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 Instructions
▪ In other words, there are a lots of opcodes.
▪ At the same time, operands might also be an address instead
of values.
▫ Instructions themselves also reside at some address.
▫ The operands ‘the instruction operates on’ also reside at
their own addresses.

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 Accumulators & Other Registers
▪ To execute an instruction, registers are requires.
▫ ‘small’ memory circuit inside CPU.
▪ 2 types:
▫ Accumulators: used for
calculations & increasing values.
▫ General-Purpose Registers:
use for everything.
▪ Both are used anytime operations
are processed.
▪ In addition, there are many other
types of register as well.

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Different registers for different purpose  Take home assignment!
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CPU
Instruction Processing

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 CPU Architecture

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 Instruction Cycle
▪ Program Counter (PC) holds the address of the next
instruction to be executed  every CPU has one.
▪ The address of the next instruction in PC is then temporarily
transferred to the address register and forwarded to memory.

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 Instruction Cycle
▪ The memory then sends the instruction located at the
address back to the CPU.
▪ It is then temporarily stored in the instruction register and
decoded by instruction decoder.

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 Instruction Cycle
▪ Instruction must be decoded because the instruction code
stored in memory is not the same as the machine code that
the CPU understands.
▪ The instruction decoder puts the instruction read from
memory into a form that can be use in operation execution.
▫ The decoder translates from instruction level language
to hardware-friendly machine code format.
▪ Once the instruction is decode, the operands & opcode are
revealed.
▫ Operations then can be performed.

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 Instruction Cycle
▪ Operations are performed on the ALUs using accumulator.
▪ Finally, the result is stored in either register or memory.
▫ And if its stored in memory, then the address need to be
specified.

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 ▪ To
Instruction Cycle conclude:

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 ▪ Program might contains conditionals such as branches
Instruction Cycle & loops. Name some examples?

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 Memory
▪ Recall: 2 types: primary & secondary memory.
▫ For CPU  primary memory (main primary)
▫ Other ‘outside’ memory  secondary (HDD) or hard disk.

▪ Comparison between primary & secondary memory:

1. Primary memory is volatile memory.
2. CPU can read directly from primary memory.
3. Hard drive are a lot slower than primary memory.

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 Memory: Primary vs HDD
▪ Primary memory is volatile memory. When computer is turn off:
▪ everything in primary disappears.
▫ but all data in hard drives does not.

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 Memory: Primary vs HDD
▪ CPU can read directly from primary memory.
▪ CPU needs to send control signals to hard disk interface
located in memory called I/O Space.

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 Memory: Primary vs HDD
▪ Hard drive are a lot slower than primary memory.
▪ Each memory types have its relative size and speed.

QUICK CHECK:
Latest tech on HDD is
SSD. Submit a 1 page
report on your next
class using your own
word about SSD.

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 RAM Space, ROM Space & I/O Space
▪ Memory Space (Address Space) can be divided into 2 parts:

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 RAM Space, ROM Space & I/O Space
▪ ROM located at the ‘motherboard’ inside the computer.
▫ BIOS is th program that run before any other.
▪ Besides RAM space and ROM space, there is a tiny space
called I/O space

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Quick Info…

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 RAM Space, ROM Space & I/O Space
▪ I/O ports resides inside this I/O space  to talks to external
devices.

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 Memory Classifications
▪ Task: Write a 2 pages technical aspects of memory
classifications and submit it next class.

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 Interrupts
▪ Imagine: “You are cooking and suddenly the phone rang!”
 Which one is the ‘interruption’?

▪ In other words – even when CPU is busy doing some

calculations, it will still respond when the mouse is moved or
the keyboard is pressed.

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 Interrupts: Stack & Stack Pointer
▪ Before doing interrupts, computer needs to take some memos before
starting a new task.
▫ Uses stack part of main memory reserved for bookkeeping.

▫ Have special register: stack pointer (SP)

 point to the last stack address it worked
with before executes the interrupts.
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 Interrupts: Stack & Stack Pointer
▪ If deals with one interrupts, everything is fine, simple.
▫ Managing interrupts (stack & stack pointer) becomes
complicated when it keeps adding up interrupts.

▪ The data saved during

interrupts consists of
the accumulator,
status registers, and
the program counter.

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 Interrupts Priority
▪ By using interrupts masks, interrupts cans be avoided.
▪ Reset
▫ Highest priority interrupts.
▫ Return programs to their initial state.
▪ Non-maskable Interrupts (NMI)
▫ Interrupts of the highest priority that the CPU will not mask
even though it is not Resets.
▫ Have many uses depending on the system architecture.
▪ Timer Interrupts
▫ Issue an interrupts when it reaches ‘0’ after counting down.
▫ Regularly timed.
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 Timer Interrupts

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 I/O Ports & GPU
▪ The internal data bus
needs I/O ports to
communicate with external
devices.
▪ The connection with the
external can be directly
connected and not directly
connected.
▫ Directly connected:
keyboard via I/O ports.
▫ No direct connection:
display via GPU.
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 Clock Frequency & Accuracy
▪ Clock frequency is rate of changes between high
and low measures in hertz (Hz) and used for
synchronization.
▪ Clock speed measure the performance of the
CPU  how fast its execute its
operations/instructions.
▪ The degree to which the clock speed matches the
clock frequency is called degree of accuracy.

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 Clock Frequency & Accuracy

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 Clock Generators
▪ Circuit that generate clock signals  clock generators.
▫ Build from crystal oscillators (along with capacitors &
resistors) which is an incredibly thin cut of artificial
crystal shards.
▫ The crystal warps when voltage applied across it.
▫ By connecting clock generator circuit to crystal
oscillators and condensers*  alternating signal can be
created.

▪ * condensers – electronic components that store & release

electrical charges.

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 CPU Performance
▪ Recall: CPU performance is determined by CPU clock speed
and its operation execution speed.
▫ How quickly the calculation is perform one after another.
▪ Before it was measured in MIPS, now in FLOPS.
▫ Floating-point operation per second
▫ Meaning: how many floating point operations with 15
significant digit that it can handle in one second.

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 “ ▪ If you are not willing
to work hard for it, do
not complain about
not having the
results…

▫ very true right?

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 DONE WEEK 02!
Still OK?

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 CREDITS
Special thanks to all the people who made and
released these awesome resources for free:
▪ Presentation template by SlidesCarnival
▪ Photographs by Unsplash

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