COMPUTER ORGANIZATION AND

ARCHITECTURE

EEE 1104
MEMORY ORGANIZATION
 INTRODUCTION
❖ Memory is physically organized as a large
number of cells that are capable of storing
one bit each.
❖ Logically they are organized as groups of bits
called words that are assigned an address.
❖ Data and instructions are accessed through
these memory address.
 CATEGORIES OF MEMORY
❖ Volatile Memory: This loses its data, when
power is switched off. RAM
❖ Non-Volatile Memory: This is a permanent
storage and does not lose any data when power
is switched off. ROM
❖ The process of storing new information into
memory is called write operation, and the
process of transferring data out of memory is
called read operation
CATEGORIES OF MEMORY
 CATEGORIES OF MEMORY
❖ RAM can perform both the write and the write
operations.
❖ ROM can perform only the read operation
❖ ROM is a programmable logic device (PLD)
RAM
 RAM
❖ The time taken to transfer information to and
from any desired random location is always the
same, hence the name random access memory
❖ In contrast the time required to retrieve
information stored in a magnetic tape depends
on the location of the data.
 RAM
❖ A memory unit stores binary information in
groups of bits called words.
❖ A word in memory is a entity of bits that move
in and out of storage as a unit.
❖ In memory a word can represent a number, an
instruction, an image, a video or any other
binary coded information.
❖ Each word in memory is assigned an
identification number called an address,
starting from 0 to 2k -1, where k is the number
of address lines
 RAM
❖ The selection of a specific word inside memory is
done by applying the k-bit address to the address
lines.
❖ An internal decoder accepts the address and opens
the paths needed to select the word specified.
❖ Memories vary greatly in size.
❖ The number of address bits needed in a memory is
dependent on the total number of words that can be
stored in the memory and is independent of the
number of bits in each word.
A BLOCK DIAGRAM OF RAM UNIT
 RAM
❖ Communication between a memory and its
environment is achieved through data input and
output lines, address selection lines, and control
lines that specify the direction of transfer.
❖ The n data input lines provide the information to
be stored in memory, and the n data output lines
supply the information coming out of particular
word chosen among the 2k available inside the
memory. The two control inputs specify the
direction of transfer desired.
 WRITE OPERATION
The steps taken for the purpose of transferring
data into memory are:
1. Apply the binary address of the desired word
into the address lines.
2. Apply the data bits that must be stored in
memory into the data input lines.
3. Activate the write input.
 READ OPERATION
The steps taken for the purpose of transferring data
out of memory are:
1. Apply the binary address of the desired word to the
address lines
2. Activate the read input
The memory will then take the bits from the word that
has been selected by the address and apply them to
the output data lines.
Note: the contents of the selected word does not change
after the read operation, i.e, the read operation is
nondestructive
 TYPES OF RAM
❖ Static RAM (SRAM)
❖ Dynamic RAM (DRAM)
❖ SRAM consists of internal latches that store the
binary information. The stored information
remains valid as long as power is applied to the
unit.
❖ DRAM stores the binary information in the form
of electric charges on the capacitors provided
inside the chip by MOS transistors.
❖ The capacitors needs to be periodically recharged
by refreshing the dynamic memory.
ROM
 ROM
❖ ROM as a non volatile memory enables digital
computers to store programs that will be needed
again after the computer is turned ON
❖ Programs and data that cannot be altered are stored
in ROM, while other large programs are
maintained on magnetic disks.
❖ The programs are transferred into the computer
RAM when needed.
❖ Before the power is turned OFF, the binary data
from RAM is transferred to the disk so that the
information will be retained.
INTERNAL LOGIC OF ROM
 ROM
❖ Considering the diagram above, the unit
consist of 32 words of 8 bits each.
❖ There are 5 input lines that form the binary
numbers from 0 to 31 for the address.
❖ The 5 input lines are decoded into 32 distinct
outputs by means of a decoder.
❖ Each output of a decoder represents a
memory address.
 TYPES OF ROM
1. Masked ROM (MROM)
2. Programmable ROM (PROM)
3. Erasable PROM (EPROM)
4. Electrically Erasable PROM (EEPROM)
 MEMORY HIERARCHY
❖ Memory hierarchy is the hierarchical
arrangement of storage in current computer
architecture
❖ It is designed to take advantage of memory
locality in computer programs
❖ Each level of the hierarchy has properties of
higher bandwidth, smaller size, and lower
latency than lower levels
 MEMORY HIERARCHY
❖ Memory hierarchy is a multi-level structure, that as the
distance from the processor increases, the size of the
memories and the access time both increase.
❖ Performance is the key reason for having a memory
hierarchy. The faster memories are more expensive per bit
and thus tend to be smaller.
❖ The goal is to present the user with as much memory as is
the available in the cheapest technology while providing
access at the speed offered by the fastest memory.
❖ The data is similarly hierarchical – a level closer to the
processor is generally a subset of any level further away, and
all the data is stored at the lowest memory level.
 MEMORY HIERARCHY
❖The memory in a computer can be divided into
five hierarchies based on the speed as well
as use.
❖ The processor can move from one level to
another based on its requirements.
❖ The five hierarchies in the memory are
registers, cache, main memory, magnetic discs,
and magnetic tapes.
 MEMORY HIERARCHY
❖ Memory Hierarchy is to obtain the highest
possible access speed while minimizing the
total cost of the memory system
MEMORY HIERARCHY
MEMORY HIERARCHY
CPU REGISTERS
 CACHE MEMORY
❖ Cache Memory is a special very high-speed
memory. It is used to speed up and synchronizing
with high-speed CPU.
❖ Cache memory is costlier than main memory or
disk memory but economical than CPU registers.
❖ Cache memory is an extremely fast memory type
that acts as a buffer between RAM and the CPU.
❖ It holds frequently requested data and instructions
so that they are immediately available to the CPU
when needed.
❖Cache memory is used to reduce the average
time to access data from the Main memory.
❖The cache is a smaller and faster memory which
stores copies of the data from frequently used
main memory locations.
❖There are various different independent caches in
a CPU, which store instructions and data.
MAGNETIC TAPE
MAGNETIC DISK
MAIN MEMORY
 CACHE PERFORMANCE
When the processor needs to read or write a location in
main memory, it first checks for a corresponding entry
in the cache

• If the processor finds that the memory location is in

the cache, a cache hit has occurred and data is read
from cache
• If the processor does not find the memory location
in the cache, a cache miss has occurred. For a cache
miss, the cache allocates a new entry and copies in
data from main memory, then the request is fulfilled
from the contents of the cache.
MAPPING
MEMORY UPDATING STRATEGIES
VIRTUAL MEMORY
PAGED MEMORY