Opt Quant Electron (2017)49:413

https://doi.org/10.1007/s11082-017-1256-4

Simulation and demonstration of electro-optic digital

logic gates based on a single microring resonator

F. K. Law1 • M. Rakib Uddin1 • Hasnul Hashim1 • Zainidi Hamid1

Received: 24 August 2017 / Accepted: 17 November 2017

 Springer Science+Business Media, LLC, part of Springer Nature 2017

Abstract We propose and demonstrate directed optical digital logic function which can
perform several logic gates using a single microring resonator. The mode operations
achieved are logic buffer, inverter, AND, NAND, OR and NOR operations. Numerical
simulations, in order to analyze its static as well as dynamic responses, are carried out. In
addition, we also present the fundamental numerical principles used by the simulation
software in order to fully justify the simulation results. These principles are divided into
three components, structure based free carrier distribution principles, change in refractive
index of the waveguide and the scattering analysis on the microring resonator coupling
region.

Keywords Photonics  Electro-optic logic  Microring resonator

1 Introduction

Optical communication has undergone rapid growth in recent years due to its advantage of
offering high speed, low power, and improved security (Caulfield and Dolev 2010; Hardy
and Shamir 2007; Miller 2010a; Reed and Knights 2004; Tucker 2010). Electrical com-
munication in silicon has been shown that it has reached its limitation in terms of band-
width with its shrinking for single chip integration (Artundo et al. 2006; Jokerst et al. 2003;
Miller 2010b). Researchers have begun to determine several schemes in order to resolve
these limitations presented in silicon photonics. One of the most promising candidates is
the integration of silicon photonics into digital information processing and computing. In
recent years, we have seen the development in silicon photonics and various silicon-based

& M. Rakib Uddin

mmrakib@yahoo.com; rakib.uddin@utb.edu.bn
1
Electrical and Electronic Engineering Programme Area, Faculty of Engineering, Universiti
Teknologi Brunei (UTB), Gadong, Brunei Darussalam

123
413 Page 2 of 16 F. K. Law et al.

optical devices have been proposed and shown, these include optical modulators (Liu et al.
2004; Reed et al. 2010), and optical analog-to-digital converters (Khilo et al. 2012).
There are currently two possible methods that can be used to fully utilize or implement
optical nature into optical computing operation. One is to design and build an optical
transistor and replace all the current electronic computer design with it. However, due to
the difference in nature and properties of electrons and photons, this has been proved to be
nearly impossible. This is where directed logic proposed by Hardy and Shamir in 2007 is
very suitable, where their design not only breaks the traditional electronic principles, but
also implements the use of electrons and photons to create a higher speed and low power
electro-optic system design.
Directed logic is a new logical paradigm where optical information processing is done
via switching of optical networks to perform a logical operation (Soref 2011; Xu and Soref
2011). The electrical input signal behaves as the operand of the network where it is fed into
the electro-optic modulators and the resultant output of the operation is generated in terms
of optical light. All operations carried by each switch is independent of each other, thus this
causes no accumulation of delays by the design, which is in contrast to the electronic logic
circuits where gate delays are cascaded with each other and eventually causing large delays
between the inputs and the outputs (Qiu et al. 2014).
Research on directed logic gates since then have taken a lot of interest among
researchers, with further development have been achieved and demonstrated, such as the
electro-optic logic gates (Liu et al. 2013; Tian et al. 2011; Zhang et al. 2010; Lee et al.
2006), the binary counter and bit comparator (Sethi and Roy 2014). In this paper, we
propose and demonstrate a new novel scheme utilizing only a single microring resonator to
perform logical operations. Several logic operations achieved are AND/NAND gate, OR/
NOR gate as well as buffer and inverter. PIN diodes are embedded around the microring
resonator (MRR) in order to modulate spectrum response output of the MRR through the
plasma dispersion effect (Li et al. 1999).
All optical logic circuits have been realized as well, such as the new configuration of
all-optical AND gate based on 2D photonic crystal made of silicon rods in air (Shaik and
Rangaswamy 2016), the demonstration of all-optical nonlinear switching in compact
GaAs–AlGaAs microring resonators at 1550 nm wavelength (Van et al. 2002). In terms of
all optical D type flip flop, a novel scheme for all optical clocked D flip flop based on single
micro-ring resonator with a feedback loop have been proposed as well (Rakshit et al.
2014). The modulation scheme is achieved by pumping optical beam to the microring
resonator. Though all optical logic circuits have been realized and shown by the afore-
mentioned works, our proposed design requires only one ring resonator to achieve all basic
logic function and it is compatible with the current CMOS technology to fabricate.

2 Operation principle

The proposed logic circuit consists of a single MRR, with two bus waveguides, the upper
and the lower straight waveguides as shown in Fig. 1. The embedded PIN diodes are
configured to be nonlinear modulation with carrier injection forward-biased setup. The
circuit contains four ports labeled as Input, Through, Drop and Add which is denoted in
Fig. 1. A monochromatic continuous optical wave with a wavelength of ki is injected to the
input port, where the signal is modulated by a single electrical pulse signal fed into the
MRR PIN junction. The electrical input pulse is defined as logical 0 when it is at a low

123
Simulation and demonstration of electro-optic digital logic… Page 3 of 16 413

Fig. 1 Architecture and scattering matrix model of the MRR device (EPS: electrical pulse sequence)

level and logical 1 when it is at a high level. Based on the electrical input pulse, the optical
output power is obtained at logical 1 when the optical output power is at a high level and
logical 0 is obtained when it is at a low level. The MRR is on-resonance at ki when the
electrical input voltage is at a low level, and MRR is off-resonance at ki when the electrical
input voltage fed into the MRR is at a high level. Based on the definitions listed, several
logic operations can be performed by the proposed design. For the one input logic gates,
we set the electrical pulse injected to the MRR to be a one input pulse, while for two input
logic gates, we set up the input to be an addition of the two input pulses sent to the MRR as
one stream, in other words, the two inputs of the gates are labeled X and Y, and the single
signal being fed into the MRR is the amplitude summation of the two inputs (Input
X ? Input Y = Electrical Input Pulse to the MRR).

2.1 Buffer and inverter

In the buffer and inverter operation mode, the MRR is on-resonance at working wavelength
ki when the applied voltage to the input pulse is at a low level. At this time, the optical
signal fed into the MRR is accepted and most of the light intensities are coupled to the ring
waveguide, and ejected to the Drop port, causing the Through port to generate a low-level
light output. Thus, the output power at through port is at a low level (logical 0), while the
optical output power at the drop port is at a high level (logical 1). When the applied voltage
to the input pulse is at a high level, the MRR is off-resonance at ki. During this time, most
light is passed through the straight waveguide instead of being coupled, and thus the
Through port output power is at a high level (logical 1), while the drop port output power is
at a low level (logical 0). Based on the above discussions, we can generate the truth table of
the circuit, and thus we can see that the circuit can perform the buffer and inverter logic
operation.

2.2 AND and NAND mode

In the AND and NAND operation mode, the MRR is on-resonance at ki when both input
pulses at a low level (X = 0, Y = 0). During this operation, the output power at through
port and drop port is at a low level (logical 0) and high level (logical 1) respectively. When
one of the input signals is at a high level (X = 0, Y = 1 or X = 1, Y = 0), the MRR is
still on-resonance at ki due to lack of applied voltage to make a clear change in modulation

123
413 Page 4 of 16 F. K. Law et al.

response. This will cause the through the port optical power to a low level (logical 0) while
the drop port optical power to a high level (logical 1). The MRR is only off-resonance
when both the applied input signals injected into it are in high level (X = 1, Y = 1).
During this state, most of the light is passed to Through port, thus it exhibits a high-power
level (logical 1) and the drop port to have a low power level (logical 0). By plotting the
truth table, we can determine that the circuit can perform AND logic operation at the
Through port, while NAND operation can be obtained simultaneously from the Drop port.

2.3 OR and NOR mode

In this operation mode, higher voltage levels for overall operation are used overall so that
the MRR is only on-resonance at ki when both input signals are at low level (X = 0,
Y = 0), similar to that of AND and NAND mode. This will cause the Through port optical
power level to low level (logical 0) while the drop port optical power level to high level
(logical 1). The MRR starts off-resonance when one of the input is at a high level (X = 0,
y = 1 or X = 0, Y = 1). During this state, the Through port exports an optical power of
high level (logical 1) while the drop port gives out an optical power of low level (logical 0).
The MRR is at similar state (off-resonance at ki) when both inputs applied to the circuit is
at a high level (X = 1, Y = 1), and thus similar output power levels can be obtained from
the circuit (Through = 1, Drop = 0). By constructing a truth table detailing all the above
discussion, we can configure the circuit to even perform as an OR mode operation at the
Through port and NOR mode operation at the drop port.

3 Device design

The device waveguide is designed on a SOI wafer with a 270 nm-thick silicon layer and
1 lm-thick buried SiO2 layer. The rib waveguide dimension is constructed to be 400 nm in
width, 270 nm in height and 50 nm in slab thickness as shown in Fig. 2, which the result is
in the form of fundamental quasi-TE mode. The ring waveguide has a ring length of
60 lm, where the gap in the coupling region is set to be around 300 nm. The doping
regions are illustrated in Fig. 2, where the dosage of both p? and n? doping region are set
to be 1 9 1018 cm-2, and p- and n- doping region are set to 5 9 1017 cm-2 and
2.5 9 1017 cm-2 respectively. A surface oxide SiO2 of 1 lm thickness is set on top of the

Fig. 2 Cross-section of the waveguide dimension

123
Simulation and demonstration of electro-optic digital logic… Page 5 of 16 413

silicon waveguides as the separate layer, and aluminum electrical contacts for source and
drain connections are placed for plasma dispersion effect via electrical modulation. Upon
initial modeling simulation of the waveguide, it is found out that the propagation loss of the
waveguide in quasi-TE transmission is 5.01 dB/cm.

4 Simulation results

4.1 Static response test

The characterization of the static response of the device is done in order to determine its
working wavelength and voltages. This can be done by using a Tunable Laser Source
(TLS), a Tunable Voltage Source (TVS) and the Optical Spectrum Analyzer (OSA) as
shown in Fig. 3. A broadband light wave output from TLS is injected into the circuit, and a
tunable voltage source is applied to the P–I–N junction of the device. The output light is
fed into the OSA for the analysis. The P–I–N junction is forward biased at a voltage
ranging from 0 up to 1.4 V. The change in effective index of the device is seen in Fig. 4,
where the markers indicate the voltage at which the device effective index is determined.
Based on the result, we can see that the real effective index of the silicon material inside
the waveguide decreases due to free carriers are being injected into the rib waveguide. The
change is also apparent when the voltage applied to it is more than 0.8 V. The resonance
shift per unit voltage is measured to be 400 pm/V when the voltage applied is 0.9 V and
above. The resonance wavelength of 1547.9 nm is chosen as the working wavelength kw.
When the voltage applied to the MRR is 0 V, the optical wave at kw is coupled into the
ring, leaving a very small residue of light at the through the port.

4.1.1 Buffer and inverter

When the voltage applied to the MRR is 0 V, the optical wave at kw is coupled into the ring
waveguide, leaving a very small residue of light at the through port, logic 0 is obtained at
kw, and these light wave coupled into the ring is being deposited mostly at the drop port,
and thus logic 1 is obtained at kw. When the voltage applied to the MRR is 1.2 V, the
resonance shifts from its original location of kw to 1546.5 nm due to electro-optic effect
where the refractive index of the waveguide is increased. When this happens, the light
wave is passed to the through the port at kw, thus logic 1 is obtained, and due to very less
light is coupled and deposited into the drop port, the light wave displayed at kw is low
level, and logic 0 is obtained (Fig. 5).
In the buffer and inverter operation mode, the MRR is on-resonance at working
wavelength ki when the applied voltage to the input pulse is at a low level. At this time, the

Fig. 3 Simulation schematic for the static response of the device (TLS: tunable laser source; TVS: tunable
voltage source; DUT: device under test; OSA: optical spectrum analyzer)

123
413 Page 6 of 16 F. K. Law et al.

Fig. 4 Real (graph to the left) and imaginary (graph to the right) change in effective index with the applied
voltage

optical signal fed into the MRR is accepted and most of the light intensities are coupled to
the ring waveguide, and ejected to the Drop port, causing the Through port to generate a
low-level light output. Thus, the output power at through port is at a low level (logical 0),
while the optical output power at the drop port is at a high level (logical 1). When the
applied voltage to the input pulse is at a high level, the MRR is off-resonance at ki. During
this time, most light is passed through the straight waveguide instead of being coupled, and
thus the Through port output power is at a high level (logical 1), while the drop port output
power is at a low level (logical 0). Based on the above discussions, we can generate the
truth table of the circuit, and thus we can see that the circuit can perform the buffer and
inverter logic operation.

4.1.2 AND and NAND mode

We can also achieve AND and NAND mode operation by having the two logical inputs to
be summed into one electrical signal with different magnitude levels as described earlier.
When both voltages applied to the MRR are 0 V, the optical wave at kw is coupled into the
ring waveguide, same phenomenon as the buffer and inverter 0 V voltage input response.
This will cause the through the port spectrum to have optical light at kw to be missing
(logical 0), where it emerges mostly at the drop port spectrum (logical 1). When one of the
voltages applied to MRR is 0.6 V (X = 0 V, Y = 0.6 V or X = 0.6 V, Y = 0 V), the
resonance stays at its original location, thus the through the port and the drop port remains
to have the same output spectrum. However, when both voltages applied are 0.6 V
(X = 0.6 V, Y = 0.6 V), the resonance is shifted from kw to 1546.5 nm, and thus the
optical light at kw is now passed to the through port (logical 1), while the drop port exhibits
missing light wave at kw (logical 0), which are shown in Fig. 6 and in Fig. 7, respectively.

4.1.3 OR and NOR mode

The circuit can also perform as OR and NOR mode operation by doubling the voltage
applied to MRR from the AND and NAND operation. When both voltages applied are 0 V,
MRR will behave exactly as mentioned in both mode operations earlier. When one of the
voltages applied is 1.2 V (X = 0 V, Y = 1.2 V or X = 1.2 V, Y = 0 V), the resonance is
shifted from kw to 1546.5 nm. This causes the through the port to possess the optical wave
at kw to be in high level (logical 1) while the drop port is now having a low-level optical
wave at kw (logical 0). When the both voltages applied is 1.2 V, (X = 1.2 V, Y = 1.2 V),

123
Simulation and demonstration of electro-optic digital logic… Page 7 of 16 413

Fig. 5 Response spectra of the device at through port for (a, b) and drop port for (c, d) with the applied
voltages to MRR, where a, c at 0 V, and b, d at 1.2 V

the resonance is shifted even more from 1546.5 nm to 1545.7 nm, thus the resultant
spectrum at the through port is now having high-level optical wave at kw (logical 1), and
the drop port spectrum is having a low-level optical wave at kw (logical 0), which are
shown in Fig. 8 and in Fig. 9, respectively.

123
413 Page 8 of 16 F. K. Law et al.

Fig. 6 Response spectra of the device at through port for (a–c) with the applied voltages to MRR, where
a at 0 V, b at 0.6 V and c at 1.2 V

4.2 Dynamic response test

A tunable laser source (TLS), an oscilloscope (OSC), two Non-Return Zero digital bit
sequence generator (BSG), and a photodetector are used in the circuit design as shown in
Fig. 10 to characterize the dynamic performance of the device. A monochromatic light
with the wavelength of kw and the output power of 5 dBm from the laser source is injected
into the device. In order to characterize a one input logic gates (buffer and inverter), a
single binary sequence non-return-zero signal is fed into the device at 10 Gbps is generated
by the BSG is applied into MRR. In the case of two input logic gates (AND, NAND, OR
and NOR mode operation), two binary sequences non-return-zero signals are fed into a
single signal source into the device at the same speed of 10Gbps. The output light signal is
converted into an electrical signal by a photodetector which is finally fed into the oscil-
loscope for observation.
The dynamic simulation results are demonstrated in Figs. 11, 12 and 13 which we can
see that the device can operate at all the proposed mode operations correctly. Based on the

123
Simulation and demonstration of electro-optic digital logic… Page 9 of 16 413

Fig. 7 Response spectra of the device at drop port for (a–c) with the applied voltages to MRR, where a at
0 V, b at 0.6 V and c at 1.2 V

result shown, we can see the overshoot and ringdown behavior occurs when the output
changes its state from low level (logical 0) to high level (logical 1). This is due to MRR is a
situation of two different working states, where the energy stored in the ring must be
released when the ring is off-resonance. The release is done to the through the port, causing
the overshoot behavior occurs. This can be reduced by applying the low pass filter into the
output electrical signal. This method, however, will cause a delay on the output due to the
electrical circuit characteristics of the filter. Notice also that all the dynamic drop port
outputs have a low extinction ratio compared to through port (7–9 dB), this is due to the
high rising time for the output light as well as loss to the ring and drop waveguides.
The proposed design has the maximum data rate of 12 Gbps, if we limit the output of
the NOR mode operation to exhibit the extinction ratio of 5 dB. The speed of operation is
hindered possibly by the limitation of rising and falling time on the drop port output of the
microring resonators used in the design, as well as the waveguide losses (bent loss,
propagation loss).

123
413 Page 10 of 16 F. K. Law et al.

Fig. 8 Response spectra of the device at through port for (a–c) with the applied voltages to MRR, where
a at 0 V, b at 1.2 V and c at 2.4 V

5 Numerical simulation theory

In this section, we present some of the fundamental theory used in the simulation software
in order to correctly demonstrate the operation of the device.
The first part is the mathematical and physics formalism of the P–I–N junction, where
we simulate the behavior of the silicon waveguide in response to the variant exposure to an
electric field generated by the electrical contacts. In order to simulate this, we need to
understand the response of free carriers with the varying electric field, which is calculated
based on Poisson and Drift–Diffusion equations (Prieto-Blanco 2008).
We start with the net current density in a semiconductor diode, which is formulated as
shown in (Halliday et al. 2001):

123
Simulation and demonstration of electro-optic digital logic… Page 11 of 16 413

Fig. 9 Response spectra of the device at drop port for (a–c) with the applied voltages to MRR, where a at
0 V, b at 1.2 V and c at 2.4 V

Fig. 10 Simulation schematic for the dynamic characterization of the device (TLS: Tunable Laser Source;
BSG: Binary Sequence Generator; PD: Photodetector; OSC: Oscilloscope; DUT: Device under test)

Jn ¼ qln nE þ qDn rn
ð1Þ
Jp ¼ qlp pE þ qDp rp

where Jn,p is the current density (A/cm2), q is the positive electron charge, ln,p is the
mobility of the free carriers, E is the electric field exposed to the waveguide, Dn,p refers to
the diffusivity with n and p are the electron and holes densities. These equations represent

123
413 Page 12 of 16 F. K. Law et al.

Fig. 11 Dynamic simulation results of the device. a Signal applied to MRR. b Buffer operation result.
c Inverter operation result

Fig. 12 Dynamic simulation results of the device. a, b Signals applied to MRR. c AND operation result.
d NAND operation result

123
Simulation and demonstration of electro-optic digital logic… Page 13 of 16 413

Fig. 13 Dynamic simulation results of the device. a, b Signals applied to MRR. c OR operation result.
d NOR operation result

the summation of the drift due to applied electric field and the random thermal diffusion
due to the gradient in the density.
The mobility ln,p shows the easiness of the free carriers can move through the
waveguide (in this case, the carriers are drifting into the rib waveguide, lowering the
intrinsic region). It is related to the diffusivity Dn,p as shown in through Einstein relation by
electrical mobility equation (Van Zeghbroeck 2004),
kB T
Dn;p ¼ ln;p ð2Þ
q
where kB is the Boltzmann constant.
The electric field applied to the waveguide can be calculated by solving the Poisson’s
equation (Fischetti and Vandenberghe 2016),
r  ðerV Þ ¼ qq ð3Þ
where e is the dielectric permittivity, V is the electrostatic potential and q is the net charge
density given by,
q¼pnþC ð4Þ
where it includes the contribution C from the ionized impurity density.
Once the free carriers (electrons and holes) distribution profile with respect to the
voltage applied is known, the next part is to determine the change in complex effective
index and loss by the selected waveguide design. This is done by converting the charge

123
413 Page 14 of 16 F. K. Law et al.

distribution profile into the change of refractive index. The model for the silicon material is
more accurately described by Soref and Bennett (1987).

Dn ¼ ðdn ApÞðDPÞdn Ep
þðdn AnÞðDN Þdn En
ð5Þ
Da ¼ ðda ApÞðDPÞda Ep
þðda AnÞðDN Þda En

where Dn is the change in refractive index, Da is the variation in absorption coefficient in

cm-1, DP and DN is the change in hole and electron concentration respectively in cm-3.
It is known that based on Soref et al. experiment, the coefficients for the model at
1550 nm operating wavelength are,
da Ap ¼ 6  1018
da An ¼ 8:5  1018
ð6Þ
dn Ap ¼  8:5  1018
dn An ¼  8:8  1022

Once MRR is designed with the waveguide dimension and P–I–N junction as described
earlier, the coupling region is needed to take into account in order to fully simulate the
MRR. We divide the schematic of the device into two coupling regions as shown in Fig. 1.
Each coupling region is modeled by a scattering analysis (Poon et al. 2004). Consider the
coupling region Z1, we can deduce the field relationships of the waveguide ports to form
(Sacher and Poon 2008),
E12 ¼ t1  E11 þ j  k1  E13
E13 ¼ t2  E14  a  expðjhÞ ð7Þ
E14 ¼ j  k1  E11 þ t1  E13

where E12 is the output light intensity (through the port), E11 is the input light intensity, t1
and t2 are the transmission coefficients for through and drop coupler respectively, k1 and k1
are the coupling coefficients for Z1 and Z2 coupler respectively, a is the round-trip loss
coefficient of the ring waveguide, h is the single-pass phase shift, which is given by:
-L r
h¼ ¼ 2prkneff ¼ 4p2 neff ð8Þ
c k
We assume that the parameters t and k also satisfy the relation:

jkj2 þjtj2 ¼ 1 ð9Þ

The output static transmission for the through and drop port is as shown:

t1  a  t2  expðjhÞ
Ethrough ¼
1  a  t1  t2  expðjhÞ
ð10Þ
a0:5  k1  k2  expðjh=2Þ
Edrop ¼
1  a  t1  t2  expðjhÞ
In terms of dynamic response analysis, the numerical simulation solves the time domain
field equations as shown below (Sacher and Poon 2008):

123
Simulation and demonstration of electro-optic digital logic… Page 15 of 16 413

Table 1 Micro-ring resonatior

Parameters Values
device parameters used in the
simulation
Ring length 60 lm
Cross-coupling coefficient 0.105
Transmission coefficient 0.987
Waveguide loss 5.01 dB/cm
Effective Index Coefficient 2.8
Group Index Coefficient 4.03
Decrease in Refractive Index after 0.8 V 400 pm/V

E12 ðtÞ ¼ t1  E11 ðtÞ þ j  k1  E13 ðtÞ

E13 ðtÞ ¼ E14 ðt  sÞ  aðtÞ  expðjhðtÞÞ ð11Þ
E14 ðtÞ ¼ t2 ðj  k1  E11 ðtÞ þ t1  E13 ðtÞÞ

where s is the resonator round-trip time (Table 1).

6 Conclusions

In conclusion, we have proposed and demonstrated by numerical simulation a directed

logic gates using a single add-drop MRR. According to the different definitions of the
MRR resonant states, the circuit can achieve the six types of logical operations including
logical buffer, inverter, AND, NAND, OR and NOR. We have also shown that two
opposite logic operations can be achieved at one mode operation, such as in the case of
AND and NAND mode operation, wherein this mode, we obtained AND operation at
through port while also obtaining NAND operation at the drop port. P–I–N diodes are
embedded around the MRR to modulate MRR through carrier-injection modulation
scheme. The logical mode operations with the operation speed of 10Gbps have been
demonstrated successfully. This shows that by using a single MRR, we can achieve logical
operation by varying the voltages applied to the P–I–N diodes, which is important for us to
optimize the circuit in the future by implementing other advanced high-speed modulation
schemes such as the carrier-depletion modulation where higher speed can be achieved. In
our dynamic response simulation, we incorporate the NRZ pulse generated by digital bit
sequence generators. The proposed design does not support RZ pulses due to constant
digital signal is required to enable the change in resonance response output to take place.

References
Artundo, I., Desmet, L., Heirman, W., Debaes, C., Dambre, J., Van Campenhout, J.M., et al.: Selective
optical broadcast component for reconfigurable multiprocessor interconnects. IEEE J. Sel. Top.
Quantum Electron. 12, 828–837 (2006)
Caulfield, H.J., Dolev, S.: Why future supercomputing requires optics. Nat. Photonics 4, 261–263 (2010)
Fischetti, M.V., Vandenberghe, W.G.: Scattering with ionized impurities. In: Advanced Physics of Electron
Transport in Semiconductors and Nanostructures, pp. 315–325. Springer, Switzerland (2016)
Halliday, D., Resnick, R., Krane, K.S.: Physics, vol. 2, 5th edn. Wiley, New York (2001)
Hardy, J., Shamir, J.: Optics inspired logic architecture. Opt. Express 15, 150–165 (2007)

123
413 Page 16 of 16 F. K. Law et al.

Jokerst, N.M., Brooke, M.A., Cho, S.-Y., Wilkinson, S., Vrazel, M., Fike, S., et al.: The heterogeneous
integration of optical interconnections into integrated microsystems. IEEE J. Sel. Top. Quantum
Electron. 9, 350–360 (2003)
Khilo, A., Spector, S.J., Grein, M.E., Nejadmalayeri, A.H., Holzwarth, C.W., Sander, M.Y., et al.: Photonic
ADC: overcoming the bottleneck of electronic jitter. Opt. Express 20, 4454–4469 (2012)
Lee, Y.L., Yu, B.-A., Eom, T.J., Shin, W., Jung, C., Noh, Y.-C., et al.: All-optical AND and NAND gates
based on cascaded second-order nonlinear 3 waveguide. Opt. Express 14, 2776–2782 (2006)
Li, B., Li, G., Liu, E., Jiang, Z., Pei, C., Wang, X.: 1.55 lm reflection-type optical waveguide switch based
on SiGe/Si plasma dispersion effect. Appl. Phys. Lett. 75, 1–3 (1999)
Liu, A., Jones, R., Liao, L., Samara-Rubio, D., Rubin, D., Cohen, O., et al.: A high-speed silicon optical
modulator based on a metal–oxide–semiconductor capacitor. Nature 427, 615–618 (2004)
Liu, W., Yang, D., Shen, G., Tian, H., Ji, Y.: Design of ultra compact all-optical XOR, XNOR, NAND and
OR gates using photonic crystal multi-mode interference waveguides. Opt. Laser Technol. 50, 55–64
(2013)
Miller, D.A.: The role of optics in computing. Nat. Photonics 4, 406–407 (2010a)
Miller, D.A.: Are optical transistors the logical next step? Nat. Photonics 4, 3–5 (2010b)
Poon, J.K., Scheuer, J., Mookherjea, S., Paloczi, G.T., Huang, Y., Yariv, A.: Matrix analysis of microring
coupled-resonator optical waveguides. Opt. Express 12, 90–103 (2004)
Prieto-Blanco, X.: Electro-diffusion equations of monovalent cations in glass under charge neutrality
approximation for optical waveguide fabrication. Opt. Mater. 31, 418–428 (2008)
Qiu, C., Gao, W., Soref, R., Robinson, J.T., Xu, Q.: Reconfigurable electro-optical directed-logic circuit
using carrier-depletion micro-ring resonators. Opt. Lett. 39, 6767–6770 (2014)
Rakshit, J.K., Roy, J.N., Chattopadhyay, T.: A theoretical study of all optical clocked D flip flop using single
micro-ring resonator. J. Comput. Electron. 13, 278–286 (2014)
Reed, G.T., Knights, A.P.: Silicon Photonics: An Introduction. Wiley, New York (2004)
Reed, G.T., Mashanovich, G., Gardes, F., Thomson, D.: Silicon optical modulators. Nat. Photonics 4,
518–526 (2010)
Sacher, W.D., Poon, J.K.: Dynamics of microring resonator modulators. Opt. Express 16, 15741–15753
(2008)
Sethi, P., Roy, S.: All-optical ultrafast XOR/XNOR logic gates, binary counter, and double-bit comparator
with silicon microring resonators. Appl. Opt. 53, 6527–6536 (2014)
Shaik, E.H., Rangaswamy, N.: Design of photonic crystal-based all-optical AND gate using T-shaped
waveguide. J. Mod. Opt. 63, 941–949 (2016)
Soref, R.: Reconfigurable integrated optoelectronics. Adv. Optoelectron. 2011, 627802 (2011)
Soref, R., Bennett, B.: Electrooptical effects in silicon. IEEE J. Quantum Electron. 23, 123–129 (1987)
Tian, Y., Zhang, L., Ji, R., Yang, L., Zhou, P., Chen, H., et al.: Proof of concept of directed OR/NOR and
AND/NAND logic circuit consisting of two parallel microring resonators. Opt. Lett. 36, 1650–1652
(2011)
Tucker, R.S.: The role of optics in computing. Nat. Photonics 4, 405–405 (2010)
Van Zeghbroeck, B.: Principles of semiconductor devices. Colarado University, Colarado (2004)
Van, V., Ibrahim, T., Ritter, K., Absil, P., Johnson, F., Grover, R., et al.: All-optical nonlinear switching in
GaAs–AlGaAs microring resonators. IEEE Photonics Technol. Lett. 14, 74–76 (2002)
Xu, Q., Soref, R.: Reconfigurable optical directed-logic circuits using microresonator-based optical
switches. Opt. Express 19, 5244–5259 (2011)
Zhang, L., Ji, R., Jia, L., Yang, L., Zhou, P., Tian, Y., et al.: Demonstration of directed XOR/XNOR logic
gates using two cascaded microring resonators. Opt. Lett. 35, 1620–1622 (2010)

123