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Xi Zhaoa,1 , Wei Suna , Sheng Lua,2 , Ying Maa , Yang Zhaoa , Zhengkai Jiaoa
a School of Advanced Manufacturing Engineering, Chongqing University of Posts and
Telecommunications
No.2 Chongwen Road Chongqing China
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Abstract
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Adding cooling channels to a 3D chip is an effective way to improve its heat
dissipation. A cooling channel topology optimization method for 3D chips is
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purposed. The multi-layer stacking feature of the 3D chip and the conductor
channel (through-silicon via, TSV) feature perpendicular to the chip are fully
considered. This study improves the computational efficiency of the optimiza-
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tion solution in two ways. One is to describe the TSV structure by efficiently
moving morphable component (MMC) according to the structural characteris-
tics of the TSV. The second is to describe the flow velocity field of the cooling
channel by replacing the turbulent flow model with a Darcy flow model to sim-
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plify the analysis of the flow velocity field. The optimization results are verified
in a more refined turbulence analysis model. By comparing the existing micro-
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pillar structure design, the present optimization method can better improve the
heat dissipation performance of the 3D chip. This method can be better applied
in the front-end of chip design, helping designers to consider both the function
design of the chip and the cooling and heat dissipation design.
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This preprint research paper has not been peer reviewed. Electronic copy available at: https://ssrn.com/abstract=4243448
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Acknowledgement
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This research is financially supported by the State Key Laboratory of Me-
chanical System and Vibration (Grant No. MSV202208) and Postdoctoral
Foundation of Chongqing Science and Technology Bureau (No.cstc2021jcyj-
495 bshX0021)
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Replication of Results
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reproduced by adjusting the relevant formulations and design parameters in
this paper.
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This preprint research paper has not been peer reviewed. Electronic copy available at: https://ssrn.com/abstract=4243448