Professional Documents
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Instructions to Candidates
1. The examination rules set out on the last page of the answer booklet are to be complied
with.
6. Fill in the Question Numbers, in the order that they were answered, in the boxes found
on the front cover of the answer booklet under the column “Questions Answered”.
2011/2012/S2 Page 1
SINGAPORE POLYTECHNIC ET1006
SECTION A
1. Please tick your answers in the MCQ box on the inside of the front cover of the answer
booklet.
A1. The phasors which represent the source voltage and current in an ac circuit are
respectively:
V = 110∠90 o V
I = 1.1∠0 o A
Which of the following statements is true? (2 marks)
A2. A 40 mH inductor is connected in series with inductor L1. They are then connected
across a 230V ac generator operating at frequency of 1 kHz. If the total reactance is
503Ω, the value of L1 is: (2 marks)
(a) 80.05 mH
(b) 52.5 mH
(c) 40.05 mH
(d) 12.5 mH
A3. A series RLC circuit has the following resistance and reactance characteristics:
R = 2 kΩ, XL = j1 kΩ, XC = -j1 kΩ
(a) 1
(b) 0.707 lagging
(c) 0.707 leading
(d) 2 leading
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SINGAPORE POLYTECHNIC ET1006
A4. An ac circuit has an apparent power (S) = 3.6 kVA and a true power (P) = 1.1 kW.
What is its reactive power (Q)? (2 marks)
(a) 2.5 kW
(b) 3.43 kW
(c) 3.43 kVAR
(d) 2.5 kVAR
A5. In the circuit shown in Figure A5 uses silicon diodes, the value of voltage VR2 is:
(2 marks)
R1
(a) 4.3 V
(b) 2.5 V 1kΩ
Vs D1
(c) 2.15 V D2
5V
(d) 0V
- VR2 +
Figure A5
R2 1kΩ
A6. In Figure A6, the Circuit current IR is ______. Forward voltage of LED VF = 1.8V.(2 marks)
IR R
(a) 12.77 mA
(b) 8.93 mA 470Ω
(c) 3.83mA Vs
(d) 0 mA 6V
LED
Figure A6
A7. For an npn silicon transistor shown in Figure A7 to function normally, their supply
voltages VCC, VEE and VBB are such that:
(2 marks)
(a) VCC and VEE are more positive than VBB
(b) VCC and VEE are more negative than VBB
VCC
(c) VCC and VBB are more positive than VEE
(d) VBB and VEE are more positive than VCC
VBB
Figure A7 VBE
VEE
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SINGAPORE POLYTECHNIC ET1006
A8. An operational amplifier can operate in one of three input modes. Which of the
following is not an input mode? (2 marks)
A9. The operational amplifier circuit shown in Figure A9 is configured as: (2 marks)
Vin Figure A9
A10. The circuit in Figure A10 has an average output voltage of 22 V. Its peak voltage
across the entire secondary windings is: (2 marks)
(a) 67.72 V D1
(b) 70.52 V
(c) 35.26 V
(d) 33.85 V
CT
100 V
RL (500Ω)
D2
Figure A10
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SINGAPORE POLYTECHNIC ET1006
SECTION B
B1. In Figure B1, the thermistor, RTH, has a resistance of 82 kΩ at 0oC and 42 kΩ at
100oC. At 100oC, the transistor reaches its saturation with Vce(sat) = 0.2 V and LED is
turned on. At 0oC, the transistor is cut-off and LED is turned off.
Given that: VLED is 1.8 V when forward-biased, β = 120 and VBE = 0.7 V. Determine:
(a) The minimum voltage of Vb for saturation to occur; (5 marks)
(b) The minimum value of R1 for the circuit to operate; (3 marks)
(c) Show also that, with the calculated value of R1, whether the transistor is cut off
or conducting at 0oC. (2 marks)
R1
Use Vb = × VCC
R1 + RTH
Figure B1
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SINGAPORE POLYTECHNIC ET1006
B2. Two 50Hz sinusoidal ac voltage sources are connected in series as shown in Figure
B2. The expressions for the two sources are respectively:
R2
Figure B2 V1
2 kΩ
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SINGAPORE POLYTECHNIC ET1006
B3. (a) A pure sinusoidal waveform of 60 V peak is applied across terminals A and B
of the circuit in Figure B3. Sketch the modified waveform across the 1kΩ
resistor. Label all the voltage levels, including the zero voltage crossing points.
Assume that for the diode, VD = 0.7 V when forward biased.
(8 marks)
(b) How is it possible to vary the clipped level of the waveform without varying
the other undistorted peak? Choose your correct answer from below:
(i) Varying the applied voltage Vin
(ii) Changing the resistors R1 and R2
(iii) Varying the biasing battery Vs1
(iv) Replacing the diode D1. (2 marks)
A R1
200Ω
Vin D1
60Vp R2
1kΩ
Vs1
30 V
Figure B3
B
(a)
(b)
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SINGAPORE POLYTECHNIC ET1006
B4. (a) For the circuit in Figure B4, find the total impedance, circuit current, and the
voltages across the resistor, inductor and capacitor. Express all answers in
polar form. (6 marks)
(b) Sketch the phasor diagram of ࡵത, തതത തതതത and തതതത
ࢂࡸ , ࢂ ࢂࡾ obtained in part (a). (4 marks)
I
VR
R = 50 Ω
VS
VL XL = 75 Ω
10∠0°V
XC = 35 Ω
Figure B4 VC
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SINGAPORE POLYTECHNIC ET1006
B5. (a) An unfiltered bridge rectifier circuit of Figure B5-A using silicon diodes, is
powered by the ac supply. Determine the peak output voltage (Vp(out)).
(4 marks)
V0
Figure B5-A
(b) When a capacitor of value 6600 µF is added as a filter in the circuit of Figure
B5-A, the output voltage measured is as shown in Figure B5-B. Determine:
(i) The dc output voltage; and (2 marks)
(ii) The ripple factor in percentage. (2 marks)
0.8 V
31.1 V
Figure B5-B
(c) The filtered output as shown in Figure B5-B needs to be further improved to
obtain a constant 24 V DC output. Name a specific electronic device and its
part number which can be used to meet the requirement. You may refer to
information inTable B5. (2 marks)
Table B5
IC Part Number Regulated Voltage (V)
7918 - 18
7924 - 24
7818 + 18
7824 + 24
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SINGAPORE POLYTECHNIC ET1006
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SINGAPORE POLYTECHNIC ET1006
B6. (a) For the circuit shown in Figure B6-A, if Vi = 5V, Ri = 10kΩ and Rf = 12kΩ,
determine Vo. (3 marks)
Rf
12kΩ
Ri
Vi
10kΩ Vo
Figure B6-A
(b) For amplifier circuit shown in Figure B6-B, if R1 = 9kΩ, R2 = 4kΩ, R3 = 2kΩ
and Rf = 12kΩ, express Vout in terms of Vin1, Vin2 and Vin3. (3 marks)
Rf
R1
Vin1 12kΩ
9kΩ
R2
Vin2
4kΩ Vout
R3
Vin3
2kΩ
Figure B6-B
(c) Use the results of (a) and (b), design and draw a circuit which can implement
following expression: (4 marks)
1
Vo = + (V in 1 + V in 2 + V in 3 )
3
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SINGAPORE POLYTECHNIC ET1006
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SINGAPORE POLYTECHNIC ET1006
Figure B7-A R1
Vout1
Vin1
(c) Calculate the gain of the amplifier in Figure B7-B, given that R3= R4= 1 kΩ. Is
this an inverting or a non-inverting amplifier? Assume that op amp has ideal
characteristics. (3 marks)
R4
R3
Vin2
Figure B7-B
Vout2
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SINGAPORE POLYTECHNIC ET1006
B8. The circuit current, I, is to be used as the reference phasor in analysing the series RLC
circuit shown in Figure B8.
70 Ω
VS = 230∠φ oV
-j35 Ω
j120 Ω
Figure B8
- End of Paper -
2011/2012/S2 Page 14
SINGAPORE POLYTECHNIC ET1006
Formulae List
Resistors:
V2
Power dissipation in resistor, P = VI P=I2R P=
R
Capacitors:
1
Capacitive reactance, XC = in ohms
2πfC
Inductors:
Inductive reactance, XL = 2πfL in ohms
2011/2012/S2 Page 15
SINGAPORE POLYTECHNIC ET1006
AC Impedance/Admittance:
Series circuit,
1 1
ZR = R Z C = − jX C = − j = ∠ − 90o Z L = jX L = jωL = ωL∠90o ω = 2πf
ωC ωC
X tot
Z = Z1 + Z 2 + Z 3 + ......... φ = ∠Z = ∠I = tan −1
Rtot
Parallel circuit,
1 1
YR = G YC = jBC = jωC = ωC∠90o YL = − jBL = − j = ∠ − 90o ω = 2πf
ωL ωL
Btot
Y = Y1 + Y2 + Y3 + ......... φ = ∠Y = ∠VS = tan −1
Gtot
AC Power:
Pa = VS I = I 2 Z Ptrue = VS I cosφ = I 2 R Pr = VS I sin φ = I 2 X tot
R Ptrue VR
cosφ = = =
Z Pa VS
Diodes:
Forward voltage drop is 0.7 V for silicon diode and 0.3 V for germanium diode
∆VZ
Zener dynamic resistance ZZ =
∆I Z
Half-Wave Rectifier:
V
V = V − 0 .7 V V AVG = p ( out )
PIV = V
π
p ( out ) p (sec) p (sec)
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SINGAPORE POLYTECHNIC ET1006
Ripple Factor:
V r ( rms Vr( p− p)
r = )
where V r ( rms ) =
V DC 2 3
∆ V OUT V NL − V FL
Line Regulation = 100 % Load Regulation = 100 %
∆ V IN V FL
Transistors:
IC IC α DC
I E = IC + I B β DC = α DC = β DC =
IB IE 1 − α DC
V BE = 0 .7V VCC = V CE + I C RC
V BB = V BE + I B R B VCE = V CB + V BE
Operational Amplifiers
Rf
Voltage Gain of Inverting Amplifier: −
Ri
Rf
Voltage Gain of Non-inverting Amplifier: 1 +
Ri
Output voltage of summing amplifier:
R R R R
VO = − f V1 + f V2 + f V3 + ........... + f Vn for “n” inputs
R1 R2 R3 Rn
Threshold Voltages for comparator with positive feedback:
R2
Upper Trigger Point (UTP) = ( + VO[max ])
R1 + R 2
R2
Lower Trigger Point (LTP) = ( − VO[max ])
R1 + R 2
2011/2012/S2 Page 17