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Instructions to Candidates
1. The examination rules set out on the last page of the answer booklet are to be complied
with.
6. Fill in the Question Numbers, in the order that they were answered, in the boxes found
on the front cover of the answer booklet under the column “Questions Answered”.
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SINGAPORE POLYTECHNIC ET1006
SECTION A
1. Please tick your answers in the MCQ box on the inside of the front cover of the answer
booklet.
A1. Materials can be classified broadly into conductor, semiconductor and insulator base
on the size of the energy gap between
(a) the valence band and the conduction band.
(b) the valence band and the nucleus.
(c) the valence shell and the nucleus.
(d) the conduction band and the nucleus.
A2. Which one of the following curves shows the characteristics of the practical diode
model?
i i
0 v 0 v
(a) (b)
i i
0 v 0 v
(c) (d)
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SINGAPORE POLYTECHNIC ET1006
Figure A3
A4. A 3-V Zener diode is used to produce an approximately constant reference voltage.
Which one of the following circuits biases the Zener diode properly?
+ +
Vref Vref
9V ≈3V 9V ≈3V
− −
(a) (b)
+ +
Vref Vref
9V ≈3V 9V ≈3V
− −
(c) (d)
A6. An electric kettle consists of a coil with winding resistance. It consumes 3 kW of true
power P. If an apparent power S of 3.06 kVA is measured, the power factor is
(a) 0.98 leading
(b) 1.02 leading
(c) 0.98 lagging
(d) 1.02 lagging
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SINGAPORE POLYTECHNIC ET1006
A7. Identify two circuits which can generate the voltage waveform shown in Figure A7.
(a) Half-wave rectifier and waveform limiter
(b) Half-wave rectifier and Full-wave bridge rectifier
(c) Half-wave rectifier and full-wave centre-tapped transformer rectifier
(d) Full-wave bridge rectifier and full-wave centre-tapped transformer rectifier
0
t
Figure A7
A8. A rectifier produces a 60 V dc supply which has a small ripple superimposed on it.
The ripple factor is 0.5%. The rms voltage of the ripple is
(a) 0.1 V
(b) 0.3 V
(c) 0.42 V
(d) 3V
A9. A voltage regulator has a 12 V output when there is no load (load current = 0). When
the full-load current of 1 A is supplied by the regulator, the output voltage drops to
11.4 V. The voltage regulation is equal to
(a) 5.26%
(b) 7.44%
(c) 10.5%
(d) 95%
A10. Figure A10 shows a single digit LED display unit. Including the full stop on the
display, the unit contains how many light-emitting diode(s) in total?
(a) 1
(b) 2
(c) 7
(d) 8
Figure A10
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SINGAPORE POLYTECHNIC ET1006
SECTION B
B1. (a) What type of dopants (pentavalent or trivalent) is used to produce n-type silicon?
What are the majority carriers in n-type silicon? Explain how they are produced
by the dopant. (5 marks)
(b) For the silicon diode circuit shown in Figure B1, the forward voltage drop of the
diode D1 is 0.7 V. Determine:
(i) The maximum voltage of during the positive half cycle. (2 marks)
(ii) The peak inverse voltage (PIV) of diode D1. (3 marks)
R1
10V
100 Ω
0 D1 R2
Figure B1 100 Ω
−10V
B2. The transistor in Figure B2 is biased in the saturation region to light up the LED.
Given that the forward voltage of the LED, VLED = 2.0 V, VBE = 0.7 V when forward
biased; and VCE(sat) = 0.2 V in saturation mode.
VCC 9 V
R4 IC
560 Ω
R1
2.2 kΩ
R3
25 kΩ
Figure B2 VA VCE
R2
VBE
1.5 kΩ
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SINGAPORE POLYTECHNIC ET1006
B3. Figure B3 shows a moisture sensor circuit. When the sensor gets wet, the transistor
operates in saturation mode and the LED lights up. The following values are given for
this question:
Moisture sensor:
Resistance value when wet, RM(wet) = 0 Ω (close-circuited)
Resistance value when dry, RM(dry) = ∞ Ω (open-circuited)
LED:
LED forward voltage, VLED = 1.8 V
Transistor:
VBE = 0.7 V when transistor is conducting, β = 150, VCE(sat) = 0.2 V
(a) What are IB and IC when the moisture sensor is dry? (2 marks)
(b) When the moisture sensor is wet:
(i) Determine VBE and VCE. (2 marks)
(ii) Calculate IB and IC. (4 marks)
(iii) What is the function of the resistor RC? (2 marks)
VCC 10 V
IC RC
330 Ω
LED
Moisture
Sensor = RM RB
27 kΩ
VCE
IB VBE
Figure B3
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SINGAPORE POLYTECHNIC ET1006
B4. Two 500 Hz sinusoidal ac voltage sources are connected in series as shown in Figure
B4. The expressions for the two sources are respectively:
Figure B4
(a)
and V
Express V as phasors in polar form, with the voltage magnitudes
expressed in their rms values. (2 marks)
(b) in polar form.
Calculate the resultant rms source voltage V (2 marks)
(c)
, V
Draw the phasor diagram for V and V
. Indicate their magnitudes and
phase angles in your diagram. (3 marks)
(d) Write down the time-domain sinusoidal expression for the circuit current.
(3 marks)
B5. The circuit current, I̅ , is to be used as the reference phasor in analysing the series
RLC circuit shown in Figure B5.
XC
180 Ω
Figure B5
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SINGAPORE POLYTECHNIC ET1006
(b) Sketch the phasor diagram of the currents I̅ , I̅ and I
̅ obtained in part (a).
as reference phasor.
Use the supply voltage V (4 marks)
I̅
I̅ I
̅
V R XC
110∠0 Vo 120 Ω 90 Ω
Figure B6
B7. (a) Give two advantages of having the negative feedback loop in a non-inverting
operational amplifier circuit. (4 marks)
(b) With reference to Figure B7-A:
(i) Is this an inverting or a non-inverting amplifier? (1 mark)
(ii) Given that R1 = 1.5 kΩ and R2 = 12 kΩ, calculate the closed loop gain of
the amplifier. Indicate sign. (2 marks)
R2
R1
–
vout1
Figure B7-A vin1 +
R3
vin2 –
vout2
+
Figure B7-B
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SINGAPORE POLYTECHNIC ET1006
B8. Figure B8 shows the configuration of an op-amp circuit which has three input
terminals !
, ! and !" ; and an output terminal #$ .
R1 12 kΩ R4 3 kΩ
!
R2 2 kΩ
! –
#$
R3 4 kΩ +
!"
Figure B8
(a) Express the output voltage #$ in terms of the input voltages !
, ! and
!" . Indicate sign. (5 marks)
(b) If !
= 3 V, ! = 6 V, and !" = −12 V, determine #$ . Indicate sign.
(2 marks)
(c) By keeping the value of R4 to be 3 kΩ, redesign the circuit in Figure B8 such
that the output voltage #$ satisfies the expression:
#$ = −) !
+ ! + !" +
Draw your circuit in the answer booklet. Label all the resistance values of the
resistors.
(3 marks)
- End of Paper -
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Formulae List
Capacitors:
1
Capacitive reactance, XC = in ohms
2πfC
Inductors:
Inductive reactance, XL = 2πfL in ohms
AC Impedance/Admittance:
Series circuit,
1 1
ZR = R Z C = − jX C = − j = ∠ − 90o Z L = jX L = jωL = ωL∠90o ω = 2πf
ωC ωC
X tot
Z = Z1 + Z 2 + Z 3 + ......... φ = ∠Z = ∠I = tan −1
Rtot
Parallel circuit,
1 1
YR = G YC = jBC = jωC = ωC∠90o YL = − jBL = − j = ∠ − 90o ω = 2πf
ωL ωL
Btot
Y = Y1 + Y2 + Y3 + ......... φ = ∠Y = ∠VS = tan −1
Gtot
AC Power:
P
S = VS I = I 2 Z P = VS I cosφ Q = VS I sinφ cosφ =
S
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SINGAPORE POLYTECHNIC ET1006
Diodes:
Forward voltage drop is 0.7 V for silicon diode and 0.3 V for germanium diode
∆VZ
Zener impedance ZZ =
∆I Z
Half-Wave Rectifier:
V
V = V − 0 .7 V V = p ( out )
PIV = V
π
p ( out ) p (sec) AVG p (sec)
Ripple Factor:
V r ( rms Vr( p− p)
r = where V r ( rms ) =
)
V DC 2 3
∆ V OUT V NL − V FL
Line Regulation = 100 % Load Regulation = 100 %
∆ V IN V FL
Transistors:
IC IC α DC
I E = IC + I B β DC = α DC = β DC =
IB IE 1 − α DC
V BE = 0 .7V V BB = V BE + I B R B VCE = VCB + V BE
Operational Amplifiers
Rf
Voltage Gain of Inverting Amplifier: −
Ri
Rf
Voltage Gain of Non-inverting Amplifier: 1 +
Ri
Output voltage of summing amplifier:
R R R R
VO = − f V1 + f V2 + f V3 + ........... + f Vn for “n” inputs
R1 R2 R3 Rn
Threshold Voltages for comparator with positive feedback:
R2
Upper Trigger Point (UTP) = (+ VO[max ])
R1 + R 2
R2
Lower Trigger Point (LTP) = (−VO[max ])
R1 + R 2
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