You are on page 1of 14

Hello

Let’s get started!


Lecture 02

Computer Level Hierarchy – Part 2


Reference Book : “Computer Organization and Architecture” by Stallings

Yasas Sri Wickramasinghe 2


1.7 The von Neumann Model

• This is a general
depiction of a von
Neumann system:

• These computers
employ a fetch-
decode-execute
cycle to run
programs as
follows . . .

Yasas Sri Wickramasinghe 3


1.7 The von Neumann Model
• The control unit fetches the next instruction from memory
using the program counter to determine where the
instruction is located.

Yasas Sri Wickramasinghe 4


1.7 The von Neumann Model

• The instruction is decoded into a language that the ALU


can understand.

Yasas Sri Wickramasinghe 5


1.7 The von Neumann Model
• Any data operands required to execute the instruction are
fetched from memory and placed into registers within the
CPU.

Yasas Sri Wickramasinghe 6


1.7 The von Neumann Model
• The ALU executes the instruction and places results in
registers or memory.

Yasas Sri Wickramasinghe


7 7
Learning Advance Concepts of

Fetch ,Decode and


Execute Cycle
• Program instructions are stored inside the main memory
• The machine runs the programs sequentially (instruction per instruction –
machine instruction)
• Each machine instruction is fetched, decoded and executed during one cycle
known as the von Neumann execution cycle (also called the fetch-decode-
execute cycle)
• One iteration of the cycle is as follows:
1. The control unit fetches the next program instruction from the memory, using the
program counter to determine where the instruction is located.
2. The instruction is decoded into a language the ALU can understand.
3. Any data operands required to execute the instruction are fetched from memory and
placed into registers within the CPU.
4. The ALU executes the instruction and places the results in registers or memory.
Yasas Sri Wickramasinghe 8
Special Purpose Registers
Register Type Notation Purpose
Stores the results of
Accumulator AC
calculations
Stores the address in RAM of
Instruction Register IR/CIR the instruction to be
processed
Memory Address Stores the address in RAM of
MAR
Register the data to be processed
Memory Data Stores the data that is being
MDR
Register processed
Stores the address in RAM of
Program Counter PC
the next instruction

Yasas Sri Wickramasinghe 9


1.5 Historical Development
Fetch, Decode and Execute
Instruction 1
Instruction 2
Instruction 3
Instruction 3
Fetch Data 1 Data 2 Instruction 4
• PC indicates the iteration number
• CU fill the instruction register

Decode …

• what ALU should do (add, multiply, ..)
Instruction N
• Fill registers with required data

Yasas Sri Wickramasinghe 10


1.5 Historical Development
Fetch, Decode and Execute
Instruction 1
Instruction 2
Instruction 3
Instruction 3
Execute Data 1 Data 2 Instruction 4
• Execute the instruction Result
• Place the results in registers or memory



Instruction N

Yasas Sri Wickramasinghe 11


Self Learning Activity
Fetch, Decode and Execute

Yasas Sri Wickramasinghe 12


Little Man Computer
https://www.futurelearn.com/courses/how-computers-work/9/steps/897296

Yasas Sri Wickramasinghe 13


Stay Safe – Stay Home

Yasas Sri Wickramasinghe 14

You might also like