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Lecture 04

Instruction Set Architecture


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Reference Book : “Computer Organization and Architecture” by Stallings

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Understanding

Boundary of HW-SW

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ISA

Instruction Set
Architecture
• A well-defined hardware/software interface
• The “contract” between software and hardware
• Functional definition of storage locations & operations
• Storage locations: registers, memory
• Operations: add, multiply, branch, load, store, etc
• Precise description of how to invoke & access them
• ISA can have multiple implementations
• ISA allows software to direct hardware
• ISA defines machine language

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ISA

Instruction Set
Architecture

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ISA

Instruction Set Architecture defines

Memory Addressing Instruction I/O


Data Types
Registers Modes Set

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Different CPUs implement different sets of instructions.
examples: ARM, Intel x86, IBM/Motorola PowerPC (Macintosh), MIPS, Inter IA32 …

Two styles of CPU design

Reduced Instruction Set Complex Instruction Set


Computing - RISC Computing - CISC
Fixed-length instructions (mostly 32bit) Single instruction represents multiple
Small, highly optimized set of instructions operations (low level --> I/O, ALU, mem)

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Characteristics

CISC vs RISC

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Example

CISC vs RISC

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Understanding

CISC vs RISC

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ISA

Instruction

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ISA

Instruction Length

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ISA

Number of Addressing

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ISA

Number of Addressing

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ISA

Stack

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ISA

How many Addresses

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ISA

Addressing Modes

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Addressing Modes

Immediate Addressing

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Addressing Modes

Direct Addressing

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Addressing Modes

Indirect Addressing

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Addressing Modes

Indirect Addressing

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Addressing Modes

Register Addressing

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Addressing Modes

Register Indirect Addressing

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Addressing Modes

Displacement Addressing

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Addressing Modes

Indexed Addressing

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Addressing Modes

Stack Addressing

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Addressing Modes

Summary

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Stay Safe – Stay Home

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