Professional Documents
Culture Documents
Compal Confidential: KALG1 M/B Schematics Document
Compal Confidential: KALG1 M/B Schematics Document
1 1
Compal Confidential
KALG1 M/B Schematics Document
2 2
2009-03-02
REV 02
3 3
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom KALG1 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 24, 2009 Sheet 1 of 45
A B C D E
A B C D E
Compal Confidential
Model Name : KALG1
Intel Penryn Processor Thermal Sensor Clock Generator
File Name : LA-5271P Fan Control
page 4
EMC 1402 ICS9LPRS387
1
uPGA-478 Package page 4 page 16 1
FSB
H_A#(3..35) 667/800/1066MHz H_D#(0..63)
HDMI PCI-Express
page 7,8,9,10,11,12,13
ASM1442T
page 24
LS-4494P
DMI C-Link USB conn x3 Bluetooth CMOS Finger Print
AES1610
USB port 0, 1, 6 Conn Camera
2 2
page 29 page 29 page 17 page 29
www.laptopblue.com PCI-Express
S-ATA
Intel ICH9-M 3.3V 48MHz USB
3.3V 24.576MHz/48Mhz HD Audio
BGA-676 Card Reader
LAN(GbE) MINI Card x1 NEW Card page 20,21,22,23 RTS5159-GR
ATHEROS AR8131 WLAN page 25
page 26 page 28 page 28 GMCH HDA MDC 1.5 HDA Codec
port 2
port 1
port 0
Conn ALC888S-VC
page 08 page 32 page 33
page 34
LPC BUS
RTC CKT.
page 20
Int.KBD
Touch Pad page 31
page 31
Power On/Off CKT.
page 32
POWER SW THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block Diagrams
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
Page 36 DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B
KALG1 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 24, 2009 Sheet 2 of 45
A B C D E
A B C D E
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Voltage Rails
Full ON HIGH HIGH HIGH HIGH ON ON ON ON
Power Plane Description S1 S3 S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW
VIN Adapter power supply (19V) N/A N/A N/A S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
B+ AC or battery power rail for power circuit. N/A N/A N/A
1
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF 1
+CPU_CORE Core voltage for CPU ON OFF OFF
+0.75VS 0.75VS power rail for DDR3 terminator ON OFF OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.05VS 1.05V switched power rail ON OFF OFF
+1.5V 1.5V power rail for HDA ON ON OFF
+1.5VS 1.5V switched power rail ON OFF OFF Board ID / SKU ID Table for AD channel
+1.8V 1.8V power rail for NB(LVDS) ON ON OFF Vcc 3.3V +/- 5%
+3VALW 3.3V always on power rail ON ON ON* Ra/Rc/Re 100K +/- 5%
+3V_LAN 3.3V power rail for LAN ON ON ON Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+3V 3.3V power rail for SB ON ON OFF 0 0 0 V 0 V 0 V
+3VS 3.3V switched power rail ON OFF OFF 1
+5VALW 5V always on power rail ON ON ON* 2
+5V 5V power rail for SB ON ON OFF 3
+5VS 5V switched power rail ON OFF OFF 4
+VSB VSB always on power rail ON ON ON* 5
+RTCVCC RTC power ON ON ON 6
7
2 2
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
BOARD ID Table
Board ID PCB Revision
External PCI Devices 0 PCB 08Y LA-5271P REV0 M/B
1
Device IDSEL# REQ#/GNT# Interrupts
2
3
4
5
6
7
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 3 of 45
A B C D E
5 4 3 2 1
H_A#[3..35]
[7] H_A#[3..35]
H_REQ#[0..4]
[7] H_REQ#[0..4]
H_RS#[0..2]
[7] H_RS#[0..2]
FAN1 Conn
JCPU1A +5VS
D H_A#3 J4 H1 C81 10U_0805_10V4Z +5VS D
A[3]# ADS# H_ADS# [7]
ADDR GROUP_0
H_A#4 L5 E2 H_BNR# [7] 1 2
H_A#5 A[4]# BNR#
L4 A[5]# BPRI# G5 H_BPRI# [7]
1
H_A#6 K5
H_A#7 A[6]# U4 D16
M3 A[7]# DEFER# H5 H_DEFER# [7]
H_A#8 N2 F21 1 8 1SS355_SOD323-2
A[8]# DRDY# H_DRDY# [7] VEN GND
H_A#9 J1 E1 2 7
A[9]# DBSY# H_DBSY# [7] VIN GND
H_A#10 N3 +VCC_FAN1 3 6
2
H_A#11 A[10]# VO GND
P5 A[11]# BR0# F1 H_BR0# [7] [30] EN_DFAN1 2 R43 1 4 VSET GND 5 D15
H_A#12 P2 300_0402_5% 1 2
A[12]#
CONTROL
H_A#13 L2 D20 H_IERR# 1 APL5605KI-TRL SOP 8P
H_A#14 A[13]# IERR# C73 BAS16_SOT23-3
P4 A[14]# INIT# B3 H_INIT# [20]
H_A#15 P1 C88
H_A#16 A[15]# 0.1U_0402_16V4Z 10U_0805_10V4Z
R1 A[16]# LOCK# H4 H_LOCK# [7] 2
[7] H_ADSTB#0 M1 ADSTB[0]# 1 2
C1 H_RESET# H_RESET# [7]
H_REQ#0 RESET# H_RS#0 +3VS C82
K3 REQ[0]# RS[0]# F3
H_REQ#1 H2 F4 H_RS#1 1000P_0402_50V7K
H_REQ#2 REQ[1]# RS[1]# H_RS#2
K2 REQ[2]# RS[2]# G3 1 2
1
H_REQ#3 J3 G2 H_TRDY# [7]
H_REQ#4 REQ[3]# TRDY# R46
L1 REQ[4]#
G6 10K_0402_5%
HIT# H_HIT# [7]
H_A#17 Y2 E4 40mil
A[17]# HITM# H_HITM# [7]
H_A#18 U5 JP27
2
H_A#19 A[18]# +VCC_FAN1
R3 A[19]# BPM[0]# AD4 1
ADDR GROUP_1
H_A#20 W6 AD3
A[20]# BPM[1]# [30] FAN_SPEED1 2
H_A#21 U4 AD1
H_A#22 A[21]# BPM[2]# +1.05VS 3
Y5 A[22]# BPM[3]# AC4 1
XDP/ITP SIGNALS
H_A#23 U1 AC2 C83 ACES_85205-03001
C H_A#24 A[23]# PRDY# XDP_BPM#5 1000P_0402_50V7K CONN@ C
R4 A[24]# PREQ# AC1
H_A#25 T5 AC5 XDP_TCK
A[25]# TCK
1
H_A#26 XDP_TDI 2
T3 A[26]# TDI AA6
H_A#27 W2 AB3 R48 @
H_A#28 A[27]# TDO XDP_TMS
W5 A[28]# TMS AB5 56_0402_5%
H_A#29 Y4 AB6 XDP_TRST#
H_A#30 A[29]# TRST# XDP_DBRESET#
U2 C20 XDP_DBRESET# [21]
2
H_A#31 A[30]# DBR#
V4 A[31]#
H_A#32 W3 A[32]#
2
B
H_A#33 AA4 THERMAL
H_A#34 A[33]#
AB2 A[34]#
E
H_A#35 AA3 D21 H_PROCHOT# 3 1 OCP# [21]
A[35]# PROCHOT#
C
V1 A24 H_THERMDA
[7] H_ADSTB#1 ADSTB[1]# THERMDA Q5 +1.05VS
B25 H_THERMDC
THERMDC MMBT3904_SOT23-3
[20] H_A20M# A6 A20M#
ICH
A5 C7 H_THERMTRIP# [8,20] @
[20] H_FERR# FERR# THERMTRIP#
[20] H_IGNNE# C4 IGNNE#
D5 XDP_TDI R108 1 2 54.9_0402_1%
[20] H_STPCLK# STPCLK#
[20] H_INTR C6 LINT0 H CLK
[20] H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK [16] left NC if no ITP
[20] H_SMI# A3 SMI# BCLK[1] A21 CLK_CPU_BCLK# [16]
XDP_TMS R109 1 2 54.9_0402_1% 39Ohm
M4 RSVD[01]
N5 XDP_BPM#5 R117 1 @ 2 54.9_0402_1%
RSVD[02]
T2 RSVD[03] Layout Note:
V3 RSVD[04] H_THERMDA&H_THERMDC Trace / Space = 10 / 10 mil
RESERVED
B2 RSVD[05]
D2 H_PROCHOT# R53 2 1 56_0402_5%
B RSVD[06] B
D22 RSVD[07]
D3 H_IERR# R52 2 1 56_0402_5%
RSVD[08]
F6 RSVD[09]
+3VS
C90
0.1U_0402_16V4Z
1 2
U5
H_THERMDA
0 0 0 266 EMC1402-1-ACZL-TR_MSOP8
0 1 0 200
Security Classification Compal Secret Data Compal Electronics, Inc.
0 1 1 166 Issued Date 2008/11/10 Deciphered Date 2008/11/24 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Penryn (1/3) & FAN Conn
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 4 of 45
5 4 3 2 1
5 4 3 2 1
H_D#[0..63] JCPU1C
H_D#[0..63] [7]
+CPU_CORE A7 VCC[001] VCC[068] AB20 +CPU_CORE
JCPU1B A9 AB7
H_D#0 H_D#32 VCC[002] VCC[069]
E22 D[0]# D[32]# Y22 A10 VCC[003] VCC[070] AC7
D H_D#1 F24 AB24 H_D#33 A12 AC9 D
H_D#2 D[1]# D[33]# H_D#34 VCC[004] VCC[071]
E26 D[2]# D[34]# V24 A13 VCC[005] VCC[072] AC12
DATA GRP 0
H_D#3 G22 V26 H_D#35 A15 AC13
DATA GRP 2
H_D#4 D[3]# D[35]# H_D#36 VCC[006] VCC[073]
F23 D[4]# D[36]# V23 A17 VCC[007] VCC[074] AC15
H_D#5 G25 T22 H_D#37 A18 AC17
H_D#6 D[5]# D[37]# H_D#38 VCC[008] VCC[075]
E25 D[6]# D[38]# U25 A20 VCC[009] VCC[076] AC18
H_D#7 E23 U23 H_D#39 B7 AD7
H_D#8 D[7]# D[39]# H_D#40 VCC[010] VCC[077]
K24 D[8]# D[40]# Y25 B9 VCC[011] VCC[078] AD9
H_D#9 G24 W22 H_D#41 B10 AD10
H_D#10 D[9]# D[41]# H_D#42 VCC[012] VCC[079]
J24 D[10]# D[42]# Y23 B12 VCC[013] VCC[080] AD12
H_D#11 J23 W24 H_D#43 B14 AD14
H_D#12 D[11]# D[43]# H_D#44 VCC[014] VCC[081]
H22 D[12]# D[44]# W25 B15 VCC[015] VCC[082] AD15
H_D#13 F26 AA23 H_D#45 B17 AD17
H_D#14 D[13]# D[45]# H_D#46 VCC[016] VCC[083]
K22 D[14]# D[46]# AA24 B18 VCC[017] VCC[084] AD18
H_D#15 H23 AB25 H_D#47 B20 AE9
D[15]# D[47]# VCC[018] VCC[085]
[7] H_DSTBN#0 J26 DSTBN[0]# DSTBN[2]# Y26 H_DSTBN#2 [7] C9 VCC[019] VCC[086] AE10
[7] H_DSTBP#0 H26 DSTBP[0]# DSTBP[2]# AA26 H_DSTBP#2 [7] C10 VCC[020] VCC[087] AE12
[7] H_DINV#0 H25 DINV[0]# DINV[2]# U22 H_DINV#2 [7] C12 VCC[021] VCC[088] AE13
C13 VCC[022] VCC[089] AE15
C15 VCC[023] VCC[090] AE17
H_D#16 N22 AE24 H_D#48 C17 AE18
H_D#17 D[16]# D[48]# H_D#49 VCC[024] VCC[091]
K25 D[17]# D[49]# AD24 C18 VCC[025] VCC[092] AE20
H_D#18 P26 AA21 H_D#50 D9 AF9
H_D#19 D[18]# D[50]# H_D#51 VCC[026] VCC[093]
R23 D[19]# D[51]# AB22 D10 VCC[027] VCC[094] AF10
H_D#20 L23 AB21 H_D#52 D12 AF12
D[20]# D[52]# VCC[028] VCC[095]
DATA GRP 1
H_D#21 M24 AC26 H_D#53 D14 AF14
DATA GRP 3
H_D#22 D[21]# D[53]# H_D#54 VCC[029] VCC[096]
L22 D[22]# D[54]# AD20 D15 VCC[030] VCC[097] AF15
H_D#23 M23 AE22 H_D#55 D17 AF17
H_D#24 D[23]# D[55]# H_D#56 VCC[031] VCC[098]
P25 D[24]# D[56]# AF23 D18 VCC[032] VCC[099] AF18
C H_D#25 P23 AC25 H_D#57 E7 AF20 C
+1.05VS H_D#26 D[25]# D[57]# H_D#58 VCC[033] VCC[100]
P22 D[26]# D[58]# AE21 E9 VCC[034]
H_D#27 T24 AD21 H_D#59 E10 G21 +1.05VS
H_D#28 D[27]# D[59]# H_D#60 VCC[035] VCCP[01]
R24 D[28]# D[60]# AC22 E12 VCC[036] VCCP[02] V6
H_D#29 L25 AD23 H_D#61 E13 J6
D[29]# D[61]# VCC[037] VCCP[03]
2
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Penryn (2/3)
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 5 of 45
5 4 3 2 1
5 4 3 2 1
JCPU1D
A4 VSS[001] VSS[082] P6
A8 VSS[002] VSS[083] P21
A11 VSS[003] VSS[084] P24
A14 VSS[004] VSS[085] R2
A16 R5 +CPU_CORE
VSS[005] VSS[086]
A19 VSS[006] VSS[087] R22
D A23 VSS[007] VSS[088] R25 D
AF2 VSS[008] VSS[089] T1
B6 VSS[009] VSS[090] T4
B8 VSS[010] VSS[091] T23
B11 VSS[011] VSS[092] T26 1 2
B13 VSS[012] VSS[093] U3
B16 U6 + C145
VSS[013] VSS[094] 900P_PFAF250E128MNTTE_2.5VM
B19 VSS[014] VSS[095] U21
B21 VSS[015] VSS[096] U24
3 4
B24 VSS[016] VSS[097] V2
C5 VSS[017] VSS[098] V5
C8 VSS[018] VSS[099] V22
C11 VSS[019] VSS[100] V25
C14 VSS[020] VSS[101] W1
C16 VSS[021] VSS[102] W4
C19 VSS[022] VSS[103] W23
C2 VSS[023] VSS[104] W26
C22 VSS[024] VSS[105] Y3
C25 VSS[025] VSS[106] Y6
D1 VSS[026] VSS[107] Y21
D4 VSS[027] VSS[108] Y24
D8 VSS[028] VSS[109] AA2
D11 VSS[029] VSS[110] AA5
D13 VSS[030] VSS[111] AA8
D16 VSS[031] VSS[112] AA11
D19 VSS[032] VSS[113] AA14
D23 AA16 +CPU_CORE
VSS[033] VSS[114]
D26 VSS[034] VSS[115] AA19
E3 VSS[035] VSS[116] AA22
C E6 AA25 C
VSS[036] VSS[117]
E8 VSS[037] VSS[118] AB1
E11 AB4
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
10U_0805_6.3V6M
VSS[038] VSS[119]
E14 VSS[039] VSS[120] AB8 1 1 1 1 1 1 1 1
E16 AB11 C445 C446 C447 C448 C428 C429 C430 C431
VSS[040] VSS[121]
E19 VSS[041] VSS[122] AB13
E21 VSS[042] VSS[123] AB16
2 2 2 2 2 2 2 2
E24 VSS[043] VSS[124] AB19
F5 VSS[044] VSS[125] AB23
F8 VSS[045] VSS[126] AB26
F11 VSS[046] VSS[127] AC3
F13 VSS[047] VSS[128] AC6
F16 VSS[048] VSS[129] AC8
F19 VSS[049] VSS[130] AC11
F2 VSS[050] VSS[131] AC14
F22 VSS[051] VSS[132] AC16
F25 VSS[052] VSS[133] AC19
G4 VSS[053] VSS[134] AC21
G1 VSS[054] VSS[135] AC24
G23 VSS[055] VSS[136] AD2
G26 VSS[056] VSS[137] AD5
H3 VSS[057] VSS[138] AD8
H6 VSS[058] VSS[139] AD11
H21 VSS[059] VSS[140] AD13
H24 VSS[060] VSS[141] AD16
J2 VSS[061] VSS[142] AD19
J5 VSS[062] VSS[143] AD22
J22 VSS[063] VSS[144] AD25
J25 VSS[064] VSS[145] AE1
B B
K1 VSS[065] VSS[146] AE4
K4 VSS[066] VSS[147] AE8
K23 VSS[067] VSS[148] AE11
K26 VSS[068] VSS[149] AE14
L3 VSS[069] VSS[150] AE16
L6 VSS[070] VSS[151] AE19
L21 VSS[071] VSS[152] AE23
L24 VSS[072] VSS[153] AE26
M2 VSS[073] VSS[154] A2
M5 VSS[074] VSS[155] AF6
M22 VSS[075] VSS[156] AF8
M25 VSS[076] VSS[157] AF11
N1 VSS[077] VSS[158] AF13
N4 VSS[078] VSS[159] AF16
N23 VSS[079] VSS[160] AF19
N26 VSS[080] VSS[161] AF21
P3 A25 +1.05VS
VSS[081] VSS[162]
VSS[163] AF25
PVT
Penryn CONN@ 1
. 1 1 1 1 1 1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
330U_D2_2.5VY_R9M
2 2 2 2 2 2 2
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Penryn (3/3)
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 6 of 45
5 4 3 2 1
5 4 3 2 1
H_A#[3..35] [4]
[5] H_D#[0..63] U21A
A14 H_A#3
H_D#0 H_A#_3 H_A#4
F2 H_D#_0 H_A#_4 C15
H_D#1 G8 F16 H_A#5
H_D#2 H_D#_1 H_A#_5 H_A#6
F8 H_D#_2 H_A#_6 H13
H_D#3 E6 C18 H_A#7
H_D#4 H_D#_3 H_A#_7 H_A#8
G2 H_D#_4 H_A#_8 M16
D H_D#5 H6 J13 H_A#9 D
H_D#6 H_D#_5 H_A#_9 H_A#10
H2 H_D#_6 H_A#_10 P16
H_D#7 F6 R16 H_A#11
H_D#8 H_D#_7 H_A#_11 H_A#12
D4 H_D#_8 H_A#_12 N17
H_D#9 H3 M13 H_A#13
H_D#10 H_D#_9 H_A#_13 H_A#14
M9 H_D#_10 H_A#_14 E17
H_D#11 M11 P17 H_A#15
H_D#12 H_D#_11 H_A#_15 H_A#16
J1 H_D#_12 H_A#_16 F17
H_D#13 J2 G20 H_A#17
H_D#14 H_D#_13 H_A#_17 H_A#18
N12 H_D#_14 H_A#_18 B19
H_D#15 J6 J16 H_A#19
H_D#16 H_D#_15 H_A#_19 H_A#20
P2 H_D#_16 H_A#_20 E20
H_D#17 L2 H16 H_A#21
H_D#18 H_D#_17 H_A#_21 H_A#22
R2 H_D#_18 H_A#_22 J20
H_D#19 N9 L17 H_A#23
H_D#20 H_D#_19 H_A#_23 H_A#24
L6 H_D#_20 H_A#_24 A17
H_D#21 M5 B17 H_A#25
H_D#22 H_D#_21 H_A#_25 H_A#26
J3 H_D#_22 H_A#_26 L16
H_D#23 N2 C21 H_A#27
H_D#24 H_D#_23 H_A#_27 H_A#28
R1 H_D#_24 H_A#_28 J17
H_D#25 N5 H20 H_A#29
H_D#26 H_D#_25 H_A#_29 H_A#30
N6 H_D#_26 H_A#_30 B18
H_D#27 P13 K17 H_A#31
H_D#28 H_D#_27 H_A#_31 H_A#32
N8 H_D#_28 H_A#_32 B20
H_D#29 L7 F21 H_A#33
H_D#30 H_D#_29 H_A#_33 H_A#34
N10 H_D#_30 H_A#_34 K21
H_D#31 M3 L20 H_A#35
H_D#32 H_D#_31 H_A#_35
Y3 H_D#_32
H_D#33 AD14 H12 H_ADS#
H_D#_33 H_ADS# H_ADS# [4]
C H_D#34 Y6 B16 H_ADSTB#0 C
H_D#_34 H_ADSTB#_0 H_ADSTB#0 [4]
H_D#35 Y10 G17 H_ADSTB#1
H_D#_35 H_ADSTB#_1 H_ADSTB#1 [4]
H_D#36 Y12 A9 H_BNR#
H_D#_36 H_BNR# H_BNR# [4]
HOST
H_D#37 Y14 F11 H_BPRI#
H_D#_37 H_BPRI# H_BPRI# [4]
H_D#38 Y7 G12 H_BR0#
H_D#_38 H_BREQ# H_BR0# [4]
H_D#39 W2 E9 H_DEFER#
H_D#_39 H_DEFER# H_DEFER# [4]
H_D#40 AA8 B10 H_DBSY#
H_D#_40 H_DBSY# H_DBSY# [4]
H_D#41 Y9 AH7 CLK_MCH_BCLK
H_D#_41 HPLL_CLK CLK_MCH_BCLK [16]
H_D#42 AA13 AH6 CLK_MCH_BCLK#
H_D#_42 HPLL_CLK# CLK_MCH_BCLK# [16]
H_D#43 AA9 J11 H_DPW R#
H_D#_43 H_DPWR# H_DPW R# [5]
H_D#44 AA11 F9 H_DRDY#
H_D#_44 H_DRDY# H_DRDY# [4]
H_D#45 AD11 H9 H_HIT#
H_D#_45 H_HIT# H_HIT# [4]
H_D#46 AD10 E12 H_HITM#
H_D#_46 H_HITM# H_HITM# [4]
H_D#47 AD13 H11 H_LOCK#
H_D#_47 H_LOCK# H_LOCK# [4]
H_D#48 AE12 C9 H_TRDY#
H_D#_48 H_TRDY# H_TRDY# [4]
H_D#49 AE9
H_D#50 H_D#_49
AA2 H_D#_50
H_D#51 AD8
H_D#52 H_D#_51
AA3 H_D#_52
H_D#53 AD3 J8 H_DINV#0
H_D#54 H_D#_53 H_DINV#_0 H_DINV#1 H_DINV#0 [5]
AD7 H_D#_54 H_DINV#_1 L3 H_DINV#1 [5]
H_D#55 AE14 Y13 H_DINV#2
H_D#56 H_D#_55 H_DINV#_2 H_DINV#3 H_DINV#2 [5]
AF3 H_D#_56 H_DINV#_3 Y1 H_DINV#3 [5]
H_D#57 AC1
+1.05VS H_D#58 H_D#_57 H_DSTBN#0
AE3 H_D#_58 H_DSTBN#_0 L10 H_DSTBN#0 [5]
H_D#59 AC3 M7 H_DSTBN#1
H_D#60 H_D#_59 H_DSTBN#_1 H_DSTBN#2 H_DSTBN#1 [5]
AE11 H_D#_60 H_DSTBN#_2 AA5 H_DSTBN#2 [5]
1
H_REQ#_0
2
H_REQ#2
100_0402_1%
H_REQ#_2 F13
R351 B13 H_REQ#3
H_REQ#_3
2
H_RS#_0 H_RS#1
H_RS#_1 F12
H_AVREF A11 C8 H_RS#2
1
H_AVREF H_RS#_2
width:spacing=10mil:20mil (<0.5") B11 H_DVREF
1
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cantiga GMCH(1/7)-GTL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 7 of 45
5 4 3 2 1
5 4 3 2 1
DDR3
U21B +1.5V DDR3
M36 AP24 M_CLK_DDR0 M_CLK_DDR0 [14]
RSVD1 SA_CK_0
1
N36 AT21 M_CLK_DDR1 M_CLK_DDR1 [14]
RSVD2 SA_CK_1 M_CLK_DDR2
R33 RSVD3 SB_CK_0 AV24 M_CLK_DDR2 [15]
T33 AU20 M_CLK_DDR3 M_CLK_DDR3 [15] R343
RSVD4 SB_CK_1
COMPENSATION
AH9 1K_0402_1%
RSVD5 M_CLK_DDR#0
AH10 AR24 M_CLK_DDR#0 [14]
2
RSVD6 SA_CK#_0 M_CLK_DDR#1 SM_RCOMP_VOH
AH12 AR21 M_CLK_DDR#1 [14]
RSVD7 SA_CK#_1
0.01U_0402_16V7K
AH13 AU24 M_CLK_DDR#2
RSVD8 SB_CK#_0 M_CLK_DDR#2 [15]
3.01K_0402_1%
M_CLK_DDR#3
2.2U_0603_6.3V6K
K12 AV20 M_CLK_DDR#3 [15] 1 1
RSVD9 SB_CK#_1
1
AL34 RSVD10
AK34 BC28 DDR_CKE0_DIMMA R342 C387 C386
RSVD11 SA_CKE_0 DDR_CKE0_DIMMA [14]
AN35 AY28 DDR_CKE1_DIMMA
D RSVD12 SA_CKE_1 DDR_CKE2_DIMMB DDR_CKE1_DIMMA [14] 2 2 D
AM35 RSVD13 SB_CKE_0 AY36 DDR_CKE2_DIMMB [15] SM_DRAMRST# would be
T24 BB36 DDR_CKE3_DIMMB
DDR_CKE3_DIMMB [15] needed for DDR3 only
2
RSVD14 SB_CKE_1
All RSVD balls on GMCH should be left No
BA17 DDR_CS0_DIMMA#
Connect. SA_CS#_0 DDR_CS1_DIMMA# DDR_CS0_DIMMA# [14] SM_RCOMP_VOL
AY16 DDR_CS1_DIMMA# [14]
SA_CS#_1 DDR_CS2_DIMMB#
B31 RSVD15 SB_CS#_0 AV16 DDR_CS2_DIMMB# [15] For Cantiga 80 Ohm
1
1K_0402_1%
0.01U_0402_16V7K
DDR_CS3_DIMMB#
2.2U_0603_6.3V6K
B2 AR13 DDR_CS3_DIMMB# [15] 1 1
RSVD16 SB_CS#_1
RSVD
M_ODT0
SA_ODT_0
SA_ODT_1
BD17
AY17 M_ODT1
M_ODT0
M_ODT1
[14]
[14]
DDR3
M_ODT2 2 2
AY21 BF15 M_ODT2 [15]
2
RSVD20 SB_ODT_O M_ODT3 +1.5V +1.5V
AY13 M_ODT3 [15]
SB_ODT_1
BG22 SMRCOMP R340 1 2 80.6_0402_1%
SM_RCOMP
2
BG23 BH21 SMRCOMP# R339 1 2 80.6_0402_1%
RSVD22 SM_RCOMP# R103
BF23
RSVD23 SM_RCOMP_VOH 1K_0402_1% +V_DDR3_DIMM_REF
BH18 RSVD24 SM_RCOMP_VOH BF28
BF18 BH28 SM_RCOMP_VOL
RSVD25 SM_RCOMP_VOL
20mil
1
AV42 SM_VREF 1 @ 2
SM_VREF DDR3_SM_PWROK R104 0_0402_5%
AR36 DDR3_SM_PWROK [32]
SM_PWROK
2
SM_REXT R338 1
SM_REXT
BF17
BC36 SM_DRAMRST#
2
499_0402_1%
DDR3 1
R102
SM_DRAMRST# SM_DRAMRST# [14,15]
C171 1K_0402_1%
DDR3 0.1U_0402_16V4Z
CLK_DREF_96M 2
B38 CLK_DREF_96M [16]
1
DPLL_REF_CLK CLK_DREF_96M#
A38 CLK_DREF_96M# [16]
DPLL_REF_CLK# CLK_DREF_SSC
E41 CLK_DREF_SSC [16]
DPLL_REF_SSCLK CLK_DREF_SSC#
DPLL_REF_SSCLK# F41 CLK_DREF_SSC# [16]
CLK
F43 CLK_MCH_3GPLL
PEG_CLK CLK_MCH_3GPLL# CLK_MCH_3GPLL [16]
E43
C PEG_CLK# CLK_MCH_3GPLL# [16]
Strap Pin Table C
011 = FSB667
AE41 DMI_ITX_MRX_N0 CFG[2:0] 010 = FSB800
DMI_RXN_0 DMI_ITX_MRX_N1 DMI_ITX_MRX_N0 [21]
DMI_RXN_1 AE37 DMI_ITX_MRX_N1 [21] 000 = FSB1067
AE47 DMI_ITX_MRX_N2
DMI_RXN_2 DMI_ITX_MRX_N2 [21]
AH39 DMI_ITX_MRX_N3 0 = DMI x 2
DMI_RXN_3 DMI_ITX_MRX_N3 [21]
AE40 DMI_ITX_MRX_P0
CFG5 1 = DMI x 4 * (Default)
MCH_CLKSEL0 DMI_RXP_0 DMI_ITX_MRX_P1 DMI_ITX_MRX_P0 [21]
[16] MCH_CLKSEL0 T25
CFG_0 DMI_RXP_1
AE38 DMI_ITX_MRX_P1 [21] 0 = iTPM Host Interface is enabled
MCH_CLKSEL1 DMI_ITX_MRX_P2
[16] MCH_CLKSEL1
MCH_CLKSEL2
R25
P25
CFG_1 DMI_RXP_2 AE48
AH40 DMI_ITX_MRX_P3
DMI_ITX_MRX_P2 [21] CFG6 1 = iTPM Host Interface is Disabled *(Default)
[16] MCH_CLKSEL2 CFG_2 DMI_RXP_3 DMI_ITX_MRX_P3 [21]
P20 CFG_3 DMI_MTX_IRX_N0
0 = Lane Reversal Enable
2 PM_EXTTS#0 MCH_CFG_5
P24
CFG_4 DMI_TXN_0
AE35
DMI_MTX_IRX_N1 DMI_MTX_IRX_N0 [21] CFG9 1 = Normal Operation * (Default)
DMI
+3VS 1 C25 AE43 DMI_MTX_IRX_N1 [21]
R94 10K_0402_5% MCH_CFG_6 CFG_5 DMI_TXN_1 DMI_MTX_IRX_N2
N24
CFG_6 DMI_TXN_2
AE46 DMI_MTX_IRX_N2 [21] 0 = PCIe Loopback Enable
1 2 PM_EXTTS#1 MCH_CFG_7 M24 AH42 DMI_MTX_IRX_N3
DMI_MTX_IRX_N3 [21] CFG10 1 = Disable * (Default)
R84 10K_0402_5% CFG_7 CFG DMI_TXN_3
E21
CFG_8
1 2 MCH_CLKREQ# MCH_CFG_9 C23 AD35 DMI_MTX_IRX_P0
DMI_MTX_IRX_P0 [21] 00 = Reserved
R93 10K_0402_5% MCH_CFG_10 CFG_9 DMI_TXP_0 DMI_MTX_IRX_P1
C24 CFG_10 DMI_TXP_1 AE44
DMI_MTX_IRX_P2 DMI_MTX_IRX_P1 [21] CFG[13:12] 01 = XOR Mode Enabled
N21
CFG_11 DMI_TXP_2
AF46 DMI_MTX_IRX_P2 [21] 10 = All Z Mode Enabled
Use VGATE for GMCH_PWROK MCH_CFG_12 P21 AH43 DMI_MTX_IRX_P3 11 = Normal Operation * (Default)
MCH_CFG_13 CFG_12 DMI_TXP_3 DMI_MTX_IRX_P3 [21]
T21
VGATE @ GMCH_PWROK CFG_13
[16,21,43] VGATE 1 2 R20
CFG_14 0 = Dynamic ODT Disabled
R101 0_0402_5%
ICH_PWROK 1 2 MCH_CFG_16
M20
L21
CFG_15 CFG16 1 = Dynamic ODT Enabled * (Default)
[21] ICH_PWROK CFG_16
R100 0_0402_5% H21 0 = Normal Operation *(Default)
CFG_17
P29 CFG19 1 = DMI Lane Reversal Enable
GRAPHICS VID
MCH_CFG_19 CFG_18
R28
MCH_CFG_20 CFG_19
T28
CFG_20 GFX_VID_0
B33 0 = Only PCIE or SDVO is operational.
GFX_VID_1
B32
G33
CFG20 * (Default)
B GFX_VID_2
F33 (PCIE/SDVO select) 1 = PCIE/SDVO are operating simu. B
R110 1 PM_SYNC#_R GFX_VID_3
[21] PM_SYNC# 2 0_0402_5% R29 PM_SYNC# GFX_VID_4 E33
R64 1 2 0_0402_5% PM_DPRSTP#_R
[5,20,43] H_DPRSTP#
PM_EXTTS#0
B7
PM_DPRSTP# 0 = No SDVO Card Present * (Default)
[14] PM_EXTTS#0 N33 PM_EXT_TS#_0 SDVO_CTRLDATA 1 = SDVO Card Present
PM
1K_0402_1%
BG48 AH37 CL_CLK0 [21]
NC_1 CL_CLK
BF48 NC_2 CL_DATA AH36 CL_DATA0 [21]
ME
1
NC_4 CL_RST# CL_VREF R355 2.21K_0402_1%
BH47 AH34
NC_5 CL_VREF MCH_CFG_6 @
BG47 2 1
NC_6
2
BE47 R77 4.02K_0402_1%
NC_7 R98 MCH_CFG_7 @
BH46 N28 1 2 1
NC_8 DDPC_CTRLCLK
NC
511_0402_1%
BG45 G36 SDVO_SCLK MCH_CFG_9 2 @ 1
+3VS NC_10 SDVO_CTRLCLK SDVO_SCLK [24]
0.1U_0402_16V4Z
BH44 E36 SDVO_SDATA R66 2.21K_0402_1%
SDVO_SDATA [24]
1
NC_11 SDVO_CTRLDATA MCH_CLKREQ# 2 MCH_CFG_10 @
BH43 K36 MCH_CLKREQ# [16] 2 1
NC_12 CLKREQ#
MISC
HDA_SYNC_MCH [20]
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cantiga GMCH(2/7)-DMI/DDR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom KALG1 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 24, 2009 Sheet 8 of 45
5 4 3 2 1
5 4 3 2 1
D D
[15] DDR_B_D[0..63]
U21E
[14] DDR_A_D[0..63]
U21D DDR_B_D0 AK47 BC16 DDR_B_BS0
SB_DQ_0 SB_BS_0 DDR_B_BS0 [15]
DDR_A_D0 AJ38 BD21 DDR_A_BS0 DDR_B_D1 AH46 BB17 DDR_B_BS1
SA_DQ_0 SA_BS_0 DDR_A_BS0 [14] SB_DQ_1 SB_BS_1 DDR_B_BS1 [15]
DDR_A_D1 AJ41 BG18 DDR_A_BS1 DDR_B_D2 AP47 BB33 DDR_B_BS2
SA_DQ_1 SA_BS_1 DDR_A_BS1 [14] SB_DQ_2 SB_BS_2 DDR_B_BS2 [15]
DDR_A_D2 AN38 AT25 DDR_A_BS2 DDR_B_D3 AP46
SA_DQ_2 SA_BS_2 DDR_A_BS2 [14] SB_DQ_3
DDR_A_D3 AM38 DDR_B_D4 AJ46
DDR_A_D4 SA_DQ_3 DDR_A_RAS# DDR_B_D5 SB_DQ_4 DDR_B_RAS#
AJ36 BB20 DDR_A_RAS# [14] AJ48 AU17 DDR_B_RAS# [15]
DDR_A_D5 SA_DQ_4 SA_RAS# DDR_A_CAS# DDR_B_D6 SB_DQ_5 SB_RAS# DDR_B_CAS#
AJ40 BD20 DDR_A_CAS# [14] AM48 BG16 DDR_B_CAS# [15]
DDR_A_D6 SA_DQ_5 SA_CAS# DDR_A_WE# DDR_B_D7 SB_DQ_6 SB_CAS# DDR_B_WE#
AM44 AY20 DDR_A_WE# [14] AP48 BF14 DDR_B_WE# [15]
DDR_A_D7 SA_DQ_6 SA_WE# DDR_B_D8 SB_DQ_7 SB_WE#
AM42 AU47
DDR_A_D8 SA_DQ_7 DDR_B_D9 SB_DQ_8
AN43 AU46
DDR_A_D9 SA_DQ_8 DDR_B_D10 SB_DQ_9
AN44 BA48
DDR_A_D10 SA_DQ_9 DDR_B_D11 SB_DQ_10
AU40 AY48
DDR_A_D11 SA_DQ_10 DDR_B_D12 SB_DQ_11
AT38 DDR_A_DM[0..7] [14] AT47
DDR_A_D12 SA_DQ_11 DDR_B_D13 SB_DQ_12
AN41 AR47
DDR_A_D13 SA_DQ_12 DDR_A_DM0 DDR_B_D14 SB_DQ_13
AN39 AM37 BA47 DDR_B_DM[0..7] [15]
DDR_A_D14 SA_DQ_13 SA_DM_0 DDR_A_DM1 DDR_B_D15 SB_DQ_14 DDR_B_DM0
AU44 AT41 BC47 AM47
DDR_A_D15 SA_DQ_14 SA_DM_1 DDR_A_DM2 DDR_B_D16 SB_DQ_15 SB_DM_0 DDR_B_DM1
AU42 AY41 BC46 AY47
DDR_A_D16 SA_DQ_15 SA_DM_2 DDR_A_DM3 DDR_B_D17 SB_DQ_16 SB_DM_1 DDR_B_DM2
AV39 AU39 BC44 BD40
DDR_A_D17 SA_DQ_16 SA_DM_3 DDR_A_DM4 DDR_B_D18 SB_DQ_17 SB_DM_2 DDR_B_DM3
AY44 BB12 BG43 BF35
DDR_A_D18 SA_DQ_17 SA_DM_4 DDR_A_DM5 DDR_B_D19 SB_DQ_18 SB_DM_3 DDR_B_DM4
BA40 AY6 BF43 BG11
DDR_A_D19 SA_DQ_18 SA_DM_5 DDR_A_DM6 DDR_B_D20 SB_DQ_19 SB_DM_4 DDR_B_DM5
BD43 AT7 BE45 BA3
DDR_A_D20 SA_DQ_19 SA_DM_6 DDR_A_DM7 DDR_B_D21 SB_DQ_20 SB_DM_5 DDR_B_DM6
AV41 AJ5 BC41 AP1
SA_DQ_20 SA_DM_7 SB_DQ_21 SB_DM_6
B
DDR_A_D21 AY43 DDR_B_D22 BF40 AK2 DDR_B_DM7
DDR_A_D22 SA_DQ_21 A DDR_B_D23 SB_DQ_22 SB_DM_7
BB41 DDR_A_DQS[0..7] [14] BF41
DDR_A_D23 SA_DQ_22 DDR_A_DQS0 DDR_B_D24 SB_DQ_23
BC40 AJ44 BG38 DDR_B_DQS[0..7] [15]
DDR_A_D24 SA_DQ_23 SA_DQS_0 DDR_A_DQS1 DDR_B_D25 SB_DQ_24 DDR_B_DQS0
AY37 AT44 BF38 AL47
DDR_A_D25 SA_DQ_24 SA_DQS_1 DDR_A_DQS2 DDR_B_D26 SB_DQ_25 SB_DQS_0 DDR_B_DQS1
MEMORY
BD38 BA43 BH35 AV48
DDR_A_D26 SA_DQ_25 SA_DQS_2 DDR_A_DQS3 DDR_B_D27 SB_DQ_26 SB_DQS_1 DDR_B_DQS2
AV37 BC37 BG35 BG41
MEMORY
SYSTEM
DDR_A_D35 BA12 BA44 DDR_A_DQS#2 DDR_B_D36 BH12 AV47 DDR_B_DQS#1
DDR_A_D36 SA_DQ_35 SA_DQS#_2 DDR_A_DQS#3 DDR_B_D37 SB_DQ_36 SB_DQS#_1 DDR_B_DQS#2
AU13 BD37 BF11 BH41
SYSTEM
DDR
DDR_A_D45 SA_DQ_44 SA_MA_0 DDR_A_MA1 DDR_B_D46 SB_DQ_45 SB_MA_0 DDR_B_MA1
BD9 BC24 BA1 BA25
SA_DQ_45 SA_MA_1 SB_DQ_46 SB_MA_1
DDR
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cantiga GMCH(3/7)-DDR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 9 of 45
5 4 3 2 1
5 4 3 2 1
U21C
2
PEG_RX#_2 L44
R92 1 2 LVDS_IBG C44 L40
R357 2.37K_0402_1% LVDS_IBG PEG_RX#_3
100K_0402_5% B43 LVDS_VBG PEG_RX#_4 N41
2 1 E37 LVDS_VREFH PEG_RX#_5 P48
R91 0_0402_5% E38 N44
1
LVDS_VREFL PEG_RX#_6
PEG_RX#_7 T43
GMCH_TXCLK- C41 U43
[17] GMCH_TXCLK- LVDSA_CLK# PEG_RX#_8
GMCH_TXCLK+ C40 Y43
[17] GMCH_TXCLK+ LVDSA_CLK PEG_RX#_9
B37 LVDSB_CLK# PEG_RX#_10 Y48
A37 LVDSB_CLK PEG_RX#_11 Y36
LVDS
PEG_RX#_12 AA43
GMCH_TXOUT0- H47 AD37
[17] GMCH_TXOUT0- LVDSA_DATA#_0 PEG_RX#_13
GMCH_TXOUT1- E46 AC47
[17] GMCH_TXOUT1- LVDSA_DATA#_1 PEG_RX#_14
GMCH_TXOUT2- G40 AD39
[17] GMCH_TXOUT2- LVDSA_DATA#_2 PEG_RX#_15
A40 LVDSA_DATA#_3
PEG_RX_0 H43
GMCH_TXOUT0+ H48 J44
[17] GMCH_TXOUT0+ LVDSA_DATA_0 PEG_RX_1
GMCH_TXOUT1+ D45 L43
[17] GMCH_TXOUT1+ LVDSA_DATA_1 PEG_RX_2
GRAPHICS
GMCH_TXOUT2+ F40 L41 TMDS_B_HPD#
[17] GMCH_TXOUT2+ LVDSA_DATA_2 PEG_RX_3 TMDS_B_HPD# [24]
B40 LVDSA_DATA_3 PEG_RX_4 N40
PEG_RX_5 P47
A41 LVDSB_DATA#_0 PEG_RX_6 N43
H38 LVDSB_DATA#_1 PEG_RX_7 T42
G37 LVDSB_DATA#_2 PEG_RX_8 U42
J37 LVDSB_DATA#_3 PEG_RX_9 Y42
PEG_RX_10 W47
B42 LVDSB_DATA_0 PEG_RX_11 Y37
C G38 AA42 C
LVDSB_DATA_1 PEG_RX_12
F37 LVDSB_DATA_2 PEG_RX_13 AD36
K37 LVDSB_DATA_3 PEG_RX_14 AC48
PCI-EXPRESS
PEG_RX_15 AD40
TV
H24 TV_RTN PEG_TX#_6 N38
R74 R75 R76 T40
75_0402_1% 75_0402_1% 75_0402_1% PEG_TX#_7
PEG_TX#_8 U37
U40 HDMI_PCIE_MTX_C_GRX_N[0..3]
PEG_TX#_9 HDMI_PCIE_MTX_C_GRX_N[0..3] [24]
C31 Y40 CLOSE SPLIT POINT
1
VGA
R73 150_0402_1% J28 M43 C178 0.1U_0402_16V7K
[18] GMCH_CRT_R CRT_RED PEG_TX_4
2 1 PEG_TX_5 R47
R82 150_0402_1% G29 N37
B CRT_IRTN PEG_TX_6 B
PEG_TX_7 T39
GMCH_CRT_CLK H32 U36
[18] GMCH_CRT_CLK CRT_DDC_CLK PEG_TX_8
GMCH_CRT_DATA J32 U39
[18] GMCH_CRT_DATA CRT_DDC_DATA PEG_TX_9
[18] GMCH_CRT_HSYNC J29 CRT_HSYNC PEG_TX_10 Y39
CRT_IREF E29 Y46
CRT_TVO_IREF PEG_TX_11
PEG_TX_12 AA36
PEG_TX_13 AA39
[18] GMCH_CRT_VSYNC L29 CRT_VSYNC PEG_TX_14 AD42
PEG_TX_15 AD46
+3VS
2
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cantiga GMCH(4/7)-VGA/LVDS/TV
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 10 of 45
5 4 3 2 1
5 4 3 2 1
U21F
+1.05VS
+1.5V
VCC
10U_0805_10V4Z
0.1U_0402_16V4Z
0.22U_0402_6.3V6K
0.22U_0402_6.3V6K
220U_D2_4VY_R15M
BA32 V23 1 1 U21G
VCC_SM_9 VCC_AXG_NCTF_10 + C93 C162 C152 C163 C151
AY32 VCC_SM_10 VCC_AXG_NCTF_11 AM21
AW32 AL21 AG34
VCC_SM_11 VCC_AXG_NCTF_12 VCC_1
AV32 VCC_SM_12 VCC_AXG_NCTF_13 AK21 AC34 VCC_2
AU32 W21 2 2 2 AB34
VCC_SM_13 VCC_AXG_NCTF_14 VCC_3
AT32 V21 AA34
SM
VCC_SM_14 VCC_AXG_NCTF_15 VCC_4
AR32 VCC_SM_15 VCC_AXG_NCTF_16 U21 Y34 VCC_5
AP32 AM20 V34
VCC CORE
VCC_SM_16 VCC_AXG_NCTF_17 VCC_6
AN32 VCC_SM_17 VCC_AXG_NCTF_18 AK20 U34 VCC_7
BH31 W20 AM33
VCC_SM_18 VCC_AXG_NCTF_19 VCC_8
BG31
VCC_SM_19 VCC_AXG_NCTF_20
U20 Cavity Capacitors AK33
VCC_9
BF31 AM19 AJ33
VCC_SM_20 VCC_AXG_NCTF_21 VCC_10
BG30 VCC_SM_21 VCC_AXG_NCTF_22 AL19 AG33 VCC_11
BH29 AK19 AF33
VCC_SM_22 VCC_AXG_NCTF_23 VCC_12
BG29 VCC_SM_23 VCC_AXG_NCTF_24 AJ19
BF29
VCC_SM_24 VCC_AXG_NCTF_25
AH19
+1.05VS VCC_AXG: 6326.84mA
BD29 AG19
BC29
VCC_SM_25 VCC_AXG_NCTF_26
AF19 (330UF*2, 22UF*1, 10UF*1, 1U*1, 0.47U*1, 0.1UF*2) AE33
VCC_SM_26 VCC_AXG_NCTF_27 VCC_13
BB29 VCC_SM_27 VCC_AXG_NCTF_28 AE19 AC33 VCC_14
10U_0805_10V4Z
10U_0805_10V4Z
1U_0402_6.3V6K
0.47U_0603_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Reference PILLAR_ROCK CRB Rev1.0 BA29 VCC_SM_28 VCC_AXG_NCTF_29 AB19 AA33 VCC_15
AY29 AA19 1 1 1 1 1 Y33
VCC_SM_29 VCC_AXG_NCTF_30 VCC_16
GFX NCTF
AW29 VCC_SM_30 VCC_AXG_NCTF_31 Y19 W33 VCC_17
Pins BA36, BB24, BD16, AV29 W19 V33
POWER
VCC_SM_31 VCC_AXG_NCTF_32 C123 C133 C106 C132 C135 C134 VCC_18
BB21, AW16, AW13, AT13 AU29 V19 U33
VCC_SM_32 VCC_AXG_NCTF_33 2 2 2 2 2 VCC_19
AT29 U19 AH28
could be left NC for DDR2 AR29
VCC_SM_33 VCC_AXG_NCTF_34
AM17 AF28
VCC_20
board. VCC_SM_34 VCC_AXG_NCTF_35 VCC_21
AP29 AK17 AC28
VCC_SM_35 VCC_AXG_NCTF_36 VCC_22
VCC_AXG_NCTF_37
AH17 Cavity Capacitors AA28
VCC_23
C C
VCC_AXG_NCTF_38 AG17 AJ26 VCC_24
AF17 AG26
VCC_SM_BA36 VCC_AXG_NCTF_39 VCC_25
BA36 AE17 AE26
VCC_SM_BB24 VCC_SM_36/NC VCC_AXG_NCTF_40 VCC_26
BB24 VCC_SM_37/NC VCC_AXG_NCTF_41 AC17 AC26 VCC_27
VCC_SM_BD16 +1.05VS
VCC
330U_D2_2.5VY_R9M
BB21 Y17 AG25
VCC_SM_AW16 VCC_SM_39/NC VCC_AXG_NCTF_43 PVT VCC_29
AW16 VCC_SM_40/NC VCC_AXG_NCTF_44 W17 1 AF25 VCC_30
AW13 V17 AG24 AM32
VCC_SM_41/NC VCC_AXG_NCTF_45 VCC_31 VCC_NCTF_1
C147
VCC_SM_AT13 AT13 AM16 + AJ23 AL32
VCC_SM_42/NC VCC_AXG_NCTF_46 VCC_32 VCC_NCTF_2
AL16 AH23 AK32
VCC_AXG_NCTF_47 VCC_33 VCC_NCTF_3
VCC_AXG_NCTF_48 AK16 AF23 VCC_34 VCC_NCTF_4 AJ32
POWER
2
AJ16 T32 AH32
+1.05VS VCC_AXG_NCTF_49 VCC_35 VCC_NCTF_5
VCC_AXG_NCTF_50 AH16 VCC_NCTF_6 AG32
AG16 AE32
VCC_AXG_NCTF_51 VCC_NCTF_7
VCC_AXG_NCTF_52
AF16 Place close to the GMCH VCC_NCTF_8
AC32
Y26 AE16 AA32
VCC_AXG_1 VCC_AXG_NCTF_53 VCC_NCTF_9
AE25 AC16 Y32
VCC_AXG_2 VCC_AXG_NCTF_54 VCC_NCTF_10
AB25 AB16 W32
VCC_AXG_3 VCC_AXG_NCTF_55 VCC_NCTF_11
AA25 AA16 U32
VCC_AXG_4 VCC_AXG_NCTF_56 VCC_NCTF_12
AE24 VCC_AXG_5 VCC_AXG_NCTF_57 Y16 VCC_NCTF_13 AM30
AC24
VCC_AXG_6 VCC_AXG_NCTF_58
W16 VCC_SM: 2600mA VCC_NCTF_14
AL30
AA24 V16 AK30
Y24
VCC_AXG_7 VCC_AXG_NCTF_59
U16 +1.5V (330UF*1, 22UF*2, 0.1UF*1) DDR3 VCC_NCTF_15
AH30
VCC_AXG_8 VCC_AXG_NCTF_60 VCC_NCTF_16
AE23 AG30
VCC_AXG_9 VCC_NCTF_17
330U_D2_2.5VY_R9M
AC23 AF30
VCC_AXG_10 VCC_NCTF_18
AB23 1 AE30
VCC_AXG_11 VCC_NCTF_19
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
AA23 1 1 1 AC30
NCTF
VCC_AXG_12 VCC_NCTF_20
C168
AJ21 + AB30
VCC_AXG_13 VCC_NCTF_21
AG21 AA30
VCC_AXG_14 PVT C157 C156 C155 VCC_NCTF_22
AE21 Y30
VCC_AXG_15 2 2 2 2 VCC_NCTF_23
AC21 W30
VCC_AXG_16 VCC_NCTF_24
AA21 V30
B VCC_AXG_17 VCC_NCTF_25 B
Y21 VCC_AXG_18 VCC_NCTF_26 U30
VCC
VCC
AH20 VCC_AXG_19 VCC_NCTF_27 AL29
AF20
VCC_AXG_20 Place on the edge VCC_NCTF_28
AK29
AE20 VCC_AXG_21 VCC_NCTF_29 AJ29
AC20
VCC_AXG_22 Reference PILLAR_ROCK CRB Rev1.0 VCC_NCTF_30
AH29
AB20 AG29
VCC_AXG_23 VCC_NCTF_31
AA20 AE29
GFX
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
AH15 1 1 1 1 1 AK28
VCC_AXG_31 VCC_NCTF_39
0.1U_0402_16V7K
0.1U_0402_16V7K
1U_0402_6.3V6K
1U_0402_6.3V6K
0.47U_0603_16V4Z
0.22U_0402_6.3V6K
1 1 1 1 1 1 1
C115 C113 C105 C136 C166 C167 C170
A A
2 2 2 2 2 2 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cantiga GMCH(5/7)-VCC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom KALG1 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 24, 2009 Sheet 11 of 45
5 4 3 2 1
5 4 3 2 1
+1.05VS_HPLL
+1.05VS_DPLLA
+1.05VS L29 1 2
MBK1608121YZF_0603 1 1 +1.05VS 1 2
VCCA_HPLL: 24mA C391 C393 L14 1 1 U21H
+1.05VS
VTT: 852mA
0_1210_5% PVT C174
(4.7UF*1, 0.1UF*1) + (270UF*1, 4.7UF*2, 2.2UF*1, 0.47UF*1)
4.7U_0805_10V4Z
2 2
C183 852mA
73mA VTT_1
U13
0.1U_0402_16V4Z VCCA_DPLLA 220U_D2_4VY_R15M 2 +3VS_CRTDAC B27 T13 1
2 VCCA_CRT_DAC_1 VTT_2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
0.47U_0603_16V4Z
2.2U_0603_6.3V6K
220U_D2_4VY_R15M
0.1U_0402_16V4Z A26 U12 PVT 1 1 1 1
VCCA_DPLLB: 64.8mA VCCA_CRT_DAC_2 VTT_3
T12 C396 + C400 C397 C122 C101
+1.05VS_MPLL (220UF*1, 0.1UF*1) VTT_4
U11
VTT_5
120Ohm@100MHz
+1.05VS_DPLLB
2.69mA VTT_6 T11
2 2 2 2 2
CRT
D L28 1 D
2 +3VS_DACBG A25 VCCA_DAC_BG VTT_7 U10
MBK1608121YZF_0603 1 T10
VTT_8
1
VCCA_MPLL: 139.2mA C103 1 2 B25 VSSA_DAC_BG VTT_9 U9
R344 L31 1 1 T9
(22UF*1, 0.1UF*1) 0.5_0603_1% 0_1210_5% C405 VTT_10
U8
2 VTT_11
64.8mA VTT_12 T8
VTT
0.1U_0402_16V4Z C408 +1.05VS_DPLLA F47 U7
2
2
10U_0805_10V4Z 2 VCCA_DPLLA VTT_13
1 VTT_14 T7
0.1U_0402_16V4Z +1.05VS_DPLLB L48 U6
C389 VCCA_DPLLB VTT_15
T6
24mA VTT_16
PLL
22U_0805_6.3V6M +1.05VS_HPLL AD1 VCCA_HPLL VTT_17 U5
2 T5
+1.8V_TX_LVDS 139.2mA VTT_18
1 +1.05VS_MPLL AE1 VCCA_MPLL VTT_19 V3
C410 U3
VTT_20
+VCCA_PEG_BG
VCCA_LVDS: 13.2mA 13.2mA VTT_21
V2
A PEG A LVDS
R346 1000P_0402_50V7K J48 U2
0_0402_5% 2 (1000PF*1) VCCA_LVDS VTT_22
T2
VTT_23
+1.5VS 1 2 J47 V1
+3VS_CRTDAC VSSA_LVDS VTT_24
VCCA_CRT_DAC: 73mA (0.1UF*1, 0.01UF*1) 1 VTT_25 U1
C395 VCCA_PEG_BG: 0.414mA 0.414mA
L32 1 2 AD48
+3VS (0.1UF*1) VCCA_PEG_BG
MBK1608301YZF_0603 0.1U_0402_16V4Z
2 +1.05VS_AXF
VCC_AXF: 321.35mA
1 1 (10UF*1, 1UF*1)
1 C418 C417 50mA
PVT AA48 1 2
+ VCCA_PEG_PLL +1.05VS
C424 0.1U_0402_16V4Z 0.01U_0402_16V7K +1.05VS L30 1 2 +1.05VS_PEGPLL 1 1 R354
2 2 MBK1608121YZF_0603 1 VCCA_PEG_PLL: 50mA C422 C414 0_0603_5%
220U_D2_4VY_R15M 2 1 1 2 C394 @
2 C399 R347 (0.1UF*1) 10U_0805_6.3V6M 1U_0402_6.3V6K
2 2
Close to Ball A26, B27 10U_0805_6.3V6M 1_0402_1%
2
0.1U_0402_16V4Z 480mA POWER
AR20
+1.05VS_A_SM VCCA_SM_1
C
VCCA_SM: AP20
VCCA_SM_2 C
(22UF*2, 4.7UF*1, 1UF*1) AN20 VCCA_SM_3
+1.05VS 1 2 AR17
VCCA_SM_4 +1.5V_SM_CK
VCC_SM_CK: 119.85mA
A SM
1 R63 1 1 1 AP17
0_0805_5% C124 C116 VCCA_SM_5 (10UF*1, 0.1UF*1)
AN17 VCCA_SM_6 VCC_AXF_1 B22 1uH 30%
+
AXF
PVT C94 C138 AT16 B21 1 2
VCCA_SM_7 VCC_AXF_2 +1.5V
@ 4.7U_0805_10V4Z AR16 A21 L12
220U_D2_4VY_R15M 2 2 2 VCCA_SM_8 VCC_AXF_3 MBK1608121YZF_0603
AP16 VCCA_SM_9 1
2 22U_0805_6.3V6M 1U_0402_6.3V6K C139
1 R72 2 1 2
0.1U_0402_16V4Z 1_0402_1% C140 10U_0805_6.3V6M
BF21 2
VCC_SM_CK_1
SM CK
VCCA_DAC_BG: 2.6833333mA +1.05VS_A_SM_CK VCC_SM_CK_2
BH20
(0.1UF*1, 0.01UF*1) +3VS_DACBG
VCCA_SM_CK: 24mA VCC_SM_CK_3 BG20
(22UF*1, 2.2UF*1, 0.1UF*1) 24mA VCC_SM_CK_4
BF20
+1.8V_TX_LVDS
+1.05VS 1 2 AP28
VCCA_SM_CK_1 +1.8V_TX_LVDS: 118.8mA
1 2 R99 1 1 1 AN28 0.1uH 20%
+3VS
L10 0_0603_5% C148 C153 C154 AP25
VCCA_SM_CK_2 (22UF*1, 1000PF*1) 1 2
VCCA_SM_CK_3 +1.8V
MBK1608221YZF_0603 1 1 1 @ AN25
VCCA_SM_CK_4 118.8mA 1 1 R358
C415 C416 C423 2.2U_0603_6.3V6K 0.1U_0402_16V4Z AN24 K47 C407 C411 0_0603_5%
2 2 2 VCCA_SM_CK_5 VCC_TX_LVDS
A CK
AM28 VCCA_SM_CK_NCTF_1
0.1U_0402_16V4Z 10U_0805_6.3V6M 22U_0805_6.3V6M AM26 1000P_0402_50V7K
2 2 2 VCCA_SM_CK_NCTF_2 2 2 10U_0805_10V4Z
AM25
VCCA_SM_CK_NCTF_3 105.3mA VCC_HV: 105.3mA
0.01U_0402_16V7K NO_STUFF AL25 C35 +3VS
VCCA_SM_CK_NCTF_4 VCC_HV_1
AM24 B35 1
VCCA_SM_CK_NCTF_5 VCC_HV_2
HV
Close to Ball A25 AL24 A35 C419
VCCA_SM_CK_NCTF_6 VCC_HV_3
AM23
VCCA_SM_CK_NCTF_7 0.1U_0402_16V4Z
AL23 VCCA_SM_CK_NCTF_8 2
1782mA
VCC_PEG_1
V48 +1.05VS_PEG: 1782mA +1.05VS_PEG
U48
VCC_PEG_2 (220UF*1, 22UF*1, 4.7UF*1)
PEG
VCCA_TV_DAC: 40mA (0.1UF*1, VCC_PEG_3
V47 1 2 +1.05VS
B 0.01UF*1 for each DAC) 87.79mA VCC_PEG_4
U47 1 R112
B
B24 U46 1 PVT 0_0805_5%
+3VS_TVDAC +3VS_TVDAC VCCA_TV_DAC_1 VCC_PEG_5 + C184
A24 C169
VCCA_TV_DAC_2
TV
+3VS L11 1 2 VCCD_HDA: 50mA 10U_0805_10V4Z
2 2
220U_D2_4VY_R15M
MBK1608221YZF_0603
(0.1UF*1) 50mA 456mA +1.05VS
180Ohm@100MHz 1 1 1 2 +1.5VS_HDA A32 AH48
+1.5VS VCC_HDA VCC_DMI_1
HDA
C130 C131 R359 1 AF48
VCC_DMI_2
DMI
0_0402_5% C420 Close to A32 AH47
0.1U_0402_16V4Z VCC_DMI_3 +1.05VS_DMI
AG47 1 2
2 2 VCC_DMI_4
0.1U_0402_16V4Z
2
58.696mA R345
0.01U_0402_16V7K +1.5VS_TVDAC M25 VCCD_TVDAC VCC_DMI: 456mA 1 0_0805_5%
D TV/CRT
C392
L28 48.363mA (0.1UF*1)
+1.5VS_QDAC VCCD_QDAC 0.1U_0402_16V4Z
2
VCCD_HPLL: 157.2mA (0.1UF*1) 157.2mA
+1.05VS_HPLL AF1
VCCD_HPLL VTTLF_CAP1
A8
+1.05VS_PEGPLL 50mA VTTLF1 VTTLF_CAP2
AA47 L1
VCCD_PEG_PLL VTTLF2
VTTLF
VCCD_TVDAC: 58.696mA AB2 VTTLF_CAP3
+1.5VS_TVDAC VTTLF3
(0.1UF*1, 0.01UF*1) 60.31mA
M38 1 1 1
VCCD_LVDS_1
LVDS
10U_0805_6.3V6M 1U_0402_6.3V6K
A 2 2 A
VCCD_QDAC: 48.363mA +1.5VS_QDAC R65
D17
(0.1UF*1, 0.01UF*1) 2 1 1 2
+1.05VS +3VS
+1.5VS 1 2 VCCD_LVDS: 60.311111mA
R90 1 1 10_0603_5%
100_0603_1% C150 C160 (1UF*1) CH751H-40PT_SOD323-2
180Ohm@100MHz
0.1U_0402_16V4Z
2 2 Security Classification Compal Secret Data Compal Electronics, Inc.
0.01U_0402_16V7K Issued Date 2008/11/10 2008/11/24 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Crestline GMCH (6/7)-VCC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom KALG1 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 24, 2009 Sheet 12 of 45
5 4 3 2 1
5 4 3 2 1
U21I U21J
VSS NCTF
VSS_68 VSS_167 VSS_266 VSS_NCTF_8
AM39 BB25 J12 U23
VSS_69 VSS_168 VSS_267 VSS_NCTF_9
AJ39 AV25 A12 AL20
VSS_70 VSS_169 VSS_268 VSS_NCTF_10
AE39 VSS_71 VSS_170 AR25 BD11 VSS_269 VSS_NCTF_11 V20
N39 AJ25 BB11 AC19
VSS_72 VSS_171 VSS_270 VSS_NCTF_12
L39 AC25 AY11 AL17
VSS_73 VSS_172 VSS_271 VSS_NCTF_13
B39 Y25 AN11 AJ17
VSS_74 VSS_173 VSS_272 VSS_NCTF_14
BH38 N25 AH11 AA17
VSS_75 VSS_174 VSS_273 VSS_NCTF_15
BC38 L25 U17
B VSS_76 VSS_175 VSS_NCTF_16 B
BA38 VSS_77 VSS_176 J25 Y11 VSS_275
AU38 VSS_78 VSS_177 G25 N11 VSS_276
AH38 E25 G11 BH48
VSS_79 VSS_178 VSS_277 VSS_SCB_1
AD38 VSS_80 VSS_179 BF24 C11 VSS_278 VSS_SCB_2 BH1
AA38 AD12 BG10 A48
VSS_81 VSS_180 VSS_279 VSS_SCB_3
Y38 AY24 AV10 C1
VSS SCB
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cantiga GMCH(1/7)-GTL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom KALG1 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 24, 2009 Sheet 13 of 45
5 4 3 2 1
5 4 3 2 1
+1.5V +1.5V
+V_DDR3_DIMM_REF
[9] DDR_A_DQS#[0..7]
1
9 10 DDR_A_DQS#0
R123 DDR_A_DM0 VSS4 DQS#0 DDR_A_DQS0
[9] DDR_A_MA[0..14] 11 12
1K_0402_1% DM0 DQS0
13 VSS5 VSS6 14
DDR_A_D2 15 16 DDR_A_D6
DDR_A_D3 DQ2 DQ6 DDR_A_D7
17 18
2
D DQ3 DQ7 D
19 VSS7 VSS8 20
DDR_A_D8 DDR_A_D12
0.1U_0402_16V4Z
21 DQ8 DQ12 22
1
2.2U_0805_16V4Z
DDR_A_D9 23 24 DDR_A_D13
DQ9 DQ13
C188
1 1 R122 25 26
DDR_A_DQS#1 VSS9 VSS10 DDR_A_DM1
27 28
DQS#1 DM1
C181
1K_0402_1% DDR_A_DQS1 29 30 SM_DRAMRST#
DQS1 RESET# SM_DRAMRST# [8,15]
31 32
2
2 2 DDR_A_D10 VSS11 VSS12 DDR_A_D14
33 DQ10 DQ14 34
DDR_A_D11 35 36 DDR_A_D15
DQ11 DQ15
37 38
DDR_A_D16 VSS13 VSS14 DDR_A_D20
39 DQ16 DQ20 40
DDR_A_D17 41 42 DDR_A_D21
DQ17 DQ21
43 VSS15 VSS16 44
DDR_A_DQS#2 45 46 DDR_A_DM2
DDR_A_DQS2 DQS#2 DM2
47 48
DQS2 VSS17 DDR_A_D22
49 50
DDR_A_D18 VSS18 DQ22 DDR_A_D23
51 DQ18 DQ23 52
DDR_A_D19 53 54
DQ19 VSS19 DDR_A_D28
55 VSS20 DQ28 56
DDR_A_D24 57 58 DDR_A_D29
DDR_A_D25 DQ24 DQ29
59 60
DQ25 VSS21 DDR_A_DQS#3
61 62
DDR_A_DM3 VSS22 DQS#3 DDR_A_DQS3
63 DM3 DQS3 64
65 VSS23 VSS24 66
DDR_A_D26 67 68 DDR_A_D30
DDR_A_D27 DQ26 DQ30 DDR_A_D31
69 DQ27 DQ31 70
71 72
VSS25 VSS26
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_MA1 DDR_A_MA0
330U_D2_2.5VY_R9M
1 97 A1 A0 98
1 1 1 1 1 1 1 1 1 1 99 100
VDD9 VDD10
C127
C110
C117
C97
C95
C141
C142
C107
C118
C126
C108
0.1U_0402_16V4Z
DDR_A_DQS#4 135 136 DDR_A_DM4
DQS#4 DM4
2.2U_0603_6.3V4Z
DDR_A_DQS4 137 138 1 1
DQS4 VSS31 DDR_A_D38
139 140
VSS32 DQ38
C109
C98
B DDR_A_D34 DDR_A_D39 B
141 DQ34 DQ39 142
+0.75VS DDR_A_D35 143 144
DQ35 VSS33 DDR_A_D44 2 2
145 146
DDR_A_D40 VSS34 DQ44 DDR_A_D45
147 DQ40 DQ45 148
10U_0805_6.3V6M
1U_0603_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z
C47
C46
C48
C49
167 168
DDR_A_DQS#6 VSS41 VSS42 DDR_A_DM6
169 DQS#6 DM6 170
DDR_A_DQS6 171 172
DQS6 VSS43 DDR_A_D54
173 174
DDR_A_D50 VSS44 DQ54 DDR_A_D55
175 176
DDR_A_D51 DQ50 DQ55
177 178
DQ51 VSS45 DDR_A_D60
179 180
DDR_A_D56 VSS46 DQ60 DDR_A_D61
181 182
DDR_A_D57 DQ56 DQ61
183 DQ57 VSS47 184
185 186 DDR_A_DQS#7
DDR_A_DM7 VSS48 DQS#7 DDR_A_DQS7
187 DM7 DQS7 188
189 190
DDR_A_D58 VSS49 VSS50 DDR_A_D62
191 192
DDR_A_D59 DQ58 DQ62 DDR_A_D63
193 DQ59 DQ63 194
1 R39 2 195 196
10K_0402_5% VSS51 VSS52 PM_EXTTS#0
197 198 PM_EXTTS#0 [8]
SA0 EVENT# CLK_SMBDATA
+3VS 199 200 CLK_SMBDATA [15,16]
VDDSPD SDA CLK_SMBCLK
201 202 CLK_SMBCLK [15,16]
SA1 SCL
C44
2.2U_0603_6.3V4Z
A A
0.1U_0402_16V4Z
C69
205 G1 G2 206
R37
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRIII-SODIMM SLOT1
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom KALG1 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 24, 2009 Sheet 14 of 45
5 4 3 2 1
5 4 3 2 1
2.2U_0805_16V4Z
0.1U_0402_16V4Z
DDR_B_DM0 11 12 DDR_B_DQS0
DM0 DQS0
1 1 13 14
DDR_B_D2 VSS5 VSS6 DDR_B_D6
15 DQ2 DQ6 16
C191
C190
D DDR_B_D3 DDR_B_D7 D
17 DQ3 DQ7 18
19 VSS7 VSS8 20
2 2 DDR_B_D8 21 22 DDR_B_D12
DDR_B_D9 DQ8 DQ12 DDR_B_D13
23 24
DQ9 DQ13
25 26
DDR_B_DQS#1 VSS9 VSS10 DDR_B_DM1
27 DQS#1 DM1 28
DDR_B_DQS1 29 30 SM_DRAMRST#
DQS1 RESET# SM_DRAMRST# [8,14]
31 VSS11 VSS12 32
DDR_B_D10 33 34 DDR_B_D14
DDR_B_D11 DQ10 DQ14 DDR_B_D15
35 36
DQ11 DQ15
37 VSS13 VSS14 38
DDR_B_D16 39 40 DDR_B_D20
DDR_B_D17 DQ16 DQ20 DDR_B_D21
41 DQ17 DQ21 42
43 44
DDR_B_DQS#2 VSS15 VSS16 DDR_B_DM2
45 46
DDR_B_DQS2 DQS#2 DM2
Layout Note: 47
DQS2 VSS17
48
DDR_B_D22
49 VSS18 DQ22 50
Place near JP5 DDR_B_D18 51 52 DDR_B_D23
DDR_B_D19 DQ18 DQ23
53 DQ19 VSS19 54
Layout Note: Place these 4 Caps near Command 55 56 DDR_B_D28
DDR_B_D24 VSS20 DQ28 DDR_B_D29
and Control signals of DIMMB 57 58
DDR_B_D25 DQ24 DQ29
59 60
DQ25 VSS21 DDR_B_DQS#3
61 VSS22 DQS#3 62
+1.5V DDR_B_DM3 63 64 DDR_B_DQS3
DM3 DQS3
65 66
DDR_B_D26 VSS23 VSS24 DDR_B_D30
67 DQ26 DQ30 68
DDR_B_D27 69 70 DDR_B_D31
DQ27 DQ31
10U_0603_6.3V6M
10U_0805_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
10U_0603_6.3V6M
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
330U_D2_2.5VY_R9M
1 71 72
VSS25 VSS26
1 1 1 1 1 1 1 1 1 1
C144
C121
C119
C99
C91
C111
C120
C143
C128
C129
C112
DDR_CKE2_DIMMB 73 74 DDR_CKE3_DIMMB
C 2 2 2 2 2 2 2 2 2 2 2 PVT [8] DDR_CKE2_DIMMB CKE0 CKE1 DDR_CKE3_DIMMB [8] C
75 VDD1 VDD2 76
77 78
DDR_B_BS2 NC1 A15 DDR_B_MA14
[9] DDR_B_BS2 79 80
BA2 A14
81 VDD3 VDD4 82
DDR_B_MA12 83 84 DDR_B_MA11
DDR_B_MA9 A12/BC# A11 DDR_B_MA7
85 86
A9 A7
87 VDD5 VDD6 88
DDR_B_MA8 89 90 DDR_B_MA6
DDR_B_MA5 A8 A6 DDR_B_MA4
91 A5 A4 92
93 94
DDR_B_MA3 VDD7 VDD8 DDR_B_MA2
Layout Note: DDR_B_MA1
95 A3 A2 96
DDR_B_MA0
97 98
Place near JP5.203 & JP5.204 99
A1 A0
100
M_CLK_DDR2 VDD9 VDD10 M_CLK_DDR3
101 102 M_CLK_DDR3 [8]
[8] M_CLK_DDR2 M_CLK_DDR#2 CK0 CK1 M_CLK_DDR#3
103 104 M_CLK_DDR#3 [8]
[8] M_CLK_DDR#2 CK0# CK1#
105 106
DDR_B_MA10 VDD11 VDD12 DDR_B_BS1
107 108 DDR_B_BS1 [9]
+0.75VS DDR_B_BS0 A10/AP BA1 DDR_B_RAS#
[9] DDR_B_BS0 109 110 DDR_B_RAS# [9]
BA0 RAS#
111 112
DDR_B_WE# VDD13 VDD14 DDR_CS2_DIMMB#
113 WE# S0# 114 DDR_CS2_DIMMB# [8]
[9] DDR_B_WE# DDR_B_CAS# M_ODT2
[9] DDR_B_CAS# 115 116 M_ODT2 [8]
CAS# ODT0
1U_0603_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z
1U_0603_10V4Z
10U_0805_6.3V6M
117 118
DDR_B_MA13 VDD15 VDD16 M_ODT3 +V_DDR3_DIMM_REF
119 120 M_ODT3 [8]
DDR_CS3_DIMMB# A13 ODT1
2 2 2 2 1 121 122
[8] DDR_CS3_DIMMB# S1# NC2
C55
C53
C52
C51
0.1U_0402_16V4Z
133 134
VSS29 VSS30
2.2U_0603_6.3V4Z
DDR_B_DQS#4 135 136 DDR_B_DM4 1 1
DQS#4 DM4
C96
DDR_B_DQS4 137 138
DQS4 VSS31
C100
B DDR_B_D38 B
139 VSS32 DQ38 140
DDR_B_D34 141 142 DDR_B_D39
DDR_B_D35 DQ34 DQ39 2 2
143 144
DQ35 VSS33 DDR_B_D44
145 VSS34 DQ44 146
DDR_B_D40 147 148 DDR_B_D45
DDR_B_D41 DQ40 DQ45
149 150
DQ41 VSS35 DDR_B_DQS#5
151 152
DDR_B_DM5 VSS36 DQS#5 DDR_B_DQS5
153 154
DM5 DQS5
155 156
DDR_B_D42 VSS37 VSS38 DDR_B_D46
157 DQ42 DQ46 158
DDR_B_D43 159 160 DDR_B_D47
DQ43 DQ47
161 162
DDR_B_D48 VSS39 VSS40 DDR_B_D52
163 DQ48 DQ52 164
DDR_B_D49 165 166 DDR_B_D53
DQ49 DQ53
167 VSS41 VSS42 168
DDR_B_DQS#6 169 170 DDR_B_DM6
DDR_B_DQS6 DQS#6 DM6
171 172
DQS6 VSS43 DDR_B_D54
173 174
DDR_B_D50 VSS44 DQ54 DDR_B_D55
175 176
DDR_B_D51 DQ50 DQ55
177 178
DQ51 VSS45 DDR_B_D60
179 180
DDR_B_D56 VSS46 DQ60 DDR_B_D61
181 DQ56 DQ61 182
DDR_B_D57 183 184
DQ57 VSS47 DDR_B_DQS#7
185 VSS48 DQS#7 186
DDR_B_DM7 187 188 DDR_B_DQS7
DM7 DQS7
189 190
DDR_B_D58 VSS49 VSS50 DDR_B_D62
191 DQ58 DQ62 192
DDR_B_D59 193 194 DDR_B_D63
DQ59 DQ63
1 R40 2 195 196
10K_0402_5% VSS51 VSS52 PM_EXTTS#1
197 198 PM_EXTTS#1 [8]
SA0 EVENT# CLK_SMBDATA
+3VS 199 200 CLK_SMBDATA [14,16]
VDDSPD SDA
0.1U_0402_16V4Z
CLK_SMBCLK
2.2U_0603_6.3V4Z
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRIII-SODIMM SLOT2
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS KALG1 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 24, 2009 Sheet 15 of 45
5 4 3 2 1
A B C D E F G H
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
10U_0805_10V4Z
0.1U_0402_16V4Z
0 0 0 266 100 33.3 C274 C285 C272 C273 C288 C282 C286 C271 C300 C281 C312 C313 C301 C287
C267 C266
10U_0805_10V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
0 1 0 200 100 33.3 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
R280 10K_0402_5%
2 R268 @ 33 CLK_PCIE_SATA# 2
SRCC2_LPR/SATAC_LPR CLK_PCIE_SATA# [20]
CLK_PCI5=0, Pin63,64 is SRC_CLK 10K_0402_5% H_STP_CPU# 53
[21] H_STP_CPU# CPU_STOP#
CLK_PCI5=1, Pin63,64 is ITP_CLK H_STP_PCI# CLK_PCIE_ICH
[21] H_STP_PCI# 54 35 CLK_PCIE_ICH [21]
1
R277 10K_0402_5%
CLK_PCI4=0, Pin28, 29 is SRC_CLK 2 @ T26
CLK_ENABLE# [43]
G PAD 13 39 CLK_PCIE_CARD
Pin24, 25 is DOT96_CLK Q28 @ PCI1 SRCT4_LPR CLK_PCIE_CARD [28] PVT
S
3
R245 @ CLK_XTALOUT 4 63
56_0402_5% Y2 X2 CPUC2_ITP_LPR/SRCC8_LPR
C310 14.31818MHz_20P_FSX8L14.318181M20FDB
R243 R246 27P_0402_50V8J 11 44 CLK_PCIE_MINI2
CLK_PCIE_MINI2 [28]
2
CLKSEL0 1 2 1 2 45 CLK_PCIE_MINI2#
MCH_CLKSEL0 [8] SRCC9_LPR CLK_PCIE_MINI2# [28]
CLK_ICH_48M 1 2 CLKSEL0 20
[21] CLK_ICH_48M USB_48MHz/FSLA
1 2 1 2 CPU_BSEL0 [5] R241 22_0402_5% 50
R244 @ R247 CLK_SD_48M CLKSEL1 SRCT10_LPR
[25] CLK_SD_48M 1 2 2 FSLB/TEST_MODE
1K_0402_5% 0_0402_5% R242 22_0402_5% 51
CLK_ICH_14M R273 2 SRCC10_LPR
[21] CLK_ICH_14M 1 33_0402_5% CLKSEL2 7 FSLC/TEST_SEL/REF0
+1.05VS PAD 8 48 CLK_PCIE_LAN
REF1 SRCT11_LPR CLK_PCIE_LAN [26]
T27 @
47 CLK_PCIE_LAN#
SRCC11_LPR CLK_PCIE_LAN# [26]
2
R271 @
1K_0402_5% +3VS 69
R294 GNDCPU
R269 4.7K_0402_5% 3 37
GNDREF CR#3
2
1K_0402_5% PVT
G
1 2 +3VS 1 2 +3VS
1
+1.05VS
G
1 2 +3VS 1 2 +3VS
59 46 R32 10K_0402_5%
GNDSRC CR#11 LAN_CLKREQ# [26]
4 [21,28] ICH_SMBCLK 1 3 CLK_SMBCLK 4
2
R293 @ 42 21
D
CLKSEL2 1 2 1 2 MCH_CLKSEL2 [8] Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/11/10 Deciphered Date 2008/11/24 Title
1
R291 @
2 1
R292
2 CPU_BSEL2 [5]
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Clock Generator (CK505)
0_0402_5% 0_0402_5% Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 16 of 45
A B C D E F G H
5 4 3 2 1
+LCDVDD
LCD POWER CIRCUIT
+3V +3VS
W=60mils
1
D D
R11
1
300_0603_5% 1
R22 C18
100K_0402_5%
3 2
4.7U_0805_10V4Z
2
2
Q1B
3
S
G
2N7002DW-T/R7_SOT363-6 5 2 1 2 Q2
R21 1K_0402_5% AO3413_SOT23-3
D
1
1
6
C12
0.047U_0402_16V7K
+LCDVDD
W=60mils
Q1A
2
[10] GMCH_ENVDD 2
2N7002DW-T/R7_SOT363-6 1 1
C14 C13
1
1
4.7U_0805_10V4Z 0.1U_0402_16V4Z
R12 2 2
100K_0402_5%
2
C C
+3VS
1
DAC_BRIG 1 2
+INVPWR_B+ B+ R10 C7 220P_0402_50V7K
INVTPWM 1 2
4.7K_0402_5% C8 220P_0402_50V7K
D6 DISPOFF#
L2 2 1 1 2
2
W=40mils KC FBM-L11-201209-221LMAT_0805 BKOFF# 1 2 DISPOFF# C9 220P_0402_50V7K
[30] BKOFF#
L1 2 1
KC FBM-L11-201209-221LMAT_0805 CH751H-40PT_SOD323-2
1 1
C5 C6
680P_0402_50V7K 68P_0402_50V8J
2 2
+3VS
5
U1
P
NC
INVTPWM DPST_PWM [10]
4 2
Y A
G
B NC7SZ14P5X_NL_SC70-5 B
2
+INVPWR_B+
G
JLVDS1 @
+3VS 42 GND GND 41 1 @ 2 INVTPWM 1 3
+3VS
40 39 DAC_BRIG
S
40 39 DAC_BRIG [30]
38 38 INVTPWM R20 10K_0402_5%
37 37 DISPOFF#
36 36 35 35
GMCH_LCD_CLK Q3
[10] GMCH_LCD_CLK
[10] GMCH_LCD_DATA
34
GMCH_LCD_DATA 34
32 32
33
31 31
33 +LCDVDD 2N7002_SOT23 For GMCH DPST
30 30
29 29 W=60mils
28 28 27 27
26 26 GMCH_TXOUT0-
25 25 GMCH_TXOUT0+
GMCH_TXOUT0- [10] +3VS +LCDVDD
24 24
23 23 GMCH_TXOUT0+ [10]
22 22
21 21 GMCH_TXOUT1-
20 20
19 19 GMCH_TXOUT1+ GMCH_TXOUT1- [10]
18 18
17 17 GMCH_TXOUT1+ [10]
16 16
15 15 GMCH_TXOUT2+
1
C15
1
C11
1
C10
14 14 13 13 GMCH_TXOUT2+ [10]
12 11 GMCH_TXOUT2-
12 11 GMCH_TXOUT2- [10]
10 10 0.1U_0402_16V4Z 10U_0805_10V4Z 0.1U_0402_16V4Z
9 9 GMCH_TXCLK- 2 2 2
8 8 7 GMCH_TXCLK- [10]
R13 0_0402_5% 7 GMCH_TXCLK+
6 5 GMCH_TXCLK+ [10]
6 5
[21] USB20_N3 1 2 USB20_CMOS_N3 4 4 3 3
1 2 USB20_CMOS_P3 2 2
[21] USB20_P3
R14 0_0402_5% 1 1 +3VS
ACES_88242-4001
A CONN@ A
CMOS Camera
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LVDS & Camera Connector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom KALG1 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, March 24, 2009 Sheet 17 of 45
5 4 3 2 1
A B C D E
CRT Connector
1 1
PVT PSOT24C-LF-T7_SOT23-3
1
2 1 1 2
RB491D_SC59-3 1.1A_6VDC_FUSE
1
C56
3
0.1U_0402_16V4Z
2
+3VS
PVT JCRT1
6 RGND
R472 0_0805_5% L8 FCM2012C-800_0805 11
GMCH_CRT_R CRT_R_1 CRT_R_2 ID0
[10] GMCH_CRT_R 1 2 1 2 1
Red
7 GGND
R473 0_0805_5% L6 FCM2012C-800_0805 12
GMCH_CRT_G CRT_G_1 CRT_G_2 SDA
[10] GMCH_CRT_G 1 2 1 2 2
Green
8 BGND
R474 0_0805_5% L3 FCM2012C-800_0805 13
GMCH_CRT_B CRT_B_1 CRT_B_2 Hsync
[10] GMCH_CRT_B 1 2 1 2 3
Blue
9
+5V
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
22P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
2
C85
C78
2
1 1 1 1 1 1 1 1 1 14 Vsync
1
1
150_0402_1%
150_0402_1%
150_0402_1%
C87
C80
C72
C86
C79
C71
4
res
R47
R45
R42
C77 10
10P_0402_50V8J SGND
15 SCL
2 2 2 2 2 2 2 2 2 5 GND
2
+CRT_VCC 16 GND
17
GND
2 1
L42 1 2 CRT_HSYNC_2 R41 100K_0402_5%
MBK1608301YZF_0603 SUYIN_070546FR015S263ZR
CRT_DET# [21]
CONN@
L41 1 2 CRT_VSYNC_2
MBK1608301YZF_0603 1 1 DSUB_12
+CRT_VCC C518
C519
100P_0402_50V8J
68P_0402_50V8J
68P_0402_50V8J
1 2 2 1 10P_0402_50V8J 10P_0402_50V8J
C493 0.1U_0402_16V4Z R446 10K_0402_5% 2 2
DSUB_15
5
U26
OE#
P
GMCH_CRT_HSYNC 2 4 CRT_HSYNC_1
[10] GMCH_CRT_HSYNC A Y
1 1 1
G
74AHCT1G125GW_SOT353-5
3
+CRT_VCC 2 2 2
C517
C520
C516
+CRT_VCC
1 2 Place closed to chipset
C494 0.1U_0402_16V4Z
5
U25
OE#
P
1
G
4.7K_0402_5% 4.7K_0402_5%
2
G
DSUB_12 1 3
GMCH_CRT_DATA [10]
S
Q39
2
2N7002_SOT23
G
DSUB_15 1 3
GMCH_CRT_CLK [10]
S
Q38
2N7002_SOT23
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CRT Connector
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 18 of 45
A B C D E
5 4 3 2 1
2
2 7 PCI_REQ#3
PCI_STOP#
3
4
6
5 PCI_PIRQD# PCI_PIRQA# J5
Interrupt I/F H4 PCI_PIRQE# R421
PCI_PIRQB# PIRQA# PIRQE#/GPIO2 PCI_PIRQF# 10_0402_5%
E1 PIRQB# PIRQF#/GPIO3 K6
8.2K_1206_8P4R_5% PCI_PIRQC# J6 F2 PCI_PIRQG# @
1
PCI_PIRQD# PIRQC# PIRQG#/GPIO4 PCI_PIRQH#
C4 PIRQD# PIRQH#/GPIO5 G2
1
ICH9-M ES_FCBGA676 C476
10P_0402_50V8J
@
2
+3VS
5
U23
Boot BIOS Strap PLT_RST# 2 B
P
Y 4 PLT_RST_BUF# [28]
PCI_GNT#0 SPI_CS#1 Boot BIOS Loaction 1 A
G
1
1
NC7SZ08P5X_NL_SC70-5
3
R228 R394
0 1 SPI 100K_0402_5% 100K_0402_5%
@
1 0 PCI
2
2
1 1 LPC*
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ICH9M(1/4)-PCI
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 19 of 45
5 4 3 2 1
5 4 3 2 1
1
Keep CMOS OPEN Keep ME RTC Registers OPEN
R391 X2 H_DPRSTP#
10M_0402_5%
2 1
1
3 4 R371 @ 56_0402_5%
NC OUT
R363
1M_0402_5% Reset r1290 for power on then shut down issue H_DPSLP# 2 1
32.768KHZ_12.5P_MC-306 2 1 R160 @ 56_0402_5%
2
SM_INTRUDER# NC IN
PVT C437 U22A
2
D 12P_0402_50V8J C23 K5 LPC_AD0 D
RTCX1 FWH0/LAD0 LPC_AD0 [30]
2 1 ICH_RTCX2 C24 K4 LPC_AD1
+RTCVCC RTCX2 FWH1/LAD1 LPC_AD1 [30]
L6 LPC_AD2
FWH2/LAD2 LPC_AD2 [30]
+RTCVCC 1 2 ICH_RTCRST# A25 K2 LPC_AD3
RTCRST# FWH3/LAD3 LPC_AD3 [30]
R376 +RTCVCC 1 2 ICH_SRTCRST# F20
20K_0402_5% R180 SM_INTRUDER# SRTCRST# LPC_FRAME#
C22 INTRUDER# FWH4/LFRAME# K3 LPC_FRAME# [30]
1
20K_0402_5%
RTC
LPC
R383 close to RAM door close to RAM door ICH_INTVRMEN B22 INTVRMEN LDRQ0# J3
332K_0402_1% A22 J1
LAN100_SLP LDRQ1#/GPIO23 R166 2
1 2 1 2 1 10K_0402_5% +3VS
R337 @ R336 @ E25 N7 EC_GA20
EC_GA20 [30]
2
LAN / GLAN
R374 56_0402_5%
D13 AD22 H_PW RGOOD 2 1 +1.05VS
LAN_TXD_0 CPUPWRGD H_PW RGOOD [5]
D12 R370 56_0402_5%
LAN_TXD_1
1
CPU
INTR H_INTR [4]
+1.5VS_PCIE_ICH 1 2 GLAN_COMP B28 L3 EC_KBRST#
EC_KBRST# [30]
2
IHDA
HDA_SDIN3
SATA4RXN AH11 R372 need to place within 2" of ICH9M
[32] HDA_SDOUT_MDC 1 2 HDA_SDOUT_ICH AG5 HDA_SDOUT SATA4RXP AJ11 R373 must be place within 2" of R372 w/o stub.
+3VS R150 33_0402_5% AG12
SATA4TXN
AG7 HDA_DOCK_EN#/GPIO33 SATA4TXP AF12
AE8 HDA_DOCK_RST#/GPIO34
1
MAINPW ON [38,39]
R144 [36] SATA_LED# SATA_LED# AG8 SATALED# SATA_DTX_C_IRX_N5
SATA5RXN AH9 SATA_DTX_C_IRX_N5 [29]
10K_0402_5% [23] SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_N0 AJ16 AJ9 SATA_DTX_C_IRX_P5 SATA_DTX_C_IRX_P5 [29] R369 @
SATA0RXN SATA5RXP
1
SATA_DTX_C_IRX_P0 SATA_ITX_DRX_N5 330_0402_5% C
SATA for HDD [23] SATA_DTX_C_IRX_P0 AH16 AE10
2
3
SATA_CLKN
SATA
[23] SATA_DTX_C_IRX_N1 SATA_DTX_C_IRX_N1 AH13 AJ18 CLK_PCIE_SATA
SATA1RXN SATA_CLKP CLK_PCIE_SATA [16]
SATA for ODD [23] SATA_DTX_C_IRX_P1 SATA_DTX_C_IRX_P1 AJ13 AJ7 SATARBIAS
SATA_ITX_DRX_N1 SATA1RXP SATARBIAS# R401 1
AG14 SATA1TXN SATARBIAS AH7 2 24.9_0402_1% H_THERMTRIP#
SATA_ITX_DRX_P1 AF14 10mils width less than 500mils
SATA1TXP
ICH9-M ES_FCBGA676
PROJECT_ID
B HDA_BITCLK_ICH
close ICH9 B
[33] HDA_BITCLK_AUDIO 1 2
ID0 ID1 ID2 R423 33_0402_5% SATA_ITX_DRX_N0 1 2 SATA_ITX_C_DRX_N0
HDA_SYNC_ICH C202 0.01U_0402_16V7K SATA_ITX_C_DRX_N0 [23]
[33] HDA_SYNC_AUDIO 1 2
KAL90 0 0 0 R424 33_0402_5% SATA_ITX_DRX_P0 SATA_ITX_C_DRX_P0 +RTCBATT
HDA for AUDIO HDA_RST_ICH#
1
C203
2
0.01U_0402_16V7K SATA_ITX_C_DRX_P0 [23]
[33] HDA_RST_AUDIO# 1 2
KAL90+ 1 0 0 R425 33_0402_5%
[33] HDA_SDOUT_AUDIO 1 2 HDA_SDOUT_ICH
KALG1 0 1 0 R409 33_0402_5% SATA_ITX_DRX_N1 1 2 SATA_ITX_C_DRX_N1
C201 0.01U_0402_16V7K SATA_ITX_C_DRX_N1 [23]
KALG0 1 1 0 1 2 HDA_BITCLK_ICH SATA_ITX_DRX_P1 1 2 SATA_ITX_C_DRX_P1
[8] HDA_BITCLK_MCH SATA_ITX_C_DRX_P1 [23]
2
R142 33_0402_5% C200 0.01U_0402_16V7K
[8] HDA_SYNC_MCH 1 2 HDA_SYNC_ICH R304
R140 33_0402_5% C199 KAL90_90+@ 1K_0402_5%
HDA for GMCH 1 2 HDA_RST_ICH# SATA_ITX_DRX_N5 1 2 SATA_ITX_C_DRX_N5
[8] HDA_RST_MCH# SATA_ITX_C_DRX_N5 [29]
R143 33_0402_5% 0.01U_0402_16V7K
1 1
[8] HDA_SDOUT_MCH 1 2 HDA_SDOUT_ICH SATA_ITX_DRX_P5 1 2 SATA_ITX_C_DRX_P5
R141 33_0402_5% C198 0.01U_0402_16V7K SATA_ITX_C_DRX_P5 [29]
D30 BAS40-04_SOT23-3
KAL90_90+@
+VCC_HDA_ICH PVT
+RTCVCC +CHGRTC
2
R404
1K_0402_5%
@
1
HDA_SDOUT_ICH C331
Flash Descriptor Security Override Strap 0.1U_0402_16V4Z
A ICH_TP3 [21]
Low= Descriptor Security override
2 RTC Conn A
1 0 Normal Operation THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ICH9M(2/4)-LAN,IDELPC,RTC
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1 1 Set PCIE port config bit 1 Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 20 of 45
5 4 3 2 1
5 4 3 2 1
+3VS
Place closely pin B2 Place closely pin AC1
1 2 SERIRQ U22C
R167 10K_0402_5% [16,28] ICH_SMBCLK ICH_SMBCLK G16 AH23 PROJECT_ID1 CLK_ICH_48M CLK_ICH_14M
PM_CLKRUN# ICH_SMBDATA SMBCLK SATA0GP/GPIO21 PROJECT_ID0
1
R169
2
8.2K_0402_5%
[16,28] ICH_SMBDATA
LINKALERT#
A13
E17
SMBDATA SMB SATA1GP/GPIO19 AF19
AE21 R159 1 2 10K_0402_5%
SATA
GPIO
LINKALERT#/GPIO60/CLGPIO4 SATA4GP/GPIO36
1
1 2 EC_THERM# ICH_SMLINK0 C17 AD20
R379 8.2K_0402_5% ICH_SMLINK1 SMLINK0 SATA5GP/GPIO37 R148 R420
B18 SMLINK1
1 2 H_STP_PCI# H1 CLK_ICH_14M 10_0402_5% 10_0402_5%
CLK14 CLK_ICH_14M [16]
R395 @ 10K_0402_5% EC_SWI# CLK_ICH_48M @ @
1 2 H_STP_CPU# [30] EC_SWI# F19 RI# clocks CLK48 AF3 CLK_ICH_48M [16]
2
R229 @ 10K_0402_5% @ SUS_STAT# R4 P1 SUS_CLK @ 1 1
T10 PAD SUS_STAT#/LPCPD# SUSCLK PAD T34
1 2 SB_SPKR XDP_DBRESET# G19 C197 C472
[4] XDP_DBRESET# SYS_RESET#
R170 @ 1K_0402_5% C16 PM_SLP_S3# 10P_0402_50V8J 10P_0402_50V8J
D ICH_SPI_MOSI PM_SYNC# SLP_S3# PM_SLP_S4# PM_SLP_S3# [30] D
1 2 M6 E16 @ @
[8] PM_SYNC# PMSYNC#/GPIO0 SLP_S4# PM_SLP_S5# PM_SLP_S4# [30,32] 2 2
R377 @ 1K_0402_5% G17 PM_SLP_S5# [30]
SYS / GPIO
OCP# EC_LID_OUT# SLP_S5#
1 2 [30] EC_LID_OUT# A17 SMBALERT#/GPIO11
R145 10K_0402_5% C10 S4_STATE#
ICH_GPIO17 H_STP_PCI# S4_STATE#/GPIO26
1 2 [16] H_STP_PCI# A14
R154 @ 10K_0402_5% H_STP_CPU# STP_PCI# ICH_PWROK
[16] H_STP_CPU# E19 STP_CPU# PWROK G20 ICH_PWROK [8]
1 2 ICH_GPIO18
R419 @ 10K_0402_5% PM_CLKRUN# L4 M2 DPRSLPVR 1 2 PM_DPRSLPVR [8,43]
Power MGT
ICH_GPIO20 [30] PM_CLKRUN# CLKRUN# DPRSLPVR/GPIO16 R417 100_0402_5%
1 2
R153 @ 10K_0402_5% ICH_PCIE_WAKE# E20 B13 PM_BATLOW#
SATA_CLKREQ# [28] ICH_PCIE_WAKE# SERIRQ WAKE# BATLOW#
1 2 [30] SERIRQ M5 SERIRQ
R418 10K_0402_5% EC_THERM# AJ23 R3 PBTN_OUT# ICH_PWROK 1 2
ICH_GPIO38 [30] EC_THERM# THRM# PWRBTN# PBTN_OUT# [30]
1 2 R179 10K_0402_5%
R155 @ 10K_0402_5% VGATE 2 1 ICH_VGATE D21 D20 LAN_RST# 1 2
ICH_GPIO39 [8,16,43] VGATE VRMPWRGD LAN_RST#
1 2 R231 0_0402_5% R213 10K_0402_5% No used Integrated LAN,
R147 @ 10K_0402_5% @ ICH_TP11 A20 D22 SB_RSMRST# EC_PWROK 1 2
ICH_GPIO48 T23 PAD TP11 RSMRST# connecting LAN_RST# to GND
1 2 R384 10K_0402_5%
R157 10K_0402_5% OCP# AG19 R5 CK_PWRGD
[4] OCP# GPIO1 CK_PWRGD CK_PWRGD [16]
CRT_DET AH21 GPIO6 ICH_PWROK R232 2 @
AG21 R6 1 0_0402_5%
EC_SMI# GPIO7 CLPWROK
[30] EC_SMI# A21
GPIO8 PM_SLP_M# @ +3VS
[30] EC_SCI# C12 B16 PAD T30
CP_PE# GPIO12 SLP_M#
C21 GPIO13
+3V [28] CP_PE# ICH_GPIO17 AE18 GPIO17 CL_CLK0 F24 CL_CLK0 [8]
5
PVT ICH_GPIO18 K1 B19 U10
GPIO
GPIO18 CL_CLK1
Controller Link
1 2 ICH_SMBCLK ICH_GPIO20 AF8 2 EC_PWROK
P
GPIO20 ICH_PWROK B EC_PWROK [30,32]
R176 2.2K_0402_5% AJ22 F22 4
ICH_SMBDATA +3V ICH_GPIO27 SCLOCK/GPIO22 CL_DATA0 CL_DATA0 [8] Y VGATE
1 2 @ A9 C19 1
T20 PAD GPIO27 CL_DATA1 A
G
R396 2.2K_0402_5% @ ICH_GPIO28 D19
T14 PAD GPIO28
1 2 EC_SWI# SATA_CLKREQ# L1 C25 CL_VREF0_ICH NC7SZ08P5X_NL_SC70-5
[16] SATA_CLKREQ#
3
SATACLKREQ#/GPIO35 CL_VREF0
1
MMBT3906_SOT23-3 C
MISC
[8] MCH_ICH_SYNC# MCH_SYNC# GPIO14/AC_PRESENT ACIN [30,35,36,37,40] EC_RSMRST# [30]
R177 10K_0402_5% R402 ICH_GPIO9
B21 C20 PAD T21 D26
E
[20] ICH_TP3 TP3 WOL_EN/GPIO9
1 2 ICH_PCIE_WAKE# 100K_0402_5% @
T7 PAD
ICH_TP8 AH20 @ CH751H-40PT_SOD323-2
TP8
1
R178 1K_0402_5% @ ICH_TP9 AJ20
B
T5 PAD
2
PM_BATLOW# @ ICH_TP10 TP9 R366
1 2 T6 PAD AJ21 1 2 +3V
2
2
1 2 ICH_GPIO10 U22D 1
R212 10K_0402_5% PCIE_PTX_C_IRX_N1 N29 V27 DMI_MTX_IRX_N0 6
CP_PE# PVT PVT [28] PCIE_PTX_C_IRX_N1 PCIE_PTX_C_IRX_P1 PERN1 DMI0RXN DMI_MTX_IRX_P0 DMI_MTX_IRX_N0 [8]
1 2 [28] PCIE_PTX_C_IRX_P1 N28 V26 DMI_MTX_IRX_P0 [8] 2
R214 10K_0402_5% C1586 0.1U_0402_16V7K PCIE_ITX_PRX_N1 PERP1 DMI0RXP DMI_ITX_MRX_N0
For Express Card [28] PCIE_ITX_C_PRX_N1 2KAL90_H0_90+@
1 P27 U29 DMI_ITX_MRX_N0 [8]
S4_STATE# C1587 0.1U_0402_16V7K PCIE_ITX_PRX_P1 PETN1 DMI0TXN DMI_ITX_MRX_P0
1 2 2KAL90_H0_90+@
1 P26 U28 BAV99DW-7_SOT363
1
R146 10K_0402_5%
PCIE_PTX_C_IRX_N3 DMI_MTX_IRX_N2
PCI - Express
1 2 J29 AB27 BAV99DW-7_SOT363 R360
[26] PCIE_PTX_C_IRX_N3 PCIE_PTX_C_IRX_P3 PERN3 DMI2RXN DMI_MTX_IRX_P2 DMI_MTX_IRX_N2 [8]
R381 10K_0402_5% J28 AB26 2.2K_0402_5%
[26] PCIE_PTX_C_IRX_P3 PERP3 DMI2RXP DMI_MTX_IRX_P2 [8]
1 2 PROJECT_ID1 For PCIE LAN C258 2 1 0.1U_0402_16V7K PCIE_ITX_PRX_N3 K27 AA29 DMI_ITX_MRX_N2
[26] PCIE_ITX_C_PRX_N3 PETN3 DMI2TXN DMI_ITX_MRX_N2 [8]
R380 @ 10K_0402_5% C259 2 1 0.1U_0402_16V7K PCIE_ITX_PRX_P3 K26 AA28 DMI_ITX_MRX_P2
[26] PCIE_ITX_C_PRX_P3 DMI_ITX_MRX_P2 [8]
2
PM_DPRSLPVR PETP3 DMI2TXP
1 2
R436 @ 100K_0402_5% G29 AD27 DMI_MTX_IRX_N3
ICH_GPIO49 PERN4 DMI3RXN DMI_MTX_IRX_P3 DMI_MTX_IRX_N3 [8]
1 2 G28 AD26 DMI_MTX_IRX_P3 [8]
R378 @ 1K_0402_5% +3VS PERP4 DMI3RXP DMI_ITX_MRX_N3
H27 AC29 DMI_ITX_MRX_N3 [8]
B PETN4 DMI3TXN DMI_ITX_MRX_P3 B
H26 PETP4 DMI3TXP AC28 DMI_ITX_MRX_P3 [8] +3VS
2
CRT_DET DMI_IRCOMP
C29
PERN6/GLAN_RXN
1 2 USB_OC#11 C28 AC5 USB20_N0
USB20_N0 [29]
PERP6/GLAN_RXP USBP0N
1
2
C452 C451 +ICH_V5REF A6 C15 1 1 AA27 J23
R405 D32 V5REF VCC1_05[03] C247 C235 VSS[002] VSS[108]
D15 AA3 J26
100_0402_1% 0.1U_0402_16V4Z VCC1_05[04] VSS[003] VSS[109]
CH751H-40PT_SOD323-2 E15 AA6 J27
2
1U_0402_6.3V6K 2 +ICH_V5REF_SUS VCC1_05[05] 0.1U_0402_16V4Z VSS[004] VSS[110]
AE1 F15 AB1 AC22
V5REF_SUS VCC1_05[06] 2 2 VSS[005] VSS[111]
L11 AA23 K28
1
1
+ICH_V5REF VCC1_05[07] 0.1U_0402_16V4Z VSS[006] VSS[112]
AA24 L12 AB28 K29
VCC1_5_B[01] VCC1_05[08] VSS[007] VSS[113]
1 AA25 L14 AB29 L13
VCC1_5_B[02] VCC1_05[09] VSS[008] VSS[114]
AB24 L16 AB4 L15
C464 VCC1_5_B[03] VCC1_05[10] VSS[009] VSS[115]
AB25 L17 AB5 L2
1U_0402_6.3V6K VCC1_5_B[04] VCC1_05[11] VSS[010] VSS[116]
AC24 L18 AC17 L26
2 VCC1_5_B[05] VCC1_05[12] +1.5VS_DMIPLL_ICH VSS[011] VSS[117]
AC25 M11 AC26 L27
VCC1_5_B[06] VCC1_05[13] VSS[012] VSS[118]
AD24 M18 AC27 L5
VCC1_5_B[07] VCC1_05[14] L34 1 VSS[013] VSS[119]
CORE
D AD25 P11 2 +1.5VS AC3 L7 D
+5VALW +5V +3V VCC1_5_B[08] VCC1_05[15] MBK1608301YZF_0603 VSS[014] VSS[120]
AE25 P18 AD1 M12
VCC1_5_B[09] VCC1_05[16] VSS[015] VSS[121]
AE26
VCC1_5_B[10] VCC1_05[17]
T11
C435
1 (10UF*1, 0.01UF*1) AD10
VSS[016] VSS[122]
M13
AE27 T18 AD12 M14
VCC1_5_B[11] VCC1_05[18] VSS[017] VSS[123]
2
VCCA3GP
J25 V18 AD4 N12
C470 VCC1_5_B[19] VCC1_05[26] VSS[025] VSS[131]
1U_0402_6.3V6K
K24
VCC1_5_B[20] C246
1 (4.7UF*1) AD5
VSS[026] VSS[132]
N13
K25 AD6 N14
2 VCC1_5_B[21] VSS[027] VSS[133]
L23 AD7 N15
+1.5VS_PCIE_ICH VCC1_5_B[22] 4.7U_0805_10V4Z VSS[028] VSS[134]
L24 R29 AD9 N16
VCC1_5_B[23] VCCDMIPLL 2 VSS[029] VSS[135]
(220UF*1, 22UF*2, 2.2UF*1) L25
VCC1_5_B[24]
AE12
VSS[030] VSS[136]
N17
+1.5VS L33 2 1 M24 W23 AE13 N18
KC FBM-L11-201209-221LMAT_0805 VCC1_5_B[25] VCC_DMI[1] VSS[031] VSS[137]
1 M25 Y23 AE14 N26
VCC1_5_B[26] VCC_DMI[2] VSS[032] VSS[138]
1 1 N23 AE16 N27
C434 + C250 C249 C243 VCC1_5_B[27] VSS[033] VSS[139]
N24 AB23 +1.05VS AE17 P12
PVT VCC1_5_B[28] V_CPU_IO[1] VSS[034] VSS[140]
N25 AC23 1 1 AE2 P13
220U_D2_4VY_R15M 10U_0805_10V4Z VCC1_5_B[29] V_CPU_IO[2] C242 C206 C236 VSS[035] VSS[141]
2 2 2
P24
VCC1_5_B[30] (4.7UF*1, 0.1UF*2) AE20
VSS[036] VSS[142]
P14
P25 AG29 AE24 P15
10U_0805_10V4Z 2.2U_0603_6.3V6K VCC1_5_B[31] VCC3_3[01] 4.7U_0805_10V4Z 0.1U_0402_16V4Z VSS[037] VSS[143]
R24 AJ6 AE3 P16
VCC1_5_B[32] VCC3_3[02] 2 2 VSS[038] VSS[144]
R25 AC10 AE4 P17
VCC1_5_B[33] VCC3_3[07] 0.1U_0402_16V4Z VSS[039] VSS[145]
R26 AE6 P2
VCC1_5_B[34] VSS[040] VSS[146]
R27 AD19 AE9 P23
VCC1_5_B[35] VCC3_3[03] VSS[041] VSS[147]
VCCP_CORE
T24 AF20 AF13 P28
VCC1_5_B[36] VCC3_3[04] VSS[042] VSS[148]
T27
VCC1_5_B[37] VCC3_3[05]
AG24 close to AG29 close to AD19 close to G6 AF16
VSS[043] VSS[149]
P29
T28 AC20 AF18 P4
VCC1_5_B[38] VCC3_3[06] VSS[044] VSS[150]
T29 +3VS AF22 P7
+1.5VS_SATAPLL_ICH VCC1_5_B[39] VSS[045] VSS[151]
U24 AH26 R11
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C VCC1_5_B[40] VSS[046] VSS[152] C
U25 B9 AF26 R12
0.1U_0402_16V4Z
VCC1_5_B[41] VCC3_3[08] 1 1 1 1 1 1 VSS[047] VSS[153]
+1.5VS L35 1 2 V24 F9 C433 C462 C205 C279 C253 C245 AF27 R13
MBK1608301YZF_0603 VCC1_5_B[42] VCC3_3[09] VSS[048] VSS[154]
V25 G3 AF5 R14
VCC1_5_B[43] VCC3_3[10] VSS[049] VSS[155]
1 1 U23 G6 AF7 R15
VCC1_5_B[44] VCC3_3[11] VSS[050] VSS[156]
PCI
2 2 2 2 2 2
W24 J2 AF9 R16
C453 C454 VCC1_5_B[45] VCC3_3[12] VSS[051] VSS[157]
W25 J7 AG13 R17
VCC1_5_B[46] VCC3_3[13] VSS[052] VSS[158]
10U_0805_10V4Z K23 K7 AG16 R18
2 2 VCC1_5_B[47] VCC3_3[14] VSS[053] VSS[159]
(10UF*1, 1UF*1) 1U_0402_6.3V6K
Y24
VCC1_5_B[48] close to AJ6 close to B9 close to K7 AG18
VSS[054] VSS[160]
R28
Y25 AG20 T12
VCC1_5_B[49] +VCC_HDA_ICH VSS[055] VSS[161]
AJ4 +3VS AG23 T13
VCCHDA R408 @ 0_0603_5% VSS[056] VSS[162]
AG3 T14
VSS[057] VSS[163]
AJ3 +1.5VS AG6 T15
+5VALW VCCSUSHDA R407 0_0603_5% VSS[058] VSS[164]
AJ19 1 AG9 T16
VCCSATAPLL C466 VSS[059] VSS[165]
AH12 T17
VSS[060] VSS[166]
AC8 TP_VCCSUS1_05_ICH_1 PAD T8
@ AH14 T23
VCCSUS1_05[1] VSS[061] VSS[167]
+1.5VS AC16 F17 TP_VCCSUS1_05_ICH_2 PAD T15
@ 0.1U_0402_16V4Z AH17 B26
VCC1_5_A[01] VCCSUS1_05[2] VSS[062] VSS[168]
3
2
S
AD15 AH19 U12
G VCC1_5_A[02] VSS[063] VSS[169]
[35] SBPWR_EN# 2 1 1 AD16 AH2 U13
C458 C460 VCC1_5_A[03] +VCCSUS_HDA_ICH VSS[064] VSS[170]
AE15 AD8 TP_VCCSUS1_5_ICH_1 PAD T9
@ +3V AH22 U14
VCC1_5_A[04] VCCSUS1_5[1] VSS[065] VSS[171]
ARX
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
ICH9M(4/4)-POWER&GND
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 22 of 45
5 4 3 2 1
5 4 3 2 1
1 GND
SATA_ITX_C_DRX_P0 2
[20] SATA_ITX_C_DRX_P0 SATA_ITX_C_DRX_N0 HTX+
[20] SATA_ITX_C_DRX_N0 3 HTX-
4 GND
D [20] SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_N0 C376 1 2 0.01U_0402_16V7K SATA_DTX_IRX_N0 5 D
SATA_DTX_C_IRX_P0 SATA_DTX_IRX_P0 HRX-
[20] SATA_DTX_C_IRX_P0 1 2 6 HRX+
C377 0.01U_0402_16V7K 7 GND
+3VS 8 VCC3.3
9 VCC3.3
10 VCC3.3
11 GND
12 GND
13 GND
+5VS +3VS 14
+5VS VCC5
15 VCC5
16
1000P_0402_50V7K
0.1U_0402_16V4Z
VCC5
C381
C380
17
1000P_0402_50V7K
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
GND
C382
18 RESERVED
C379
C378
C374
1 1 1 1 1 1 19 GND
20 VCC12
21 VCC12 GND 24
22 VCC12 GND 23
2 2 2 2 2 2
OCTEK_SAT-22SU1G_NR
CONN@
C C
1 1
SATA_ITX_C_DRX_P1 2
B [20] SATA_ITX_C_DRX_P1 SATA_ITX_C_DRX_N1 2 B
[20] SATA_ITX_C_DRX_N1 3 3
4 4
[20] SATA_DTX_C_IRX_N1 SATA_DTX_C_IRX_N1 C265 1 2 0.01U_0402_16V7K SATA_DTX_IRX_N1 5
SATA_DTX_C_IRX_P1 SATA_DTX_IRX_P1 5
[20] SATA_DTX_C_IRX_P1 1 2 6 6
C264 0.01U_0402_16V7K 7
R174 1 @ 7
2 1K_0402_1% 8 8
+5VS 9 9
10 10
11 11
12 12
13 13
+5VS 14 16
14 GND
15 15 GND 17
10U_0805_10V4Z
1000P_0402_50V7K
1 1 1
0.1U_0402_16V4Z
2 2 2
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD & ODD Connector
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 23 of 45
5 4 3 2 1
5 4 3 2 1
+HDMI_5V_OUT
close to U1 VCC (+3VS) pins (one Pin one Capacitor)
+3VS +3VS D20 F2
+HDMI_5V
W=40mils
+5VS 2 1 1 2
1
RB491D_SC59-3 1.1A_6VDC_FUSE
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 1 1 1 1 1 1 1 C172
C469 C484 C485 C473 C486 C487 C474 C467
PVT PSOT24C-LF-T7_SOT23-3 0.1U_0402_16V4Z
2
@ @ @ @
2 2 2 2 2 2 2 2
D +HDMI_5V_OUT D
R449 R448
2
1
2.2K_0402_5%
2.2K_0402_5%
U7
+3VS 25 HDMI_DET#
1
2
OE*
2 +3VS
VCC3V HDMI_SCLK
11 28
VCC3V SCL_SINK
15
VCC3V
2
21 29 HDMI_SDATA
VCC3V SDA_SINK R115
26
VCC3V
33 2.2K_0402_5%
R128 1 VCC3V HDMI_DET
+3VS 2 4.7K_0402_5% 40 30
VCC3V HPD_SINK
46
1
R431 1 @ VCC3V
2 4.7K_0402_5% 32 R435 1 2 4.7K_0402_5% +3VS
+3VS DDC_EN HDMI_DET#
+3VS R127 1 @ 2 4.7K_0402_5%
3 34 R434 1 @ 2 4.7K_0402_5% +3VS
FUNCTION1 FUNCTION3
1
R432 1 @ D
2 4.7K_0402_5% 4 35
FUCNTION2 FUNCTION4
1
1
R433 1 @ 2 4.7K_0402_5% HDMI_DET 2 Q12
R124 R125 PVT G 2N7002_SOT23
47K_0402_5% 47K_0402_5% 1 2 6 R414 1 @ 2 4.7K_0402_5% +3VS S
3
R126 3.6K_0402_5% ANALOG1(REXT)
2
7 R412 1 @ 2 4.7K_0402_5% 1
100K_0402_5%
0.1U_0402_16V4Z
[10] TMDS_B_HPD#
2
HPD_SOURCE
To GMCH
R441
C475
SDVO_SDATA 8 @
[8] SDVO_SDATA SDA_SOURCE
SDVO_SCLK 9 2
[8] SDVO_SCLK
1
SCL_SOURCE
For Power Saving Application
+3VS R511 1 2 4.7K_0402_5% 10
ANALOG2 When Plug-in HDMI
@
PVT HDMI_HPD=High OE#=Low Enable Level Shift
C UMA_DVI_TXC- 13 48 HDMI_PCIE_MTX_C_GRX_N3 C
UMA_DVI_TXC+ 14
OUT_D4+ IN_D4+
47 HDMI_PCIE_MTX_C_GRX_P3 When Plug-out HDMI
OUT_D4- IN_D4-
UMA_DVI_TXD1- 16 45 HDMI_PCIE_MTX_C_GRX_N1
HDMI_HPD=Low OE#=High Disable Level Shift
UMA_DVI_TXD1+ OUT_D3+ IN_D3+ HDMI_PCIE_MTX_C_GRX_P1
17 44
OUT_D3- IN_D3-
UMA_DVI_TXD2+ 19 42 HDMI_PCIE_MTX_C_GRX_P0
UMA_DVI_TXD2- OUT_D2+ IN_D2+ HDMI_PCIE_MTX_C_GRX_N0
20 41
OUT_D2- IN_D2-
UMA_DVI_TXD0+ 22 39 HDMI_PCIE_MTX_C_GRX_P2
UMA_DVI_TXD0- OUT_D1+ IN_D1+ HDMI_PCIE_MTX_C_GRX_N2 HDMI_PCIE_MTX_C_GRX_N[0..3]
23 38 HDMI_PCIE_MTX_C_GRX_N[0..3] [10]
OUT_D1- IN_D1-
Trace AS Short PASS 49 HDMI_PCIE_MTX_C_GRX_P[0..3]
THERMAL_GND HDMI_PCIE_MTX_C_GRX_P[0..3] [10]
1
GND
5
GND
12
GND 20071031:
18
24
GND Add U1. 49 (THERMAL_GND) to GND Plane
GND
27
GND
31
GND
36
GND
37
GND
43
GND
UMA_DVI_TXC- 1 2 HDMI_R_CK-
R130 0_0402_5%
4 3
4 3
1 2
1 2
B B
L15 @ WCM-2012-900T_0805
UMA_DVI_TXC+ 1 2 HDMI_R_CK+
R131 0_0402_5% +HDMI_5V_OUT
UMA_DVI_TXD2- 1 2
A R137 0_0402_5% A
L17 @ WCM-2012-900T_0805
1 2
1 2
4 3
4 3
UMA_DVI_TXD2+
R136
1 2
0_0402_5%
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2007/10/16 Deciphered Date 2008/10/16 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI ASM1442T
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 24 of 45
5 4 3 2 1
5 4 3 2 1
2 1
R303 0_0402_5%
U14
2 1 1 AV_PLL
+3VS 2 1 C328 0.1U_0402_16V4Z 3
R265 0_0603_5% NC
7 NC
+3VALW 2 1 +XDPWR_SDPWR_MSPWR 9
R290 @ 0_0603_5% CARD_3V3
D 11 D3V3
D
33 D3V3 VREG 10 1 2
22 C325 1U_0402_6.3V4Z
MS_D4
1 NC 30
8 3V3_IN
C309 @ RST# 44
4.7U_0603_6.3V6K MODE_SEL RST#
45 MODE_SEL
2
2 XTLO XDCLE
47 XTLO XD_CLE_SP19 43
1 XTLI 48 42 XDCE#
R306 XTLI XD_CE#_SP18 XDALE
XD_ALE_SP17 41
@ 100K_0402_5% C326 USB20_N4 4 40 SDDAT2_XDRE#
[21] USB20_N4 DM SD_DAT2/XD_RE#_SP16
0.1U_0402_16V4Z USB20_P4 5 39 SDDAT3_XDWE#
[21] USB20_P4
1
2 DP SD_DAT3/XD_WE#_SP15 XD_RDY
[36] 5IN1_LED# 14 GPIO0 XD_RDY_SP14 38
RST#_L 2 1 RST# 37 SDDAT4_XDWP#_MSD7
R307 0_0402_5% SD_DAT4/XD_WP#/MS_D7_SP13 SDDAT5_XDD0_MSD6
SD_DAT5/XD_D0/MS_D6_SP12 35
SDCLK_XDD1_MSCLK_L SDCLK_XDD1_MSCLK
Vender suggesttion SD_CLK/XD_D1/MS_CLK_SP11 34
31 SDDAT6_XDD7_MSD3
2
R301
1
0_0402_5%
1 SD_DAT6/XD_D7/MS_D3_SP10
29 MS_INS#
C335 MS_INS#_SP9 SDDAT7_XDD2_MSD2
SD_DAT7/XD_D2/MS_D2_SP8 28
1U_0402_6.3V4Z 27 SDDAT0_XDD6_MSD0
2 SD_DAT0/XD_D6/MS_D0_SP7 SDDAT1_XDD3_MSD1
SD_DAT1/XD_D3/MS_D1_SP6 26
25 XDD5_MSBS
XD_D5_SP5 XDD4_SDDAT1
XD_D4/SD_DAT1_SP4 23
21 SDCD
MODE_SEL SD_CD#_SP3 SDWP
SD_WP_SP2 20
19 XDCD
XD_CD#_SP1
EEDI 18
1 1
R308 2 13 XTAL_CTR 2 1 +3VS
@ C336 0_0402_5% RREF XTAL_CTR R236 0_0603_5%
MS_D5 24
47P_0402_50V8J 12 XTAL_CTR
2 DGND
32 15 If Open , use 12MHz. crystal
2
DGND EEDO
EECS 16 If Pull high , use CLKGEN 48MHz.
6 AGND EESK 17
46 36 SD_CMD
C
XTLI AGND SD_CMD C
[16] CLK_SD_48M 1 2
2
R311 0_0402_5%
1/9 R302
@ 6.19K_0402_1% RTS5159-GR LQFP 48P
2
R309
R310 0_0402_5% Change to RT5159-GR <SA00002YP00>
1
0_0402_5% 20081104
1
1
R312 @
@ 33_0402_5% 1 2
C338 6P_0402_50V8D
2
1
1
@ C339
22P_0402_50V8J @ Y3
2 12MHZ_16PF_6X12000012
2
EMI @
1 2 XTLO
C337 6P_0402_50V8D
+XDPWR_SDPWR_MSPWR
JREAD1 +XDPWR_SDPWR_MSPWR
3 XD-VCC SD-VCC 21
B
MS-VCC 28 B
SDDAT5_XDD0_MSD6 32
10U_0805_10V4Z
SDCLK_XDD1_MSCLK XD-D0 SDCLK_XDD1_MSCLK
10 XD-D1 7 IN 1 CONN SD_CLK 20
2 1 SDDAT7_XDD2_MSD2 9 XD-D2 SD-DAT0 14 SDDAT0_XDD6_MSD0 1
SDDAT1_XDD3_MSD1 8 12 XDD4_SDDAT1
R235 C299 XDD4_SDDAT1 XD-D3 SD-DAT1 SDDAT2_XDRE# @
C297
7 XD-D4 SD-DAT2 30
100K_0402_5% 0.1U_0402_16V4Z XDD5_MSBS 6 29 SDDAT3_XDWE#
2 SDDAT0_XDD6_MSD0 XD-D5 SD-DAT3 SDDAT4_XDWP#_MSD7 2
5 27
1
1
41 7IN1 GND
42 R237
7IN1 GND @ 33_0402_5%
TAITW_R015-B10-LM CONN@
2
1
C298 1/5
@ 22P_0402_50V8J
2
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Card Reader Realtek5159
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 25 of 45
5 4 3 2 1
A B C D
1 1
+3VALW
+3V_LAN
60mil PVT
1 2
R44 0_1206_5% R471 0_0402_5%
10U_0805_10V4Z
10U_0805_10V4Z
1 2
1U_0402_6.3V4Z
0.1U_0402_16V4Z
1 1 1 1
C75
C74
C68
C67
2 2 2 2 D12
10/100_LINK_LED 2
1 LAN_LINK# [27]
1000_LINK_LED 3
@
Place Close to Pin 2 CHP202UPT_SOT323-3
+1.8_VDD/LX
+AVDD_CEN
L5
1 2 +1.8_VDD/LX
S INDUC_ 4.7UH +-20% SIA4012-4R7M
1 1 pin 1 = 1A
C84
C76
U3
Place Close to LAN chip
pin 1,2 60mil LAN_MIDI0+ 1 2
2 2 +3V_LAN R30 49.9_0402_1% 2 C25 0.1U_0402_16V4Z
10U_0805_10V4Z
2 2
1 30 1
0.1U_0402_16V4Z
Atheros
[21] PCIE_PTX_C_IRX_N3 1 37 TX_N NC/NC/TRXP2 20 LAN_MIDI2+ [27]
[21] PCIE_PTX_C_IRX_P3 C61 1 2 0.1U_0402_16V7K PCIE_PTX_IRX_P3 38 24 LAN_MIDI3-
TX_P NC/NC/TRXN3 LAN_MIDI3- [27]
PCIE_ITX_C_PRX_N3 44 23 LAN_MIDI3+
[21] PCIE_ITX_C_PRX_N3 RX_N NC/NC/TRXP3 LAN_MIDI3+ [27]
PCIE_ITX_C_PRX_P3 43
[21] PCIE_ITX_C_PRX_P3 RX_P
XTALO
AR8121/8131 +1.2_AVDDL
9 XTLO AVDDL0 42
C58
C36
C62
C63
C59
LAN_XTALI 10 XTLI AVDDL1 39
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0_0402_5% TESTMODE 1 1 1 1 1
35 +AVDDVCO1
NC AVDDL4 11 1 2
+1.2_AVDDL
8
1
C31
C57
3
LAN_XTALO 2 1 3
31 46 +1.2_DVDDL
25MHZ_20P SMCLK DVDDL0
1 1 33 SMDATA AVDDL/DVDDL/DVDDL 45
C35
C66
32
1U_0402_6.3V4Z
0.1U_0402_16V4Z
DVDDL1 1 1
C39 PVT C33 28 +1.2_DVDDL
33P_0402_50V8J 33P_0402_50V8J SPI_CLK/DVDDL/DVDDL
2 2
49
1U_0402_6.3V4Z
0.1U_0402_16V4Z
GND 1 1 2 2
C34
C65
25 CTR12
SPI_DO/AVDDH/AVDDH
AVDDH0 19
12 15 CTR12
RBIAS AVDDH1 2 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 1
2
C32
C29
C30
1 1 1
AR8131L-AL1E_QFN48_6X6
R33 PVT 2 2
SA000031Z00 S IC AR8131-AL1E QFN 48P E-LAN CTRL 1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2.37K_0402_1%
2 2 2
1
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Atheros AR8131
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 26 of 45
A B C D
5 4 3 2 1
D D
1
C481 2
BOTHHAND_NS0013LF 220P_0402_50V7K RJ45_MIDI2+ 4
R437 PR3+
5.1K_0402_5% RJ45_MIDI1+ 3
1 PR2+
2
RJ45_MIDI0- 2 PR1-
SHLD2 14
T1 RJ45_MIDI0+ 1 PR1+
SHLD1 13
[26] LAN_MIDI2+ LAN_MIDI2+ 1 16 RJ45_MIDI2+ LAN_LINK# 10
LAN_MIDI2- TD+ TX+ RJ45_MIDI2- [26] LAN_LINK# Green LED-
[26] LAN_MIDI2- 2 TD- TX- 15
3 CT CT 14 +3V_LAN 2 1 9 Green LED+
4 13 R439 510_0402_5%
NC NC SUYIN_100073FR012G101ZL
5 NC NC 12
6 CT CT 11
[26] LAN_MIDI3+ LAN_MIDI3+ 7 10 RJ45_MIDI3+ 1 2
LAN_MIDI3- RD+ RX+ RJ45_MIDI3-
[26] LAN_MIDI3- 8 RD- RX- 9
C483
220P_0402_50V7K
BOTHHAND_NS0013LF
C479
2 2 C515
B B
R427
R428
R429
R430
+AVDD_CEN 4.7U_0805_10V4Z
C20
C26
C21
C19
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 1 1 1
75_0402_1%
75_0402_1%
75_0402_1%
75_0402_1%
2 2 2 2 L_LAN_ACTIVITY# 1 2
2
C480 @
68P_0402_50V8J
LAN_LINK# 1 2
2
40mil
For EMI
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN Magnetic & RJ45
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 27 of 45
5 4 3 2 1
A B C D E
17 17 18 18
19 20 WL_OFF#
19 20 WL_OFF# [30]
21 22 PLT_RST_BUF#
21 22 +3V_WLAN PLT_RST_BUF# [19]
23 24 R323 1 2 0_0603_5% +3VS
[21] PCIE_PTX_C_IRX_N2 23 24
25 26 R322 1 @ 2 0_0603_5% +3V
[21] PCIE_PTX_C_IRX_P2 25 26
27 28
27 28 MINI2_SMBCLK R283 1
29 29 30 30 @ 2 0_0402_5% ICH_SMBCLK ICH_SMBCLK [16,21]
31 32 MINI2_SMBDATA R295 1 @ 2 0_0402_5% ICH_SMBDATA
[21] PCIE_ITX_C_PRX_N2 31 32 ICH_SMBDATA [16,21]
[21] PCIE_ITX_C_PRX_P2 33 34
33 34
35 35 36 36 USB20_N10 [21]
37 38 USB20_P10 [21]
37 38
+3VS_WLAN 39 40
39 40
41 42 (LED_WWAN#)
41 42 MINI1_LED#
43 44 (LED_WLAN#) MINI1_LED# [31]
43 44
For MINICARD Port80 Debug 45
45 46
46
2 E51TXD_P80DATA 1 R321 2 0_0402_5% CL_RST#2_R
47
49
47 48
48
50
(9~16mA) 2
[30] E51TXD_P80DATA E51RXD_P80CLK 49 50
[30] E51RXD_P80CLK 51 52
51 52
G1
G2
G3
G3
FOX_AS0B226-S99N-7F
53
54
55
56
CONN@
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 GND
10U_0805_10V4Z
10U_0805_10V4Z
10U_0805_10V4Z
0.1U_0402_16V4Z
60mils C1588
1
C1589
1
C1590
1
C1591
1
C1592
1
C1593
1 [21] USB20_N5 2
USB_D-
+3VS 2 3.3Vin 3.3Vout 3 +3VS_CARD [21] USB20_P5 3 USB_D+
KAL90_H0_90+@
KAL90_H0_90+@
4 5 CP_USB# 4
3.3Vin 3.3Vout CPUSB#
KAL90_H0_90+@
KAL90_H0_90+@
KAL90_H0_90+@
KAL90_H0_90+@
40mil 2 2 2 2 2 2
5
RSV
+3V 17 15 +3VALW_CARD 6
AUX_IN AUX_OUT ICH_SMBCLK RSV
7
PCI_RST# ICH_SMBDATA SMB_CLK
[19] PCI_RST# 6 19 8
SYSRST# OC# SMB_DATA
+1.5VS_CARD 9 +1.5V
SYSON 20 8 PERST1# 10
[30,32,35,41] SYSON SHDN# PERST# +1.5V
ICH_PCIE_WAKE# 11
SUSP# +3VS WAKE#
[30,32,35,41] SUSP# 1 STBY# NC 16 +3VALW_CARD 12 +3.3VAUX
PERST1# 13
CP_PE# PERST#
10 CPPE# GND 7 +3VS_CARD 14 +3.3V
(Internal Pull High to AUXIN) +3VS 1 15
CP_USB# C1594 CLKREQ1# +3.3V
9 21 16
(Internal Pull High to AUXIN) CPUSB# Thermal_Pad KAL90_H0_90+@ CP_PE# CLKREQ#
[21] CP_PE# 17
CPPE#
1
RCLKEN1 18 0.1U_0402_16V4Z 18
RCLKEN 2 [16] CLK_PCIE_CARD# REFCLK-
R484 19
[16] CLK_PCIE_CARD REFCLK+
5
G577NSR91U_TQFN20_4x4 10K_0402_5% 20
KAL90_H0_90+@ CLKREQ1# GND
2 21
G Vcc
Y PERp0
1 A 23 GND
U29 [21] PCIE_ITX_C_PRX_N1 24
PETn0
1
GND GND
28 30
GND GND
1 1 1 SANTA_131851-A_LT
4 C1595 C1596 C1597 CONN@ 4
KAL90_H0_90+@ KAL90_H0_90+@ KAL90_H0_90+@
10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z
2 2 2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NEW CARD & MINI CARD-WLAN
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 28 of 45
A B C D E
A B C D E
+3V +3VS
JUSB2
+USB_VCCA 1
USB20_N1 VCC
2 D-
1
USB20_P1 3
R134 R135 D+
4 GND
0_0603_5% 0_0603_5%
@ KAL90_G0_90+@ 5
C196 JP16 GND1
6
2
KAL90_G0_90+@ GND2
6 7
0.1U_0402_16V4Z G2 GND3
5 G1 8 GND4
2 1 4
1 [21] USB20_N9
USB20_N9
USB20_P9
3
2
4
3 Finger Print Conn. SUYIN_020173MR004G565ZR
CONN@ 1
[21] USB20_P9 2
1 1
2
D23 ACES_85201-04051 PCB FootPrint :
SM05T1G_SOT23-3
"SUYIN_020173MR004G565ZR_4P-S"
CONN@ only for CO- LAY JP17 USE
@
1
ESATA CONN
+3VALW +3VS
+USB_VCCA
W=60mils
1 1
C367 C364 D18 KAL90_G0_90+@ +USB_VCCA 1000P_0402_50V7K
USB20_P1 6
0.1U_0402_16V4Z 1U_0603_10V4Z CH3 CH2 3 1
1 1
3
2 2
S
C495 +
G
1 2 2 C508 C509
[30] BT_ON#
R330 10K_0402_5% Q31 +USB_VCCA 5 2 220U_6.3Φ*5.9_6.3VM
D AO3413_SOT23-3 Vp Vn 2 2 2
1
1 0.1U_0402_16V4Z
C368 W=40mils
4 1 USB20_N1 JESATA
+BT_VCC CH4 CH1
0.1U_0402_16V4Z 1 USB
2 2 CM1293-04SO_SOT23-6 USB20_N1 VBUS 2
1 1 [21] USB20_N1 2 D-
1
C365 C366 USB20_P1 3
[21] USB20_P1 D+
R327 4
4.7U_0805_10V4Z 300_0603_5% GND
2 2 5
0.1U_0402_16V4Z SATA_ITX_C_DRX_P5 GND
[20] SATA_ITX_C_DRX_P5 6
2
SATA_ITX_C_DRX_N5 A+ ESATA
[20] SATA_ITX_C_DRX_N5 7 A-
8 12
GND SHIELD
1
D
[20] SATA_DTX_C_IRX_N5
C158 2 1 KAL90_90+@ 0.01U_0402_16V7K SATA_IRX_DTX_N5 9 B- SHIELD 13
2 Q32 2 1 SATA_IRX_DTX_P5 10 14
PVT [20] SATA_DTX_C_IRX_P5 B+ SHIELD
G 2N7002_SOT23 C159 KAL90_90+@ 0.01U_0402_16V7K 11 15
GND SHIELD
S
3
+BT_VCC 5 2
TYCO_1759594-1_11P
CONN@ +USB_VCCA Vp Vn
ACES_87213-0800G
8 10
8 GND SATA_ITX_C_DRX_N5 SATA_IRX_DTX_N5
7 7 4 1
CH4 CH1
[21] USB20_P8 6 6
5 CM1293-04SO_SOT23-6
[21] USB20_N8 5
4 4
R325 10_0402_5%2 @ 3 3
[28] WLAN_BT_DATA
[28] WLAN_BT_CLK 1 2 2 2
R324 0_0402_5% @ 1 1 GND 9 +3V
JP18
+5VALW 80mil
1
+USB_VCCA R452
U27 0_0402_5%
3 R450 3
1 8 1 2
PVT :Conn. reverse Bluetooth Conn. 2
3
GND
IN
OUT
OUT 7
6
100K_0402_5%
USB_OC#1 [21]
2
SYSON# IN OUT
1 4 EN# FLG 5 1 2 USB_OC#6 [21]
C510 R451
TPS2061DRG4_SO8 10K_0402_5% 1
4.7U_0805_10V4Z C496
2
0.1U_0402_16V4Z
+USB_VCCA 2
W=80mils
+USB_VCCA
1 To USB/B Connector
470P_0402_50V7K
1
C511
C497 +
220U_6.3Φ*5.9_6.3VM
2 2
80mil
JP15
1 +5VALW
D21 KAL90_G0_90+@ JUSB1 1 +5VALW
2 2
USB20_P6 6 SYSON#
CH2 3
1 3 SYSON# [35,42]
CH3 USB20_N6 VCC 3
[21] USB20_N6 2 4
USB20_P6 D- 4 USB20_N0
[21] USB20_P6 3 D+ 5 5 USB20_N0 [21] 1
4 6 USB20_P0 C363
GND 6 USB20_P0 [21]
+USB_VCCA 5 2 7
Vp Vn 7 4.7U_0805_10V4Z
5 8 USB_OC#0 [21]
GND1 8 2
6 9
GND2 GND
7 GND3 GND 10
4 USB20_N6 4
4 1 8
CH4 CH1 GND4 ACES_85201-08051
CM1293-04SO_SOT23-6 SUYIN_020173MR004G565ZR
CONN@
USB CONN.
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2008/11/10 Deciphered Date 2008/11/24 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BT & & Finger Print & eSATA & USB Conn
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Document Number Rev
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 29 of 45
A B C D E
5 4 3 2 1
+3VALW
L20
0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 2 +EC_VCCA
1 C278 2 FBM-L11-160808-800LMT_0603
1
C293
1 1 2
1
For EC Tools
+3VALW C306 C290 C305 C261
1000P_0402_50V7K C260 +3VALW
1 2 EC_PME# 2 2 2 2 1 1
1000P_0402_50V7K
KSI[0..7] JP19 Place on RAM door
2 KSI[0..7] [31]
R257 10K_0402_5% 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1
ECAGND
KSO[0..17] 1 E51RXD_P80CLK
KSO[0..17] [31] 2 2 E51RXD_P80CLK [28]
3 E51TXD_P80DATA
3 E51TXD_P80DATA [28]
D
4 4 D
111
125
ACES_85205-0400
22
33
96
67
9
U9 @
VCC
VCC
VCC
VCC
VCC
VCC
AVCC
@ C304
10P_0402_50V8J 1 21 INVT_PW M PAD T25 @
LPC_FRAME# [20] EC_GA20 GA20/GPIO00 INVT_PWM/PWM1/GPIO0F BEEP#
2 1 [20] EC_KBRST# 2 KBRST#/GPIO01 BEEP#/PWM2/GPIO10 23 BEEP# [33]
3 26 PAD T24 @
[21] SERIRQ LPC_FRAME# SERIRQ# FANPWM1/GPIO12
[20] LPC_FRAME# 4 LFRAME# ACOFF/FANPWM2/GPIO13 27 ACOFF [40]
C316 @ LPC_AD3 5 2 1 ECAGND 3S/4S# 1 2
[20] LPC_AD3 LAD3
22P_0402_50V8J @ LPC_AD2 7 PWM Output C262 0.01U_0402_16V7K R184 4.7K_0402_5%
[20] LPC_AD2 LAD2
2 1 2 R253 1 [20] LPC_AD1
LPC_AD1 8 LAD1 BATT_TEMP/AD0/GPIO38 63 BATT_TEMP
BATT_TEMP [38]
33_0402_5% LPC_AD0 BATT_OVP
[20] LPC_AD0 10 LAD0 LPC & MISC BATT_OVP/AD1/GPIO39 64 BATT_OVP [40]
ADP_I/AD2/GPIO3A 65 ADP_I [40]
12 AD Input 66 AD_BID0
[16] CLK_PCI_LPC PCICLK AD3/GPIO3B
[8,19,26] PLT_RST# 13 PCIRST#/GPIO05 AD4/GPIO42 75
2 1 37 76 PAD T11 @ +3VALW
+3VALW ECRST# SELIO2#/AD5/GPIO43
R225 47K_0402_5% EC_SCI# 20 PAD T16 @
[21] EC_SCI# SCI#/GPIO0E
1 [21] PM_CLKRUN# 38 CLKRUN#/GPIO1D
68 DAC_BRIG ID_JAL90_JAW 50# 2 1
DAC_BRIG/DA0/GPIO3C DAC_BRIG [17]
C291 70 EN_DFAN1 R204 @ 100K_0402_5%
EN_DFAN1/DA1/GPIO3D EN_DFAN1 [4]
0.1U_0402_16V4Z DA Output 71 IREF 2 1
2 IREF/DA2/GPIO3E IREF [40]
KSI0 55 72 R203 @
+3VALW +3VALW KSI0/GPIO30 DA3/GPIO3F CALIBRATE# [40]
KSI1 56 100K_0402_5%
KSI2 KSI1/GPIO31
57 KSI2/GPIO32
KSI3 58 83 EC_MUTE
KSI3/GPIO33 PSCLK1/GPIO4A EC_MUTE [34]
2
KSO0/GPIO20 TP_DATA/PSDAT3/GPIO4F
1 2 TP_CLK KSO1 40 KSO1/GPIO21
R186 4.7K_0402_5% KSO2 41 KSO2/GPIO22
1 2 TP_DATA KSO3 42 KSO3/GPIO23 SDICS#/GPXOA00 97 3S/4S#
3S/4S# [40]
R185 4.7K_0402_5% KSO4 43 98 65W /90W #
+3VALW KSO4/GPIO24 SDICLK/GPXOA01 65W /90W # [40]
KSO5 SBPW R_EN
KSO6
44 KSO5/GPIO25 Int. K/B SDIDO/GPXOA02 99
ID_JAL90_JAW 50#
SBPW R_EN [35,41] Analog Board ID definition,
45 KSO6/GPIO26 Matrix SDIDI/GPXID0 109
1 2 EC_SMB_CK1 KSO7 46 SPI Device Interface Please see page 3.
R173 4.7K_0402_5% KSO8 KSO7/GPIO27
47 KSO8/GPIO28
1 2 EC_SMB_DA1 KSO9 48 KSO9/GPIO29 SPIDI/RD# 119 EC_SI_SPI_SO
EC_SI_SPI_SO [31]
R172 4.7K_0402_5% KSO10 49 120 EC_SO_SPI_SI +3VALW
KSO10/GPIO2A SPIDO/WR# EC_SO_SPI_SI [31]
2 @ 1 EC_I2C_INT2 KSO11 50 SPI Flash ROM 126 EC_SPICLK
KSO11/GPIO2B SPICLK/GPIO58 EC_SPICLK [31]
R171 10K_0402_5% KSO12 51 128 EC_SPICS#/FSEL#
KSO12/GPIO2C SPICS# EC_SPICS#/FSEL# [31]
2
EC_RCIRRX KSO13 52
KSO14 KSO13/GPIO2D R191 @
53 KSO14/GPIO2E
1 2 LID_SW # KSO15 54 KSO15/GPIO2F CIR_RX/GPIO40 73 EC_RCIRRX Ra 100K_0402_5%
R254 100K_0402_5% KSO16 81 74 ON_0FF_TP SW #
+3VS KSO16/GPIO48 CIR_RLC_TX/GPIO41 ON_0FF_TP SW # [31]
KSO17 82 89 FSTCHG
FSTCHG [40]
1
KSO17/GPIO49 FSTCHG/SELIO#/GPIO50 BATT_RED_LED# AD_BID0
BATT_CHGI_LED#/GPIO52 90 BATT_RED_LED# [36]
91 CAPS_LED#
CAPS_LED#/GPIO53 CAPS_LED# [36]
1
1 2 EC_SMB_CK2 [31,38] EC_SMB_CK1
EC_SMB_CK1 77 SCL1/GPIO44 GPIO BATT_LOW_LED#/GPIO54 92 BATT_Yellow Green_LED#
BATT_Yellow Green_LED# [36]
R190 1
R188 2.2K_0402_5% EC_SMB_DA1 78 93 PW R_LED C263
[31,38] EC_SMB_DA1 SDA1/GPIO45 SUSP_LED#/GPIO55 PW R_LED [36]
1 2 EC_SMB_DA2 [4,31] EC_SMB_CK2
EC_SMB_CK2 79 SCL2/GPIO46 SM Bus SYSON/GPIO56 95 SYSON
SYSON [28,32,35,41] Rb 8.2K_0402_5% 0.1U_0402_16V4Z
R187 2.2K_0402_5% EC_SMB_DA2 80 121 VR_ON
+3VS [4,31] EC_SMB_DA2 SDA2/GPIO47 VR_ON/XCLK32K/GPIO57 VR_ON [32,43] 2
127 ACIN
ACIN [21,35,36,37,40]
2
B AC_IN/GPIO59 B
4
FAN_SPEED1 28 108 BATTERY_LED#L 1 2
[4] FAN_SPEED1 FAN_SPEED1/FANFB1/GPIO14 GPXO11 BATTERY_LED# [31]
BT_ON# 29 R205 27P_0402_50V8J 27P_0402_50V8J
IN
OUT
[29] BT_ON# FANFB2/GPIO15 2 2
E51TXD_P80DATA 30 0_0402_5%
E51RXD_P80CLK EC_TX/GPIO16
31 EC_RX/GPIO17 PM_SLP_S4#/GPXID1 110 PM_SLP_S4# [21,32]
ON/OFF 32 112 ENBKL
[32] ON/OFF ON_OFF/GPIO18 ENBKL/GPXID2 ENBKL [10]
PW R_SUSP_LED EAPD
NC
NC
[36] PW R_SUSP_LED 34 PWR_LED#/GPIO19 GPXID3 114 EAPD [33]
NUM_LED# 36 GPI 115
[31,36] NUM_LED# NUMLED#/GPIO1A GPXID4 EC_THERM# [21]
116 SUSP#
SUSP# [28,32,35,41]
3
GPXID5 PBTN_OUT#
GPXID6 117 PBTN_OUT# [21]
118 MC_RST#
GPXID7 MC_RST# [31]
EC_CRY1 122 X1
EC_CRY2 XCLK1 PVT 32.768KHZ_12.5P_MC-306
123 XCLK0 V18R 124
+3VALW +3VALW
1
AGND
C289
GND
GND
GND
GND
GND
1
69
FBM-L11-160808-800LMT_0603 ACIN 2 1
3 4 RCIRRX 1 2 EC_RCIRRX
Vs OUT
1 GND GND 2
1 D45 KAL90_90+@
IR1 KAL90_90+@ CH751H-40PT_SOD323-2
C1599 TSOP36236TR_4P
1 Security Classification Compal Secret Data Compal Electronics, Inc.
4.7U_0805_10V4Z C1598 2008/11/10 2008/11/24 Title
2 KAL90_90+@ 1000P_0402_50V7K
Issued Date Deciphered Date
2 KAL90_90+@
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE KB926/CIR
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 30 of 45
5 4 3 2 1
+3VALW 1 2 C302 1 2 0.1U_0402_16V4Z
R250 0_0603_5%
U13 & U15 CO-LAY
+SPI_VCC Reserved for BIOS simulator.Footprint SO8
U13 U15
To TP/B Conn.
JP21
EC_SPICS#/FSEL# 1 8 EC_SPICS#/FSEL# 1 8 +SPI_VCC
[30] EC_SPICS#/FSEL# CE# VDD CS# VCC
R284 1 2 4.7K_0402_5% SPI_WP# 3 6 EC_SPICLK_R R285 1 2 0_0402_5% EC_SPICLK [30]
SPI_WP# 3 6 EC_SPICLK_R +5VS 6 8
R249 1 WP# SCK WP# SCLK 6 8
+3VALW 2 4.7K_0402_5% SPI_HOLD# 7 5 R286 1 2 0_0402_5% EC_SO_SPI_SI [30]
SPI_HOLD# 7 5 EC_SO_SPI_SI
[30] TP_CLK
TP_CLK 5 7
HOLD# SI R248 1 HOLD# SI EC_SI_SPI_SO TP_DATA 5 7
4 2 2 0_0402_5% EC_SI_SPI_SO [30] 4 2 [30] TP_DATA 4
VSS SO GND SO LEFT_BTN# 4
3
MX25L8005M2C-15G_SOP8 @ MX25L512AMC-12G_SO8 RIGHT_BTN# 3
2
2
ENE suggestion SPI Frequency over 66MHz 1
1
1 1
SST: 50MHz C244
C237 ACES_85201-0605
MXIC: 70MHz
100P_0402_50V8J 100P_0402_50V8J
ST: 40MHz 2 2
CONN@
TP_CLK
+3VS +5VS
KSI[0..7] +5VS TP_DATA
KSI[0..7] [30]
3
KSO[0..17] PVT
KSO[0..17] [30]
R227 R226 C192
PVT 47K_0402_5% SW2 1.5K_0402_5% D22
KALG1@ KALG1@ KALG1@ 0.1U_0402_16V4Z @
INT_KBD KALH0 SMT1-05-A_4P LED9 PSOT24C_SOT23
1
JP30 INT_KBD JP23
[30] ON_0FF_TP SW#
ON_0FF_TP SW# 3 1 KALG1@
1
2 1 ON_0FF_TP LED#
ON_0FF_TP LED# [30]
(Left) KSO0 1 (Left) KSO0 1 4 2
KSO1 1 KSO1 1
2 2
KSO2 2 KSO2 2 HT-121UD_AMBER
3 3
5
6
KSO3 3 KSO3 3
4 4
KSO4 4 KSO4 4
5 5
KSO5 5 KSO5 5
6 6
KSO6 6 KSO6 6
7 7
KSO7 7 KSO7 7
8 8
KSO8 8 KSO8 8
9 9
KSO9 9 KSO9 9
10 10
KSO10 10 KSO10 10
11 11
KSO11 11 KSO11 11
12 12
KSO12 12 KSO12 12 PVT
KSO13
13
14
13 KSO13
13
14
13 M/B TP SW
KSO14 14 KSO14 14 KAL90_G0_90+@ KAL90_G0_90+@
KSO15
15
16
15 KSO15
15
16
15
Lid Switch SW3 SW4
KALH0 TP SW
KSO16 16 KSO16 16 SMT1-05-A_4P SMT1-05-A_4P SW5 KALH0@ SW6 KALH0@
17 17
KSO17 17 KSO17 17 LEFT_BTN# 3 RIGHT_BTN# 3 SMT1-05-A_4P SMT1-05-A_4P
18 18 1 1
KSI0 19
18
19
KSI0 19
18
19
(Hall Effect Switch) LEFT_BTN# 3 1 RIGHT_BTN# 3 1
KSI1 20 KSI1 20 4 2 4 2
KSI2 20 KSI2 20 +3VALW
21 21 4 2 4 2
KSI3 21 KSI3 21
22 22
5
6
5
6
KSI4 22 KSI4 22
23 23
5
6
5
6
KSI5 23 KSI5 23
24 24
KSI6 24 KSI6 24
25 27 25 27
KSI7 25 G1 KSI7 25 G1
26 28 26 28
26 G2 26 G2
1
2
2
(Right) C27 R31
ACES_85201-26051 ACES_85201-26051 47K_0402_5%
VDD
CONN@ CONN@ 0.1U_0402_16V4Z
1 FN/B
2
3 1 2 LID_SW# LID_SW# [30]
OUTPUT D9 RB751V_SOD323
GND
JP26
1
C28 1
KAL90
U2 1
2
+5VS
+3VS e-key/B
1 10P_0402_50V8J 2 MINI1_LED#
A3212ELHLT-T_SOT23W-3 3
2 3 KSI1 JP25 CONN@
4
4 FB_KSI4 KSO0
5 1
5 KSO0 KSI5 1
6 2
6 KSI2 2
7 3
7 BT_LED# 3
8 4
8 FB_KSI3 4
9
9
10
To BTN/B Conn. 10
GND
11
12
E&T_6905-E04N-00R
GND
KSO16 C223 1 100P_0402_50V8J
KSO4 KSO2 KSO3 ACES_85201-1005N PVT KAL90_90+@
KSO15 C222 1 100P_0402_50V8J
2 KSO0 CONN@ R475 0_0402_5%
2
KSO17 C224 1 2 100P_0402_50V8J KSI1 WL_BTN# KSI5 WL_BTN# Volume Down Back Up 1 2 KSI4
KSO14 C221 1 100P_0402_50V8J JP28
2 KALH0 FB_KSI4 KALH0@
KSO13 C220 1 100P_0402_50V8J KSO7 C214 1 100P_0402_50V8J
KSI2 BT_BTN# 1
1 +5VS
R476 0_0402_5%
2 2 Program (KBLG0) 2
2
R481
R479
R480
2
1
KSO9 C216 1 2 100P_0402_50V8J
1
KSI3 C228 1 2 100P_0402_50V8J KSO0 C207 1 2 100P_0402_50V8J
0_0603_5%
KALH0@ 0_0603_5%
KAL90_90+@ 0_0603_5%
KSO8 C215 1 2 100P_0402_50V8J KSI5 C230 1 2 100P_0402_50V8J
2
2
KSI6 C231 1 100P_0402_50V8J JP29
2
PVT To Media/B Conn. 1
KALG1
1 +5VS
KSI7 C232 1 2 100P_0402_50V8J 2 KSO4
PVT 2 KSO2
3
3 KSO3
4
FOR EMI @ R486 KALH0@ 0_0402_5%
4
5
5
6
KSI5
KSI6
KSI5 C193 1 100P_0402_50V8J JP22 6 BATTERY_LED#
2 [4,30] EC_SMB_CK2 1 2 7 BATTERY_LED# [30]
+3VS R488 KALH0@ 0_0402_5% 7 BT_LED#
1 8 BT_LED# [30]
R129 R489 KAL90_90+@ 0_0402_5% 1 8 MINI1_LED#
[4,30] EC_SMB_DA2 1 2 2 9 MINI1_LED# [28]
10K_0402_5% @ MEDIA_CK 2 9
[30,38] EC_SMB_CK1 1 2 3 10
MINI1_LED# C195 1 100P_0402_50V8J R491 KAL90_90+@ 0_0402_5% 3 10
1 2 2 [32] EC_I2C_INT1 4 11
@ @ MEDIA_DA 4 GND
[30,38] EC_SMB_DA1 1 2 5 12
BT_LED# C194 1 100P_0402_50V8J MC_RST# MC_RST+# 5 GND
2 [30] MC_RST# 1 2 6
@ R492 6 ACES_85201-1005N
7
0_0402_5% 7 CONN@
+3VALW 8
8
2
9
C1600 @ R493 @ GND
10
0.1U_0402_16V4Z 10K_0402_5% GND
ACES_85201-08051
CONN@
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BIOS, I/O Port & K/B Connector
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
C 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 31 of 45
A B C D E
1 2
R335 @ 10K_0603_5%
+3VALW
Bottom Side
D58 USE
2
R258
1 ON/OFFBTN# PJSOT24C 3P C/A SOT-23 1
SW1
100K_0402_5% SCA00000E00
1
SMT1-05-A_4P D27 24V
2
3 1 2 D1
ON/OFF [30]
ON/OFFBTN# 1 1
4 2 3 51ON# @ 51ON#
51ON# [37]
C1
DAN202UT106_SC70-3 100P_0402_50V8J
5
6
1/8 EMI Reserve 2
1
PJSOT24C_3P_C/A_SOT-23 MCVCC
1000P_0402_50V7K
C317
1
1
D PVT
2
EC_ON 2 D29 R506
[30] EC_ON
G KAL90_90+@
2
Q25 S RLZ20A_LL34 510K_0402_5%
1
R194 1 PVT MCVCC +3VS D
2
2N7002_SOT23 2 Q43
2
10K_0402_5% G KAL90_90+@
Power ON Circuit R507 R508 S 2N7002_SOT23
3
KAL90_90+@ KALH0@
10K_0402_5% 10K_0402_5%
1
D
2 Q44
+3VS [31] EC_I2C_INT1
G KAL90_90+@
S 2N7002_SOT23
3
+3VALW +3VALW
1
U8A U8B
R201 @ SN74LVC14APWLE_TSSOP14 SN74LVC14APWLE_TSSOP14
14
14
2 180K_0402_5% +3VALW 2
D25 @
P
P
2
2
1 2 1 2 3 4 SYS_PWROK 1 2
[30,43] VR_ON I O I O EC_PWROK [21,30]
R202 @ 0_0402_5% R509 10K_0402_5%
G
G
CH751H-40PT_SOD323-2 2 @
D46 @
For South Bridge
7
7
C277 1SS355_SOD323-2
1
1U_0603_10V6K 1 2
1 EC_I2C_INT2 [30]
@
1 2
+3VS R510
0_0402_5%
+3VALW +3VALW
1
R192 @
10K_0402_1% U8C U8D
14
14
P
2
1 2 5 6 9 8
[28,30,35,41] SUSP#
2
I O I O VS_ON [41]
HDA MDC Conn.
G
G
1
D
SUSP 2 C268 For +VCCP/+1.05VS
[35,42] SUSP
7
G 0.1U_0402_16V7K
Q19 S 1 +3V
3
2N7002_SOT23 1 2 +3V
15mil R333 0_0402_5% @ 1
JMDC1 C369
1 2 +MDC_VCC 1 2
3 1 2 +1.5V 3
3 4 R331 0_0402_5% 1U_0603_10V4Z
[20] HDA_SDOUT_MDC 3 4 2
5 5 6 6 +3V
[20] HDA_SYNC_MDC 7 8
HDA_SDIN1_MDC 7 8
[20] HDA_SDIN1 1 2 9 9 10 10
R332 33_0402_5% 11 12
[20] HDA_RST_MDC# 11 12 HDA_BITCLK_MDC [20]
1
ACES_88018-124N
CONN@ R334
0_0402_5%
2
1
C370
S4 2
22P_0402_50V8J
DDR3 +3VALW
0.1U_0402_16V4Z
+1.5V
C275
1
R181
R199 @ R200
1
U8E 10K_0402_5% POWER OK
0_0402_5% 47K_0402_5% SN74LVC14APWLE_TSSOP14
1 2 Time delay 1RC Time
14
[28,30,35,41] SYSON
1
2
D
P
D24 1 S
3
@
R197 0_0402_5% C276
4 2 0.1U_0603_25V7K 4
+3VALW 1 2
@
R19810K_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power OK, Reset, MDC
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 32 of 45
A B C D E
A B C D E F G H
+VDDA J8 @
2 1
2 1
1
+5VAMP PVT JUMP_43X39
R264 60mil (output = 300 mA)
10K_0402_5% L26 1 2 1
+5VS
KC FBM-L11-201209-221LMAT_0805 IN
OUT 5 40mil +VDDA
1 1 2
2
GND
L27 1 2 C352 C355 1 4.75V
1 2 KC FBM-L11-201209-221LMAT_0805 3 4 C350
10U_0805_10V4Z SHDN BYP
1
C296 1U_0402_6.3V6K 2 2
0.1U_0402_16V4Z U19 @ G9191-475T1U_SOT23-5 1 4.7U_0805_10V4Z
R263 C351 2
10K_0402_5%
1
HD Audio Codec 2 1
2
C318
1 2 MONO_IN 0.01U_0402_16V7K
1U_0402_6.3V6K
1
C295 C 1 2 L24
R261 Q26 R287 1.3K_0402_1% MBK1608121YZF_0603
[30] BEEP# 1 2 1 2 2
B 0.1U_0402_16V4Z +3VS_DVDD 20mil 1 2 +3VS
1U_0402_6.3V6K 560_0402_5% E 2SC2411K_SOT23
3
1 1 1
C322 C323 C324
C294
R260 10U_0805_10V4Z
1 2 1 2
[21] SB_SPKR 2 2 2 PVT
1
1U_0402_6.3V6K 560_0402_5%
D28 0.1U_0402_16V4Z
R262
10K_0402_5%
CH751H-40PT_SOD323-2 L23
MBK1608121YZF_0603
ANALOG MIC
0.1U_0402_16V4Z +1.5VS_DVDD 1 2 +1.5VS
2
2 +AVDD_HDA
1 1 1 UMA HDMI JP24
C319 C320 C308 DMIC_DATA_R
L25 1 2 0.1U_0402_16V4Z 40mil DMIC_CLK_R
1
2
1
+VDDA 2
FBM-11-160808-700T_0603 1 1 1 10U_0805_10V4Z
C343 C334 2 2 2
C345 3
10U_0805_10V4Z 0.1U_0402_16V4Z G1
4
25
38
G2
9
2 2 2 U17
0.1U_0402_16V4Z ACES_88266-02001
DVDD_IO
AVDD1
AVDD2
DVDD
PVT CONN@
2 AMP_LEFT 2
14 LINE2-L FRONT_L 35 AMP_LEFT [34]
15 36 AMP_RIGHT
LINE2-R FRONT_R AMP_RIGHT [34]
R494 1K_0402_5% 1 2 MIC2_C_L 16 39 HP_LEFT MIC2_VREFO
DMIC_CLK_R 2 MIC2_L SURR_L HP_LEFT [34]
1 INT_MIC_R C1601 KALH0@ 4.7U_0603_6.3V6M
KALH0@ 1 2 MIC2_C_R 17 41 HP_RIGHT
MIC2_R SURR_R HP_RIGHT [34]
C1602 KALH0@ 4.7U_0603_6.3V6M
1
LINE_L 1 2 LINE_C_L 23 45 PVT
[34] LINE_L LINE1_L SIDE_L PVT
KAL90_G0_90+@ C333 4.7U_0603_6.3V6M R495
LINE_R 1 2 LINE_C_R 24 46 DMIC_CLK_268 1 2 DMIC_CLK 2.2K_0402_5%
[34] LINE_R LINE1_R SIDE_R
KAL90_G0_90+@ C342 4.7U_0603_6.3V6M R483 @ 0_0402_5% 15mil KALH0@
18 43
2
CD_L CENTER DMIC_CLK
20 44 1 2 1 2 C321
CD_R LFE R289 22_0402_5% 22P_0402_50V8J DMIC_DATA
For EMI
19 R496 @ 0_0603_5%
CD_GND
6 HDA_BITCLK_AUDIO [20]
MIC1_L MIC1_C_L BITCLK
[34] MIC1_L 1 2 21
C327 4.7U_0603_6.3V6M MIC1_L
MIC1_R 1 2 MIC1_C_R 22 8 HDA_SDIN0_AUDIO 1 2
[34] MIC1_R MIC1_R SDATA_IN HDA_SDIN0 [20]
C332 4.7U_0603_6.3V6M R288 33_0402_5%
MONO_IN 12 37
PCBEEP PIN37_VREFO
29
LINE1_VREFO
[20] HDA_RST_AUDIO# 11
R313 39.2K_0402_1% RESET#
LINE2_VREFO 31
[34] HP_PLUG# 2 1 [20] HDA_SYNC_AUDIO 10
SYNC 10mil
28
R299
1
10K_0402_1%
2
PVT
[20] HDA_SDOUT_AUDIO 5
SDATA_OUT
MIC1_VREFO_L
32
MIC1_VREFO_L
Digital MIC
[34] LINEIN_PLUG# DMIC_DATA HDA_GPIO0 MIC1_VREFO_R MIC1_VREFO_R +3VS
R504 1 @ 2 0_0402_5% 2
3 R298 20K_0402_1% DMIC_CLK HDA_GPIO3 SPDIFO2 PVT PVT SM010027780 3
1 2 3 GPIO0/DMIC_CLK MIC2_VREFO 30 MIC2_VREFO
2 1 R499 KAL90_G0_90+@ 0_0402_5% SENSE_A 13 10mil JP13
[34] MIC_PLUG# SENSE A CODEC_VREF
34 27 L44 FBMA-11-100505-301T_2P 1
SENSE B VREF DMIC_CLK 1
1 2 DMIC_CLK_R 2 2
47 40 1 1 DMIC_DATA DMIC_DATA_R 3 5
[30] EAPD SPDIFI/EAPD JDREF 3 G1
10U_0805_10V4Z
0.1U_0402_16V4Z
4 6
4 G2
C346
C344
21 SPDIF_R 48 33 R19 0_0603_5% 2
[34] SPDIF SPDIFO SENSE C
1
20K_0402_1%
2
DMIC_DATA 1 2 4 26 2 2 C16 CONN@
GPIO1/DMIC_DATA AVSS1
R305
PVT C17
PVT 220P_0402_50V8J
DGND AGND
1
2 KAL90_G0_90+@
20K PORT-F (PIN 16, 17) SVID=1025 Security Classification Compal Secret Data Compal Electronics, Inc.
SENSE B
SSID=0260 Issued Date 2008/11/10 Deciphered Date 2008/11/24 Title
10K PORT-G (PIN 43, 44) HD Audio Codec ALC888S-VC
FOR KALG1 and KALG0. THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
5.1K PORT-H (PIN 45, 46) B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 33 of 45
A B C D E F G H
A B C D E
+5VAMP
W=40mil
+3VS
1 1
1
C492 C490
C491 0.1U_0402_16V4Z
C514 0.1U_0402_16V4Z 2 2
0.47U_0603_16V4Z 2 4.7U_0805_10V4Z
1 2 AMP_RIGHT_C-1 1 2 AMP_RIGHT_C
[33] AMP_RIGHT C505 1U_0402_6.3V4Z
15
17
25
8
7
1 2 AMP_LEFT_C-1 1 2 AMP_LEFT_C U24
[33] AMP_LEFT C503 C504 1U_0402_6.3V4Z
CVDD
HVDD
PVDD
PVDD
VDD
1
1
1 0.47U_0603_16V4Z 1
R458 R470
2
INL_A ROUT-
HPF Fc = 154Hz SPKL+
R460 1 2 100K_0402_5% 24 5
/AMP EN LOUT+ SPKL-
6
+5VAMP R463 1 2 100K_0402_5% 21 HP_EN
LOUT- S/PDIF Out JACK
13 HPOUT_R
+5VAMP HP_RIGHT HP_RIGHT_C 1 HP_RIGHT_R HP_R HPOUT_L
1 2 2 28 16
[33] HP_RIGHT
HP_LEFT
C513 4.7U_0805_6.3V6K R459
HP_LEFT_C
39K_0402_5% HP_LEFT_R 2
INR_H
INL_H
HP_L LINE Out/Headphone Out
1 2 1 2 NC 3
[33] HP_LEFT
1
1
43K_0402_1%
VSS 12
1 9 1
2
3
100K_0402_1% C506 S Q37 C354 APA2051QBI-TRG_TQFN28_4X4 HPOUT_L 1 2 HPOUT_L_1 1 2 HPOUT_L_2 2
3
L36 FBM-11-160808-700T_0603
R442 SPDIF_PLUG# 5
56.2_0603_1%
4
SPDIF 7
2 Gain= 10dB [33] SPDIF
+5VSPDIF 8 2
1 10
C499
100P_0402_50V8J 9
2 SINGA_2SJ-E373-T01
+5VAMP CONN@
+5VAMP
HP_PLUG#
HP_PLUG# [33]
2
R466
100K_0402_5%
2
Q41 100K_0402_5% 8
AO3413_SOT23-3 7
4
2.2K_0402_5%
1
3
1
S
G Q40A
R468
2 SPDIF_PLUG# 2 2N7002DW-T/R7_SOT363-6 R454 5
[33] MIC_PLUG#
2.2K_0402_5%
D R456 L39 4
1
1
3
75_0603_1% FBM-11-160808-700T_0603
2
+5VSPDIF D37
[33] MIC1_R 1 2 MIC1_R_1 1 2 MIC1_R_R 3
PJDLC05_SOT23-3 6
20mil 1 2 MIC1_L_1 1 2 MIC1_L_R 2
[33] MIC1_L
@ L38 1
2
R455 FBM-11-160808-700T_0603
75_0603_1% SINGA_2SJ-E351-S01
For ESD Protect 1 1 CONN@
1
C500 C512
3 (HDA Jack) 3
1
D35 @
20mil PJDLC05_SOT23-3
JP14
SPKL+ 1
SPKL- 1
2
SPKR+ 2
3 3 G1 5
SPKR- 4 4 G2 6 kAL90_G0_90+@ JLINE1
ACES_88266-04001 8
3
D8 @ D7 @ CONN@ 7
C43 C42 C40 C41
SM05T1G_SOT23-3
SM05T1G_SOT23-3
1 1 1 1
220P_0402_50V8K
220P_0402_50V8K
220P_0402_50V8K
220P_0402_50V8K
PVT LINEIN_PLUG# 5
[33] LINEIN_PLUG#
KAL90_G0_90+@
R469 L43 KAL90_G0_90+@ 4
1
@ 2 @2 @2 @ 2 75_0603_1% FBM-11-160808-700T_0603
1 2 LINE_R_1 1 2 LINE_R_R 3
[33] LINE_R
6
For ESD 1 2 LINE_L_1 1 2 LINE_L_R 2
[33] LINE_L
L40 1
R457 FBM-11-160808-700T_0603
2
75_0603_1% KAL90_G0_90+@ 1 1 SINGA_2SJ-E351-S03
220P_0402_50V7K
KAL90_G0_90+@ C501
KAL90_G0_90+@ C502
KAL90_G0_90+@ CONN@
220P_0402_50V7K
(HDA Jack)
2 2
LINE-IN JACK
4 4
1
D36 @
PJDLC05_SOT23-3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Amplifier & Audio Jack
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 34 of 45
A B C D E
A B C D E
+5VALW
2
Colay @
+3V R297
+5VALW +5VS +3VALW Q30 100K_0402_5%
AO3413_SOT23-3
4
U20
1
S
D
5 3 1
6 3 SYSON#
[29,42] SYSON#
2
10U_0805_10V4Z
10U_0805_10V4Z
1U_0603_10V4Z
7 2 1 1
6
470_0603_5%
8 1 C373 C375 R162
G
1 1
2
10U_0805_10V4Z
SBPWR_EN#2 1
R316 1 Q24A
C371 C372 SI4800BDY-T1-E3_SO8 2 2 200K_0402_5% C356 SYSON 2
[28,30,32,41] SYSON
1
1 2 2 2N7002DW-T/R7_SOT363-6 1
@
1
0.1U_0603_25V7K
1
3
2 R252
100K_0402_5%
Q15B +3VALW +3V
+VSB 2 1 5VS_GATE 2N7002DW-T/R7_SOT363-6 5 SUSP
2
R161
200K_0402_5% 1
4
6
C238
4
U18
Q15A 0.1U_0603_25V7K 5
SUSP 2 2
2N7002DW-T/R7_SOT363-6 6 3 RTCVREF +5VALW
2
7 2 1 1
1 8 1 C347 C353 R163
1
2
C348 470_0603_5% PVT
10U_0805_10V4Z R266 R251
SI4800BDY-T1-E3_SO8 2 2
1U_0603_10V4Z 100K_0402_5% 100K_0402_5%
3 1
2
10U_0805_10V4Z @
1
SUSP
+3VALW TO +3VS Q14B
SBPWR_EN#
[32,42] SUSP
2N7002DW-T/R7_SOT363-6 5
3
+3VALW +3VS
2 1 3V_GATE
+VSB
4
4
6
5 200K_0402_5% 1 5
[28,30,32,41] SUSP#
6 3 C349 2N7002DW-T/R7_SOT363-6
2
7 2 1 1 Q14A
4
1
470_0603_5%
10U_0805_10V4Z
10U_0805_10V4Z
1
SI4800BDY-T1-E3_SO8 2 2
2 2 2 1 1 2
2
D
2 SUSP
G
S Q27
3
5VS_GATE 2N7002_SOT23
2
+3VS +3VALW U6
40mil width 40mil width 5 R182
6 3 1 1 100K_0402_5%
2
1 2 1 2 7 2 C185 C186
C89 0.1U_0603_25V7K C189 0.1U_0603_25V7K 1 1 8 1 R119
1
@ @ C180 C179 10U_0805_10V4Z 470_0603_5%
2 2
1U_0603_10V4Z
1 2 1 2
C459 0.1U_0603_25V7K C383 0.1U_0603_25V7K 10U_0805_10V4Z SI4800BDY-T1-E3_SO8 SBPWR_EN#
[22] SBPWR_EN#
1
@ @ 2 2
10U_0805_10V4Z
+1.05VS
3
40mil width +1.5VS 40mil width
1
D
1 2 1 2 Q8B [30,41] SBPWR_EN 2
C173 0.1U_0603_25V7K C388 0.1U_0603_25V7K 2 1 1.5VS_GATE 2N7002DW-T/R7_SOT363-6 5 SUSP G
+VSB
@ @ R121 Q17 S
3
1
1 2 1 2 510K_0402_5% 1 2N7002_SOT23
4
C421 0.1U_0603_25V7K C390 0.1U_0603_25V7K C187 R183
6
@ @ 100K_0402_5%
0.1U_0603_25V7K
Q8A 2
FOR EMI
2
SUSP 2 2N7002DW-T/R7_SOT363-6
3 3
2
1
R120
H3 H2 H1 H12 H10 H5 H4 H7 2.2M_0402_1%
H_3P2 H_3P2 H_3P2 H_3P2 H_3P2 H_3P2 H_3P2 H_4P2 @
1
@ @ @ @ @ @ @ @
1
1
D
2N7002_SOT23
[21,30,36,37,40] ACIN 2
G Q11
S @
3
H13 H14 H8 H6
H_4P2 H_4P2 H_4P2 H_3P7N
@
@ @ @
1
2
H_3P2 H_3P2 H_3P2 H_3P2 H_3P2 H_3P2 H_3P2 H_3P2 H_3P2 H19
@ @ @ @ @ @ @ @ @ H_3P2 R118 @ R233 @ R34 @ R165 @ R113 @
@ 470_0603_5% 470_0603_5% 470_0603_5% 470_0603_5% 470_0603_5%
1
1
需需需需需
1
1
D D D D D
需需需需M2.5X3
MDC
PVT PVT TOP SIDE 2 SUSP 2 SUSP 2 SUSP 2 SYSON# 2 SYSON#
H11 H24 H9 H17 G G G G G
4 H_4P7X3P7N H_5P1X4P1N H_10P0X6P0N H_5P5X4P3N Q10 @ Q22 @ Q4 @ Q16 @ Q9 @ 4
S S S S S
3
3
@ @ @ @ 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 FIDUCIAL_C40M80 Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
B 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 35 of 45
A B C D E
5 4 3 2 1
2
+5VALW 1 2 2 B 1 PW R_LED# +5VALW 1 2 2 B 1 BATT_RED_LED# BATT_RED_LED# [30]
R1 R15
499_0402_1% PVT 1.5K_0402_5% R317 866_0402_1% R319 866_0402_1%
D +5VALW 1 2 4 A 3 PW R_SUSP_LED# +5VALW 1 2 4 A 3 BATT_Yellow Green_LED# BATT_Yellow Green_LED# [30] D
KALG1@ KALG1@
1
1
AMB
HT-297UD/CB _BLUE/AMB_0603 HT-297UD/CB _BLUE/AMB_0603
Change footprint:LED_HT-297DQ-GQ_4P
2
2
LED2 KAL90_G0_90+@ LED3 KAL90_G0_90+@
HT-191NBQA_BLUE_0603 HT-191NBQA_BLUE_0603 Compal Footprint
PVT
4 1
1
1
ACIN# ACIN# (AMB) 3 2
LED15 KALH0@ R500 KALH0@ LED16 KALH0@ R501 KALH0@
453_0402_1% 453_0402_1% PVT
2 PW R_SUSP_LED# PW R_SUSP_LED#
UD
3 1 UD
3 1 2
ON/OFF LED DOWN
+5VALW 1 R502 KALH0@ +5VALW 1 R503 KALH0@ (BLUE)
220_0402_5% 220_0402_5%
NB
2 1 2 PW R_LED# NB
2 1 2 PW R_LED# LED8 KALG1@
HT-191NBQA_BLUE_0603
HT-210UD/NB_AMB/BLUE
(BLUE) HT-210UD/NB_AMB/BLUE PW R_LED#
+5VALW 1 2 2 1
R16 KALG1@
392_0402_1%
2 B 1
C PW R_LED#
(AMB) C
MEDIA_LED NUM_LED CAPS_LED +5VALW 1 2 4 A 3 PW R_SUSP_LED#
6
+5VS +5VS +5VS Q20A R5 KAL90_90+@
(BLUE) (BLUE) (BLUE) 2N7002DW -T/R7_SOT363-6 453_0402_1% LED12
[30] PW R_LED 2 KAL90_90+@
HT-297UD/CB _BLUE/AMB_0603
1
2
2
R259
R17 R7 KALG1@ R9 KALG1@
10K_0402_5% R6 KALG1@ 866_0402_1% PVT 866_0402_1% 10K_0402_5%
@ 866_0402_1% PVT
2
ON/OFF LED RIGHT
1
1
PW R_SUSP_LED#
2
3
LED5 KAL90_G0_90+@ LED6 KAL90_G0_90+@ LED7 KAL90_G0_90+@ Q20B (BLUE) LED4 KALG1@
HT-191NBQA_BLUE_0603 HT-191NBQA_BLUE_0603 HT-191NBQA_BLUE_0603 2N7002DW -T/R7_SOT363-6 HT-191NBQA_BLUE_0603
[30] PW R_SUSP_LED 5
+5VALW 1 2 2 1 PW R_LED#
1
1
4
MEDIA_LED# NUM_LED# NUM_LED# [30,31] CAPS_LED# CAPS_LED# [30] R234 R4 KALG1@
604_0402_1%
10K_0402_5%
(AMB) 2 1
2
B
+5VALW 1 2 4 A 3 PW R_SUSP_LED#
B R8 KAL90_90+@ B
PW R_LED# MEDIA_LED# CAPS_LED# 453_0402_1% LED13
KAL90_90+@
PW R_SUSP_LED# NUM_LED# ACIN# HT-297UD/CB _BLUE/AMB_0603
3
D4 D5 D3
FOR EMI
ON/OFF LED LEFT
@
1
+5VALW 1 2 2 1 PW R_LED#
R3 KALG1@
392_0402_1%
@ (AMB) 2 B 1
NUM_LED# C3 1 2 100P_0402_50V8J
@
CAPS_LED# C4 1 2 100P_0402_50V8J +5VALW 1 2 4 A 3 PW R_SUSP_LED#
+3VS @
MEDIA_LED# C2 1 2 100P_0402_50V8J R2 KAL90_90+@
Q35A ACIN# 453_0402_1% LED14
2
1 6 PVT
[25] 5IN1_LED#
Q21 2 ACIN [21,30,35,37,40]
SATA_LED# 4 3 MEDIA_LED# KAL90_G0_90+@ G
[20] SATA_LED# MEDIA_LED# [31]
2N7002_SOT23 S
3
Q35B
Security Classification Compal Secret Data Compal Electronics, Inc.
5
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR/B
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 36 of 45
5 4 3 2 1
A B C D
DC231000500
@
SINGA_2DC-G756I200 PL1
SMB3025500YA_2P
VIN PR1
DC_IN_S1 1 2DC_IN_S2 1M_0402_1%
1
1 2
VIN VIN
G 2 VS
G
1
3 PC2
PC3 PC4 100P_0402_50V8J PC1 @ PR2 PR3
PJP3 1000P_0402_50V7K 100P_0402_50V8J 1000P_0402_50V7K 10K_0402_5% 84.5K_0402_1%
2
1 1
PR209 PR5
8
PR4 10K_0402_1% 22K_0402_5%
2
0_0402_5% 3 1 2
P
+
1 2 1 2 1 0
[21,30,35,36,40] ACIN
20K_0402_1%
- 2
1
PR6
PU1A
1
PC6
LM358DT_SO8 PC5
0.1U_0603_25V7K
4
PR7 PD3 1000P_0402_50V7K
2
10K_0402_1% GLZ4.3B_LL34-2
2
2
2
PR123
1 2 PR8
10K_0402_1%
PVT 1 2
0_0603_5% RTCVREF
@
PQ25 MCVCC PQ28
@ SI2301BDS-T1-E3_SOT23-3 @ SI2301BDS-T1-E3_SOT23-3
+3VALWP
S
1
S
3 3
D
1 RTCVREF
D
Vin Dectector
G
G
2
2
1
1
PR102 PR122
Min. Typ Max.
@ 200K_0402_1% @ 200K_0402_1% H-->L 16.976V 17.525V 17.728V
L-->H 17.430V 17.901V 18.384V
2
2
2 2
1
D
2
G PQ46
PQ45 S @ 2N7002W -T/R7_SOT323-3 RTC Conn
3
1
D @ 2N7002W -T/R7_SOT323-3
2
G SPOK [38,39]
S
+ -
3
+RTCBATT @
PBJ1
+RTCBATT 1 2
ML1220T13RE
VIN
2
PJ2 PJ3
PD4 2 1 2 1
LL4148_LL34-2 +3VALWP 2 1 +3VALW +1.8VP 2 1 +1.8V
3
@ JUMP_43X118 @ JUMP_43X79 3
PD5
1
LL4148_LL34-2
BATT+ 2 1
1
200_0603_5%
CHGRTCP 1 2 N1 3 1
VS
PJ6
1
PJ7
1
PR13
2
22K_0402_1%
1 2
[32] 51ON#
PJ8 PJ17
+1.05VSP 2 2 1 1 +1.05VS +1.5VP 2 2 1 1 +1.5V
@ JUMP_43X118 @ JUMP_43X118
RTCVREF
1
PR14
PU2 200_0603_5% PJ16
PR15 PR16 G920AT24U_SOT89-3 2 1
560_0603_5% 560_0603_5% 3.3V +1.05VSP 2 1 +1.05VS
2
1 2 1 2 3 2 N2 @ JUMP_43X118
OUT IN
4
+CHGRTC 4
1
GND PC10
PC9 1U_0805_25V4Z
10U_0805_10V4Z 1
2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DCIN & DETECTOR & RTC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 37 of 45
A B C D
A B C D
2
PL2 PR17
1
1 1
1
2 47K_0402_1%
3 3
1
4 EC_SMCA 1 2
2
4 EC_SMDA PC12 PC13 PR19 PQ2
5 5
8
6 1000P_0402_50V7K 0.01U_0402_25V7K 13.7K_0402_1% DTC115EUA_SC70-3
2
6 PD6
7 1 2 3
P
7 +
O 1 2 1 2
SUYIN_250133MR007G115ZL TM_REF1 2 -
G
PU3A LL4148_LL34-2
@ LM393DG_SO8
3
2
0.22U_0603_16V7K
PR20 PR21
100_0402_1% 100_0402_1%
15.4K_0402_1%
1
1
PC14
PR23
PR22
100K_0402_1%
1000P_0402_50V7K
1
2 1 VL
1
PR24
PC15
6.49K_0402_1%
2
2 1 +3VALW P
1
1
PR25
PR26 100K_0402_1%
1K_0402_1%
2
2
2 2
BATT_TEMP [30]
2
@ PR27
VL 47K_0402_1%
@ PR28
47K_0402_1%
1
1 2
1
PQ3
TP0610K-T1-E3_SOT23-3
@ PH2
100K_0603_1%_TH11-4H104FT VL
B+
3 1 +VSBP
2
0.22U_1206_25V7K
@ PR30
0.1U_0603_25V7K
1
8
13.7K_0402_1% @ PD7
1
1
PC16
PC17
PR29 1 2 5 LL4148_LL34-2
P
100K_0402_1% +
O 7 2 1
@ @ TM_REF1 6
2
G
1
3 3
PR31 PU3B
2
1
VL 22K_0402_1% LM393DG_SO8
4
1 2 @ PC18 @ PR32
0.22U_0603_16V7K 15.4K_0402_1%
2
2
PR33
100K_0402_1%
PR34
1
0_0402_5% PQ4 D
1 2 2
[37,39] SPOK G 2N7002W -T/R7_SOT323-3
0.1U_0402_16V7K
S <BOM Structure>
3
1
PC19
@
2
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
BATTERY CONN / OTP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 38 of 46
A B C D
5 4 3 2 1
ISL6237_B+
ISL6237_B+
@
PR35
PJ10 0_0805_5%
2 1 1 2
D
B+ 2 1
D
JUMP_43X118
2200P_0402_50V7K
2200P_0402_50V7K
4.7U_1206_25V6K
4.7U_1206_25V6K
1
2200P_0402_50V7K
2200P_0402_50V7K
4.7U_1206_25V6K
4.7U_1206_25V6K
1
5
6
7
8
PC20
PC21
PC22
1
8
7
6
5
1
PC25
VL
2
@ PC92
PC41
PC23
PC24
1U_0603_10V6K
2
2
PQ6
2
2
2
@ PQ5 PC26 AO4466_SO8
2
AO4466_SO8 0.1U_0603_25V7K 4
4.7U_0603_6.3V6M
1
PC27
4
PC28
1
+5VALWP
3
2
1
PL4
1
2
3
PL3 4.7UH_PCMC063T-4R7MN_5.5A_20%
7
4.7UH_PCMC063T-4R7MN_5.5A_20% PC29 2 1
1 2 1U_0603_10V6K
LDO
VIN
VCC
+3VALWP 33 19 1 2
TP PVCC
5
6
7
8
1
4.7_1206_5%
1
8
7
6
5
DH3 DH5
PR39
26 UGATE2 UGATE1 15
PR36 PR37 PR40 2.2_0603_5% PQ8
4.7_1206_5% PQ7 2 1 BST3A 24 17 BST5A 2 1 AO4712_SO8
BOOT2 BOOT1
1
AO4712_SO8 2.2_0603_5%
63.4K_0402_1%
1
2
2
2
PR38 PC32 4
2
PC30 + PC31 0.1U_0603_25V7K
PR41
0_0402_5% 4
2
0.1U_0603_25V7K
680P_0402_50V7K
1
1
1
330U_6.3V_M LX3 25 16 LX5 1
2
PC34
3
2
1
2
C 680P_0402_50V7K + PC35 C
1
2
3
DL3 23 18 DL5 220U_6.3V_M
1
LGATE2 LGATE1
2
2
10K_0402_1%
PGND 22
2
FB3 30
@ PR42 OUT2
PR43
10K_0402_1% 10
OUT1
VL 32
1
REFIN2
1
11 FB5
2VREF_ISL6237 FB1
1 2 1 REF
PC36 0.22U_0603_10V7K
BYP 9
8 LDOREFIN
+3.3VALWP Ipeak=8.444A ; Imax=5.91A @ PR44 0_0402_5%
29 2 1 VL
Choke DCRmax=60m ohm, DCRtyp=54m ohm SKIP
Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical) PR45 0_0402_5%
Vlimit=(5E-06 * 330K)/10=165mV 1 2
20 NC POK2 28
Ilimit=165mV/18m ~ 165mV/15m PD8 PR46
=9.167A ~ 11A GLZ5.1B_LL34-2 100K_0402_1%
1 2 1 2 4 13 SPOK [37,38]
Iocp=Ilimit+Delta I/2 VS EN_LDO POK1 PR48
2
B ILM1 B
PR47
14 12 2 1
Delta I=1.934A (Freq=300KHz) PC37 EN1 ILIM1
0.22U_0603_25V7K
1
27 31 ILIM2 2 1
GND
TON
1
EN2 ILIM2
1
NC
2
PD12 PR49
0_0402_5%
1SS355_SOD323-2 VL @ PR50
2
PU4 330K_0402_1%
21
0_0402_5% ISL6237IRZ-T_QFN32_5X5
PR51
2
2
PR52
1
1
806K_0603_1%
1U_0603_10V6K
1
2
0_0402_5% 47K_0402_5% 0_0402_5%
PC143
2VREF_ISL6237
[20,38] MAINPWON
Vlimit=(5E-06 * 330K)/10=165mV
1
PC38
Ilimit=165mV/18m ~ 165mV/15m
2
=9.167A ~ 11A
1
0.047U_0402_16V7K
2
=10.147A ~ 11.980A
Delta I=1.96A (Freq=400KHz)
A 2 PQ35 A
TP0610K-T1-E3_SOT23-3
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+5VALWP/+3VALWP
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 39 of 46
5 4 3 2 1
A B C D
PQ9 PQ10 B+
AO4407A_SO8 AO4407A_SO8
VIN 8 1 1 8
7 2 2 7 PJ11 @
6 3 3 6 2 PR56
1 2 1 CHG_B+
2 1
1
5 5 0.015_1206_1%
2
JUMP_43X118 PR57
2200P_0402_25V7K
4.7U_1206_25V6K
4.7U_1206_25V6K
PR58 CHGEN# PC40 100K_0402_1%
2
3.3_1210_5% 0.01U_0402_25V7K
0.01U_0402_25V7K
1
PC42
PC43
PC44
100K_0402_1%
2
1
PC46 PC48
1
2
5
6
7
8
3
2
1
1 1
PC45
PR59
0.1U_0402_16V7K PU5 0.1U_0603_25V7K
1 2 1 28 PVCC 1 2 PQ12
CHGEN PVCC
1
AO4407A_SO8
1
PR174 PR61 /BATDRV 4
2
3.3_1210_5% PC47 @PC49
@PC49 0_0603_5% PQ11
0.1U_0603_25V7K 0.1U_0603_25V7K 27 BTST 1 2 4 AO4466_SO8
2
BTST
2
2
PR60
340K_0402_1% ACN 2 26 DH_CHG
ACN HIDRV
1
ACP 3
3
2
1
5
6
7
8
PC50 ACP
1
2.2U_0805_25V6K ACDRV 4 25 LX_CHG PL5
2
10U_1206_25V6M
1
LL4148_LL34-2 PC51
10U_1206_25V6M
REGN
2 3
2
0.1U_0603_25V7K @ PR64 <BOM Structure>
5
6
7
8
PC53
24751_VREF PR63 4.7_1206_5%
PC52
CELLS GND 3 Cell 54.9K_0402_1% ACSET 6 ACSET
24
2
REGN
VREF 4 Cell
1
2
1
PC54 PQ13
@ PR65 1U_0603_10V6K 4 AO4466_SO8
@
47K_0402_1% PR66 PC56 PC55
P C55
2
2
2
PR67 ACOP DL_CHG
23
3
2
1
340K_0402_1% LODRV
CELLS
1
PGND 22
@ PQ14 OVPSET 8 PC57
OVPSET
1
2 3S/4S# [30] 1 2
G 9 21 ACOFF [30]
AGND LEARN
2
S
3
1
PR68
54.9K_0402_1% PC58 @PC59
@PC59
24751_VREF CELLS 0.1U_0603_25V7K 0.1U_0603_25V7K
Cells selector 20
2
CELLS
1
24751_VREF 10
PQ15 VREF
3
1
SI2301BDS-T1-E3_SOT23-3
PC60
PR69 1U_0603_10V6K 19 SE_CHG+
2
SRP
100K_0402_1% RTCVREF
CP Point Setting 1 2PQ15_GATE
2 11 VDAC SRN 18 SE_CHG-
1
CP point=Iadapter*85% BAT 17
1
PR70
1
65W adapter PC62 100K_0402_1% VADJ 12
0.1U_0603_25V7K VADJ PC61
2
2
TP 29 Icharge Setting
CP POINT=(1.434V/3.3V)*(0.1/0.015)=2.896A ACGOOD# 13 ACGOOD ICHG setting PR71 For 2200mA, Icharge=0.8C=0.8*2*2.2=3.52A
17.4K_0402_1% For 2400mA, Icharge=0.8C=0.8*2.4*2=3.84A
VMB 16 SRSET 2 1 Icharge=(Vsrset/Vdac)*(0.1/PR62)
/BATDRV 14
SRSET IREF [30] IREF=((100k/(100K+17.4K))/3.3)*(0.1/0.02)=Icharge
BATDRV
1
PR72
IREF=0.7748*Icharge
1
10_0603_5% PR73
1
15 1 2 100K_0402_1% @PC63
@PC63
IADAPT 0.01U_0402_25V7K
2
VS PR74 BQ24751ARHDR_QFN28_5X5 24751_VREF
Input OVP : 22.3V
2
3 3
1
Input UVP : 17.26V
2
2
BATT-OVP=0.1112*VMB PC64
0.01U_0402_25V7K
2
LI-3S :13.5V----BATT-OVP=1.5012V 100K_0402_1%
1
PC65
1
PR76
200K_0402_1%
1 2
2
1
Per cell=4.5V 499K_0402_1%
100K_0402_1%
ACIN [21,30,35,36,37]
1
1
PR180
PQ15_GATE
1
D
PR179
PR78
2
8
1
10K_0402_1% LM358DT_SO8 PQ36 D PQ17 G 2N7002W -T/R7_SOT323-3
5
P
+ SI2301BDS-T1-E3_SOT23-3 PR80
1 2 7 0 2 S
2
3
[30] BATT_OVP 6 PC163 G 2N7002W -T/R7_SOT323-3 0_0402_5%
-
G
S
0.1U_0402_16V7K PQ37 REGN 3 VADJ
D
S 1 1 2
3
1
ACOFF 1 24751_VREF
2 2
0.01U_0402_25V7K
4
1
PC66
105K_0402_1%
G
S
3
2
1
2
PR82
340K_0402_1%
221K_0402_1%
2
1
PR181
PR84
@ PR177 1000P_0402_50V7K 100K_0402_1%
2
PR83 4.3K_0402_5%
2
64.9K_0402_1%
2
1
24751_VREF 1 2 ACSET CHGEN#
2
1
PQ19 D
1
1
PQ18 D
2
[30] CALIBRATE# G 2N7002W -T/R7_SOT323-3 [30] FSTCHG 2
@ PR85 S <BOM Structure> G 2N7002W -T/R7_SOT323-3
3
100K_0402_1% S <BOM Structure>
3
1
4 4
2
PR86
49.9K_0402_1%
1
PQ20 D
G 2N7002W -T/R7_SOT323-3
S @
3
PJ9
1.05V_IN 2 1 B+
2 1
@ JUMP_43X118
5
6
7
8
10U_1206_25V6M
1
PC534
PR525
2
1 1
300K_0402_5% 4
1.05V_TON PQ507
12/25 @ PR526
1 2
PR527
PC535
AO4466_SO8
0_0402_5% 0_0603_5%
1 2 1.05V_EN BST_1.05V 1 2BST_1.05V-1
1 2
[30,32,35] SUSP#
3
2
1
1
0.1U_0603_25V7K
1
PR910 PL502
15
14
1
30K_0402_5% PC536 1UH_PCMC063T-1R0MN_11A_20%
0.1U_0402_16V7K 1 2
EN_PSV
TP
VBST
+1.05VSP
2
@
1
UG_1.05V
4.7_1206_5%
2 TON DRVH 13
PR528
PR529 3 12 SW _1.05V
VOUT LL
5
6
7
8
422_0603_1% PQ508
10U_0805_6.3V6M
330U_D2E_2.5VM
1
+5VS 1 2 1.05V_V5FILT 4 11 1.05V_TRIP
1 2 +5VS
1.05V_SNB2
V5FILT TRIP
1
+
PC537
PC538
PR530
1.05V_FB 5 10 5.9K_0402_1%
VFB V5DRV
2
1
@ PR178 LG_1.05V 2
6 PGOOD DRVL 9 4
PGND
0_0402_5% PC539
GND
1
1 2 1.05V_EN 1U_0603_10V6K PC540
2
[30,35] SBPWR_EN
1
@ 47P_0402_50V8J PC541
680P_0603_50V7K
4.7U_0805_10V6K
PC542
1 2
3
2
1
PU503
2
TPS51117RGYR_QFN14_3.5x3.5
AO4456_SO8
PR531
13.7K_0402_1%
PR112 1 2
0_0402_5%
1
2 2
1 2
[32] VS_ON VFB=0.75V
PR532
33.2K_0402_1%
2
12/25 PJ12
1.5V_IN 2 1 B+
2 1
@ JUMP_43X118
5
6
7
8
10U_1206_25V6M
1
PC501
PR501
2
300K_0402_5% 4
1.5V_TON 1 2 PQ501
PR518 PR519 AO4466_SO8
PC525
0_0402_5% 0_0603_5%
1 2 1.5V_EN BST_1.5V 1 2BST_1.5V-1
1 2
[30,32,35] SYSON
3
2
1
1
0.1U_0603_25V7K
12/25
1
PR911 PL501
15
14
1
30K_0402_5% PC526 1UH_PCMC063T-1R0MN_11A_20%
@0.1U_0402_16V7K 1 2
EN_PSV
TP
VBST
+1.5VP
2
2
1
UG_1.5V
4.7_1206_5%
2 TON DRVH 13
PR520
PR521 SW _1.5V
330U_D2E_2.5VM
3 VOUT LL 12
5
6
7
8
422_0603_1%
10U_0805_6.3V6M
1
+5VALW 1 2 1.5V_V5FILT 4 11 1.5V_TRIP
1 2 +5VALW
1.5V_SNB 2
V5FILT TRIP
1
+
PC527
PC528
3
PR522 3
1.5V_FB 5 10 5.9K_0402_1%
VFB V5DRV
2
1
LG_1.5V 2
6 PGOOD DRVL 9 4
PGND
PC529
GND
1U_0603_10V6K PC530
2
1
@ 47P_0402_50V8J PR909
680P_0603_50V7K
PC532
1 2 100K_0402_1% PC531
7
3
2
1
1 2 PU501 4.7U_0805_10V6K
+1.5VP
2
TPS51117RGYR_QFN14_3.5x3.5 PQ506
PR523 AO4456_SO8
1.5VPGOOD [32]
22.1K_0402_1%
1 2
12/25
1
PR524
22.1K_0402_1% VFB=0.75V
2
12/25
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
1.8VP / 1.05VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 41 of 46
A B C D
5 4 3 2 1
D D
+3VALW
1
PJ609
1
@ JUMP_43X79
2
PU604 <BOM Structure>
2
LDO_1.8V_IN 1 6 +5VALW
VIN VCNTL
2 GND NC 5
1
PC623
1
4.7U_0805_6.3V6K 3 7 PC624
PR623 VREF NC 1U_0603_6.3V6M
2
1K_0402_1% 4 8
VOUT NC
9
2
TP
LDO_1.8V_REF APL5331KAC-TRL_SO8
1
PR626 +1.8VP
1
0_0402_5% D PR628
[29,35] SYSON# 1 2LDO_1.8V_EN
2 1.24K_0402_1% PC627
G 0.1U_0402_16V7K
2
1
1
3 S
2
PC631 PC629
C @ 0.1U_0402_16V7K 10U_0805_6.3V6M C
2
2
PQ609
2N7002W -T/R7_SOT323-3
+1.5V
1
@ PJ14
1
JUMP_43X79
2
PU8
2
1 VIN VCNTL 6 +3VALW
2 GND NC 5
1
1
PC99 3 7 PC100
4.7U_0603_6.3V6M PR118 REFEN NC 1U_0402_6.3V6K
2
1K_0402_1% 4 8
VOUT NC
9
2
GND
B RT9173DPSP_SO8 B
PR119
0.1U_0402_16V7K
+0.75VSP
1
0_0402_5% PQ27 D
[32,35] SUSP
PC101
1 2 2 PR120
1
G 2N7002W -T/R7_SOT323-3
2
1
S <BOM Structure> PC104
3
PC103 1K_0402_1% 10U_0805_6.3V6M
2
0.1U_0402_16V7K
2
12/25
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+1.8VP/+0.75VSP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 42 of 46
5 4 3 2 1
5 4 3 2 1
+5VS
B+
CPU_VID6 [5] CPU_B+
2
CPU_VID5 [5] PR125 PL9
1_0603_5% FBMA-L18-453215-900LMA90T_1812
CPU_VID4 [5] 2 1
[30,32] VR_ON
10U_1206_25V6M
10U_1206_25V6M
2200P_0402_50V7K
CPU_VID3 [5]
PR126
1000P_0603_50V7K
1
1
PC112
PC113
D
499_0402_1% CPU_VID2 [5] D
1
+
PC114
[8,21] PM_DPRSLPVR 1 2 PC110 PC115
220U_25V_M
PC116
CPU_VID1 [5] PC109 2.2U_0603_6.3V6K
2
5
PR127 0_0402_5% 0.022U_0402_16V7K
2
2
[5,8,20] H_DPRSTP# 1 2 CPU_VID0 [5]
PR128 0_0402_5% PR107
1 2 0_0603_5% PQ29
1
[16] CLK_ENABLE#
PR130 0_0402_5%
PR131 0_0402_5%
PR132 0_0402_5%
PR133 0_0402_5%
PR129 0_0402_5%
PR135 0_0402_5%
PR136 0_0402_5%
PR137 0_0402_5%
UGATE_CPU1 2 1 U_CPU1 4 SI7686DP-T1-E3_SO8
PR134 0_0402_5%
+3VS 1 2
+3VS
3
2
1
1
PR138 PC119 PL10
1U_0402_6.3V6K
PC118
2.2_0603_5% 0.22U_0603_10V7K 0.36UH_PCMC104T-R36MN1R17_30A_20%
1.91K_0402_1%
+CPU_CORE
1
BOOT_CPU1 1 2 1 2 PHASE_CPU1 1 4
2
2
PR140
5
6
7
8
5
6
7
8
1
PR139
6.8_1206_5%
2 3
1
PR142
10K_0402_1%
499_0402_1%
49
48
47
46
45
44
43
42
41
40
39
38
37
1
PR144
3.65K_0805_1%
2
PR143
PQ30 PR145
GND
3V3
CLK_EN#
DPRSTP#
DPRSLPVR
VR_ON
VID6
VID5
VID4
VID3
VID2
VID1
VID0
1
1 2
PQ31 0_0603_5%
680P_0402_50V7K
1 36 4 4
2
[8,16,21] VGATE PGOOD BOOT1 AO4456_SO8 1 2
2
PC120
[5] PSI# PR147
1 20_0402_5% 2 35 UGATE_CPU1
PSI# UGATE1 VSUM 1 2
2
[30] PGD_IN 1@ PR148 2 3 34 PHASE_CPU1
3
2
1
3
2
1
PMON PHASE1
LGATE_CPU1
LGATE_CPU1
PC121
0_0402_5% 1 PR149
2 147K_0402_1% 4 33 0.22U_0603_10V7K VCC_PRM
RBIAS PGND1 ISEN1
VR_TT# 5 32 LGATE_CPU1 CPU_B+
VR_TT# LGATE1
10U_1206_25V6M
10U_1206_25V6M
2200P_0402_50V7K
5
C C
1000P_0603_50V7K
6 NTC PVCC 31
1
PC122
PC123
7 PU10 30 LGATE_CPU2
SOFT LGATE2
PC124
PC117
ISL6266AHRZ-T_QFN48_7X7 PR121
PC125 8 29 0_0603_5%
2
OCSET PGND2
0.022U_0603_25V7K 2 1 U_CPU2-1 4
1 2 9 28 PHASE_CPU2
VW PHASE2 PQ32
PR151 13K_0402_1% 10 27 UGATE_CPU2-1 PL11
COMP UGATE2 SI7686DP-T1-E3_SO8 0.36UH_PCMC104T-R36MN1R17_30A_20%
1 2
3
2
1
11 26 BOOT_CPU2
1 2 1 2 1 4
FB BOOT2 PR152
1 2
5
6
7
8
5
6
7
8
1
DROOP
6.8_1206_5%
12 FB2 NC 25 2 3
VDIFF
VSUM
ISEN2
ISEN1
VSEN
PR154
PR153 6.81K_0402_1% 0.22U_0603_10V7K PQ34
3.65K_0805_1%
GND
VDD
RTN
DFB
1
VIN
VO
10K_0402_1%
1 2 AO4456_SO8
PR157
PR155
PQ33
1 2 AO4456_SO8 PR156
13
14
15
16
17
18
19
20
21
22
23
24
1 2
4 4 1_0402_5%
PC128 1000P_0402_50V7K @ PR159
2
PC129
ISEN1 0_0603_5%
680P_0402_50V7K
ISEN2 1 2
2
2
0_0402_5%
1K_0402_1%
3
2
1
3
2
1
1
@ PR161
1 2
PC133 220P_0402_50V7K PC131
1 2 1U_0402_6.3V6K PC132
1
LGATE_CPU2
LGATE_CPU2
0.22U_0603_10V7K
2
VCC_PRM
PR163 PR164 ISEN2
255_0402_1% PC134 1000P_0402_50V7K 10_0603_5%
1 2 1 2 1 2 CPU_B+
B B
1
1 2 PC135
PR165 1K_0402_1% 0.1U_0603_25V7K
PR166
2
PR167
1
20_0402_5% @PC137
@PC137 PC138
+CPU_CORE 1 2 0.022U_0603_50V7K 0.01U_0603_50V7K PR168
2
PR169 2.61K_0402_1%
2
0_0402_5%
[5] VSSSENSE 1 2
2
1
11K_0402_1%
PC139 180P_0402_50V8J
2
PR171
1 2
2
PR170
20_0402_5% 1 2 1 2 PH3
10KB_0603_5%_ERTJ1VR103J
2
VCC_PRM
PC140
0.1U_0402_16V7K
1 2
2 1
2
PC141 0.22U_0402_6.3V6K
PC142
A 0.22U_0603_10V7K A
1
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
+CPU_CORE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 43 of 46
5 4 3 2 1
5 4 3 2 1
D Add 3/5V boost resister for EMI request Change PR37 and PR40 to 2.2 OHM D
1
Modify 1.5V and 1.05V choke to cyntec for eff. PL501 & PL502
2
Change PR525 & PR501 from 240K to 300K
3 Modify 1.5V and 1.05V frequnce from 336K to 264K for eff.
Change PQ506 & PQ508 from FDS6670 to A04456
4 Modify 1.5V and 1.05V low side mos for eff.
5 Add CPU_core boost resister for EMI request Change PR138 and PR158 to 2.2 OHM
Change PR530 & PR522 to 5.9K
6 Modify 1.5V & 1.05V OCP to 14A
7 Modify 3V & 5V choke to 4.7UH for eff. Change PL3 & PL4 from 8.2UH to 4.7UH
Modify 5V output cap to OS-CON for costdown Change PC35
C 8 C
10 Add 30K OHM to TPS51117 EN pin , Disable SMPS mode ADD PR910 & PR911
11
12
13
14
15
B B
16
17
18
19
20
21
22
A A
23
D D
C C
B B
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HW PIR
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 45 of 45
5 4 3 2 1
5 4 3 2 1
PCB
ZZZ
North Bridge
U21
PVT
C R6 R7 R9 C
453_0402_1% 150_0402_1% 150_0402_1%
KAL90_90+@ KAL90_90+@ KAL90_90+@
1
R3 R4 R16
220_0402_5% 220_0402_5% 220_0402_5%
KAL90_90+@ KAL90_90+@ KAL90_90+@
1
Enlightener LED
2
R1 R15
300_0402_5% 300_0402_5%
KAL90_90+@ KAL90_90+@
Page 36
1
B B
LED11 LED11
KAL90_90+@ KALH0@
2 YG
1 2 YG
1
4 A
3 4 A
3
HT-297DQ-GQ_AMB-YG HT-297DQ-GQ_AMB-YG
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Option Component
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
KALG1
Date: Tuesday, March 24, 2009 Sheet 46 of 46
5 4 3 2 1