Howland current source for high impedance load applications

K. F. Morcelles, V. G. Sirtoli, P. Bertemes-Filho, and V. C. Vincence

Citation: Review of Scientific Instruments 88, 114705 (2017); doi: 10.1063/1.5005330

View online: https://doi.org/10.1063/1.5005330
View Table of Contents: http://aip.scitation.org/toc/rsi/88/11
Published by the American Institute of Physics

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 REVIEW OF SCIENTIFIC INSTRUMENTS 88, 114705 (2017)

Howland current source for high impedance load applications

K. F. Morcelles,a) V. G. Sirtoli, P. Bertemes-Filho, and V. C. Vincence
Department of Electrical Engineering, Santa Catarina State University, Joinville 89.219-710, Brazil
(Received 18 September 2017; accepted 4 November 2017; published online 21 November 2017)
For Electrical Impedance Spectroscopy (EIS) applications, the Enhanced Howland Current Source
(EHCS) is a popular choice as an excitation circuit due to its simplicity, reliability, and safety. However,
its output impedance degradation at high frequency leads to errors that are unacceptable for high load
impedance applications, such as the ones which use dry or microelectrodes. Based on a proposed
mathematical model, this work designed an EHCS circuit which includes an output current buffer
and frequency compensation. PSpice simulations were performed as proof of concept, and then the
measured data were collected for comparison. For the proposed circuit, called here Load-in-the-Loop
Compensated Enhanced Howland Source (LLC-EHCS), the results showed that the output current
errors are lower than 1% up to 3.7 MHz over the load range of 560–2200 Ω and 1.2 MHz with 5.6 kΩ.
On the other hand, for the case of the standard EHCS circuit, these frequencies are 170 and 80 kHz,
respectively. Also, the output linear swing was found to be 3 times higher than the EHCS. It can be
concluded that the proposed LLC-EHCS may be widely used as an excitation circuit for high load and
wide bandwidth EIS applications. Published by AIP Publishing. https://doi.org/10.1063/1.5005330

I. INTRODUCTION use of current sources simplifies the measurement and allows

direct methods of identification.7 On the other hand, a volt-
Electrical Impedance Spectroscopy (EIS) is a non-
age source has better frequency performance than the current
invasive technique based on the analysis of electrical properties
source,5,8,9 which has its output impedance degraded at higher
to identify the composition of biological material under study.1
frequencies10 (>1 MHz). When high frequency EIS or EIT
The method consists of the injection of an electrical signal
systems are needed, designers usually choose a voltage source
and measurement of the material electrical response. Simi-
for their equipment, sometimes having an alternative current
larly, Electrical Impedance Tomography (EIT) uses the same
mode option.9,11–14 They may also use controlled current pat-
technique as EIS (see the definitions in the Nomenclature).
terns with voltage sources6 despite the practical advantages of
EIT is an imaging method which uses electrical impedance to
current source excitation.
assess the material.1 This technique may be used as an alter-
Most current sources used in bioimpedance applications
native to other imaging methods, such as X-ray, ultrasound,
are usually Voltage Controlled Current Sources (VCCSs).
and magnetic resonance imaging. X-ray suffers from radiation
They can be split into two groups: voltage mode and current
hazards and significant rate of inconclusive results.2 Further-
mode.15 In the voltage mode group, the current is generated by
more, magnetic resonance imaging is an expensive technique,2
a voltage in the active circuit,15 and the most popular topolo-
and ultrasound may not be an efficient method for detecting
gies are the load-in-the-loop, Howland, and Tietze sources.
microcalcifications.3 EIT can also detect early malignancy in
On the other hand, in the current mode group, the current
tissue, as changes in the electrical properties start to appear
is generated directly by an active device, such as transcon-
in malignant tissue before symptoms develop.1 However, the
ductance amplifiers (OTAs), current conveyors (CCs), and
evaluation of impedance values in EIT is a non-linear ill-posed
current mirrors (CMs). Some designers mix both modes by
problem,4 requiring highly precise instruments for both signal
using a CC or OTA device with a load-in-the-loop stage.16–18
generation and acquisition.
The voltage mode is the preferred choice by many design-
One of the main components in an impedance interro-
ers since it is easy to implement in a discrete design and it
gation system is the excitation source. This excitation can be
is only necessary to have one or two operational amplifiers
applied by either an electrical voltage or current, depending on
(OPAMPs) with few passive elements (resistors and capac-
the topology of the circuit. The main EIS systems use a current
itors). The major drawback of this mode is that the output
source. The current source can be adjusted to deliver the maxi-
impedance is highly affected by the resistor mismatch and
mum recommended current into tissue, without being affected
non-idealities of the OPAMP.19–25 The current mode is almost
by the skin-electrode impedance. This ensures a maximum
independent of external components but not very accessible
resolution within the medical safety limits, a load flexibility,
since CCs and OTAs are not widely available commercial
and optimization of image distinction,1,5,6 which are inherent
devices as OPAMPs, pushing the researchers to design and
advantages of this operation mode over voltage sources. Also,
manufacture the Integrated Circuit (IC).16–18,25,26
in time-variant impedance assess with harmonic spectra, the
The Enhanced Howland Current Source (EHCS) circuit is
one of the most used current sources in EIS measurements19,20
a)Authorto whom correspondence should be addressed: kauefelipems@ due to its versatility, low complexity, and single active device
gmail.com topology.27 This well-known circuit is suitable for most of the

0034-6748/2017/88(11)/114705/8/$30.00 88, 114705-1 Published by AIP Publishing.

114705-2 Morcelles et al. Rev. Sci. Instrum. 88, 114705 (2017)

low-frequency applications. However, complex applications

may need improved EHCS circuits, which can be developed by
a variety of topologies, methods, and auxiliary circuits. These
may include circuits such as (i) mirrored current pumps28,29
and bridge configurations30–32 to reduce common-mode inter-
ference and increase compliance, (ii) buffers in the feed-
back branch to increase output impedance,30,33,34 (iii) lead-lag
compensations19,31 to get stability, (iv) General Impedance
Converters (GICs)35,36 and Negative Impedance Converters
(NICs)29,37 to reduce stray capacitance effects, and (v) How-
land followed by a load-in-the-loop current buffer stage38 to
increase compliance and output impedance.
The objective of this work is the design of a wide fre-
quency bandwidth enhanced Howland source, working beyond
1 MHz with a wide range of loads without the need of constant
calibration. The Howland circuit will need low output current
error and high voltage compliance. Also, it is proposed as a FIG. 1. Schematic of the EHCS circuit, where RL is the resistive load and
reliable mathematical model for designing the optimal circuit.
II. METHODOLOGY
The EHCS was divided into two parts: core and aux-
iliary circuit. The core represents the main topology; this
may be the basic Howland current source (BHCS) or the
enhanced one (EHCS) with or without a buffer in the posi-
tive feedback loop [buffered EHCS (BEHCS)]. The auxiliary
circuit represents the circuitry for increasing the performance
of the core in a desired way, such as GIC, NIC, and lead-lag
compensators.
The decision procedure to choose the best combination of
core and auxiliary circuit was based on the literature and theo-
retical evaluation. Also, by using the governing equations and
simulations of the circuit, the optimal configuration was found
and tested experimentally. To compare the novel circuit to the
literature topologies, measurements were made by simulations
and experimental analysis of frequency response, phase, and
output swing.
Simulations were conducted in PSPICE version 16.3,
and experimental measurements were collected by using a
Tektronix oscilloscope (model MSO 4034) and a Tektronix
function generator (model AFG 3251). Both theoretical evalu-
ations and experimental data analysis were processed in MAT-
LAB version 7.8.0. The PSPICE model of the AD825, pro-
vided by Analog Devices, was used to simulate the OPAMPs
implemented in this work.
The output current was calculated by dividing the mea-
sured voltage across the load to the measured resistance.
Frequency response was tested, both in experiment and
in simulation, using 4 different resistance values ranging
from 560 to 5600 Ω. 25 discrete frequencies were analyzed
ranging from 100 Hz to 10 MHz. The performance of the
circuits was evaluated based on the output current error com-
pared to the low frequency transconductance gain. The out-
put swing was measured by applying a low frequency input
voltage with different load values while the input amplitude
was kept at 1.65 V. Then, the maximum load that main-
tains a linear operation could be evaluated. Average was
used in the measurements to reduce the effect of noise and
disturbances.
Vin+ and Vin are the input voltages. In this work, Vin+ is the signal and Vin
is at 0 V.
The components were selected according to a developed
MATLAB algorithm to find the resistor values which give the
maximum output impedance. It also considers the transcon-
ductance (G), desired bandwidth (BW), output swing, load
range, and amplifier parameters (gain and bandwidth). The
algorithm conducts a sweep on parameters α (=R2A /R2B ) and
β (=R4 /R3 ) (these resistances are shown in Fig. 1), to find
the maximum output impedance. This algorithm is based on
the equations presented in Sec. III. Care was taken in the
layout of the circuit by making a good ground plane and min-
imum of length traces, reducing stray capacitances, parasitic
inductances, cross talk, and electromagnetic interferences.
III. THEORETICAL EVALUATION
A. The core
The EHCS topology was chosen over the BHCS since its
performance is better.27 In order to decide among the EHCS
topology variations found in the literature and design the cir-
cuit with optimal performance, this work used a mathematical
model of the EHCS based on the equations presented by
Tucker et al.19 These equations describe the output impedance,
transconductance, noise, and the maximum load for a linear
response. It considers the input signal connected to the positive
input of the EHCS and a first order OPAMP model. Figure 1
shows the EHCS circuit used here. To increase the accuracy
in the calculations, some modifications in the equations were
made based on circuit analysis. It was considered the transcon-
ductance bandwidth, which was neglected by Tucker.19
A simple circuit inspection showed that the transconductance
bandwidth is dictated by the amplifier gain-bandwidth product
(f H ) and the negative feedback gain. The following equation
describes the transconductance G with its frequency dependent
term:
R2A + R2B 1
G+ = . (1)
R1 R2A 1 + R4 /R3 s + 1
2πfH
114705-3 Morcelles et al.
In order to model the effects of resistor mismatch, finite
gain, and bandwidth of the OPAMP, the output impedance
(Z 0 ) can be represented in terms of two resistances (R01 and
R02 ) and a capacitance C 0 , according to Tucker.19 However,
it does not consider the effects of common mode gain, which
are significant in high gain amplifiers. Therefore, this effect
was modeled by adding this term, as shown in the follow-
ing equation, where AOL is the open-loop DC gain of the
amplifier:
R
1 + AOL R +3 R
3 4
RO2 = (R2B //(R2A + R1 )) . (2)
AOL R3
1 + CMRR R + R
3 4
Equation (3) represents the maximum acceptable load to
get a linear operation for a given fixed output current. This
is limited by voltage compliance, and it was modified from
the study of Tucker et al.19 by adding a denominator term,
representing the current that flows through the positive feed-
back resistors, where V SAT is the saturation voltage of the
amplifier,
VSAT
I − R2B
RL,max = OUT . (3)
1 + R R+2BR
1 2A
The rest of the equations presented by Tucker 19 were kept
unchanged. All equations used here were previously proved
by simulations with several OPAMPs. By using this model, it
was possible to choose the best configuration for application
required and then to design an appropriate auxiliary circuit.
The circuit used by Constantin and Gheorghe30 introduces
a buffer between the output of the Howland source and its pos-
itive feedback loop, called here BEHCS. This buffer increases
both the output resistance and swing of the EHCS circuit, as
it forces the output current to flow only in the load and not
through the feedback loop. Adapting Eqs. (2) and (3) with the
model presented by Tucker 19 to the BEHCS case, one can find
that both the output resistance and swing are increased by the
terms ∆Z 0 and ∆RL ,m áx , considering the ratio R4 /R3 = 1, as
shown in the following equation:
R2B
∆RL,máx = ∆ZO = 100%
. (4)
R2B + 2R2A
The high output impedance of the EHCS circuit can only
be achieved if its resistor values follow the well-known rela-
tionship, which is (R2A + R2B )/R1 = R4 /R3 .27 For the BEHCS
case, the relationship is R2A /R1 = R4 /R3 . Equation (4) sug-
gests that the increasing performance provided by the BEHCS
is proportional to the ratio R2B /R2A and reaches a maximum
of 100% when R2B  2R2A . However, increasing the ratio
R2B /R2A without precaution may lead to similar problems of
the BHCS topology.27 For the BEHCS circuit, in the typical
case of R2B = R2A , both the output resistance and swing are,
at maximum, 33.3% higher than the EHCS. This results in an
increase of 33.3% in the range of loads that can be used to a
fixed output current error. To the requirements of this work,
that improvement is not enough to justify the introduction of
another amplifier in the circuit, which increases cost and com-
plexity and may introduce new parasitic components that can
compromise the design. The increase of the ratio R4 /R3 may
Rev. Sci. Instrum. 88, 114705 (2017)
achieve better results with the BEHCS circuit, but at the cost
of transconductance bandwidth, according to Eq. (1). There-
fore, it was considered the simple EHCS topology for the core
circuit.
B. The auxiliary circuit
It has been found in the literature that the EHCS design
has its output impedance degraded by parasitic capacitances
and non-idealities,19,20 but this may be reduced using auxiliary
circuits. Generalized impedance converters35,36 and negative
impedance converters29,37 have been used to reduce capaci-
tance effects, but the improvement is very limited in band, not
being suitable for broadband applications, for example. One
topology which increases the output impedance and swing,
keeping its robustness in a wide bandwidth without calibra-
tions, is the one proposed by Zanganeh38 (see Fig. 2). This
is a load-in-the-loop current source at the output of an EHCS
circuit, working as a current buffer output stage. The load-in-
the-loop EHCS (LL-EHCS) circuit isolates the load from the
EHCS source, increasing both the output swing and output
impedance (which is 1 + AOL 2 times higher than Z 0 ). AOL 2 is
the frequency dependent open-loop gain of the second ampli-
fier. The results obtained by Zanganeh38 were only based on
simulations, so a deeper theoretical analysis and experimental
data were needed.
By using the proposed EHCS model and some analysis
over the LL-EHCS circuit, it further investigated the theoret-
ical improvements obtained from this topology. It was found
that the negative input capacitance of the second amplifier is
a critical parasitic component to this topology, reducing the
overall output impedance of the circuit and generating a peak
response at high frequency. The following equation describes
the output impedance considering the negative input capac-
itance of the second amplifier (C in2 ), the finite gain (AOL 2 ),
the bandwidth (f C2 ), and the output impedance of the EHCS
stage (Z 0 ):
!
ZO AOL2 +
ZO,LL−EHCS = × *.1 + s /. (5)
sCin2 ZO + 1 +1
2πfC2
, -
The output swing of the overall circuit is higher than the
standard circuit, but the first term shows the degradation caused
by C in2 . Equations (6) and (7) describe the maximum load
supported by the first and the second stages, respectively. The
maximum load supported by the whole circuit is the minimum
between the values resulted from Eqs. (6) and (7). It can be
noticed that both equations are frequency dependent, which
FIG. 2. The EHCS circuit followed by a load-in-the-loop stage,38 where RL
is a resistive load.
114705-4 Morcelles et al. Rev. Sci. Instrum. 88, 114705 (2017)

is because the load seen by the EHCS stage depends on the

second amplifier’s gain,
VSAT
I − R2B AOL2 +
Zlmax1,LL−EHCS = OUT × *.1 + s / , (6)
1 + R R+2BR 2πfC2
+1
1 2A , -
s +1
VSAT * 2πfC2
Zlmax2,LL−EHCS = × .1 + +/ . (7)
IOUT AOL2
, -
The peak response generated by the second amplifiers,
due to its input capacitance, was not modeled in this work, but
PSPICE simulations pointed out this peak, which increases
with increasing load. A compensation circuit was designed to
FIG. 4. Output impedance calculated from the equations (EQ) and simulated
reduce the error, consisting of a capacitor C and a resistor R (SIM) for the 3 different types of Howland circuits.
in series which, in turn, are in parallel to the load (see Fig. 3).
This introduces a pole and a zero in the output current equa-
tion, as shown in Eq. (8). It can be noticed that the pole is
A. Simulations
controlled by the compensation circuit (R and C) and the load
(RL ). This reduces the output current in the peak frequency. The compensation circuit was adjusted to achieve the low-
Also, the frequency and amount of reduction are proportional est current errors over the desired frequency range, resulting in
to RL , resulting in a compensation which is proportional to the a resistor R of 8.1 kΩ and a capacitor C of 2.0 pF. Simulations
peak to be removed. The use of a resistor R allows the compen- were performed for the 3 types of circuits (EHCS, LL-EHCS,
sation circuit to be precisely adjusted empirically by using a LLC-EHCS) in the frequency range of 100 Hz–100 MHz. The
variable resistor. The circuit shown in Fig. 3 is called the LLC- output impedance spectra provided by the presented equations
EHCS (stands for Load-in-the-Loop Compensated Enhanced and PSPICE simulations are shown in Fig. 4.
Howland Current Source), The dependency of the output current to different load val-
! ues (0.00, 0.56, 1.00, 2.20, and 5.60 kΩ) was investigated over
sCR + 1 the frequency range of 10 kHz and 100 MHz. The results are
IO,LLC−EHCS = IO,LL−EHCS × . (8)
sC(R + RL ) + 1 shown in Fig. 5. The specific values of the loads were chosen
to match the resistor values used in the posterior experimental
procedure.
IV. RESULTS
Table I shows the best results of the mainly important char-
acteristics of two Howland topologies. Z lmax is defined as the
The equations presented here were implemented in a
MATLAB algorithm in order to find the optimum circuit con-
figuration, once a given input specification is known. It used an
input voltage of 3.3 VPP , a maximum output current of 1 mAPP ,
and a symmetrical power supply of ±5 V. The source transcon-
ductance gain was set to 303.03 µS for a maximum BW of
10 MHz. The OPAMP AD825 was used due to its high com-
mon mode rejection (=80 dB), high input impedance (=500
MΩ in parallel to 6 pF), and sufficient gain-bandwidth prod-
uct (=40 MHz) to operate in the megahertz range. The results
of the implemented algorithm showed a best solution for the
circuit by using the resistors R2A = R2B = R1 = R4 = 6.6 kΩ
and a resistor R3 = 3.3 kΩ.

FIG. 3. The LLC-EHCS circuit with the compensation network, where the FIG. 5. Frequency response of (a) EHCS, (b) LL-EHCS, and (c) LLC-EHCS
values of R and C were empirically calibrated. circuits for the transconductance gain at five different loads.
114705-5 Morcelles et al. Rev. Sci. Instrum. 88, 114705 (2017)

TABLE I. Calculated and simulated circuit parameters of both EHCS and

LLC-EHCS topologies.

Parameter EHCS LLC-EHCS

G (µS) 302.9 302.9

BW (MHz) 13.1 13.2
Z lmax (equation) (kΩ) 2.3 10.0
Z lmax (simulation) (kΩ) 3.0 9.5
CV G (%) 7.7 5.8
CV BW (%) 8.9 4.4

maximum load which gives a linear current-to-voltage ratio.

This parameter was evaluated by measuring the voltage drop
on the load (for the EHCS) and the output voltage of the sec-
ond amplifier (for the LLC-EHCS). This is because, in the case
of the LLC-EHCS, the second stage saturates before the first
stage, changing the topology back to the EHCS (this obser-
vation can be made considering the second OPAMP, a fixed
voltage source after saturation), creating a non-linear operation
that results in distortion in high frequencies. The Monte Carlo FIG. 6. Transconductance gain frequency response of three Howland topolo-
analysis was also made, using 1000 random samples. Table I gies at different loads. (a) EHCS, (b) LL-EHCS, and (c) LLC-EHCS.
shows the ratio between the standard deviation and average
transconductance (coefficient of variation—CV G ) and 3 dB
bandwidth (CV BW ), considering resistors of 5% tolerance and
a load of 2.2 kΩ.

B. Experiments
To reduce the effects of resistor mismatch, R1 was replaced
by a variable resistance and then was empirically calibrated
to achieve the maximum output impedance. This allows the
output resistance to be affected only by the OPAMP non-
idealities, hence predicting it using only Eq. (2). A capacitor
was placed in series to R2B to avoid DC positive feedback.
In order to find the maximum output impedance operation
point, a low frequency voltage signal, in series with a resis-
tor of 62 kΩ, was applied at the output of the EHCS stage. It FIG. 7. Phase response of the LLC-EHCS topology with five different
resistive loads.
was assumed that the maximum output impedance gives the
minimum voltage drop on the 62 kΩ resistor, so by measur-
ing this drop it was possible to find the maximum Z 0 without
knowing its value. The compensation circuit was empirically Figure 8 shows the positive voltage swing and negative voltage
adjusted to get the lowest current errors over the frequency swing of both the EHCS and LLC-EHCS as a function of
range. The practical result was a resistor R of 1.33 kΩ and a loading.
capacitor C of 7 pF. Figure 6 shows the measured transcon-
ductance of the three Howland topologies using 4 different
resistive loads (0.56, 1.0, 2.2, and 5.6 kΩ). The base value
for transconductance (G) was measured using a 50 kHz sig- TABLE II. Experimental circuit parameters for both EHCS and LLC-EHCS
topologies.
nal with a load of 560 Ω, which is in the band of operation.
Figure 7 shows the measured phase response of the proposed Parameter EHCS LLC-EHCS
LLC-EHCS circuit. In order to investigate for abnormal peaks
between 2.2 and 5.6 kΩ loading, measurements using a 3.3 kΩ G 304.5 µS 304.2 µS
load was also collected for both LL-EHCS and LLC-EHCS BW (3 dB) 5.0 MHz 7.0 MHz
f 1% (@560 Ω) 490.0 kHz 3.7 MHz
circuits.
f 1% (@1 kΩ) 210.0 kHz 3.9 MHz
Measured transconductance (G), bandwidth (BW ), and
f 1% (@2.2 kΩ) 170.0 kHz 3.9 MHz
maximum load impedance (Z lmax ) are shown in Table II. Also, f 1% (@5.6 kΩ) 80.0 kHz 1.2 MHz
it shows the maximum frequency (f 1% ) that yielded output Z lmax 2.0 kΩ 7.5 kΩ
current error (relative to G) below 1% for the different loads.
114705-6 Morcelles et al.
FIG. 8. Output voltage swing as a function of loading for both EHCS and
LLC-EHCS circuits. The ideal curve represents a fully linear operation.
V. DISCUSSIONS
Both simulation and experimental analyses showed
expected values of transconductance gain (G) with respect to
the ones from the MATLAB algorithm. Although one could
expect an error in the experimental G value, as it was mea-
sured using 560 Ω load at 50 kHz, simulations showed that the
error in the G value is negligible in these conditions. Accord-
ing to Tables I and II, the simulated bandwidth is significantly
bigger than the experimental one. The simulated and exper-
imentally implemented compensation circuit components
(R and C) were also significantly different. Besides model
errors and layout effects, it was verified that the capacitance
of the probe is added to the capacitance of the second ampli-
fier input. This effect increases the peak [see Fig. 6(b)], which
consequently demands more compensation than the simulated
circuit. In order to confirm this hypothesis, the LL-EHCS cir-
cuit was simulated by including the circuit probe model at the
measured points. The results from these simulations showed an
increasing peak of the transconductance as observed in the real
circuit. Figure 9 shows the simulated transconductance gain
with and without the oscilloscope probe effect, using a load of
2.2 kΩ and probe impedance according to the manufacturer’s
guide.
The calculated and simulated output impedance of the LL-
EHCS was approximately 5600 times bigger at low frequency,
FIG. 9. Simulated transconductance gain of the LL-EHCS circuit as a
function of frequency with and without the oscilloscope probes.
Rev. Sci. Instrum. 88, 114705 (2017)
whereas 10 times bigger at 1 MHz than the ones found in the
EHCS circuit (see Fig. 4). These results agree with the simula-
tion results reported by Zanganeh.38 However, the EHCS out-
put impedance was higher than the LL-EHCS above 20 MHz.
This effect was not modeled in Eq. (2), for simplification. How-
ever, this may be explained by the fact that close to the unity
gain frequency f H (e.g., 40 MHz for AD825) the influence of
the amplifier on the output impedance is very small. By cir-
cuit analysis, one can find that the EHCS output impedance
tends to R2B //(R2A + R1 ) as the frequency exceeds f H , while
the LL-EHCS output impedance is further reduced due to the
input capacitance of the second amplifier. Although it seems
to be a disadvantage for the proposed circuit, it only occurs
beyond the operation frequency range of the transconduc-
tance. It must be emphasized that the practical EHCS output
impedance is easily degraded by parasitic capacitances, so the
real output impedance will not remain in a constant value.
Furthermore, it can be seen in Fig. 4 that the calculated out-
put impedance agreed with the simulated one for EHCS and
LL-EHCS.
As pointed out by Zanganeh,38 the LL-EHCS circuit per-
mits the use of OPAMPs with much lower f H than in the EHCS
case, facilitating the choice of the amplifier. However, Eq. (5)
shows that the input capacitance of the second amplifier is one
of the main practical limitations of this topology. This capac-
itance effect controls the output impedance of the first circuit
at higher frequencies. This means that the choice for a good
amplifier can be still a challenge in this design. Furthermore,
the OPAMP input capacitance also generates a transconduc-
tance peak at higher frequencies, as shown Fig. 5(b). This
effect was not modeled in this work, but it is well-known that
the input capacitance reduces the phase margin of an OPAMP-
based amplifier, generating ringing or instability.19 Since this
is a simulation result, the peak effect cannot be related to layout
effects or ground loops.
The proposed compensation circuit is just a simple way
of correcting the error introduced by the input capacitance of
the second amplifier. The compensation is proportional to the
load [see Figs. 5(b) and 5(c)]. The drawback of this technique
is the reduction of output impedance (see Fig. 4), as R and
C are placed in parallel to the load. Although one can argue
that this nulls the objective of LL-EHCS topology, the rea-
son why designers try to achieve high output impedance is
to reduce the output current error with increasing load. Given
that the compensation can be empirically adjusted by simply
varying the resistor R, the LLC-EHCS offers a low current
error even without having the very high output impedance
provided by the LL-EHCS. Other different compensation tech-
niques will be implemented in future studies, such as lead-lag
compensation,19 NIC circuit for cancelling out the OPAMP
input capacitance, or negative feedback loops for controlling
the critical poles of the system.
Results showed that the EHCS bandwidth is very depen-
dent on the load value [see Fig. 5(a)], resulting in a significantly
high frequency error. It is important to know that the less
the current at higher frequencies, the more the degradation of
the signal-to-noise ratio (SNR) is. In other words, the flatter the
output current frequency response, the more predictable it is
[see Fig. 5(c)]. Figure 5(c) shows that the LLC-EHCS yielded
114705-7 Morcelles et al.
a flat transconductance frequency response up to higher fre-
quencies than the EHCS, for a load range from 0 to 2.2 kΩ.
Also, in this load range, the transconductance LLC-EHCS
curves barely changed, which is not the case for the EHCS,
showing that the circuit is less dependent on the load value and,
therefore, more predictable. For the 5.6 kΩ load, the improve-
ment in the frequency response is almost one decade higher
than the EHCS circuit. Although Figs. 5 and 6 showed results
only above 100 kHz, measurements were made from 100 Hz,
but no additional information was founded below 100 kHz.
Experimental results confirmed the improvement obtained
by simulations, as shown in Fig. 6. A load of 3.3 kΩ was added
in the analysis for both LL-EHCS and LLC-EHCS circuits
to confirm the transconductance peak reduction at higher fre-
quencies, according to simulations. It must be emphasized that
the output impedance was not directly measured due to instru-
ment limitations. According to the results shown in Table II,
the proposed circuit reached 3.7 MHz with errors below 1%
over a load range from 560 to 2.2 kΩ, whereas 170 kHz for the
EHCS topology in the same conditions. When a load of 5.6 kΩ
was used, f 1% increased by more than one decade in the fre-
quency bandwidth, confirming the superiority of the proposed
circuit over the whole load range. The negative phase shift
result was expected, which is due to the amplifier behavior on
high frequencies. However, the LLC-EHCS phase shift was
significantly affected by the load (see Fig. 7), which was also
observed in the simulation results. The phase effects at lower
frequencies are due to the DC decoupling capacitor.
Output voltage swing was analyzed in terms of having a
maximum load for a linear circuit operation. This parameter
is very important when designing this type of circuit, espe-
cially when both the input voltage and supply voltage cannot
be changed in the design. In simulations, the AD825 model sat-
urated near 5 V. In these conditions, the LLC-EHCS maximum
load was 3 times bigger than the EHCS (Table I), which agreed
with the mathematical model results. Improvement was con-
firmed experimentally, as shown in Table II and Fig. 8. The
proposed topology showed better swing improvement com-
pared to the symmetrical EHCS28,29 and bridge EHCS,30,32
which also uses two or more OPAMPs. When one can keep
Z lmax 1,LL-EHCS higher than Z lmax 2,LL-EHCS [see Eqs. (6) and (7)],
then the LLC-EHCS maximum load will not depend on the
EHCS resistors’ values, increasing the degree of flexibility of
the design.
The coefficients of variation for transconductance and
bandwidth, shown in Table I, suggest that the LLC-EHCS is
also less susceptible to component variations, as the transcon-
ductance variations are smaller than the ones for the EHCS
circuit.
Excitation methods for broadband signal applications may
depend on an optimized waveform, such as Discrete-Interval
Binary Sequence (DIBS)39 and multisine.39 In these cases,
it is very important to check for signal quality in terms of
noise, distortion, and step response. The time response of the
LLC-EHCS to sinusoidal and square waves, with 5 MHz and
1 MHz, respectively, is shown in Fig. 10, to analyze the qual-
ity of the signal in typical implementations. Both input signals
had an amplitude of 1.65 V and a load of 1 kΩ. The pro-
posed circuit showed a predictable response for an input square
Rev. Sci. Instrum. 88, 114705 (2017)
FIG. 10. Time response to (a) square (1 MHz) and (b) sinusoidal (5 MHz)
input waves.
signal up to 1 MHz whereas 5 MHz for a sine wave signal
(see Fig. 10). The square excitation showed only a small over-
shoot, which was partially caused by the voltage generation
itself. This result suggests the possibility of using the LLC-
EHCS with DIBS signals up to 1 MHz. The approach used
by the LLC-EHCS is more suited to this kind of signal than
the GIC or NIC configuration proposed in other studies29,35–37
because while the latter improved performance on a very lim-
ited frequency band, the LLC-EHCS reduced output error in a
broadband width, which in this work covered frequencies from
10 to 3700 kHz. No reducing noise techniques were applied
whatsoever in the signals seen in Fig. 10 (different from the
previously showed measurements), keeping the raw data to
show the noise condition of the measured signal.
Most biological tissue measurements need to remove the
offset current to keep heat out of data, to avoid electrode polar-
ization, and for safety issues. This can easily be done putting
a capacitor in series with tissue or using a DC feedback loop.
The drawback of this solution in the LLC-EHCS is the loss
of polarization by the second amplifier (see Fig. 3). In order
to close the DC negative loop, a high value resistor Rf needs
to be put in parallel to the RC circuit of the second amplifier.
However, this will reduce the low frequency output impedance
of the LLC-EHCS circuit but will not interfere at high frequen-
cies if an optimum value is chosen to minimize the degradation.
One may also use a DC feedback loop instead, such as the off-
set compensation proposed by Pliquett,40 but the appropriate
feedback circuit to be used with the LLC-EHCS is out of the
scope of this work.
The electrical characteristics of the proposed topology
suggest that this may be applied in applications using high
impedance loads. Usually, the load impedance is dominated
by the interface of the electrode and tissue, especially for
applications using small dry electrodes. These characteristics
are found to be true in EIT,41 cell culture monitoring,42 and
microelectromechanical systems (MEMSs).43 However, for
applications using switching systems like EIT, the topology
must be previously tested to accommodate the high leakage
capacitance of the multiplexing network.
114705-8 Morcelles et al. Rev. Sci. Instrum. 88, 114705 (2017)

VI. CONCLUSION 11 T. R. Qureshi, B. Mehboob, C. R. Chatwin, and W. Wang, in 38th Annual

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output current error dependent on the load and increasing the
voltage output swing of the current source. Those improve-
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