RESUME

CH.ASHOK KUMAR REDDY

Email: ch.ashok1023@gmail.com
Mobile: +91- 9701056943

CARRIER OBJECTIVES

I am a sincere, loyal and dedicated individual who has a great deal of ambition. I
love to learn, and am always up to a challenge. I get along well with others, while
also working efficiently on my own. I am seeking a position where I can develop
and excel while giving my best as an employee.

PROJECT DETAILS

Project 1: SPP( SRAM based Pseudo dual port high performance Memory)
Technology : GF 12nm-Finfet
Environment : Cadence Virtuoso Layout Editor
Tools used : Mentor Graphics Calibre
Role-played:
 Drawn layout for sub blocks in Control.
 Cleared DRC, LVS and DFM with Design changes in control block.
 Cleared DRC, LVS and EMIR at Instance level.

Project 2: S1P( SRAM based Single port Memory Compiler)

Technology : GF 12nm-Finfet
Environment : Cadence Virtuoso Layout Editor
Tools used : Mentor Graphics Calibre
Role-played:
 Drawn layout for sub control blocks like Address decoder, Write Assit,
read Assit ,precharge circuit.
 Cleared DRC, LVS and DFM with Design changes in Sub control block.
 Cleared DRC, LVS and EMIR at Instance level.
Project 3: SDPV( SRAM based Dual port very low Power Memory)
Technology : GF 22nm-FDSOI
Environment : Cadence Virtuoso Layout Editor
Tools used : Mentor Graphics Calibre
Role-played:
 Drawn Layout for Local io (LIO) blocks - Sense Amplifier, Read-write
Mux, write Amplifier.
 Cleared DRC, LVS and DFM with Design changes in LIO block.
 Cleared DRC, LVS and EMIR at Instance level.

Project 4: S1DU( SRAM based Single port ultra low leakage Memory)
Technology : GF 22nm-FDSOI
Environment : Cadence Virtuoso Layout Editor
Tools used : Mentor Graphics Calibre
Role-played:
 Drawn Layout for standard cells (Decoders, encoders, inverters, nand,
flipflops , Multiplexers)
 Cleared DRC, LVS and EMIR at Instance level.

TECHNICAL SKILLS

 Cadence virtuoso layout Editor(layout-L,XL)

 Mentor Graphics Calibre tool
 Good command on programming languages like UNIX,PERL and Cadence
Skill.
 Good Knowledge on CMOS basics
 Strong debugging skills in DRC , LVS ,ERC and Antenna Rule check.

EXPERIENCE

 Sponsored training in Custom Layout from VEDA-IIT, Hyderabad for

6 months.
 Two years of work experience in Soctronics pvt. Ltd. Hyderabad.
 One year of work experience in Invecas pvt. Ltd. Hyderabad.
 Technology used – GF22FDX(22nm-FDSOI), GF12LP (12nm-
FINFET),GF14LP.
EDUCATIONAL QUALIFICATION

COURSE/ INSTITUTE/ BOARD/ YEAR OF PERCENTAGE

DISCIPLINE UNIVERSITY UNIVERSITY PASSING (%)
Sree Vidyanikethan
M.TECH Engineering College, JNTU 2016 74.5%
Tirupati Anantapur
PBR Visvodaya
B.TECH Institute of JNTU 2013 65.13%
[ECE] Technology & Anantapur
Science, Kavali
Narayana jr.College, Board of
INTERMEDIATE Nellore Intermediate 2009 82.4%
Education
Indian Public School Board of
SSC Kavali Secondary 2007 82.16%
Education

ACHIEVEMENTS

 Qualified in gate-2013.
 Paper presentation on WIRELESS COMMUNICATIONS in CBIT, proddatur.
 Organized events for our tech fest VITA-2K13.

PERSONAL DETAILS
NAME CH. Ashok Kumar Reddy
FATHER’S NAME CH.Veera Reddy
D.O.B 23rd October, 1991
GENDER Male
MARITAL STATUS Single
NATIONALITY Indian
LOCATION Kavali.

DECLARATION

I hereby state that all the above furnished information is true and correct to the best of my
knowledge.

Place:kavali,Andhra pradesh, India.

CH.ASHOK KUMAR REDDY