IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 47, NO.
6, JUNE 2012
A Low-Phase-Noise Wide-Tuning-Range Oscillator
Based on Resonant Mode Switching
Guansheng Li, Li Liu, Yiwu Tang, and Ehsan Afshari, Senior Member, IEEE
Abstract—In this paper we will present a low-phase-noise
wide-tuning-range oscillator suitable for scaled CMOS processes.
It switches between the two resonant modes of a high-order LC
resonator that consists of two identical LC tanks coupled by
capacitor and transformer. The mode switching method does not
add lossy switches to the resonator and thus doubles frequency
tuning range without degrading phase noise performance. More-
over, the coupled resonator leads to 3 dB lower phase noise than a
single LC tank, which provides a way of achieving low phase noise
in scaled CMOS process. Finally, the novel way of using inductive
and capacitive coupling jointly decouples frequency separation
and tank impedances of the two resonant modes, and makes it
possible to achieve balanced performance. The proposed structure
is verified by a prototype in a low power 65 nm CMOS process,
which covers all cellular bands with a continuous tuning range
of 2.5–5.6 GHz and meets all stringent phase noise specifications
of cellular standards. It uses a 0.6 V power supply and achieves
excellent phase noise figure-of-merit (FoM) of 192.5 dB at 3.7 GHz
and 188 dB across the entire tuning range. This demonstrates
the possibility of achieving low phase noise and wide tuning range
at the same time in scaled CMOS processes.
Index Terms—Coupled oscillator, dual band, low phase noise,
mode switching, VCO, wide tuning range oscillator.
I. INTRODUCTION
R ECENT interest in multi-standard communication de-
vices and software defined radios poses the challenge
of designing oscillators that have wide frequency tuning range
and low phase noise at the same time. On the other hand,
CMOS process scaling makes it more challenging to achieve
low phase noise, because the voltage swing of an LC tank has
to be reduced to accommodate the thinner oxide and lower
breakdown voltage [1]. As a result, it often turns out impossible
to meet both tuning range and phase noise requirements in
scaled CMOS processes using conventional single-tank LC
oscillators.
To have a better understanding of the problem, let us first
review LC oscillator’s phase noise and power consumption. For
Manuscript received October 25, 2011; revised February 05, 2012; accepted
February 16, 2012. Date of publication April 16, 2012; date of current version
May 22, 2012. This paper was approved by Associate Editor Jan Craninckx.
This work was supported by NSF Early Career Award to E. Afshari (ECCS-
0954537).
G. Li and E. Afshari are with the School of Electrical and Computer Engi-
neering, Cornell University, Ithaca, NY 14850 USA (e-mail: gl246@cornell.
edu; ehsan@ece.cornell.edu).
L. Liu and Y. Tang are with Qualcomm Incorporated, San Diego, CA 92121
USA (e-mail: lil@qualcomm.com; ytang@qualcomm.com).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/JSSC.2012.2190185
0018-9200/$31.00 © 2012 IEEE
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1295
the LC oscillator in Fig. 1, Leeson’s Equation [2], [3] predicts
its phase noise as
(1)
in which is the offset frequency, is the carrier frequency,
is a noise factor modeling the noise contribution of active
core, is Boltzmann’s constant, is absolute temperature,
is the tank’s quality factor, is the voltage swing and
is an equivalent resistor modeling the loss of LC tank.
For optimal phase noise performance, an LC oscillator is usu-
ally biased at the boundary of current-limited and voltage-lim-
ited regions, where the voltage swing reaches an upper limit
set by supply voltage [4]. In this case, the DC current is linearly
proportional to so that the LC tank’s voltage swing satu-
rates at the upper limit. With these in mind, one can find three
major challenges with single-tank LC VCOs:
• First, it is challenging to achieve wide tuning range and
low phase noise at the same time. As illustrated in Fig. 2,
switched capacitor is widely used to extend tuning range
of LC VCOs. However, MOS switches introduce resis-
tance when they are on, which degrades and phase
noise; when off, they have parasitic capacitance, which
limits frequency tuning range. That is, low phase noise re-
quires wide MOS switches but wide tuning range requires
narrow ones. Fig. 2 shows an optimized design in a 65 nm
CMOS process, which achieves GHz and
. Considering parasitics of load and
active core, switched capacitor bank can hardly achieve
tuning range above 50% while meeting moderate phase
noise requirements [5]. Other designs that switch inductor
or transformer [6]–[9] also suffer from Q and phase noise
degradation due to the loss of switches.
• Second, it is difficult to get low phase noise in scaled
CMOS processes because of reduced voltage swing
across the LC tank [1]. The conventional way of trading
power for phase noise is to scale down tank inductance
while keeping constant. For instance, by reducing
by half, one gets reduced by half,
which lowers phase noise by 3 dB according to Lesson’s
Equation in (1) and doubles power consumption. However,
the tank inductor can become too small to be practical in
scaled CMOS processes [1]. For instance, to achieve 155
dBc/Hz at 20 MHz offset from 3.69 GHz carrier required
by SAW-less GSM [8], Leeson’s equation predicts the tank
inductance must be reduced from 0.95 nH to as low as
0.44 nH if the LC tank’s voltage swing is reduced from
1296 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 47, NO. 6, JUNE 2012

Fig. 1. Conventional LC oscillator. models the energy loss of LC tank.

is the active core for loss compensation.

Fig. 3. Tank impedance scaling for lower phase noise. But phase noise suffers
when low-Q parasitic inductance becomes significant.

Fig. 2. Tradeoff in switch size: low phase noise prefers wide switch for high
Q; wide tuning range needs narrow switch for small parasitics. The and
values are optimized for the employed 65 nm CMOS process.

1.8 V to 1.2 V.1 At the same time, the tank capacitance

must scale up accordingly to keep the same oscillation fre-
quency. The interconnections in the capacitor array intro-
duce low-Q parasitic inductance as shown in Fig. 3, which
becomes more significant and lowers the tank’s Q. As a
result, phase noise does not scale down any more as the
power-to-phase-noise tradeoff predicts.
• Third, wide-tuning-range LC oscillators often suffer from
the tradeoff between phase noise at high frequencies and
power consumption at low frequencies. Consider a VCO
that can be tuned from to as shown in Fig. 4. The
high frequency end is often constrained by phase
noise requirement, and one must choose a small and
to meet the specification. On the other hand, the tank
impedance drops fast with reducing frequency. For
instance, if the inductor’s series resistance dominates
in energy loss, one can get .
Thus, at is only one quarter of that at , and
four times the current is needed at to push it into
voltage-limited region. This not only makes power con-
sumption at low frequency unnecessarily high, but also
complicates the design of active core to accommodate
such large variation of current.
In this paper, we propose a wide-tuning-range low-phase-
noise oscillator based on resonant mode switching. As shown in
Fig. 5, it consists of a high-order LC resonator and a switched
transistor network. The resonator includes two identical LC
tanks coupled by capacitors and transformer, and has two
resonant modes at different frequencies; the transistor network
can be switched to stimulate a desired oscillation mode and
damps the other. In each mode, two capacitor arrays tune
frequency continuously.
The proposed design solves the three aforementioned prob-
lems of single-tank LC oscillators. First of all, the mode switching
method does not add switches to the LC resonator and main-
tains its high quality factor. Thus, it doubles the frequency tuning
range without degrading phase noise performance, which eases
1In
Leeson’s (1), assume , K, V,
, and use M dBc/Hz at 3.69 GHz to
leave 1 dBc/Hz design margin. This results in nH.
Fig. 4. Tradeoff between phase noise at high frequency and power consumption
at low frequency. This can be relaxed by inductive switching.
the tradeoff between phase noise and tuning range. Secondly, the
proposed design can be considered as two identicalLC VCOscou-
pled together and thus can bring phase noise down by 3 dB to meet
specifications without scaling to impractically small values
[10]. Finally, the effective inductance of the proposed resonator is
larger in its low-frequency band and smaller in its high-frequency
band. As illustrated in Fig. 4, this “inductance switching” relaxes
the constrains of phase noise at high frequency and power con-
sumption at low frequency, and reduces current variation across
the wide tuning range.
Coupling LC tanks through transformer to get oscilla-
tion at two different frequencies was originally proposed by
Bevilacqua et al. [12], and there has been active research
along this line to generate multiple frequency bands far apart
[13]–[15], [18], [19], [23]. However, the impedance and quality
factor of the resonator change significantly from mode to mode,
which leads to inferior phase noise performance in one or more
of the bands. A capacitive coupling method was also proposed,
in which two identical LC tanks are coupled by capacitors
to generate two resonant frequencies and reduce phase noise
[10]. However, the two inductors takes a large area; and the
and
coupling capacitor loads the resonator as fixed capacitor in
one of the modes and limits the frequency tuning range in that

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LI et al.: A LOW-PHASE-NOISE WIDE-TUNING-RANGE OSCILLATOR BASED ON RESONANT MODE SWITCHING
Fig. 5. Proposed oscillator based on resonant mode switching. It consists of a coupled LC resonator and a switched transistor network.
mode. The structure proposed in this paper uses both inductive
and capacitive couplings jointly. We will show this is critical
to achieving balanced phase noise performance in the two
bands because it gives more design freedom and decouples the
two bands’ frequency separation from their quality factors. Its
phase noise performance will be discussed in detail through
comparison with single LC tank oscillators and comparison
between the two bands. We will also study the general case of
inductively/capacitively-coupled LC resonator, and show that
using two identical LC tanks makes it possible to get rail-to-rail
voltage swing across both tanks which makes the most of
the available voltage headroom to achieve low phase noise.
Moreover, the transistor network drives both ports of the LC
resonator evenly and stimulates large resonant voltage in both
tanks.
A prototype in a 65 nm low power CMOS process was fabri-
cated and measured. Due to its aforementioned merits, it is able
to cover a wide continuous band of 2.5–5.6 GHz and meet all
stringent phase noise specifications of GSM/EDGE/WCDMA
standards with a low supply voltage of 0.6 V. If used with 2
frequency dividers, it covers all frequencies from DC to 5.6
GHz. It also achieves excellent phase noise figure-of-merit
(FoM) of 192.5 dB at 3.7 GHz and 188 dB across the whole
tuning range. Moreover, the transformer based design leads to
a compact layout. This demonstrates the possibility of getting
low phase noise and wide tuning range at the same time in
scaled CMOS processes.
In the rest of this paper, we will start from the oscillator’s
dual-mode operation in Section II. Then, we will discuss its
phase noise performance in Section III. In Section IV, we will
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1297
study the general case of resonators with inductive/capaci-
tive-coupling in the context of VCO design. In Section V, we
will show a prototype design. Finally, we will conclude in
Section VI.
II. PRINCIPLE OF OPERATION
As illustrated in Fig. 5, the proposed oscillator consists of a
coupled LC resonator and a transistor network. We first discuss
each part separately and then show the conditions to excite each
oscillation mode and damp the other one.
A. LC Resonator
The LC resonator has two identical LC tanks coupled through
and . As a fourth-order system, it has two resonant modes
at different frequencies. We will discuss these modes in an in-
tuitive way here and leave the mathematical analysis of a more
general case to Section IV.
• In even mode, the voltages across the two LC tanks, as well
as the currents in the two coils, have the same amplitude
and are in phase. As illustrated in Fig. 6(a), capacitors
see zero voltage drop and zero current, and thus can be
removed. Since the currents in both coils are in phase, the
effective inductance turns out to be for both LC
tanks. Thus, the even-mode resonant frequency is
found to be
(2)
• In odd mode, the voltages across the two LC tanks, as well
as the currents in the two coils, have the same amplitude
1298 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 47, NO. 6, JUNE 2012

Fig. 6. The two resonant modes of the proposed LC resonator. (a) Even mode and (b) odd mode.

that a balanced performance can be achieved at the two modes,

which will be discussed in more details in Section III.
It is also instructive to show the effect of and graph-
ically. As illustrated in Fig. 8(a), using only separates the
two resonance frequencies, but also makes one peak go up to
while the other drops to .2
Fig. 7. Input impedance of proposed LC resonator. This leads to imbalanced phase noise performance in the two
modes, and this imbalance is coupled with the frequency separa-
tion of the two bands. This is a major problem of oscillators that
but are 180 out of phase. As illustrated in Fig. 6(b), capac- employ only inductive coupling. In our design, this problem is
itors see differential voltage and thus can be broken at dissolved by adjusting and jointly. As shown in Fig. 8(b),
the virtual ground in the middle. Hence, each LC tank sees pushes down and , without affecting and
a series of two , which makes its effective capacitance . Thus, we can separate the two peaks apart in fre-
. Due to the opposite currents, the effective induc- quency and keep their amplitudes the same.
tance turns out to be . Putting everything together,
the odd-mode resonant frequency is, B. Switched Transistor Network
The switched transistor network is used to stimulate the de-
(3) sired resonant mode and damp the other. There are several dif-
ferent implementations on transistor level, and Fig. 5 shows an
NMOS version used in our prototype. As shown in Fig. 9, it
Furthermore, assuming the series resistance of two coils can be modeled as a two-port network described by its ma-
dominates in the resonator’s energy loss, we calculate the equiv- trix. Similar to the LC resonator, it responds differently to even
alent parallel resistance of the two modes of the resonator as and odd mode stimulations. In even mode, voltages
are applied to its two ports. Looking into each port, one sees a
(4) conductance of or . For a symmetric network, these
two are equal and are defined as the even-mode effective con-
(5) ductance , or 2; Similarly, the odd mode
effective conductance is given by , or
2, when are applied. In general, can be dif-
respectively. These two resonant modes correspond to the two
ferent from .
peaks of the resonator’s input impedance shown in Fig. 7. Note
Fig. 10 shows the two setups of the network to stimulate
that the two peaks have amplitudes of and ,
even- and/or odd-mode oscillation. In the second column, when
respectively, in that the total loss of two coils at resonant
the transistor network is switched to stimulate even mode by
frequencies are and
turning off its top pair, we find
.
and . Since and are positive
While is always positive, can be either positive or neg-
values, it is easy to see is negative and has larger ampli-
ative. In general, we prefer for two reasons. First, as
tude , while might become positive (i.e. lossy)
shown in (2) and (3), negative lowers and increases
and has smaller amplitude. This means, the transistor network in
, which enhances ’s effect in increasing the separation
this configuration can inject more energy to the even mode of the
of the two peaks. In contrast, positive cancels ’s effect in
resonator, and less to the odd mode or even take energy from it.
separating the two modes. Secondly, as shown in (4) and (5), by
using negative , it is possible to keep so 2We assume hereafter, in accordance to the implemented prototype.

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LI et al.: A LOW-PHASE-NOISE WIDE-TUNING-RANGE OSCILLATOR BASED ON RESONANT MODE SWITCHING 1299

Fig. 8. Resonator’s input impedance tuned by and . (a) effect of ; (b) effect of . We assume .

Fig. 9. Even- and odd-mode equivalent circuits of symmetric two-port network.

Fig. 10. Even- and odd-mode setup of switched transistor network.

In contrast, when the network is switched to stimulate odd are shown in Fig. 11. If the even-mode effective conductance
mode, the bottom pair is off and the odd mode gets more can compensate the energy loss of even-mode reso-
energy injection, as shown in the third column of Fig. 10. It is nance, which is modeled by two resistors , even-mode
worth noting that, the only difference between top and bottom signal builds up and oscillation starts up. Meanwhile, one also
pairs is the polarity of connections. need to damp the odd mode reliably. This can be done by using
either a negative but not strong enough to compensate
C. Oscillation Conditions , or a positive to absorb energy from the LC res-
onator’s odd mode. Hence, the conditions for even-mode oscil-
As discussed above, both the LC resonator and the transistor lation is found to be
network respond differently to even- and odd-mode signals and
and
have different equivalent circuits in the two modes. This makes (6)
or
it possible to stimulate one mode and damp the other. As il-
lustrated in Fig. 11, when even-mode oscillation is desired, the Note that, both conditions need to be satisfied. Otherwise,
top pair of is turned off and the bottom pair is on. In this concurrent dual-mode oscillation is possible, the phase noise of
case, the equivalent circuits for even- and odd-mode signals which is usually much worse than a single tone. In the same way,

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1300 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 47, NO. 6, JUNE 2012

Fig. 11. Equivalent circuit and oscillation condition for even-mode setup.

we can derive the conditions for odd-mode oscillation, which is III. PHASE NOISE PERFORMANCE
illustrated in Fig. 12 and given by In this section, first we compare the phase noise performance
or of the proposed LC VCO with conventional LC VCOs. Next,
(7) we compare the phase noise of the two resonance modes. Fi-
and
nally, we verify these analyses by simulation. Phase noise per-
In a typical setup, assume mS, mS and formance will be discussed in terms of the widely-used FoM
the two modes have same peak amplitude defined as
, which is possible as discussed in Section II-A. In the case
of even-mode setup in Fig. 11, it is easy to check
(8)
mS and mS, which satisfies the condi-
tions to stimulate even-mode and damp odd-mode signals. If the
transistor network switches to the odd-mode setup in Fig. 12, in which is the phase noise in dBc/Hz and is
mS and mS, which damps the power consumption in mW.
even-mode and stimulates odd-mode signals. This means one
can realize band selection by switching the transistor network. A. Comparison With Conventional LC VCOs
Careful readers might find the transistor network can be sim- As illustrated in Fig. 11 and Fig. 12, the proposed LC VCO
plified by using pairs alone, which still makes the oscil- can be considered as two identical LC VCOs coupled by ,
lator work. We use both and cells to reduce para- and . In theory, coupling oscillators reduces phase
sitic capacitance. This is because each port sees the parasitics noise by a factor of compared to a single oscillator at the cost
of two pairs plus that of , while the effective conduc- of times more power consumption [16]. Hence, the phase
tance is only . In other words, there is always noise FoM keeps constant. This has been demonstrated as an
an idle pair loading the resonator as fixed capacitor. Al- alternative way of trading power for phase noise, which avoids
though it is only a small portion of total parasitics, it does re- scaling inductance down to impractically small values in scaled
duce tuning range at high-frequency end. Thus, small and CMOS process. For instance, 4-coupled oscillators [1], [11] and
large are preferred to reduce parasitics while giving the re- a 2-coupled one [10] were demonstrated to achieve 6 dB and 3
quired . On the other hand, in order to reliably dB phase noise reduction at the cost of 6 dB and 3 dB more
damp the undesired mode, it is best to have so power, respectively.
that . That is, either or is Along this line, we find, in its even mode (Fig. 11), the pro-
positive and thus the undesired mode is damped even in the posed oscillator has 3 dB lower phase noise and the same FoM
presence of process variation. Considering these, we choose as a single-tank VCO with parameters , , and
in our prototype. ; and in odd mode (Fig. 12), it has 3 dB lower phase

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LI et al.: A LOW-PHASE-NOISE WIDE-TUNING-RANGE OSCILLATOR BASED ON RESONANT MODE SWITCHING 1301

Fig. 12. Equivalent circuit and oscillation condition for odd-mode setup.

noise and the same FoM as a single-tank VCO with , loss, one gets . Substituting this into Leeson’s (1),
, and . Note that, both and we get [9]
are equivalent resistors to the coil’s series resistance
as in Fig. 6(a) and Fig. 6(b). It is straightforward to prove this (9)
result by applying impulse sensitivity function (ISF) method [3]
in the same way as in [10]. For the sake of space, we will verify
this result by simulation instead of lengthy mathematical deriva- It follows from (8) and (9) that the phase-noise FoM is related
tion in Section III-C. to circuit parameters as follows:
It is worth noting that, in order to get the 3 dB phase noise im-
provement, coupling between the two halves should be strong (10)
enough to overcome frequency mismatch and keep them run in
unison, i.e. at the same frequency with a desired phase relation.
Even if there is no mismatch, intrinsic electronic noise would On the one hand, as shown in Fig. 6(a) and Fig. 6(b), the
make the phases of two independent VCOs deviate as a random two resonant modes have the same ,3 which is not altered
walk. This actually sets the lowest degree of coupling needed by mode switching. On the other hand, current and
in theory. From another point of view, considering any signal are proportional to in order to get the same loop gain
in the resonator can be uniquely decomposed into its even and and voltage swing . By properly setting and , one can
odd modes that run at different frequencies, the requirement of make and thus the same for the
two tanks in unison is satisfied if the undesired mode is com- two modes. Therefore, the two modes can achieve the same
pletely damped. This is guaranteed by the oscillation conditions FoM, which will be verified by simulation and prototype mea-
in (6) and (7). Note that, these conditions require a large , surement. It is worth noting that by having ,
i.e. strong coupling between two tanks, to damp the undesired one actually gets the same Q at the two different resonant
mode. frequencies.

B. Comparison Between Two Oscillation Modes C. Verification by Simulation

Intuitively, one might expect one mode has better phase noise
performance than the other, in that the Q of inductor is enhanced
in one mode and degraded in the other. However, it turns out that
the two mode have the same phase noise FoM. Assuming the
series resistance of inductor dominates in LC tank’s power
These analyses can be readily verified by simulation. For in-
stance, we simulated a dual-mode oscillator and its single-tank
3This analysis assumes is constant in the frequency range of interest. This
assumption is not valid at higher frequencies where skin effect and parasitic
capacitance manifest.

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1302 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 47, NO. 6, JUNE 2012

Fig. 14. Schematic of inductively and capacitively coupled LC tanks.

IV. DISCUSSION ON GENERAL COUPLED LC RESONATORS

In Section II-A, we introduced the two modes of a symmetric
LC resonator in an intuitive way. In this section, we will study
the general case of inductively/capacitively-coupled LC tanks
as illustrated in Fig. 14 which can be asymmetric. This analysis
leads to a better understanding of the resonator and explains
some advantages of the symmetric tanks, i.e. and
, for VCO design.
In general, a lossless resonator4 can be modeled as a multi-
port network and described by its frequency-dependent admit-
tance matrix . At resonance, there is no current flowing
into any of the ports although the port voltages are non-zero,
which means zero energy exchange with outside. That is,
Fig. 13. Comparison between dual-band oscillator and its half-circuit has non-zero solutions of at resonance. By
single-tank oscillators by SpectreRF simulation. (a) Simulated impulse sensi- Linear Algebra, has non-zero solutions if and
tivity function (ISF). (b) Summary of simulation results.
only if the determinant of is zero, i.e. . By
solving this equation we can find the resonant frequency ,
counterparts. In the dual-mode oscillator, each coil of the trans- and by solving we can get the resonant voltages.
former has an inductance of nH with series resistance of Along this line, we can analyze the resonator in Fig. 14. To
, and the coupling coefficient is . get more insight from this derivation, we define the effective
We use pF and pF, such that the two capacitance for each LC tank and the neutral resonant frequency
resonant modes have the same loss, i.e. ac- as
cording to (4) and (5). The even-mode half circuit is a single
LC tank oscillator that uses an inductor of nH (11)
and a capacitor of pF; and the odd-mode half cir-
cuit uses an inductor of nH and a capacitor (12)
of pF. In both half circuits, the inductor has
series resistance of . Fig. 13(a) shows the ISF’s of (13)
the dual-mode oscillator and its half circuit in odd mode. The
root mean square (rms) amplitude of the dual-mode oscillator’s
Furthermore, we define the capacitive and inductive coupling
ISF is exactly half of its single-tank counterpart. The same com-
factors to be
parison result also holds for even mode, and we will not show
similar plots here for the sake of space. Fig. 13(b) summarizes
the phase noise results by SpectreRF simulation. The dual-mode (14)
oscillator achieves 3 dB lower phase noise at the cost of twice
the power consumption (i.e. 3 dB more power) compared to (15)
its half-circuit counterparts in both even- and odd-mode op-
erations; and the phase noise FoM is the same for even- and
odd-mode oscillations. with and , and define the asymmetry
Based on this discussion, one can readily convert the pa- factors to be
rameters calculated for the conventional LC VCO to those of
the dual-band VCO. For instance, the 0.44 nH inductor needed (16)
in conventional LC VCO for GSM in 1.2 V process can be
(17)
converted to 0.88 nH with the same Q for the dual-band VCO,
which meets the same phase noise requirement at the same (18)
power budget. But nH is more feasible than 0.44 nH 4A lossless resonator can model a lossy but high-Q resonator whose loss is
at 3.69 GHz, considering the low-Q parasitic inductance of the exactly compensated by active devices. To analyze a low-Q resonator, a more
capacitor bank. detailed model is needed.

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LI et al.: A LOW-PHASE-NOISE WIDE-TUNING-RANGE OSCILLATOR BASED ON RESONANT MODE SWITCHING 1303

Based on these definitions, the Y matrix of the resonator in

Fig. 14 is found to be

(19)
By solving , we can find two resonant frequencies:

(20)

in which
(21)
(22)

Next, by solving , we can find the ratio of resonant

voltages of the two tanks:
Fig. 15. Photo of chip.
(23)
and reduces to and in Section II-A. Considering
the larger of and is limited by supply and break down
and the ratio of currents in the two coils of the transformer: voltages of the process, is desirable to make full use
of the available voltage headroom on both sides of the resonator
(24) to achieve low phase noise.
To sum up, although both mutual coupling, i.e. or
It is straightforward to see from (22) that with “ ” , and asymmetry, i.e. , , , can lead to two modes
if and only if and . Also based on (20) and (21), at different frequencies, the symmetric case with coupling as
we find , which guarantees the existence of two resonant demonstrated in Fig. 5 is preferable for VCO design, for simpler
modes. These two modes have different frequencies as long as buffering and potentially lower phase noise.
. This requires either , i.e. the inductive and capac-
itive couplings do not cancel each other, or , i.e. the two
LC tanks are not symmetric. Besides, since , and V. A 2.5–5.6 GHZ PROTOTYPE FOR CELLULAR APPLICATIONS
must be real numbers. Thus, the resonant voltages, as In this section, we will present a prototype of the proposed de-
well as the coil currents, must be either in-phase or 180 out of sign in a 65 nm low power CMOS process. The die photo is shown
phase. No other phase relation is possible. in Fig. 15 and it takes 0.294 mm . It covers all cellular bands with
In the special case of , i.e. , we have a continuous tuning range of 2.5–5.6 GHz and meets all strin-
much simplified expressions: gent phase noise requirements of cellular standards. It uses a core
supply ofonly 0.6 V, which limitsthe resonantvoltageswingto1.2
(25) V. Digital control uses 1.2 V supply and does not consume static
power. Varactors are tuned from 0 to 1.2 V. Thus, it is fully com-
(26) patible with standard 65 nm CMOS devices, and demonstrates the
possibility of achieving low phase noise and wide tuning range
(27) at the same time in scaled CMOS processes.

Clearly, is the same for two modes, which is a desir-

A. Parameter Selection
able property of for VCO design. If , according
to (23) it is usually the case that in one mode but Cellular standards have very stringent phase noise require-
in the other. This makes the buffer design chal- ments. For instance, phase noise of 155 dBc/Hz at 20 MHz
lenging, in that the swing of each coil is small in one of the two offset from 3.69 GHz, required by SAW-less GSM, is one of
modes and thus two sets of buffers might be needed, i.e. one for the most challenging specifications. Conventional designs often
each mode. In contrast, in the case of , only one set of rely on large voltage swing across LC tank to get such low phase
buffer is needed, since one coil has larger voltage swing than noise, which necessitates the use of thick oxide devices with high
the other in both modes. breakdown voltage. We target a design fully compatible with
Furthermore, if , i.e. the resonator is sym- standard 65 nm CMOS devices, which requires the peak voltage
metric, we have swing to be no larger than 1.2 V. So we use 0.6 V supply for
the NMOS core to limit the resonator’s voltage swing to 1.2 V.
(28) According to Leeson’s Equation, the tank inductance should
(29) be at most 0.44 nH in the case of conventional single LC tank

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1304 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 47, NO. 6, JUNE 2012

Fig. 17. Simulated input impedance of the resonator when CT sweeps.

Fig. 16. Post layout simulation results of capacitor bank. Parasitic resistance
and capacitance are extracted at DC. Parasitic inductance of metal connections
is not included in this simulation.

oscillator.5 As discussed in Section III, each coil in the proposed

structure should have an inductance no more than 0.88 nH. We
choose 0.8 nH in the prototype to leave some design margin.
There are two considerations in determining the coupling
components, i.e. and . First, odd mode has smaller
tuning range than even mode due to the coupling capacitor ,
because it loads the odd mode as fixed capacitor but not the
even mode. So, should be kept small to get large contin-
uous tuning range in both bands. Second, although either
or can separate the two bands apart, using both of them
properly can lead to a balanced performance in the two bands
as discussed in Section III. After a few iterations, we selected
, and , in which
and are the maximum and minimum values of the
shunt capacitor array . The coarse tuning of the capacitor
is performed by control words CT<6:0> while the fine tuning
is done by MOS varactors as shown in Fig. 5. The simulated
Fig. 18. Illustration of the proposed resonator’s layout, and direction of current
quality factor of the capacitor bank is shown in Fig. 16, which in odd resonant mode.
includes parasitic resistance and capacitance extracted at DC.
The Q remains above 30 at 4 GHz for all control words. It is
worth noting Q gets higher at high frequency, because most B. Layout Considerations
switches are off and it mostly consists of high-Q parasitic
A major challenge in layout is the implementation of trans-
capacitance [20], [21]. The resonator’s input impedance
former. We want its two ports to be on the same side to facilitate
is simulated and shown in Fig. 17. The two modes cover
connection with and . Besides, the two coils are sup-
2.5–3.9 GHz and 3.3–5.6 GHz, respectively, leading to a
posed to have the same inductance and be weakly coupled. We
whole continuous tuning range of 2.5–5.6 GHz. Considering
designed the transformer as shown on the top half of Fig. 18. It
GHz GHz, this oscillator and its following 2 fre-
has a one-turn primary coil and a two-turn secondary coil nested
quency dividers can cover all frequencies from DC to 5.6 GHz.
inside. Both coils are implemented on the 3.4 m-thick top
Meanwhile, the two modes have roughly the same energy loss,
metal and use wide metal traces for the best quality factor. Elec-
in that their peaks have their amplitudes in the same range.
tromagnetic simulation results using Ansoft HFSS are shown in
Note that the 600 MHz band overlap was a conservative design
Fig. 19. The inductance of the secondary coil is designed to be
to guarantee continuous frequency coverage even if modeling,
a little smaller than the primary one, i.e., 0.77 nH vs. 0.81 nH at
especially that of the capacitor bank to be discussed below, is
4 GHz, considering the long connection to its capacitor array in-
inaccurate. But it turned out to be unnecessary.
troduces extra inductance. The primary and secondary coils are
5Refer to footnote 1. optimized to achieve high quality factors of 26 and 20 at 4 GHz,

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LI et al.: A LOW-PHASE-NOISE WIDE-TUNING-RANGE OSCILLATOR BASED ON RESONANT MODE SWITCHING
Fig. 19. Electromagnetic simulation result of transformer using Ansoft HFSS.
TABLE I
SUMMARY OF MEASUREMENT RESULTS
* 3.31GHz–3.88GHz is covered by odd mode for its smaller current consump-
tion.
respectively. The coupling factor is 0.22 and keeps constant
in the band of interest.
Another challenge is that the capacitor array is large and intro-
duces significant parasitics due to the series inductance and re-
sistance of metal traces. This not only degrade the quality factor
of the resonator, but also makes it hard to predict oscillation fre-
quency accurately through simulation. We adopt a layout on the
bottom half of Fig. 18. In each row of capacitors, adjacent metals
have opposite currents, which cancels the magnetic field of each
other and hence reduces their effective inductance. For instance,
HFSS simulation shows two parallel metal traces with width of
6 m and spacing of 15 m have a magnetic coupling coeffi-
cient of 0.66, which means their effective inductance reduces to
34% of a single wire if they carry opposite currents. Although
there is magnetic coupling between all metal traces, we found
modeling coupling between adjacent traces is enough to give an
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1305
Fig. 20. Measured frequency tuning range.
Fig. 21. Measured DC current from 0.6 V power supply.
accurate prediction of frequency, while a complete E/M simu-
lation of the whole lattice is time consuming and unnecessary.
A major concern regarding this layout might be the inevitable
asymmetry between the primary and secondary tanks. Fortu-
nately, we found it not quite sensitive to slight asymmetry. In
particular, we leave the freedom to set different control words
to the two capacitor arrays . When their difference varies
within 15 LSB, we did not observe significant change in phase
noise performance in simulation and measurement, which veri-
fies the robustness of the proposed design.
C. Measurement
The prototype was measured using Agilent E5052B signal
source analyzer, and the results are summarized in Table I. The
frequency tuning curve is plotted in Fig. 20 as a function of dig-
ital control word CT<6:0>. It confirms the continuous coverage
of 2.5–5.6 GHz and is close to the simulation results in Fig. 17,
which verifies our modeling in simulation. The varactors lead to
an analog tuning gain of 33 MHz/V within each control word,
and significant band overlap between adjacent control words.
Fig. 21 shows the VCO’s DC current from a constant 0.6 V
power supply at different frequencies. The VCO consumes the
same amount of power in the two modes, as predicted by the same
peak amplitudes at the two modes in Fig. 17. As discussed above,
the low frequency end of each mode has the highest power con-
sumption. The power consumption varies between 9.8 mW and
14.2 mW across the tuning range. The variation in DC current is
1306 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 47, NO. 6, JUNE 2012

TABLE II
TABLE OF COMPARISON

Fig. 22. Measured phase noise in even mode, with CT<6:0>
CT<6:0> (bottom), respectively.
small compared to other wide-tuning-range designs in Table II.
This is desirable as it simplifies the design of the active core.
Measurement also shows excellent phase noise performance.
Figs. 22 and Fig. 23 show the measured phase noise curves
at even-mode and odd-mode oscillation with different control
words. Fig. 24 plots the phase noise and FoM at 1 MHz and
(top) and
Fig. 23. Measured phase noise in Odd mode, with CT<6:0> (top) and
CT<6:0> (bottom), respectively.
20 MHz offset across the tuning range. All measurement was
done with 0.6 V control voltage at fine-tune varactors, which
is the most sensitive setup to noise and gives the worst phase
noise reading. It meets all stringent phase noise specifications of
cellular standards. In particular, 155 dBc/Hz@20 MHz offset

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LI et al.: A LOW-PHASE-NOISE WIDE-TUNING-RANGE OSCILLATOR BASED ON RESONANT MODE SWITCHING
Fig. 24. Measured phase noise and FoM at 1 MHz and 20 MHz offset frequency.
from 3.69 GHz carrier required by SAW-less GSM can be sat-
isfied by both-even and odd mode-oscillation. It has excellent
FoM of 188 dB at 20 MHz offset across the tuning range. It is
worth noting that the two modes achieve the same good FoM as
a result of the joint use of and as discussed above, which
verifies our analysis.
Compared with state-of-the-art designs in Table II, this
work achieves the lowest phase noise and the best FoM with
the lowest supply voltage. Note that, in real applications, a
low-dropout (LDO) regulator might be needed to generate and
tune the 0.6 V power supply. Even after taking into account
the few hundreds mV voltage headroom and 1 2 dB power
consumption of the LDO, this work still compares favorably
with others. Moreover, it has virtually the widest tuning range
needed in practice, because it can cover all frequencies from
DC up to 5.6 GHz if used together with a chain of 2 dividers.
Thus, the proposed design demonstrates the possibility of
achieving low phase noise and wide tuning range at the same
time in scaled CMOS processes.
VI. CONCLUSION
In this paper, we presented a novel mode-switching oscillator
for wide-tuning-range low-phase-noise applications in scaled
CMOS process. It was verified by a prototype in 65 nm CMOS,
which covers a wide band of 2.5–5.6 GHz and meets all strin-
gent cellular phase noise specifications. A detailed analysis of
its performance and a general study of coupled LC resonator
were also presented.
ACKNOWLEDGMENT
The authors would like to thank Chiewcharn Narathong with
Qualcomm Inc., San Diego, CA, for helpful technical discus-
sions, and TSMC University Shuttle Program for chip fabrica-
tion.
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1307
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Guansheng Li received the B.Sc. and M.Sc. degrees
in electronic engineering from Tsinghua University,
Beijing, China, in 2005 and 2007, respectively. He
received his Ph.D. degree in Electrical and Computer
Engineering from Cornell University, Ithaca, NY, in
2012.
In 2010, he was an intern with Qualcomm Inc.,
San Deigo, CA, where he designed wide tuning range
VCO for cellular transceivers. His current research
is mainly on RF/analog/mixed-signal integrated cir-
cuits, with a special interest in low phase noise os-
cillators and frequency synthesizers. He also conducted research on wireless
communications and networking at Tsinghua University, studying wireless net-
work coding and cross-layer optimization of wireless networks.
Dr. Li serves as a reviewer for IEEE TRANSACTIONS ON CIRCUITS AND
SYSTEMS, IEEE TRANSACTIONS ON WIRELESS COMMUNICATIONS and IEEE
SENSORS JOURNAL. In 2007, he was named as a Jacobs Scholar at Cornell
University.
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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 47, NO. 6, JUNE 2012
Li Liu received the B.Eng. degree from the Uni-
versity of Science and Technology of China, Hefei,
China, in 1996, and the M.Eng. degree from the
National University of Singapore, Singapore, 2000,
both in electrical engineering.
From 1997 to 1999, he was involved in GaAs
RFIC design and device modeling in the Institute
of Microelectronics and National University of
Singapore. From 1999 to 2000, he was with Center
for Wireless Communication Singapore designing
RF front-end circuits for communication system.
From 2000 to 2001, he was with North Carolina State University, where he did
research on millimeter-wave power combining. From 2001 to 2004, he was
with Triquint Semiconductor Boston Design Center, where he designed SiGe
transmitter IC and GaAs power amplifiers and modules. Since 2004, he has
been with Qualcomm Inc., San Diego, CA, where he has been designing RF
transceiver and frequency synthesizer for GSM/CDMA/EVDO/WCDMA/LTE
systems. He is currently a Senior Staff Engineer/Manager at Qualcomm.
Yiwu Tang (M’01) received the B.S. and M.S.
degrees in electronic engineering from Tsinghua
University, Beijing, China, in 1994 and 1996, respec-
tively. She received the Ph.D. degree in electrical
engineering from The Ohio State University in 2001.
Since 2001, she joined Qualcomm RF IC design
group where she is now a Principal Engineer and
Manager. At Qualcomm, she is focused on RF IC
design for 2G, 3G and 4G wireless transceivers. Her
research interests include receivers, transmitters and
frequency synthesizers.
Ehsan Afshari (S’98-M’07-SM’11) received the
B.Sc. degree in electronics engineering from the
Sharif University of Technology, Tehran, Iran,
and the M.S. and Ph.D. degrees in electrical engi-
neering from the California Institute of Technology,
Pasadena, in 2003 and 2006, respectively.
In August 2006, he joined the faculty in Electrical
and Computer Engineering at Cornell University,
Ithaca, NY. His research interests are mm-wave
and terahertz electronics and low-noise integrated
circuits for applications in communication systems,
sensing, and biomedical devices.
Prof. Afshari serves as the chair of the IEEE Ithaca section, as the chair of Cor-
nell Highly Integrated Physical Systems (CHIPS), as a member of International
Technical Committee of the IEEE Solid-State Circuit Conference (ISSCC), as
a member of the Analog Signal Processing Technical Committee of the IEEE
Circuits and Systems Society, as a member of the Technical Program Com-
mittee of the IEEE Custom Integrated Circuits Conference (CICC), and as a
member of Technical Program Committee of the IEEE International Conference
on Ultra-Wideband (ICUWB). He was awarded National Science Foundation
CAREER award in 2010, Cornell College of Engineering Michael Tien excel-
lence in teaching award in 2010, Defense Advanced Research Projects Agency
(DARPA) Young Faculty Award in 2008, and Iran’s Best Engineering Student
award by the President of Iran in 2001. He is also the recipient of the best paper
award in the Custom Integrated Circuits Conference (CICC), September 2003,
the first place at Stanford-Berkeley-Caltech Inventors Challenge, March 2005,
the best undergraduate paper award in Iranian Conference on Electrical Engi-
neering, 1999, the recipient of the Silver Medal in the Physics Olympiad in
1997, and the recipient of the Award of Excellence in Engineering Education
from Association of Professors and Scholars of Iranian Heritage (APSIH), May
2004.