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Analog Circuits

Course Code: EC 403

B.Tech, Semester IV

Prepared by:
Dr. Hemant S. Goklani

Indian Institute of Information Technology Surat


UNIT 2
Nonlinear Circuits, Signal Generators and Waveform-
Shaping Circuits
Comparators
 A comparator is a specialized nonlinear op-amp circuit that compares
between two input voltages and produces an output state that indicates
which one is greater

 Comparators are designed to be fast and frequently have other capabilities


to optimize the comparison function

 In this application, the op-amp is used in the open-loop configuration, with


the input voltage on one input and a reference voltage on the other
Comparators
 One application of an op-amp used as a comparator is to determine when an
input voltage exceeds a certain level

1. Zero-Level Detection
2. Nonzero-Level Detection
Zero level detection
 In the zero level detector circuit; the inverting (-) input is grounded to
produce a zero level (reference to compare with) and the input signal voltage
is applied to the non inverting (+) input

 Since Vin is at non inverting input (as shown in circuit):

 Any Vin above the zero will produce a +ve saturated output (+Vout(max) )

 Any Vin below the zero will produce a –ve saturated output (-Vout (min) )
Zero level detection
 Saturation of the output is due to the open-loop op-amp that have a very
high voltage gain → very small difference voltage between the two inputs
drives the amplifier into saturation (non linear operation)
Non zero level detection
 The reference voltage can be set to non zero voltage (+ve or -ve) by
 Adding a dc voltage or
 Voltage divider or
 Zener diode reference
Non zero level detection
 As shown in the output voltage for given input (sine wave)

 Any voltage above VREF --- Vout will be saturated +ve (Vout(max))
 Any voltage Below VREF --- Vout will be saturated -ve (Vout(min)
Example
 For the given comparator and input signal, draw the output showing its
proper relationship to the input signal. Assume the maximum output levels of
the comparator are ±14 V.
Solution
Effects of Input Noise on Comparator Operation
 In many practical situations, noise (unwanted voltage fluctuations) appears
(superimposed) on the input line, which causes an erratic output voltage

 When the sine wave approaches 0, the fluctuations due to noise may cause
the total input to vary above and below 0 several times, thus producing an
erratic output voltage as shown fig.
Reducing Noise Effects with Hysteresis
 Hysteresis is incorporated by adding regenerative (positive) feedback, which
creates two switching points: the upper trigger point (UTP) and the lower
trigger point (LTP)

 After one trigger point is crossed, it becomes inactive and the other one
becomes active
Reducing Noise Effects with Hysteresis
 Hence, the device triggers only once when UTP or LTP is reached as shown;
thus, there is immunity to noise that is riding on the input signal

 The amount of hysteresis is defined by the difference of the two trigger levels

 A comparator with built-in hysteresis is sometimes known as a Schmitt trigger


Example
 Determine the upper and lower trigger points for the comparator circuit in
figure. Assume that +Vout(max) = +5 V and -Vout (max) = -5V.
Solution
Output Bounding
 In some applications, it is necessary to limit the output voltage levels of a
comparator to a value less than that provided by the saturated op-amp

 A process of limiting the output called bounding can be used by adding a


single zener diode to limit the output voltage to the zener voltage in one
direction and to the forward diode voltage drop in the other direction
Output Bounding
 If zener anode is connected to inverting input (virtual ground, V = 0)
 When Vout is +ve, zener is reverse → Vout = +VZ
 When Vout is –ve, zener is forward → Vout = -0.7V
 Positive bounded output
Output Bounding
 If zener is reversed, the result will be the inverse → negative bounded out put
Output Bounding
 Positive and negative bounded out put can be obtained by putting two back
to back zeners as shown
Example
 Determine the output voltage waveform for the given circuit.
Solution
 We have zener diodes between input and output → Bounded output.
 But we have feedback to (+) op-amp input → we have also hysteresis voltages
 Since input voltage is at inverting (-) input → V at (–) = V at (+) = hysteresis
voltage → Hence Vout will be Vzeners + V hysteresis
Output
Voltage-Controlled Oscillator (VCO)
 A Voltage-Controlled Oscillator (VCO) is a circuit that provides a varying
output signal (typically of square-wave or triangular-wave form) whose
frequency can be adjusted over a range controlled by an externally applied
DC voltage

 The VCO provides a linear relationship between the applied voltage and the
oscillation frequency

 The applied voltage is called control voltage

 The control of frequency with the help of control voltage is known as voltage
to frequency conversion. Hence VCO is otherwise known as Voltage to
frequency converter
VCO IC - IC 566 (LM 566/ SE 566)
 IC 566 contains circuitry to generate both square wave and triangular-wave
signals whose frequency is set by an external resistor and capacitor and then
varied by an applied dc voltage

 The frequency of the Square and Triangular waves are function of the input
voltage applied at Pin 5. This input voltage is also called as Modulating Input
voltage

 The Frequency of the output voltage is determined by R1 , C1 and Control


Voltage Vc
IC 566 - Pin Configuration
IC 566
 The 566 contains current sources to charge and discharge an external
capacitor C1 at a rate set by external resistor R1 and the control dc input
voltage

 A Schmitt trigger circuit is used to switch the current sources between


charging and discharging the capacitor, and the triangular voltage developed
across the capacitor and square wave from the Schmitt trigger are provided
as outputs through buffer amplifiers
Voltage-Controlled Oscillator
 The capacitor c1 is linearly
charged or discharged by a
constant current source/sink

 The amount of current can be


controlled by changing the voltage
Vc applied at the modulating input
(pin 5) or by changing the timing
resistor R1 external to the IC chip

 The voltage at pin 6 is held at the


same voltage as pin 5. Thus, if the
modulating voltage at pin 5 is
increased, the voltage at pin 6 also
increases, resulting in less voltage
across R1 and thereby decreasing
the charging current
VCO
 The voltage across the capacitor C1 is applied to the inverting input terminal of
Schmitt trigger via buffer amplifier

 The output voltage swing of the Schmitt trigger is designed to Vcc and 0.5 Vcc. If Ra =
Rb in the positive feedback loop, the voltage at the non-inverting input terminal of
Schmitt trigger swings from 0.5 Vcc to 0.25 Vcc

 When the voltage on the capacitor c1 exceeds 0.5 Vcc during charging, the output of
the Schmitt trigger goes LOW (0.5 Vcc)

 The capacitor now discharges and when it is at 0.25 Vcc, the output of Schmitt
trigger goes HIGH (Vcc). Since the source and sink currents are equal, capacitor
charges and discharges for the same amount of time

 This gives a triangular voltage waveform across c1 which is also available at pin 4.
The square wave output of the Schmitt trigger is inverted by buffer amplifier at pin
3. The output waveforms are shown near the pins 4 and 3
Output frequency
 The output frequency(A free-running or center-operating frequency) of the
VCO can be given as follows:

 with the following practical circuit value restrictions:


Example
 For the given circuit determine
a) Control voltage Vc
b) Free running frequency fo
Solution
Phase Locked Loop (PLL)
 A phase-locked loop (PLL) is an electronic circuit that consists of

A phase detector
A low-pass filter and
A voltage-controlled oscillator

 The closed-loop operation of the PLL circuit is to maintain the VCO frequency
locked to that of the input signal frequency
Applications of PLL
 Frequency synthesizers that provide multiples of a reference signal frequency

 FM demodulation networks for FM operation with excellent linearity


between the input signal frequency and the PLL output voltage

 Demodulation of the two data transmission or carrier frequencies in digital-


data transmission used in frequency-shift keying (FSK) operation

 Wide variety of areas including modems, telemetry receivers and


transmitters, tone decoders, AM detectors, and tracking filters
PLL Block diagram
Basic Operation of PLL
 Capture and Lock operation:

 Within a capture-and-lock frequency range, the dc voltage will drive the VCO
frequency to match that of the input

 While the loop is trying to achieve lock, the output of the phase comparator
contains frequency components at the sum and difference of the signals
compared

 A low-pass filter passes only the lower frequency component of the signal, so
that the loop can obtain lock between input and VCO signals.
Lock operation
 Input signal frequency is the same as that from the VCO

 Best operation is obtained if the VCO center frequency fo is set with the dc
bias voltage midway in its linear operating range

 The amplifier allows this adjustment in dc voltage from that obtained as


output of the filter circuit

 When the loop is in lock, the two signals to the comparator are of the same
frequency, although not necessarily in phase

 A fixed phase difference between the two signals to the comparator results in
a fixed dc voltage to the VCO

 Changes in the input signal frequency then result in change in the dc voltage
to the VCO
Lock operation
 Owing to the limited operating range of the VCO and the feedback connection
of the PLL circuit, there are two important frequency bands specified for a PLL

 The capture range of a PLL is the frequency range centered about the VCO
free-running frequency fo over which the loop can acquire lock with the input
signal

 Once the PLL has achieved capture, it can maintain lock with the input signal
over a somewhat wider frequency range called the lock range
Applications
1. Frequency Demodulation

 The PLL center frequency is selected or designed at the FM carrier frequency

 The filtered or output voltage is the desired demodulated voltage, varying in


value in proportion to the variation of the signal frequency

 The PLL circuit thus operates as a complete intermediate-frequency (IF) strip,


limiter, and demodulator as used in FM receivers
External capacitor C2 is
IC 565 used to set the low-pass
filter passband

An external resistor
and capacitor R1 and
C1 , respectively, are
used to set the free-
running or center
frequency of the VCO
Applications
 One popular PLL unit is the 565,which contains a phase detector, an amplifier,
and a voltage-controlled oscillator, which are only partially connected
internally

 An external resistor and capacitor R1 and C1 , respectively, are used to set the
free-running or center frequency of the VCO. Another external capacitor, C2 ,
is used to set the low-pass filter passband, and the VCO output must be
connected back as input to the phase detector to close the PLL loop. The 565
typically uses two power supplies, V+ and V-
PLL connected to work as an FM demodulator
FM demodulation
FM demodulation
Frequency Synthesizer

 A frequency synthesizer can be built


around a PLL

 A frequency divider is inserted between


the VCO output and the phase
comparator so that the loop signal to
the comparator is at frequency fo and
the VCO output is Nfo

 This output is a multiple of the input


frequency as long as the loop is in lock

 The input signal can be stabilized at f1


with the resulting VCO output at Nf1 if
the loop is set up to lock at the
fundamental frequency (when fo = f1)
FSK Decoders
 The decoder receives a signal at one of two distinct carrier frequencies, 1270 Hz or
1070 Hz, representing the RS-232C logic levels or mark (-5 V) or space (+14 V),
respectively

 As the signal appears at the input, the loop locks to the input frequency and tracks it
between two possible frequencies with a corresponding dc shift at the output
Thank You

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