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Abstract:

Numerous logic circuits may be found in modern electronics. Logic circuits are designed to carry out a
variety of tasks. Different logic gates may be found in logic circuits. With its assistance, it can carry out a
number of logical or mathematical processes. In this exercise, a logic circuit will be created utilizing
several gates and a demultiplexer to solve an issue. A security door will be controlled by the circuit. Only
when Mr. Salim (ill person), Son, Akita (Dog) are present or if at least one of them with their security
guard then there will the door open and flash light shows(Green, Bule) if not then it will show warning.
With the use of K-Map, an equation, truth table, and expression will be generated. Different ICs will be
used to build the circuit, and the output will be monitored and compared.

Theory:

Digital signals convey information in binary format where each bit represents two distinct amplitudes.
This means that digital signals are fairly immune to the imperfections of real electronic systems. Digital
signals can be processed by digital circuit components, which are cheap and easily produced in many
components on a single chip. The noise immunity of digital systems permits data to be stored and
retrieved without degradation.

Table 01: About AND Gate, OR Gate and Demultiplexer.

AND Gate OR Gate


The AND operation produces a high if and only if all The OR operation produces a high output
the inputs are high. An AND gate can have two or when any of the inputs are high. It has two or
more inputs and performs AND operation or logical more inputs and one output which performs
multiplication [1]. OR operation or logical addition [1].
U4A U5A

7408J 7432N
Figure 01: Symbol of AND gate Figure 02: Symbol of OR gate
Logical Expression: Logical Expression:
Y = AB Y = A+B
Truth Table: Truth Table:
Input Output Input Output
A B Y A B Y
0 0 0 0 0 0
0 1 0 0 1 1
1 0 0 1 0 1
1 1 1 1 1 1

Demultiplexer
A demultiplexer (or demux) is a device taking a single input and selecting one of many data-output-
lines, which is connected to the single input [2].
Truth Table:

S0 Y1 Y0

0 0 I

1 I 0

Boolean function for output,


Y0=S0'.A, Y1=S0.A

Figure 03: 1 to 2 Demultiplexer

Apparatus:
1. Digital trainer board.
2. AND Gate - IC 7408 [3 pcs]
3. OR Gate – IC 7432 [2 pcs]
4. NOT Gate - IC 7404 [1 pcs]

Experimental procedure:

1. The circuit was connected in accordance with the diagrams.


2. The trainer board's toggle switches were family members and security guard to supply input signals to
the circuits. The LED on the trainer board was linked to the outputs.
3. Output signals were monitored and recorded after input signals were applied.
Simulation:
Figure 04: Security door operating system with combination logic circuit simulation setup.

Experimental Results:

Table 02: In this truth table Here A ,B, C are input from
Mr. Salim, Son, Dog and D, E are from Security Guard.

Input Output
Table 03: Demultiplexer (1 to 2)

S Y Door Open Warning


0 0 0 0
0 1 0 1
1 0 0 0
1 1 1 0

Expression minimize state,


Y = CE+CD+BE+BD+AE+AD+ABC

Experiment Result:
Table 04: K-Map (Karnaugh Map)

DE 00 01 11 10 DE 00 01 11 10
ABC ABC
000 0 0 0 0 000 0 1 3 2
001 0 1 1 1 001 4 5 7 6
011 0 1 1 1 011 12 13 15 14
010 0 1 1 1 010 8 9 11 10
100 0 1 1 1 100 16 17 19 18
101 0 1 1 1 101 20 21 23 22
111 1 1 1 1 111 28 29 31 30
110 0 1 1 1 110 24 25 27 26

Table 05: Groups

(5,7,13,15,21,23,29,31) C.E
(6,7,14,15,22,23,30,31) C.D
(9,11,13,15,25,27,29,31) B.E
(10,11,14,15,26,27,30,31 B.D
)
(17,19,21,23,25,27,29,31 A.E
)
(18,19,22,23,26,27,30,31 A.D
)
(28,29,30,31) A.B.C
K-Map Expression,

SOP Expression,
Y = CE+CD+BE+BD+AE+AD+ABC
S.SOP Expression,
Y= CE(A+A’) (B+B’) (D+D’) + CD(A+A’) (B+B’) (E+E’) + BE(A+A’) (C+C’) (D+D’) + BD(A+A’)
(B+B’) (C+C’) +AE(B+B’) (C+C’) (D+D’) + AD(B+B’) (C+C’) (E+E’) + ABC(D+D’) (E+E’)

POS Expression,
Y= (D+E+A) (D+E+B) (D+E+C) (A+B+C)
S.POP Expression,
Y= (D+E+A+B+C) (D+E+A+B+C’) (D+E+A+B’+C) (D+E+A+B’+C’)(D+E+B+A+C)
(D+E+B+A+C’) (D+E+B+A’+C) (D+E+B+A’+C’) (D+E+C+A+B) (D+E+C+A+B’) (D+E+C+A’+B)
(D+E+C+A’+B’) (A+B+C+D+E) (A+B+C+D+E’) (A+B+C+D’+E) (A+B+C+D’+E’)

Hardware Setup:

Figure 05: Security door operating system with combination logic circuit Hardware setup.

Discussion & Conclusion:

A logic circuit was created for this experiment using a particular use case and expression. On a trainer
board, several ICs were used to build the circuit, and NI Multisim was used to mimic the comparator. The
circuit now includes a demultiplexer circuit. Gates were biased correctly, and ICs and pins were linked
and connected appropriately. By adding power to the gate's input pins, the circuit received power and
received inputs. There were some issues due to which the output lights dimmed but this has been resolved
later. The output was then seen after the input was given to the circuits in accordance with the truth table.
The result was an exact match for both the logic statement and the truth table. Additionally, no errors
were discovered, and all the signals were shown correctly.

Reference:

[1] “Basic Gates and Functions”, www.ee.surrey.ac.uk/Projects/CAL/digital-logic/gatesfunc/index.html#andgate.


[Accessed 28 Feb 2023].
[2] “De-multiplexer in Digital Electronics - Javatpoint,” https://www.javatpoint.com/de-multiplexer-digital-
electronics [Accessed 28 Feb 2023].

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