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® STD30NE06L

N - CHANNEL 60V - 0.025 Ω - 30A TO-252


STripFET POWER MOSFET
TYPE VDSS R DS(on) ID
STD30NE06L 60 V < 0.03 Ω 30 A
■ TYPICAL RDS(on) = 0.025 Ω
EXCEPTIONAL dv/dt CAPABILITY

■ 100% AVALANCHE TESTED


( s )
■ LOW GATE CHARGE 100oC
APPLICATION ORIENTED
c t
u 3

CHARACTERIZATION
ADD SUFFIX "T4" FOR ORDERING IN TAPE
o d )
1

r

& REEL
P t ( s DPAK
DESCRIPTION
t e u c TO-252

l
This Power MOSFET is the latest development of
STMicroelectronics unique "Single Feature
o e o d
(Suffix "T4")

b s
Size" strip-based process. The resulting transi-
stor shows extremely high packing density for low P r
O
on-resistance, rugged avalanche characteristics
- e t e INTERNAL SCHEMATIC DIAGRAM

s
markable manufacturing reproducibility.
o l
and less critical alignment steps therefore a re-
)
APPLICATIONS
c t ( b s

d u
HIGH CURRENT, HIGH SPEED SWITCHING
■ SOLENOID AND RELAY DRIVERS
- O
r o )
■ MOTOR CONTROL, AUDIO AMPLIFIERS

s
P
■ DC-DC & DC-AC CONVERTERS

e c t (
l e t d u
s o r o
O b e P
ABSOLUTE MAXIMUM RATINGS
Symbol

l e
V DSt Parameter
Drain-source Voltage (V GS = 0)
Value
60
Unit
V

s oV DGR Drain- gate Voltage (R GS = 20 kΩ) 60


± 20
V

O b VGS
ID
ID
Gate-source Voltage
Drain Current (continuous) at T c = 25 o C
Drain Current (continuous) at T c = 100 C o
30
21
V
A
A
I DM (•) Drain Current (pulsed) 120 A
P tot Total Dissipation at T c = 25 o C 55 W
Derating Factor 0.37 W/ o C
dv/dt (1 ) Peak Diode Recovery voltage slope 7 V/ns
o
T st g Storage Temperature -65 to 175 C
o
Tj Max. Operating Junction Temperature 175 C
(•) Pulse width limited by safe operating area (1) ISD ≤30A, di/dt ≤ 300 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX

May 1999 1/8


STD30NE06L

THERMAL DATA
o
R thj-pcb Thermal Resistance Junction-PC Board Max 2.72 C/W
o
R thj-amb Thermal Resistance Junction-ambient Max 100 C/W
o
R thj-sink Thermal Resistance Case-sink Typ 1.5 C/W
o
Tl Maximum Lead Temperature For Soldering Purpose 275 C

AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
IAR Avalanche Current, Repetitive or Not-Repetitive 30 A
(pulse width limited by T j max)
E AS Single Pulse Avalanche Energy
(starting T j = 25 o C, I D = I AR , V DD = 25 V)
( s ) 100 mJ

c t
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)
OFF
d u
r o s )
Symbol
V (BR)DSS
Parameter
Drain-source P
I D = 250 µA
e c t (
Test Conditions
V GS = 0
Min.
60
Typ. Max. Unit
V

I DSS
Breakdown Voltage
Zero Gate Voltage
l e t d
V DS = Max Rating u 1 µA
o r o
Drain Current (V GS = 0) V DS = Max Rating
s
T c = 125 o C 10 µA
IGSS Gate-body Leakage
Current (V DS = 0)
O b e P
V GS = ± 20 V ± 100 nA

- l e t
ON (∗)

( s ) o
Symbol
c t
Parameter
b s Test Conditions Min. Typ. Max. Unit
V GS(th)

d u - O
Gate Threshold Voltage V DS = V GS I D = 250 µA 1 1.7 2.5 V

R DS(on)

r o
Static Drain-source On
Resistance
s )
V GS = 10 V
V GS = 5 V
I D = 15 A
I D = 15 A
0.022
0.025
0.028
0.030 Ω
I D(on)

e P t (
On State Drain Current V DS > I D(on) x R DS(on)max

c
30 A

l e t d u
V GS = 10 V

o
DYNAMIC
s r o
O b Symbol

e P Parameter Test Conditions Min. Typ. Max. Unit

l e t
g fs (∗) Forward
Transconductance
V DS > I D(on) x R DS(on)max I D = 15 A 15 25 S

s o C iss
C oss
Input Capacitance
Output Capacitance
V DS = 25 V f = 1 MHz V GS = 0 V 2370
350
pF
pF

O b C rss Reverse Transfer


Capacitance
90 pF

2/8
STD30NE06L

ELECTRICAL CHARACTERISTICS (continued)


SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t d(on) Turn-on Delay Time V DD = 30 V I D = 15 A 27 50 ns
tr Rise Time R G = 4.7 Ω V GS = 5 V 100 135 ns
(Resistive Load, see fig. 3)
Qg Total Gate Charge V DD = 30 V I D = 30 A V GS = 5 V 31 41 nC
Q gs Gate-Source Charge 13 nC
Q gd Gate-Drain Charge 13.5 nC

SWITCHING OFF
Symbol Parameter
( s )
Test Conditions Min. Typ. Max. Unit
tr(Voff) Off-voltage Rise Time V DD = 48 V
c t I D = 30 A 20 27 ns
tf
tc
Fall Time
Cross-over Time
R G = 4.7 Ω

d u V GS = 5 V
(Inductive Load, see fig. 5)
45
72
60
100
ns
ns

r o s )
SOURCE DRAIN DIODE

e P c t (
Symbol Parameter

l e t d u
Test Conditions Min. Typ. Max. Unit

o
ISD Source-drain Current 30 A
I SDM (•) Source-drain Current
s o r 120 A

V SD (∗)
(pulsed)
Forward On Voltage
O b e P
I SD = 30 A V GS = 0 1.5 V
t rr Reverse Recovery
- l e t
I SD = 30 A di/dt = 100 A/µs 55 ns
Time

( s ) o V DD = 30 V T j = 150 o C
Q rr Reverse Recovery
Charge
c t b s (see test circuit, fig. 5) 0.1 µC

I RRM

d
Currentu
Reverse Recovery

- O 3.5 A

r o s )
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %

P t (
(•) Pulse width limited by safe operating area

e c
l e t d u
s o r o
O b e P
Safe Operating Area Thermal Impedance

l e t
s o
O b

3/8
STD30NE06L

Output Characteristics Transfer Characteristics

( s )
c t
d u
r o s )
Transconductance P t (
Static Drain-source On Resistance
e c
l e t d u
s o r o
O b e P
- l e t
( s ) o
c t b s
d u - O
r o s )
e P c t (
l e t d u
s o r o
O b e P
Gate Charge vs Gate-source Voltage Capacitance Variations

l e t
s o
O b

4/8
STD30NE06L

Normalized Gate Threshold Voltage vs Normalized On Resistance vs Temperature


Temperature

( s )
c t
d u
r o s )
Source-drain Diode Forward Characteristics
e P c t (
l e t d u
s o r o
O b e P
- l e t
( s ) o
c t b s
d u - O
r o s )
e P c t (
l e t d u
s o r o
O b e P
l e t
s o
O b

5/8
STD30NE06L

Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform

( s )
c t
d u
r o s )
Fig. 3: Switching Times Test Circuits For
e P t (
Fig. 4: Gate Charge test Circuit
c
Resistive Load

l e t d u
s o r o
O b e P
- l e t
( s ) o
c t b s
d u - O
r o s )
e P c t (
l e t d u
s o r o
O P
Fig. 5: Test Circuit For Inductive Load Switching
b
And Diode Recovery Times
e
l e t
s o
O b

6/8
STD30NE06L

TO-252 (DPAK) MECHANICAL DATA

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.

A 2.2 2.4 0.086 0.094

A1 0.9 1.1 0.035 0.043

A2 0.03 0.23 0.001 0.009

B 0.64 0.9

( s ) 0.025 0.035

B2 5.2 5.4

c t 0.204 0.212

C 0.45 0.6

d u 0.017 0.023

C2 0.48
r o
0.6

s ) 0.019 0.023

D 6

e P 6.2

c t ( 0.236 0.244

E 6.4

l e t 6.6

d u 0.252 0.260

G 4.4

s o o
4.6
r
0.173 0.181

H 9.35

O b e P 10.1 0.368 0.397

L2
-
0.8

l e t 0.031

L4 0.6

( s ) o
1 0.023 0.039

c t b s
d u - O
o
H

P r ( s )
t e c t
u
A

o l e o d
C2

A1

s r DETAIL "A"
C

O b e P
t
A2

o l e L2 D
DETAIL "A"

b s
B

O
3
=

=
B2

G
E

2
=

=
1

L4
0068772-B

7/8
STD30NE06L

( s )
c t
d u
r o s )
e P c t (
l e t d u
s o r o
O b e P
- l e t
( s ) o
c t b s
d u - O
r o s )
e P c t (
l e t d u
s o r o
O b e P
l e t
s o
O b
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics

© 1999 STMicroelectronics – Printed in Italy – All Rights Reserved


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