You are on page 1of 24

INTERNATIONAL UNIVERSITY OF EQUATOR

SCHOOL OF INFORMATION TECHNOLOGY

COURSE OF DIGITAL ELECTRONICS

Group: 1stSemester and Evening Program

Lecturer: Msc Jonathan

Feb 2023

1
CHAPTER 0. INTRODUCTION

1. Binary System
2. Review on Electronic Parameters and Components

CHAPTER 1: BOOLEAN ALGEBRA AND GATES

1. Boolean Algebra
2. Logic Functions and Gates
3. Logic Simplification and Karnaugh Maps

CHAPTER 2 : FLIP-FLOPS

1. SR Flip-Flops

Basic SR latch can serve as a useful memory element. It remembers its state when both the S and
R inputs are 0. It changes its state in response to changes in the signals on these inputs. The state
changes occur at the time when the changes in the signals occur. If we cannot control the time of
such changes, then we don’t know when the latch may change its state.
It may be desirable to be able to enable or disable the entire system by means of a control input,
Enable. Thus when enabled, the system would function as described above. In the disabled mode,
changing the Set input from 0 to
1 would not cause the alarm to turn on. The latch in Figure 7.5a cannot provide the desired
operation. But the latch circuit can be modified to respond to the input signals S and R only when
Enable = 1. Otherwise, it would maintain its state.
The modified circuit is depicted in Figure 7.6a. It includes two AND gates that provide the
desired control. When the control signal Clk is equal to 0, the S_ and R_ inputs to the

2
2. D Flip-Flops

We presented the gated SR latch and showed how it can be used as the memory element in
the alarm system. This latch is useful for many other applications.

In this section we describe another gated latch that is even more useful in practice. It has a
single data input, called D, and it stores the value on this input, under the control of a clock
signal. It is called a gated D latch.

To motivate the need for a gated D latch, we did not discuss what is likely to happen with the
sum bits that are produced by the adder.

Adder/subtractor units are often used as part of a computer. The result of an addition or
subtraction operation is often used as an operand in a subsequent operation. Therefore, it is
necessary to be able to remember the values of the sum bits generated by the adder until they
are needed again. We might think of using the basic latches to remember these bits, one bit
per latch. In this context, instead of saying that a latch remembers the value of a bit, it is more
illuminating to say that the latch stores the value of the bit or simply “stores the bit.” We
should think of the latch as a storage element.

But can we obtain the desired operation using the basic latches? We can certainly reset all
latches before the addition operation begins. Then we would expect that by connecting a sum
bit to the S input of a latch, the latch would be set to 1 if the sum bit has the value 1;
otherwise, the latch would remain in the 0 state. This would work fine if all sum bits are 0 at
the start of the addition operation and, after some propagation delay through the adder, some

3
of these bits become equal to 1 to give the desired sum. Unfortunately, the propagation delays
that exist in the adder circuit cause a big problem in this arrangement. Suppose that we use a
ripple-carry adder. When the X and Y inputs are applied to the adder, the sum outputs may
alternate between 0 and 1 a number of times as the carries ripple through the circuit. This
situation was illustrated in the timing diagram in Figure 5.21. The problem is that if we
connect a sum bit to the S input of a latch, then if the sum bit is temporarily a 1 and then
settles to 0 in the final result, the latch will remain set to 1 erroneously.

The problem caused by the alternating values of the sum bits in the adder could be solved by
using the gated SR latches, instead of the basic latches. Then we could arrange that the clock
signal is 0 during the time needed by the adder to produce a correct sum.

After allowing for the maximum propagation delay in the adder circuit, the clock should go to 1
to store the values of the sum bits in the gated latches. As soon as the values have been stored, the
clock can return to 0, which ensures that the stored values will be retained until the next time the
clock goes to 1. To achieve the desired operation, we would also have to reset all latches to 0
prior to loading the sum-bit values into these latches. This is an awkward way of dealing with the
problem, and it is preferable to use the gated D latches instead.

It is based on the gated SR latch, but instead of using the S and R inputs separately, it has just
one data input, D. For convenience we have labeled the points in the circuit that are equivalent
to the S and R inputs. If D = 1, then S = 1 and R = 0, which forces the latch into the state Q = 1.
If D = 0, then S = 0 and R = 1, which causes Q = 0. Of course, the changes in state occur only
when Clk = 1.

4
3. T Flip-Flop

The D flip-flop is a versatile storage element that can be used for many purposes. By including
some simple logic circuitry to drive its input, the D flip-flop may appear to be a different type of
storage element. An interesting modification is presented in Figure 7.16a.

This circuit uses a positive-edge-triggered D flip-flop. The feedback connections make the input
signal D equal to either the value of Q or Q under the control of the signal that is labeled T. On
each positive edge of the clock, the flip-flop may change its state Q(t).

If

T = 0, then D = Q and the state will remain the same, that is, Q(t + 1) = Q(t). But if

5
T = 1, then D = Q and the new state will be Q(t + 1) = Q(t).

Therefore, the overall operation of the circuit is that it retains its present state if T = 0, and it
reverses its present state if T = 1.

The operation of the circuit is specified in the form of a truth table in Figure 7.16b.

Any circuit that implements this truth table is called a T flip-flop. The name T flip-flop derives
from the behavior of the circuit, which “toggles” its state when T = 1. The toggle feature makes
the T flip-flop a useful element for building counter circuits.

4. JK Flip-Flop

Another interesting circuit can be derived from Figure 7.16a. Instead of using a single
control input, T, we can use two inputs, J and K, as indicated in Figure 7.17a. For this
circuit the input D is defined as
6
D = JQ + KQ
A corresponding truth table is given below. The circuit is called a JK flip-flop. It
combines the behaviors of SR and T flip-flops in a useful way. It behaves as the SR flip-
flop, where J = S and K = R, for all input values except J = K = 1. For the latter case,
which has to be avoided in the SR flip-flop, the JK flip-flop toggles its state like the T
flip-flop. The JK flip-flop is a versatile circuit. It can be used for straight storage
purposes, just like the D and SR flip-flops. But it can also serve as a T flip-flop by
connecting the J and K inputs together.

CHAPTER 3: REGISTERS

A flip-flop stores one bit of information. When a set of n flip-flops is used to store n bits of
information, such as an n-bit number, we refer to these flip-flops as a register. A common clock
is used for each flip-flop in a register, and each flip-flop operates as described in the previous

7
sections. The term register is merely a convenience for referring to n-bit structures consisting of
flip-flops.

1. Shift Register

We already know that a given number is multiplied by 2 if its bits are shifted one bit position to
the left and a 0 is inserted as the new least-significant bit. Similarly, the number is divided by 2 if
the bits are shifted one bit-position to the right. A register that provides the ability to shift its
contents is called a shift register.
We then understand that a four-bit shift register is used to shift its contents one bit position to the
right. The data bits are loaded into the shift register in a serial fashion using the In input. The
contents of each flip-flop are transferred to the next flip-flop at each positive edge of the clock.
which shows what happens when the signal values at In during eight consecutive clock cycles are
1, 0, 1, 1, 1, 0, 0, and 0, assuming that the initial state of all flip-flops is 0.

8
2. Parallel-Access Shift Register

In computer systems it is often necessary to transfer n-bit data items. This may be done by
transmitting all bits at once using n separate wires, in which case we say that the transfer is
performed in parallel. But it is also possible to transfer all bits using a single wire, by performing
the transfer one bit at a time, in n consecutive clock cycles. We refer to this scheme as serial
transfer. To transfer an n-bit data item serially, we can use a shift register that can be loaded with
all n bits in parallel (in one clock cycle). Then during the next n clock cycles, the contents of the
register can be shifted out for serial transfer. The reverse operation is also needed. If bits are
received serially, then after n clock cycles the contents of the register can be accessed in parallel
as an n-bit item.

The figure below shows a four-bit shift register that allows the parallel access. Instead of using
the normal shift register connection, the D input of each flip-flop is connected to two different
sources. One source is the preceding flip-flop, which is needed for the shift register operation.
The other source is the external input that corresponds to the bit that is to be loaded into the flip-
flop as a part of the parallel-load operation. The control signal Shift/Load is used to select the
mode of operation. If Shift/Load = 0, then the circuit operates as a shift register. If Shift/Load = 1,
then the parallel input data are loaded into the register. In both cases the action takes place on the
positive edge of the clock.

Here we have chosen to label the flip-flops outputs as Q3, . . . ,Q0 because shift registers are
often used to hold binary numbers. The contents of the register can be accessed in parallel by
observing the outputs of all flip-flops. The flip-flops can also be accessed serially, by observing
the values of Q0 during consecutive clock cycles while the contents are being shifted. A circuit in
which data can be loaded in series and then accessed in parallel is called a series-to-parallel
converter. Similarly, the opposite type of circuit is a parallel-to-series converter.

9
CHAPTER 4: COUNTERS

In this Chapter we examine special types of addition and subtraction operations, which are used
for the purpose of counting. In particular, we want to design circuits that can increment or
decrement a count by 1. Counter circuits are used in digital systems for many purposes. They
may count the number of occurrences of certain events, generate timing intervals for control of
various tasks in a system, keep track of time elapsed between specific events, and so on.

Counters can be implemented using the adder/subtractor circuits and the registers. However,
since we only need to change the contents of a counter by 1, it is not necessary to use such
elaborate circuits. Instead, we can use much simpler circuits that have a significantly lower cost.
We will show how the counter circuits can be designed using T and D flip-flops.

10
1. Asynchronous Counters
The simplest counter circuits can be built using T flip-flops because the toggle feature is naturally
suited for the implementation of the counting operation.
 Up-Counter with T Flip-Flops
The figure below gives a three-bit counter capable of counting from 0 to 7. The clock inputs of
the three flip-flops are connected in cascade. The T input of each flip-flop is connected to a
constant 1, which means that the state of the flip-flop will be reversed (toggled) at each positive
edge of its clock. We are assuming that the purpose of this circuit is to count the number of
pulses that occur on the primary input called Clock. Thus the clock input of the first flip-flop is
connected to the Clock line. The other two flip-flops have their clock inputs driven by the Q
output of the preceding flip-flop. Therefore, they toggle their state whenever the preceding flip-
flop changes its state from Q = 1 to Q = 0, which results in a positive edge of the Q signal.
Figure 7.20b shows a timing diagram for the counter. The value ofQ0 toggles once each clock
cycle. The change takes place shortly after the positive edge of the Clock signal. The delay is
caused by the propagation delay through the flip-flop. Since the second flip-flop is clocked by
Q0, the value of Q1 changes shortly after the negative edge of the Q0 signal.
Similarly, the value of Q2 changes shortly after the negative edge of the Q1 signal. If we look at
the values Q2Q1Q0 as the count, then the timing diagram indicates that the counting sequence is
0, 1, 2, 3, 4, 5, 6, 7, 0, 1, and so on. This circuit is a modulo-8 counter. Because it counts in the
upward direction, we call it an up-counter.
As we can see this counter has three stages, each comprising a single flip-flop. Only the first
stage responds directly to the Clock signal; we say that this stage is synchronized to the clock.
The other two stages respond after an additional delay. For example, when
Count = 3, the next clock pulse will cause the Count to go to 4. This change requires the toggling
of the states of all three flip-flops. The change in Q0 is observed only after a propagation delay
from the positive edge of Clock. The Q1 and Q2 flip-flops have not yet changed; hence for a brief
time the count is Q2Q1Q0 = 010. The change in Q1 appears after a second propagation delay, at
which point the count is 000. Finally, the change in Q2 occurs after a third delay, at which point
the stable state of the circuit is reached and the count is 100.

11
 Down-Counter with T Flip-Flops

A slight modification of the circuit in the preceding figure is presented in the following one. The
only difference is that is that the clock inputs of the second and third flip-flops are driven by the
Q outputs of the preceding stages, rather than by the Q outputs. The timing diagram, given in the
following figure shows that this circuit counts in the sequence 0, 7, 6, 5, 4, 3, 2, 1, 0, 7, and so on.
Because it counts in the downward direction, we say that it is a down-counter.

It is possible to combine the functionality of the circuits in both figures to form a counter that can
count either up or down. Such a counter is called an up/downcounter.

12
2. Synchronous Counters

The asynchronous counters in these two preceding figures are simple, but not very fast. If a
counter with a larger number of bits is constructed in this manner, then the delays caused by the
cascaded clocking scheme may become too long to meet the desired performance requirements.
We can build a faster counter by clocking all flip-flops at the same time, using the approach
described below.

 Synchronous Counter with T Flip-Flops

The following table shows the contents of a three-bit up-counter for eight consecutive clock
cycles, assuming that the count is initially 0. Observing the pattern of bits in each row of the
table, it is apparent that bit Q0 changes on each clock cycle. Bit Q1 changes only when Q0 = 1.
Bit Q2 changes only when both Q1 and Q0 are equal to 1. In general, for an n-bit up-counter, a

13
given flip-flop changes its state only when all the preceding flip-flops are in the state Q = 1.
Therefore, if we use T flip-flops to realize the counter, then the T inputs are defined as

CHAPTER 5: DIGITAL COMPONENTS

1. Integrated Circuits

• An integrated circuit (IC) is a small silicon semiconductor crystal, called a chip, containing
the electronic components for the digital gates

• The various gates are interconnected inside the chip to form the required circuit

• The chip is mounted in a ceramic or plastic container, and connections are welded by thin
gold wires to external pins to form the IC

14
• The number of pins range from 14 to 100

• Each IC has a numeric designation

• Small-scale integration (SSI) – several independent gates in a single package (usually < 10)

• Medium-scale integration (MSI) – approximately 10 to 200 gates – decoders, adders, or


registers

• Large-scale integration (LSI) – between 200 and a few thousand gates – memory chips,
processors, or programmable modules

• Very-large-scale integration (VLSI) – thousands of gates – large memory arrays or complex


microcomputer chips

2. Decoders

n
• A binary code of n bits is capable of representing up to 2 distinct elements of the coded
information

• A decoder is a combinational circuit that converts binary information from the n coded
n
inputs to a maximum of 2 unique outputs

n
• A decoder has n inputs and m outputs, where m ≤ 2 , and are called n-to-m-line decoders

• Each output represents one of the combinations of the input variables

• An enable input controls operation of the decoder

3. Multiplexers

n
• A multiplexer (MUX) is a combinational circuit with 2 input data lines, n input select lines,
and one output line

• The input selection lines determine which input data line is selected for the output

15
n n n
A 2 -to-1 line MUX is constructed from an n-to-2 decoder by adding to it 2 input lines, one
from each data input

• May also have an enable input

• The selection and enable inputs are usually common to all MUX’s that are enclosed within a
single package.

4. Registers

• A register is a group of flip-flops with each flip-flop capable of storing one bit of
information

• An n-bit register has a group of n flip-flops

16
• A register may also have combinational gates that perform certain data-processing tasks

• The flip-flops hold the data and the gates control when and how new data is transferred into
the register

• The flip-flops have a common clock input

• A common clear input is available to reset all the flip-flops asynchronously

5. Binary Counters

• A register that goes through a predetermined sequence of states upon the application of
input pulses is called a counter.

• The input pulses may be a clock or an external input

• The input may occur at uniform intervals of time or randomly

• Used to count the number of occurrences of an event and for generating timing signals to
control the sequence of operations

• A counter that follows the binary number sequence is a binary counter

• An n-bit binary counter is a register of n flip-flops and gates that follow a sequence of states

• Consider the sequence 0000, 0001, 0010, 0011, 1000, …

• The l is complemented each count

• Every other bit is complemented if all its lower-order bits are equal to 1

• Natural to use either T or JK flip-flops since they both have a complement state

• The counter has an enable input

• Synchronous counters have a regular pattern with a common clock

• The chain of AND gates generate the logic for the flip-flop inputs

17
6. Memory Unit

• A memory unit is a collection of storage cells together with associated circuits to transfer
information in and out of storage

• The memory stores binary data in groups of bits called words

• A word can represent an instruction code or alphanumeric characters

k
• Each word in memory is assigned an address from 0 to 2 –1, where k is the number of
address lines

• A decoder inside the memory accepts an address opens the paths needed to select the bits of
the specified word

• The memory capacity is stated as the total number of bytes that can be stored

• Refer to the number of bytes using one of the following

10
 K (kilo) = 2
20
 M (mega) = 2
30
 G (giga) = 2
10 21 32
 64K = 2 , 2M = 2 , and 4G = 2

• In random-access memory (RAM) the memory cells can be accessed for information from
any desired random location

• The process of locating a word in memory is the same and requires an equal amount of time
no matter where the cells are located physically in memory

• Communication between memory and its environment is achieved via data input and output
lines, address selections lines, and control lines

• The n data input lines provide the information to be stored in memory

 The n data output lines supply the information coming out of memory
18
• The k address lines provide a binary number of k bits that specify a specific word or location

• The two control lines specify the direction of transfer – either read or write

CHAPTER 6: D/A and A/D CONVERTERS

1. Digital-to-Analog Conversion

A digital-to-analog (D/A) converter (DAC) is a chip or circuit that converts a digital number into
an analog voltage or current. D/As are used to control devices that require a range of control
voltages or currents such as electro-acoustic transducers (speakers), some types of variable-speed
motors, and many other applications where an analog signal output is required. The most
common application is to [re-]create waveforms from digital signals – for example in CD players.

D/A Converters

A D/A converter can be visualized as a circuit that adds up a number of voltages under the
control of a digital signal. Each voltage can be turned on and off by an electronic switch which is
controller by the digital input. The circuit below shows a 3-bit D/A consisting of a summing
amplifier fed by three different voltages. Depending on which switches are closed, the output can
range from 0 to 7 volts. By using digital signals to control the switches we can build a circuit
whose output voltage is proportional to the digital value.

Exercise: What is the maximum output voltage? What digital input is required to produce this
output? What is the minimum output voltage? What is the corresponding digital input? By how
much does the output vary for each increment in the digital input?

19
How would these values change if the analog reference inputs /…were 0.2, 0.1 and 0.05 volts?

D/A Converter Specifications

Many different Digital-to-Analog converters are commercially available, both as chips and as
subsystems (modules, boards, etc). To select the right

D/A converter it is necessary to understand D/A specifications. The most important specs are
resolution and settling time. In some applications other specifications such as slewrate, linearity,
monotonicity may also be important. There are also various types of digital and analog interfaces.
Since different manufacturers use different definitions for some of these specifications it is
important to check each manufacturer’s definitions when comparing devices.

The resolution (output step size) is given by the output voltage range divided by the number of
possible output levels. An N-bit DAC can output 2N different levels in 2N 1 steps. N ranges from
6 (for simple high-speed converters) up to 20 or more (for precision instrumentation).

Exercise: You need to produce a voltage with a resolution of 20mV and an output range of 0 to
+5 volts. How many bits of resolution are required?

The accuracy is the maximum difference between the output and the theoretical output. This is
typically (but not always) this is approximately the same as the resolution.

The settling time is the time it takes the output to reach a percentage (e.g. 99%) of the final value.

Values can range from hundreds of milliseconds for high-precision units to nanoseconds for
devices used in high-frequency waveform generators.

The linearity is the maximum difference between the output and a linear interpolation between
the minimum and maximum values. This is usually on the order of 1 2N.

The output is monotonic if an increase in the digital input always causes an increase in the analog
output.

2. Analog to Digital Converters

20
A controller often has to measure a physical quantity, for example temperature, pressure, force,
etc.

A sensor, often called a transducer, is used to convert this physical quantity into an electrical
signal (current or voltage). This electrical signal must then be converted into a binary number so
that the digital controller can use it. An analog to digital (A/D) converter (ADC) performs this
function.

Comparators

The simplest type of ADC is a comparator. As its name indicates, a comparator compares two
analog inputs (say Vin and Vref) and outputs a logic signal which is high if Vin is greater than
Vref or low otherwise.

Comparators are available as ICs, often with two or four units in one IC.

The comparator can be considered to be a one-bit ADC since its output tells us whether the input
voltage is above or below the reference voltage.

Although a comparator does not offer much precision, it is often sufficient since for many
applications it’s only necessary to determine whether some quantity is above or below some
threshold. Comparators also form the basis of other types of A/D converters as will be described
below.

Types of A/D Converters

Flash Converters

A simple way to get better (more bits of) resolution is to use more comparators. As shown below
for a 2-bit flash converter we can use 2N 1 comparators, supplying them with reference voltages

21
that are equally spaced over the desired conversion range. The other comparator inputs are
connected to the input signal.

All of the digital outputs connected to reference voltages below the input signal will be true and
all of the outputs with reference signals above the input signal level will be false. The output
logic circuit converts these 2N 1 binary values into an N-bit number.

Successive Approximation Converters

Another approach is to use a D/A converter to generate the reference voltage and a single
comparator to compare this voltage and the input. A digital circuit can step the D/A output up
through the possible values until the comparator indicates that the reference signal is greater than
the input signal. The digital input to the D/A would correspond to the voltage step that is the
next-highest to the input signal. This approach would take up to 2N comparisons.

CHAPTER 7: INTRODUCTION TO MICROPROCESSORS

A microprocessor is one of the most important components of a digital computer.

It acts as the brain of the computer system. As technology has progressed, microprocessors have
become faster, smaller and capable of doing more work per clock cycle. Sometimes,
microprocessor is written as μP. ( μ is pronounced as Mu ).

By definition, Microprocessor is the controlling unit or CPU of a micro-computer, fabricated on a


very small chip capable of performing ALU operations and communicating with the external
devices connected to it.

22
A computer has the following units: Input Unit, Output Unit, Memory Unit and a Central
Processing Unit.

Central Processing Unit (Cpu)

The CPU is the heart and nerve centre of the computer. It fetches the instruction and data from
the peripheral devices and performs all the arithmetic operations, takes logical decision and
control the operation of all other units.

Various sub-blocks of the central processing unit are:

 Arithmetic and Logic Unit (ALU)


 Timing & Control Unit
 Registers

The Arithmetic And Logic Unit (Alu):

 This unit perform all the logical and arithmetic operations.


 Various arithmetic operations are: addition, subtraction, increment and decrement etc.
 Various logical operations are: AND, OR, NOT, XOR, etc.

The Timing And Control Unit

 This unit controls the entire operations being performed by the system.
 It controls the operations of ALU, input/output devices and memory unit.
 This unit interprets the instructions and generates various timing and control signals.
23
Registers

 A register is a very small amount of very fast memory that is built into the CPU in
order to store the current data and instructions which are being executed by the CPU.

Memory Unit

 It stores the program statement and the data i.e. the information supplied from the
input unit.
 It also stores the final output.
 This is connected to the CPU by means of a bidirectional bus.
 The CPU processes the information as taken from the memory and performs the
operations in the ALU section.
 The results are either transferred to the output unit or stored in the memory for later
use by the CPU.

A microprocessor is a LSI (Large Scale Integration) IC that does almost all the functions of the
CPU.

It is also defined as a CPU contained in a single chip. The basic function of the microprocessor is:

 To fetch the instructions stored in the main memory


 To identify the operations and the devices involved in it and accordingly generate control
signals to determine when a given action is to take place.

We can say that a computer with a microprocessor as its CPU, is known as Microcomputer.9

24

You might also like