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:________________

EE216:Electronic Devices & Circuits

Pre-lab for Experiment 7

BJT Biasing Configurations

Fixed Bias

Figure 1 shows a common emitter circuit with fixed bias configuration.

VCC

RC
RB

Figure 1

Design for the values of RB and RC for IC = 1 mA and VCE = 7.5 V. Assume β = 100 and VCC =
15 V.

RB:

RC:

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Emitter Feedback Bias Configuration

Figure 2 shows a emitter feedback bias configuration.

VCC

RC

RB

RE

Figure 2

Design for the values of RB, RC and RE for IC = 1 mA, VE = 1.5 V and VCE = 7.5 V. Assume β =
100 and VCC = 15 V

R E:

RB:

RC:

Collector Feedback Bias Configuration

Figure 3 shows a collector feedback bias configuration.

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VCC

RC

RB

Figure 3
Design for the values of RB and RC for IC = 1 mA and VCE = 7.5 V. Assume β = 100 and VCC =
15 V.

RB:

RC:

Collector-Emitter Feedback Bias Configuration

Figure 4 shows a collector-emitter feedback bias configuration.

VCC

RC

RB

RE

Figure 4

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Design for the values of RB, RC and RE for IC = 1 mA, VE = 1.5 V and VCE = 5 V. Assume β =
100 and VCC = 15 V.

R E:

RB:

RC:

Voltage Divider Bias Configuration

Figure 5 shows a common emitter circuit with voltage divider biasing network.

VCC

RC
R1

R2 RE

Figure 5

Design for the values of R1, R2, RE and RC for IC = 1 mA, VE = 1.5 V, VCE = 7.5 V and IR2 = 11×
IB. Assume β = 100 and VCC = 15 V.

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R E:

RC:

R1 :

R2 :

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