Department of Electrical & Electronic Engineering, School

of Engineering (SOE)
LAB REPORT
ECD 2101: DIGITAL ELECTRONICS LAB
LAB REPORTS

Experiment Binary Adder and Subtractor

Name Dimoharan Pragash
Student ID 1135211001

Assessment
Total (50)

Signatures

Students: Lecturer:

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1.0 Introduction
Adder and subtractor are important in computers and also in other types of digital systems in which
numerical data are processed.

1.1 Half Adder

The half adder accepts two binary digits on its input and produces two binary digitals on its output- a
sum bit and carry bit
1.2 Full Adder
The full adder accepts three binary digits on its inputs and produces two binary digitals on its output-
a sum bit and a carry bit.
1.3 Half Subtractor
The half subtractor accepts two binary digits on its input and produces two binary digitals on its
output – a different bit and a borrow bit.
1.4 Full Subtractor
The full subtractor accepts three binary digits on its input and produces two binary digitals on its
output – a different bit and a borrow bit.

2.0 Objective
After completing this experiment, you should be able to
1. Describe the function of a half-adder and a full-adder
2. Describe the function of a half-subtractor and a full-subtractor
3. Implement VHLD programming from Boolean expression
4. Implement VHLD programming into Altera board

3.0 Equipment and Apparatus

1. Computer Unit with Microsoft Windows 7 operating system.
2. Quartus || software
3. Power Supply
4. Terasic’s Altera DE2 Training Board

4.0 Procedure
A new project was created with the entity name LAB3.
A complete VDHL program for half adder was written.
Then a RTL view of the logic circuit half adder was generated.
Then all the pin planner switches were identified and the LED red light for input assessment and LED
green for output assessment was referred using Altera DE2 Board pin Table.
Then the VHDL coding was transferred to DE2 Altera Board.

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Then a truth table of half adder was constructed, and it was being compared with LED green output
from DE Altera board. The results were captured from DE2 board and was inserted in the report.
And the same step 1 to step 6 was repeated for half subtractor, full adder and full subtractor.

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5.0 Results
RTL View (Half-Adder)

Coding (Half-Adder)

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Simulation Report (Half-Adder)

RTL Viewer (Full-Adder)

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Coding (Full-Adder)

Simulation Report (Full-Adder)

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6.0 Discussion
Firstly, with proper power supply we connect the PC. Then Quartus 11 Software will be opened, then
a new file will be opened after opening a new file the file was saved as LAB3. Then a VHDL file will
be created for half adder and the project will be included. Then the RTL viewer will be view in logic
gate circuit half adder. Then the pin planner for switches will be identified and accordingly the lights
will work. Then the VHDL coding will be transferred into the DE2 Board pin Table. Then we’ll
construct a truth table for half adder then accordingly the results were being checked with the LED
green outputs from the DE2 Altera Board. Then all the results were captured for later use. Finally
from step 1 to step 6 for half-subtractor, full adder and full-subtractor.

7.0 Conclusion
The experiment in this lab was successful. We were successful in achieving our objectives by the end
of the lab. A binary adder-subtractor is a device that can add and subtract binary numbers within the
same circuit. This leads us to the conclusion that the lab experiment was a success.

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