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48.4FM01.011 Rev 1M SJV50-TR (Gateway NV53 Series)
48.4FM01.011 Rev 1M SJV50-TR (Gateway NV53 Series)
L1: Signal 1
L2: VCC
Project code: 91.4FM01.001
DDR2 SODIMM L3: Inner Signal 2
DDR II 667/800
AMD Tigris CPU PCB P/N : 48.4FM01.011
D DIMM1
16,17
G792 REVISION : 09228-1
L4: Inner Signal 3 D
S1G3 (35W) 33
USB BD :08652-1M
L5: GND
DDR2 SODIMM DDR II 667/800 PWR BD :08653-1
L6: Signal 4
638-Pin uFCPGA638 4,5,
DIMM2
16,17 6,7
Video RAM CPU V_CORE
HyperTransport
OUT
16x16 64Mbx16x4 55,56
IN
CLK GEN. 14.318MHz HDMI INPUT OUTPUT
20
ICS9LPRS480BKLFT DCBATOUT VCC_CORE_S0
3 LCD
North Bridge PCIex16 18
GPU ON BOARD
AMD RS880M M92-M2 SYSTEM DC/DC
27MHz 50, 51, 52, 53, 54, 55, 56 CRT
CPU I/F LVDS, CRT I/F 19 INPUT OUTPUT
INTEGRATED GRAHPICS 1D1V_S0
C
PCI-E x 1
LAN
10/100/1000 TXFM RJ45 DCBATOUT 1D2V_S0
1D8V_S3
C
BCM5764/5784
26 26
8,9,10 25
SYSTEM DC/DC
25MHz
PCI-E x 4 Mini Card(1)Half INPUT OUTPUT
DCBATOUT 5V_S5
802.11a/b/g/n 32 3D3V_S5
PCI-E x 2
South Bridge 25MHz Mini Card(2)
29 Codec AZALIA SYSTEM LDO
802.11a/b/g/n 32
CX20561 32.768KHz
MIC In 27 AMD SB710 INPUT OUTPUT
1D8V_S3 0D9V_S3
USB 2.0/1.1 ports
ETHERNET (10/100/1000Mb)
High Definition Audio SYSTEM LDO
29 SD/ MMC/ MS INPUT OUTPUT
ATA 66/100 USB CardReader
B MS PRO/ XD B
Line Out RTS5159 31 5 in 1 31 3D3V_S5 1D2V_S5
ACPI 1.1 3D3V_S0 2D5V_S0
AZALIA
3D3V_S0 1D5V_S0
LPC I/F
AMP SYSTEM LDO
29 G1454 PCI/PCI BRIDGE LPC BUS
28 INPUT OUTPUT
INT.SPKR 5V_AUX_S5
DCBATOUT
MODEM USB SPI I/F BIOS LPC 3D3V_AUX_S5
11,12,13,14,15 KBC
Winbond W25X16-VSS
RJ11 MDC Card 32.768KHz 35 DEBUG
30 30 WPC773L CONN. 35 Battery Charger
34
USB x 4
USB
PCIE Pair Device
10 CCD
PCIE1 MINICARD1 9 Mini Card2
8 USB4
PCIE2 MINICARD2 7 USB1 OCP2#
6 USB2 OCP1#
PCIE3
5 BlueTooth
4 NC
3 NC
2 NC
1 Mini Card1
0 USB3 OCP0#
C C
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
USB&PCIE ROUTING
Size Document Number Rev
A3 -1
WWW.AliSaler.Com
SJV50-TR
Date: Monday, June 29, 2009 Sheet 2 of 59
5 4 3 2 1
A B C D E
3D3V_S0 3D3V_CLK_VDD
3D3V_S0
1 R175 2 R164
0R0603-PAD 1 2 3D3V_48MPWR_S0
1
C432 C428 C396 C433 C438 C422 C394 C436
SC4D7U6D3V3KX-GP
Due to PLL issue on current clock chip, the SBlink clock
1
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2R3J-GP C400 C398
SC1U10V2KX-1GP need to come from SRC clocks for RS740 and RS780.
3000mA.80ohm DY
2
Future clock chip revision will fix this.
DY-C.D.
2
4 4
Clock chip has internal serial terminations
3D3V_S0 for differencial pairs, external resistors are
reserved for debug purpose.
1 R176 2
0R0603-PAD
1D2V_S0 1D1V_CLK_VDDIO 82.30005.A11 SB 980601
1 R163 2 2ND = 82.30005.881 C414
0R3J-0-U-GP GEN_XTAL_IN 2 1
1
1
C415 C406 C399 C397 C395 C437 C434 3D3V_CLK_VDD SC33P50V2JN-3GP
DY
1
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
U24 X5
2
2
DY-C.D.
1D1V_CLK_VDDIO X-14D3181MHZ-GP
26 61 CL=20pF 30ppm C405 SC33P50V2JN-3GP
2
VDDATIG X1 GEN_XTAL_OUT
25 VDDATIG_IO X2 62 2 1
48 G29
VDDCPU SB_MEM_480_CLK 2 G28 1
47 VDDCPU_IO SMBCLK 2 SB_MEM_CLK 12,16,17
3 SB_MEM_480_DAT2 1
SMBDAT SB_MEM_DAT 12,16,17
16 GAP-CLOSE
VDDSRC GAP-CLOSE
17 VDDSRC_IO
11 VDDSRC_IO ATIG0T_LPRS 30 CLK_PCIE_PEG 50
3D3V_CLK_VDD 29
ATIG0C_LPRS CLK_PCIE_PEG# 50
35 VDDSB_SRC ATIG1T_LPRS 28
34 VDDSB_SRC_IO ATIG1C_LPRS 27 CLK_NB_GFX 9
CLK_NB_GFX# 9
1 R172 2 40 VDDSATA
3 0R0603-PAD 4 23 CLKREQ0#1 TP200 TPAD14-GP 3
VDD CLKREQ0#
1
PD# 51 PD#
11 CLK_PCIE_SB CPUKG0T_LPRS 50 CPU_CLK 6
11 CLK_PCIE_SB# CPUKG0C_LPRS 49 CPU_CLK# 6
22
21
SRC0T_LPRS
64 CLK_48 2 1R161
-1 98625
25 CLK_PCIE_LAN SRC0C_LPRS 48MHZ_0 CLK48_USB 12
25 CLK_PCIE_LAN# 20 22R2J-2-GP
SRC1T_LPRS
19 SRC1C_LPRS 2 1R162 CLK48_5159E 31
15 59 REF0 22R2J-2-GP
9 CLK_NB_GPPSB SRC2T_LPRS REF0/SEL_HTT66 REF1
9 CLK_NB_GPPSB# 14 SRC2C_LPRS REF1/SEL_SATA 58
32 CLK_PCIE_MINI1 13 57 REF2
SRC3T_LPRS REF2/SEL_27
1
12 C855 C856
32 CLK_PCIE_MINI1# SRC3C_LPRS 20090107_SB mofify
RF_DY
SC22P50V2JN-4GP
RF_DY
SC22P50V2JN-4GP
32 CLK_PCIE_MINI2 9 SRC4T_LPRS SB 980518
32 CLK_PCIE_MINI2# 8
2
TPAD14-GP TP205 SRC6T_LPRS SRC4C_LPRS
1 42 SRC6T/SATAT_LPRS GNDSATA 43
TPAD14-GP TP202 1 SRC6C_LPRS 41 24
TPAD14-GP TP196 CLK_27M_SSIN SRC6C/SATAC_LPRS GNDATIG
1 6 SRC7T_LPRS/27MHZ_SS GND 7
TPAD14-GP TP217 1 CLK_27M_M92 5 52
SRC7C_LPRS/27MHZ_NS GNDHTT 150R2F-1-GP R165
GNDREF 60
46 REF0 2 1
GNDCPU CLK_NB_14M 9
37 SB_SRC0T_LPRS GND48 1
36 SB_SRC0C_LPRS 2 1
32 SB_SRC1T_LPRS GNDSRC 10
31 18 75R2F-2-GP R166
2 SB_SRC1C_LPRS GNDSRC 2
NB CLOCK INPUT TABLE
GNDSB_SRC 33
54 NB CLOCKS RS740 RX780 RS780
9 CLK_NBHT_CLK HTT0T_LPRS/66M
9 CLK_NBHT_CLK# 53 HTT0C_LPRS/66M GND 65 OSC_14M_NB HT_REFCLKP
66M SE(SINGLE END) 100M DIFF 100M DIFF
ICS9LPRS480BKLFT-GP RS780M 1.1V 158R/90.9R HT_REFCLKN NC 100M DIFF 100M DIFF
71.09480.A03
2ND = 71.08628.003 REFCLK_P
14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V)
REFCLK_N NC NC vref
* RS780 can be used as clock buffer to output two PCIE referecence clocks
3D3V_S0 By deault, chip will configured as input mode, BIOS can program it to output mode.
For SB710
2
TPAD14-GPTP197
TPAD14-GP TP197 REF0 CLK_SB_14M 11
TPAD14-GP TP199
TPAD14-GPTP199
1
REF1 SEL_HTT66 1 66 MHz 3.3V single ended HTT clock
TR
1
REF2 REF0
0* 100 MHz differential HTT clock 2
DY
1 Wistron Corporation
27M
2
4
Placement note: 4
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
1
1
C621 C616 C617 C625 C608 C609 C618 C619
2
DY-C.D.
ACPU1A
DY-C.D.
D1 VLDT_A0 HT LINK VLDT_B0 AE2
D2 VLDT_A1 VLDT_B1 AE3
D3 VLDT_A2 VLDT_B2 AE4
D4 VLDT_A3 VLDT_B3 AE5
SKT-CPU638P-GP-U2
62.10055.111
SKT-BGA638H176
1 <Core Design> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (1 of 4)
Size Document Number Rev
WWW.AliSaler.Com SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 4 of 59
A B C D E
A B C D E
ACPU1C
MEM:DATA
16 MEM_MA_DATA0 G12 MA_DATA0 MB_DATA0 C11 MEM_MB_DATA0 17
16 MEM_MA_DATA1 F12 MA_DATA1 MB_DATA1 A11 MEM_MB_DATA1 17
16 MEM_MA_DATA2 H14 MA_DATA2 MB_DATA2 A14 MEM_MB_DATA2 17
G14 B14
Placement note: 16
16
MEM_MA_DATA3
MEM_MA_DATA4 H11
MA_DATA3
MA_DATA4
MB_DATA3
MB_DATA4 G11
MEM_MB_DATA3 17
MEM_MB_DATA4 17
16 MEM_MA_DATA5 H12 MA_DATA5 MB_DATA5 E11 MEM_MB_DATA5 17
4.7ux2,0.22ux1,180px1 for each group 16 MEM_MA_DATA6 C13
E13
MA_DATA6 MB_DATA6 D12
A13
MEM_MB_DATA6 17
16 MEM_MA_DATA7 MA_DATA7 MB_DATA7 MEM_MB_DATA7 17
Place near to CPU 16 MEM_MA_DATA8 H15
E15
MA_DATA8 MB_DATA8 A15
A16
MEM_MB_DATA8 17
16 MEM_MA_DATA9 MA_DATA9 MB_DATA9 MEM_MB_DATA9 17
4 4.7u x 4 0.22u X 2 180P x 2 16 MEM_MA_DATA10 E17 MA_DATA10 MB_DATA10 A19 MEM_MB_DATA10 17 4
16 MEM_MA_DATA11 H17 MA_DATA11 MB_DATA11 A20 MEM_MB_DATA11 17
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC10P50V2JN-4GP
16 MEM_MA_DATA12 E14 MA_DATA12 MB_DATA12 C14 MEM_MB_DATA12 17
1
1
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
C122 C123 C135 C128 C857 C150 C149 C139 C140 F14 D14
16 MEM_MA_DATA13 MA_DATA13 MB_DATA13 MEM_MB_DATA13 17
RF_DIS
DY DY 16 MEM_MA_DATA14 C17 MA_DATA14 MB_DATA14 C18 MEM_MB_DATA14 17
SC180P50V2JN-1GP
SC180P50V2JN-1GP
16 MEM_MA_DATA15 G17 D18 MEM_MB_DATA15 17
2
2
MA_DATA15 MB_DATA15
16 MEM_MA_DATA16 G18 MA_DATA16 MB_DATA16 D20 MEM_MB_DATA16 17
16 MEM_MA_DATA17 C19 MA_DATA17 MB_DATA17 A21 MEM_MB_DATA17 17
-1M 090304 16 MEM_MA_DATA18 D22 MA_DATA18 MB_DATA18 D24 MEM_MB_DATA18 17
16 MEM_MA_DATA19 E20 MA_DATA19 MB_DATA19 C25 MEM_MB_DATA19 17
16 MEM_MA_DATA20 E18 MA_DATA20 MB_DATA20 B20 MEM_MB_DATA20 17
16 MEM_MA_DATA21 F18 MA_DATA21 MB_DATA21 C20 MEM_MB_DATA21 17
16 MEM_MA_DATA22 B22 MA_DATA22 MB_DATA22 B24 MEM_MB_DATA22 17
16 MEM_MA_DATA23 C23 MA_DATA23 MB_DATA23 C24 MEM_MB_DATA23 17
16 MEM_MA_DATA24 F20 MA_DATA24 MB_DATA24 E23 MEM_MB_DATA24 17
16 MEM_MA_DATA25 F22 MA_DATA25 MB_DATA25 E24 MEM_MB_DATA25 17
16 MEM_MA_DATA26 H24 MA_DATA26 MB_DATA26 G25 MEM_MB_DATA26 17
16 MEM_MA_DATA27 J19 MA_DATA27 MB_DATA27 G26 MEM_MB_DATA27 17
0D9V_S3 16 MEM_MA_DATA28 E21 MA_DATA28 MB_DATA28 C26 MEM_MB_DATA28 17
16 MEM_MA_DATA29 E22 MA_DATA29 MB_DATA29 D26 MEM_MB_DATA29 17
CLOSE TO CPU 16 MEM_MA_DATA30 H20
H22
MA_DATA30 MB_DATA30 G23
G24
MEM_MB_DATA30 17
16 MEM_MA_DATA31 MA_DATA31 MB_DATA31 MEM_MB_DATA31 17
1D8V_S3 16 MEM_MA_DATA32 Y24 MA_DATA32 MB_DATA32 AA24 MEM_MB_DATA32 17
ACPU1B AB24 AA23
16 MEM_MA_DATA33 MA_DATA33 MB_DATA33 MEM_MB_DATA33 17
16 MEM_MA_DATA34 AB22 MA_DATA34 MB_DATA34 AD24 MEM_MB_DATA34 17
D10 VTT1 W10 16 MEM_MA_DATA35 AA21 AE24 MEM_MB_DATA35 17
C10 MEM:CMD/CTRL/CLK VTT5 AC10 W22
MA_DATA35 MB_DATA35
AA26
VTT2 VTT6 16 MEM_MA_DATA36 MA_DATA36 MB_DATA36 MEM_MB_DATA36 17
1
B10 AB10 C208 W21 AA25
VTT3 VTT7 16 MEM_MA_DATA37 MA_DATA37 MB_DATA37 MEM_MB_DATA37 17
R315 AD10 AA10 SCD1U10V2KX-4GP Y22 AD26
1D8V_S3 VTT4 VTT8 16 MEM_MA_DATA38 MA_DATA38 MB_DATA38 MEM_MB_DATA38 17
3 39D2R2F-L-GP A10 AA22 AE25 3
16 MEM_MA_DATA39 MEM_MB_DATA39 17
2
MEMZP VTT9 MA_DATA39 MB_DATA39
1 2 AF10 MEMZP VREF_DDR_CLAW 16 MEM_MA_DATA40 Y20 MA_DATA40 MB_DATA40 AC22 MEM_MB_DATA40 17
1 2 MEMZN AE10 Y10 VTT_SENSE 1 TP115 RN25 AA20 AD22
MEMZN VTT_SENSE 16 MEM_MA_DATA41 MA_DATA41 MB_DATA41 MEM_MB_DATA41 17
R317 TPAD14-GP 1 4 AA18 AE20
16 MEM_MA_DATA42 MA_DATA42 MB_DATA42 MEM_MB_DATA42 17
39D2R2F-L-GP TP125 1 MEM_RSVD_M1 H16 W17 2 3 AB18 AF20
RSVD_M1 MEMVREF 16 MEM_MA_DATA43 MA_DATA43 MB_DATA43 MEM_MB_DATA43 17
TPAD14-GP AB21 AF24
16 MEM_MA_DATA44 MA_DATA44 MB_DATA44 MEM_MB_DATA44 17
SC10U6D3V5MX-3GP
SC1KP50V2KX-1GP
SCD1U10V2KX-4GP
T19 B18 MEM_RSVD_M2 1 TP140 SRN1KJ-7-GP AD21 AF23
16 MEM_MA0_ODT0 MA0_ODT0 RSVD_M2 16 MEM_MA_DATA45 MA_DATA45 MB_DATA45 MEM_MB_DATA45 17
1
V22 TPAD14-GP C217 C235 C232 AD19 AC20
16 MEM_MA0_ODT1 MA0_ODT1 16 MEM_MA_DATA46 MA_DATA46 MB_DATA46 MEM_MB_DATA46 17
U21 MA1_ODT0 MB0_ODT0 W26 MEM_MB0_ODT0 17 16 MEM_MA_DATA47 Y18 MA_DATA47 MB_DATA47 AD20 MEM_MB_DATA47 17
V19 W23 MEM_MB0_ODT1 17 DY 16 MEM_MA_DATA48 AD17 AD18 MEM_MB_DATA48 17
2
MA1_ODT1 MB0_ODT1 MA_DATA48 MB_DATA48
MB1_ODT0 Y26 16 MEM_MA_DATA49 W16 MA_DATA49 MB_DATA49 AE18 MEM_MB_DATA49 17
16 MEM_MA0_CS#0 T20 MA0_CS_L0 16 MEM_MA_DATA50 W14 MA_DATA50 MB_DATA50 AC14 MEM_MB_DATA50 17
16 MEM_MA0_CS#1 U19 MA0_CS_L1 MB0_CS_L0 V26 MEM_MB0_CS#0 17 16 MEM_MA_DATA51 Y14 MA_DATA51 MB_DATA51 AD14 MEM_MB_DATA51 17
U20 MA1_CS_L0 MB0_CS_L1 W25 MEM_MB0_CS#1 17 16 MEM_MA_DATA52 Y17 MA_DATA52 MB_DATA52 AF19 MEM_MB_DATA52 17
V20 MA1_CS_L1 MB1_CS_L0 U22 16 MEM_MA_DATA53 AB17 MA_DATA53 MB_DATA53 AC18 MEM_MB_DATA53 17
16 MEM_MA_DATA54 AB15 MA_DATA54 MB_DATA54 AF16 MEM_MB_DATA54 17
16 MEM_MA_CKE0 J22 MA_CKE0 MB_CKE0 J25 MEM_MB_CKE0 17 16 MEM_MA_DATA55 AD15 MA_DATA55 MB_DATA55 AF15 MEM_MB_DATA55 17
16 MEM_MA_CKE1 J20 MA_CKE1 MB_CKE1 H26 MEM_MB_CKE1 17 16 MEM_MA_DATA56 AB13 MA_DATA56 MB_DATA56 AF13 MEM_MB_DATA56 17
16 MEM_MA_DATA57 AD13 MA_DATA57 MB_DATA57 AC12 MEM_MB_DATA57 17
N19 MA_CLK_H5 MB_CLK_H5 P22 16 MEM_MA_DATA58 Y12 MA_DATA58 MB_DATA58 AB11 MEM_MB_DATA58 17
N20 MA_CLK_L5 MB_CLK_L5 R22 16 MEM_MA_DATA59 W11 MA_DATA59 MB_DATA59 Y11 MEM_MB_DATA59 17
16 MEM_MA_CLK0_P E16 MA_CLK_H1 MB_CLK_H1 A17 MEM_MB_CLK0_P 17 16 MEM_MA_DATA60 AB14 MA_DATA60 MB_DATA60 AE14 MEM_MB_DATA60 17
16 MEM_MA_CLK0_N F16 MA_CLK_L1 MB_CLK_L1 A18 MEM_MB_CLK0_N 17 16 MEM_MA_DATA61 AA14 MA_DATA61 MB_DATA61 AF14 MEM_MB_DATA61 17
16 MEM_MA_CLK1_P Y16 MA_CLK_H7 MB_CLK_H7 AF18 MEM_MB_CLK1_P 17 16 MEM_MA_DATA62 AB12 MA_DATA62 MB_DATA62 AF11 MEM_MB_DATA62 17
16 MEM_MA_CLK1_N AA16 MA_CLK_L7 MB_CLK_L7 AF17 MEM_MB_CLK1_N 17 16 MEM_MA_DATA63 AA12 MA_DATA63 MB_DATA63 AD11 MEM_MB_DATA63 17
P19 MA_CLK_H4 MB_CLK_H4 R26
P20 MA_CLK_L4 MB_CLK_L4 R25 16 MEM_MA_DM0 E12 MA_DM0 MB_DM0 A12 MEM_MB_DM0 17
16 MEM_MA_DM1 C15 MA_DM1 MB_DM1 B16 MEM_MB_DM1 17
16 MEM_MA_ADD0 N21 MA_ADD0 MB_ADD0 P24 MEM_MB_ADD0 17 16 MEM_MA_DM2 E19 MA_DM2 MB_DM2 A22 MEM_MB_DM2 17
2 2
16 MEM_MA_ADD1 M20 MA_ADD1 MB_ADD1 N24 MEM_MB_ADD1 17 16 MEM_MA_DM3 F24 MA_DM3 MB_DM3 E25 MEM_MB_DM3 17
16 MEM_MA_ADD2 N22 MA_ADD2 MB_ADD2 P26 MEM_MB_ADD2 17 16 MEM_MA_DM4 AC24 MA_DM4 MB_DM4 AB26 MEM_MB_DM4 17
16 MEM_MA_ADD3 M19 MA_ADD3 MB_ADD3 N23 MEM_MB_ADD3 17 16 MEM_MA_DM5 Y19 MA_DM5 MB_DM5 AE22 MEM_MB_DM5 17
16 MEM_MA_ADD4 M22 MA_ADD4 MB_ADD4 N26 MEM_MB_ADD4 17 16 MEM_MA_DM6 AB16 MA_DM6 MB_DM6 AC16 MEM_MB_DM6 17
16 MEM_MA_ADD5 L20 MA_ADD5 MB_ADD5 L23 MEM_MB_ADD5 17 16 MEM_MA_DM7 Y13 MA_DM7 MB_DM7 AD12 MEM_MB_DM7 17
16 MEM_MA_ADD6 M24 MA_ADD6 MB_ADD6 N25 MEM_MB_ADD6 17
16 MEM_MA_ADD7 L21 MA_ADD7 MB_ADD7 L24 MEM_MB_ADD7 17 16 MEM_MA_DQS0_P G13 MA_DQS_H0 MB_DQS_H0 C12 MEM_MB_DQS0_P 17
16 MEM_MA_ADD8 L19 MA_ADD8 MB_ADD8 M26 MEM_MB_ADD8 17 16 MEM_MA_DQS0_N H13 MA_DQS_L0 MB_DQS_L0 B12 MEM_MB_DQS0_N 17
16 MEM_MA_ADD9 K22 MA_ADD9 MB_ADD9 K26 MEM_MB_ADD9 17 16 MEM_MA_DQS1_P G16 MA_DQS_H1 MB_DQS_H1 D16 MEM_MB_DQS1_P 17
16 MEM_MA_ADD10 R21 MA_ADD10 MB_ADD10 T26 MEM_MB_ADD10 17 16 MEM_MA_DQS1_N G15 MA_DQS_L1 MB_DQS_L1 C16 MEM_MB_DQS1_N 17
16 MEM_MA_ADD11 L22 MA_ADD11 MB_ADD11 L26 MEM_MB_ADD11 17 16 MEM_MA_DQS2_P C22 MA_DQS_H2 MB_DQS_H2 A24 MEM_MB_DQS2_P 17
16 MEM_MA_ADD12 K20 MA_ADD12 MB_ADD12 L25 MEM_MB_ADD12 17 16 MEM_MA_DQS2_N C21 MA_DQS_L2 MB_DQS_L2 A23 MEM_MB_DQS2_N 17
16 MEM_MA_ADD13 V24 MA_ADD13 MB_ADD13 W24 MEM_MB_ADD13 17 16 MEM_MA_DQS3_P G22 MA_DQS_H3 MB_DQS_H3 F26 MEM_MB_DQS3_P 17
16 MEM_MA_ADD14 K24 MA_ADD14 MB_ADD14 J23 MEM_MB_ADD14 17 16 MEM_MA_DQS3_N G21 MA_DQS_L3 MB_DQS_L3 E26 MEM_MB_DQS3_N 17
16 MEM_MA_ADD15 K19 MA_ADD15 MB_ADD15 J24 MEM_MB_ADD15 17 16 MEM_MA_DQS4_P AD23 MA_DQS_H4 MB_DQS_H4 AC25 MEM_MB_DQS4_P 17
16 MEM_MA_DQS4_N AC23 MA_DQS_L4 MB_DQS_L4 AC26 MEM_MB_DQS4_N 17
16 MEM_MA_BANK0 R20 MA_BANK0 MB_BANK0 R24 MEM_MB_BANK0 17 16 MEM_MA_DQS5_P AB19 MA_DQS_H5 MB_DQS_H5 AF21 MEM_MB_DQS5_P 17
16 MEM_MA_BANK1 R23 MA_BANK1 MB_BANK1 U26 MEM_MB_BANK1 17 16 MEM_MA_DQS5_N AB20 MA_DQS_L5 MB_DQS_L5 AF22 MEM_MB_DQS5_N 17
16 MEM_MA_BANK2 J21 MA_BANK2 MB_BANK2 J26 MEM_MB_BANK2 17 16 MEM_MA_DQS6_P Y15 MA_DQS_H6 MB_DQS_H6 AE16 MEM_MB_DQS6_P 17
16 MEM_MA_DQS6_N W15 MA_DQS_L6 MB_DQS_L6 AD16 MEM_MB_DQS6_N 17
16 MEM_MA_RAS# R19 MA_RAS_L MB_RAS_L U25 MEM_MB_RAS# 17 16 MEM_MA_DQS7_P W12 MA_DQS_H7 MB_DQS_H7 AF12 MEM_MB_DQS7_P 17
16 MEM_MA_CAS# T22 MA_CAS_L MB_CAS_L U24 MEM_MB_CAS# 17 16 MEM_MA_DQS7_N W13 MA_DQS_L7 MB_DQS_L7 AE12 MEM_MB_DQS7_N 17
16 MEM_MA_WE# T24 MA_WE_L MB_WE_L U23 MEM_MB_WE# 17
SKT-CPU638P-GP-U2
SKT-CPU638P-GP-U2 62.10055.111
62.10055.111
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (2 of 4)
Size Document Number Rev
SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 5 of 59
A B C D E
5 4 3 2 1
8
7
6
5
LYAOUT:ROUTE VDDA TRACE APPROX.
RN52 IF 0 ohm IS NOT GOOD ENOUGH, TRY 68.00082.491 50mils WIDE(USE 2X25 mil TRACES TO I=Active HTC
SRN300J-1-GP EXIT BALL FIELD) AND 500 mils LONG. O=FAN
2D5V_S0 2D5V_VDDA_S0
D D
1
2
3
4
11 CPU_LDT_RST# 1 2 LDT_RST#_CPU 9,58 1 R301 2
R242 33R2J-2-GP 0R0603-PAD
1
1 2 LDT_PWROK C667 C666 C669 C665
11,58 CPU_PWRGD SB_980430
SC4D7U6D3V3KX-GP
SC3300P50V2KX-1GP
SC10U10V5ZY-1GP
SCD22U6D3V2KX-1GP
R243 0R2J-2-GP 1D8V_S3
DY-C.D.
11 CPU_LDT_STOP# 1 2
2
R244 0R2J-2-GP LDT_STP#_CPU 9 1D8V_S0 1D8V_S3
1 PU 2 CPU_LDT_REQ#_CPU
9 ALLOW_LDTSTOP R241 0R2J-2-GP
8
7
6
5
2
2
ACPU1D
R489 R487 RN17
SA_980326 F8 M11 1KR2J-1-GP 1KR2J-1-GP SRN300J-1-GP
VDDA1 KEY1
Cloce To CPU F9 VDDA2 KEY2 W18
1 2
1
2
3
4
1 2 R283 169R2F-GP CLKCPU_IN A9 A6
3 CPU_CLK CLKIN_H SVC CPU_SVC 41
C6601 2SC3900P50V2KX-2GP CLKCPU#_IN A8 A4 CPU_DBREQ#
1D8V_S3 3 CPU_CLK# CLKIN_L SVD CPU_SVD 41
C657 SC3900P50V2KX-2GP
LDT_RST#_CPU B7
LDT_PWROK RESET_L
A7 PWROK
LDT_STP#_CPU F10 AF6 THERMTRIP#
1
HDT_RST# CPU_LDT_REQ#_CPU LDTSTOP_L THERMTRIP_L
1 2 C6 LDTREQ_L PROCHOT_L AC7 PROCHOT#_SB 11
R266 R273 0R2J-2-GP AA8 CPU_MEMHOT#
390R2J-1-GP TP97 MEMHOT_L
For HDT DBG 1 CPU_SIC AF4 SIC internal pull high 300 ohm
TP220 1 CPU_SID AF5
TP221 SID
1CPU_ALERT# AE6 W7
2
1 R616
DY
2CPU_TEST25_H
41 CPU_VDD1_RUN_FB_H Y6
AB6
VDD1_FB_H VDDNB_FB_H H6
G6
CPU_VDDNB_RUN_FB_H 41 LAYOUT: Route FBCLKOUT_H/L
41 CPU_VDD1_RUN_FB_L VDD1_FB_L VDDNB_FB_L CPU_VDDNB_RUN_FB_L 41
300R2J-4-GP
CPU_DBRDY G10
differentially impedance 80
DBRDY
1 R617 2CPU_TEST25_L CPU_TMS AA9 TMS DBREQ_L E10 CPU_DBREQ#
300R2J-4-GP CPU_TCK AC9
CPU_TRST# TCK
DY AD9 TRST_L TDO AE9 CPU_TDO
CPU_TDI AF9 TDI
CPU_TEST23 AD7 J7 CPU_TEST28_H 1 TP223
TEST23 TEST28_H CPU_TEST28_L 1D2V_S0
TEST28_L H8 1 TP252
CPU_TEST18 H10
1D8V_S3 CPU_TEST19 TEST18 CPU_TEST17 TP106
G9 TEST19 TEST17 D7 1 DY
2
Change E7 CPU_TEST16 1 TP118
CPU_TEST25_H TEST16 CPU_TEST15 R476
1 R614 2CPU_TEST25_L
R614,R615 CPU_TEST25_L
E9
E8
TEST25_H TEST15 F7
C7 CPU_TEST14
1
1
TP159
TP107 300R2J-4-GP
TEST25_L TEST14
510R2J-1-GP PU use 300R CPU_TEST21 AB8 C3
1
TEST21 TEST7
1 R615 2CPU_TEST25_H TR use 510R CPU_TEST20 AF7 TEST20 TEST10 K8 CPU_TEST10
510R2J-1-GP CPU_TEST24 AE7
TP112 CPU_TEST22 TEST24
1 AE8 C4
Change 8
7
TEST22 TEST8
6
5
TP110 1 CPU_TEST12 AC8
RN72 TP108 CPU_TEST27 TEST12
1 AF8 TEST27
SRN300J-1-GP C9 CPU_TEST29H 1 TP114
TEST29_H
1 R54 2 CPU_TEST9 C2 TEST9 TEST29_L C8 CPU_TEST29L 1 TP109
B 0R0402-PAD B
AA6 TEST6
1
2
3
4
21 22
R275 CPU_TEST18 CPU_TEST19 CPU_TEST22 1D8V_S3 23 24
2K2R2J-2-GP 26
2
2
1 2 LDT_PWROK C640 R478 R479 R480 SMC-CONN26A-FP
2
SCD1U16V2ZY-2GP
1
1
Q20
THERMTRIP# SA_20081030
CPU exceeds to 125к
E C
MMBT3904-4-GP
RSMRST# 33,34,39 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
84.T3904.C11 Taipei Hsien 221, Taiwan, R.O.C.
2ND = 84.03904.L06
3RD = 84.03904.P11 Title
CPU (3 of 4)
Size Document Number Rev
WWW.AliSaler.Com SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 6 of 59
5 4 3 2 1
5 4 3 2 1
1
AB9 VSS9 VSS74 K7 K6 VDD0_7 VDD1_7 T2
AB23 VSS10 VSS75 K9 K10 VDD0_8 VDD1_8 T6
AB25 K11 K12 T8
2
VSS11 VSS76 VDD0_9 VDD1_9
SC10P50V2JN-4GP
RF_DY
SC10P50V2JN-4GP
RF_DIS
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY-C.D.
SC10U6D3V5MX-3GP
SCD22U6D3V2KX-1GP
SCD01U50V2KX-1GP
SC180P50V2JN-1GP
SC10U6D3V5MX-3GP
DY-C.D.
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY-C.D.
SC10U6D3V5MX-3GP
AC11 VSS12 VSS77 K13 K14 VDD0_10 VDD1_10 T10
SC180P50V2JN-1GP
SCD01U50V2KX-1GP
SCD22U6D3V2KX-1GP
AC13 VSS13 VSS78 K15 L4 VDD0_11 VDD1_11 T12
AC15 VSS14 VSS79 K17 L7 VDD0_12 VDD1_12 T14
AC17 VSS15 VSS80 L6 L9 VDD0_13 VDD1_13 U7
2
AC19 VSS16 VSS81 L8 L11 VDD0_14 VDD1_14 U9
SC47P50V2JN-3GP
AC21 VSS17 VSS82 L10 L13 VDD0_15 VDD1_15 U11
1
VSS18 VSS83 VDD0_16 VDD1_16
AD8 VSS19 VSS84 L14 M2 VDD0_17 VDD1_17 U15
AD25 VSS20 VSS85 L16 M6 VDD0_18 VDD1_18 V6
AE11 VSS21 VSS86 L18 M8 VDD0_19 VDD1_19 V8
AE13 VSS22 VSS87 M7 M10 VDD0_20 VDD1_20 V10
AE15 VSS23 VSS88 M9 N7 VDD0_21 VDD1_21 V12
AE17 VSS24 VSS89 AC6 N9 VDD0_22 VDD1_22 V14
AE19 VSS25 VSS90 M17 N11 VDD0_23 VDD1_23 W4
VDDNB
AE21 VSS26 VSS91 N4
4A for VDDNB VDD1_24 Y2
C AE23
B4
VSS27 VSS92 N8
N10
K16
M16
VDDNB_1 VDD1_25 AC4
AD2
2A for VDDIO C
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1D8V_S3
EC47 near
B6
B8
VSS29 VSS94 N16
N18
P16
T16
VDDNB_3
Y25
Place near to CPU
VSS30 VSS95 VDDNB_4 VDDIO27
2
1
B9 P2 C726 C188 C189 V16 V25
VSS31 VSS96 VDDNB_5 VDDIO26
DY-C.D.
SC47P50V2JN-3GP
2
VSS33 VSS98 VDDIO1 VDDIO24 C228 C202 C268 C297 C258 C301 C300 C302
B15 VSS34 VSS99 P11 J17 VDDIO2 VDDIO23 V18
B17 VSS35 VSS100 P17 K18 VDDIO3 VDDIO22 U17
1
B19 VSS36 VSS101 R8 K21 VDDIO4 VDDIO21 T25
B21 VSS37 VSS102 R10 K23 VDDIO5 VDDIO20 T23
B23 R16 K25 T21
2
VSS38 VSS103 VDDIO6 VDDIO19
B25 VSS39 VSS104 R18 L17 VDDIO7 VDDIO18 T18
SC180P50V2JN-1GP
SCD01U50V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
D6 VSS40 VSS105 T7 M18 VDDIO8 VDDIO17 R17
D8 VSS41 VSS106 T9 M21 VDDIO9 VDDIO16 P25
D9 T11 M23 P23
D11
VSS42
VSS43
VSS107
VSS108 T13 200812021D8V_S3 M25
VDDIO10
VDDIO11
VDDIO15
VDDIO14 P21
D13 VSS44 VSS109 T15 N17 VDDIO12 VDDIO13 P18
D15 VSS45 VSS110 T17
D17 VSS46 VSS111 U4
B D19 U6 SKT-CPU638P-GP-U2 B
VSS47 VSS112
D21 VSS48 VSS113 U8 62.10055.111
D23 U10 C306 C305 C199
VSS49 VSS114
1
VSS52 VSS117
F11 VSS53 VSS118 U18
SC10U6D3V5KX-1GP
DY-C.D.
SC10U6D3V5KX-1GP
SC180P50V2JN-1GP
Title
CPU (4 of 4)
Size Document Number Rev
SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 7 of 59
5 4 3 2 1
5 4 3 2 1
ANB1A
4 HT_CPU_NB_CAD_H0 Y25 HT_RXCAD0P HT_TXCAD0P D24 HT_NB_CPU_CAD_H0 4
4 HT_CPU_NB_CAD_L0 Y24 HT_RXCAD0N PART 1 OF 6 HT_TXCAD0N D25 HT_NB_CPU_CAD_L0 4
4 HT_CPU_NB_CAD_H1 V22 HT_RXCAD1P HT_TXCAD1P E24 HT_NB_CPU_CAD_H1 4
4 HT_CPU_NB_CAD_L1 V23 HT_RXCAD1N HT_TXCAD1N E25 HT_NB_CPU_CAD_L1 4
4 HT_CPU_NB_CAD_H2 V25 HT_RXCAD2P HT_TXCAD2P F24 HT_NB_CPU_CAD_H2 4
4 HT_CPU_NB_CAD_L2 V24 HT_RXCAD2N HT_TXCAD2N F25 HT_NB_CPU_CAD_L2 4
4 HT_CPU_NB_CAD_H3 U24 HT_RXCAD3P HT_TXCAD3P F23 HT_NB_CPU_CAD_H3 4
4 HT_CPU_NB_CAD_L3 U25 HT_RXCAD3N HT_TXCAD3N F22 HT_NB_CPU_CAD_L3 4
4 HT_CPU_NB_CAD_H4 T25 HT_RXCAD4P HT_TXCAD4P H23 HT_NB_CPU_CAD_H4 4
4 HT_CPU_NB_CAD_L4 T24 HT_RXCAD4N HT_TXCAD4N H22 HT_NB_CPU_CAD_L4 4
4 HT_CPU_NB_CAD_H5 P22 HT_RXCAD5P HT_TXCAD5P J25 HT_NB_CPU_CAD_H5 4
WWW.AliSaler.Com
Place < 100mils from pin AC8 and AB8 -1
SJV50-TR
Date: Monday, June 29, 2009 Sheet 8 of 59
5 4 3 2 1
5 4 3 2 1
3D3V_S0 3D3V_S0
L7 STRAP_DEBUG_BUS_GPIO_ENABLEb
1 DY 2 1 2 3D3V_S0_AVDD
6,58 LDT_RST#_CPU
R14 0R2J-2-GP FCM1608CF-221T02-GP Enables the Test Debug Bus using GPIO.(PIN: RS780M--> VSYNC#)
8
7
6
5
1 2 SYSREST# 220ohm 200mA C38 C49 1 :Disable 0 : Enable
11 PLT_RST1#
*
SC1U10V2KX-1GP
R11 0R2J-2-GP 68.00217.521 SCD1U10V2KX-4GP RN49
2ND = 68.00119.111 SRN3K3J-1-GP
2
1
3RD = 68.00084.A81 RS780: Enables Side port memory ( RS780 use HSYNC#)
C12
SC330P50V2KX-3GP
*1 :Disable 0 : Enable
1
2
3
4
1D8V_S0
1D8V_S0 GMCH_HSYNC
R47 2 1D8V_S0_AVDDDI
D for TR 1
0R0603-PAD GMCH_VSYNC SUS_STAT#
D
1
C91 Selects Loading of STRAPS From EEPROM
1 2 NB_LDT_STOP# R609 C86 SCD1U10V2KX-4GP
6 LDT_STP#_CPU
R19 0R2J-2-GP TR SC1U10V2KX-1GP *10 :: Bypass the loading of EEPROM straps and use Hardware Default Values
2
301R2F-GP 1D8V_S0 I2C Master can load strap values from EEPROM if connected,
L12 or use default values if not connected
2
1 2 ANB1C
FCM1608CF-221T02-GP
1
PU 220ohm 200mA C68 C46 F12 A22 GMCH_TXAOUT0+ 18
AVDD1 TXOUT_L0P
SC1U10V2KX-1GP
6 ALLOW_LDTSTOP 1 R474 2 NB_ALLOW_LDTSTOP 68.00217.521 SCD1U10V2KX-4GP E12 AVDD2 PART 3 OF 6 TXOUT_L0N B22 GMCH_TXAOUT0- 18
0R2J-2-GP 2ND = 68.00119.111 F14 A21 GMCH_TXAOUT1+ 18
2
3RD = 68.00084.A81 AVDDDI TXOUT_L1P
R69 BOM Option G15 AVSSDI TXOUT_L1N B21 GMCH_TXAOUT1- 18
1D8V_S0_AVDDQ H15 B20 GMCH_TXAOUT2+ 18
AVDDQ TXOUT_L2P
H14 AVSSQ TXOUT_L2N A20 GMCH_TXAOUT2- 18
TXOUT_L3P A19
E17 C_Pr TXOUT_L3N B19
F17 Y
F15 B18
CRT/TVOUT
COMP_Pb TXOUT_U0P GMCH_TXBOUT0+ 18
TXOUT_U0N A18 GMCH_TXBOUT0- 18
19 GMCH_RED G18 RED TXOUT_U1P A17 GMCH_TXBOUT1+ 18
R41 1 140R2F-GP
2 G17 B17 GMCH_TXBOUT1- 18
REDb TXOUT_U1N
19 GMCH_GREEN E18 GREEN TXOUT_U2P D20 GMCH_TXBOUT2+ 18
R43 1 150R2F-1-GP
2 F18 D21 GMCH_TXBOUT2- 18
GREENb TXOUT_U2N
19 GMCH_BLUE E19 BLUE TXOUT_U3P D18
R42 1 150R2F-1-GP
2 F19 D19
BLUEb TXOUT_U3N
Close to NB ball
19 GMCH_HSYNC A11 DAC_HSYNC TXCLK_LP B16 GMCH_TXACLK+ 18
19 GMCH_VSYNC B11 DAC_VSYNC TXCLK_LN A16 GMCH_TXACLK- 18
C F8 D16 C
19 NB_CRT_CLK DAC_SCL TXCLK_UP GMCH_TXBCLK+ 18
E8 D17 GMCH_TXBCLK- 18 1D8V_S0
19 NB_CRT_DAT DAC_SDA TXCLK_UN
1D1V_S0 1 R34 2DAC_RSET G14 L8
L2 715R2F-GP DAC_RSET 1D8V_S0_VDDLP18
VDDLTP18 A13 1 2
1 2 1D1V_S0_PLLVDD A12 B13 FCM1608CF-221T02-GP
PLLVDD VSSLTP18
1
FCM1608CF-221T02-GP 1D8V_S0_PLVDD18 D14 C560 C42 68.00217.521 2ND = 68.00119.111
1 PLLVDD18
1
220ohm 200mA C553 C554 B12 PLLVSS VDDLT18_1 A15 SCD1U10V2KX-4GP 3RD = 68.00084.A81
SC1U10V2KX-1GP
2
LVTM
2ND = 68.00119.111 VDDA18HTPLL VDDLT18_2
H17 A14
2
2 VDDA18HTPLL VDDLT33_1
PLL PWR
1D8V_S0 3RD = 68.00084.A81 B14 L10
L13 VDDLT33_2 1D8V_S0_VDDLT18
D7 VDDA18PCIEPLL1 1 2
1 2 VDDA18PCIEPLL E7 C14 PBY201209T-221Y-N-GP
VDDA18PCIEPLL2 VSSLT1
1
63.2R003.15L VSSLT2 D15 68.00206.121
1
2
SC22U6D3V5MX-2GP NB_LDT_STOP# POWERGOOD VSSLT4
C10 C20
2
CLOCKs PM
3 CLK_NBHT_CLK C25 HT_REFCLKP
3 CLK_NBHT_CLK# C24 HT_REFCLKN
1D1V_S0
RN2 E11
3 CLK_NB_14M REFCLK_P/OSCIN
1 4 NB_REFCLK_N F11 E9
ENABLE External CLK GEN 2 3
REFCLK_N LVDS_DIGON
F7 GMCH_BL_ON
GMCH_LCDVDD_ON 18
LVDS_BLON
3 CLK_NB_GFX T2 GFX_REFCLKP LVDS_ENA_BL G12 LVDS_ENA_BL 1
1D8V_S0 SRN1KJ-7-GP T1 RN1 TP52
3 CLK_NB_GFX# GFX_REFCLKN
L15 2 3
1 2 VDDA18HTPLL TP215 1CLK_NBGPP_CLK U1 1 4
B FCM1608CF-221T02-GP TP216 GPP_REFCLKP B
1CLK_NBGPP_CLK# U2 GPP_REFCLKN
1
SCD1U10V2KX-4GP
68.00217.521 V4
3 CLK_NB_GPPSB GPPSB_REFCLKP
2ND = 68.00119.111 V3 1 TR 2
3 CLK_NB_GPPSB#
2
SCD1U10V2KX-4GP
1
1 2 RS780_AUX_CAL C8 AUX_CAL R31
VCC_NB 1.0V 1.1V
R192 1K8R2F-GP
150R2F-1-GP RS780M-GP-U2
2
1D8V_S0 3D3V_S0
PX Select
1
1
A
TC12 R201 TR-UMA-MUX A
ST100U6D3VBM-5GP 2K2R2J-2-GP 1 2 LVDS_ENA_BL
77.C1071.081 DY R459 0R2J-2-GP
Wistron Corporation
2
2ND = 77.21071.07L
2
STRP_DATA PU-UMA for PU 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1 2 GMCH_BL_ON Taipei Hsien 221, Taiwan, R.O.C.
34,51 BLON_IN
R458 0R2J-2-GP
TR-UMA-MUX Title
1 2
18,51 BRIGHTNESS_AMD
R460 0R2J-2-GP RS780 (2 of 3)
Size Document Number Rev
SJV50-TR -1
Near NB Date: Monday, June 29, 2009 Sheet 9 of 59
5 4 3 2 1
5 4 3 2 1
ANB1F
1D1V_S0
0.6A per ANT Rev1.1, Page3
A25 VSSAHT1 VSSAPCIE1 A2
L43 D23 PART 6/6 B1
+1.1V_RUN_VDDHT 1D1V_S0 VSSAHT2 VSSAPCIE2
1 2 ANB1E E22 VSSAHT3 VSSAPCIE3 D3
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
PBY201209T-221Y-N-GP C55 C54 C52 300mil Width G22 D5
VSSAHT4 VSSAPCIE4
1
220 ohm @ 68.00206.121
100MHz,2A C587 J17 A6 G24 E4
VDDHT_1 VDDPCIE_1 VSSAHT5 VSSAPCIE5
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
K16 VDDHT_2 PART 5/6 VDDPCIE_2 B6 G25 VSSAHT6 VSSAPCIE6 G1
1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
2ND = 68.00216.161 L16 C6 C58 C59 C56 C57 C577 H19 G2
2
VDDHT_3 VDDPCIE_3 VSSAHT7 VSSAPCIE7
DY-C.D.
DY-C.D.
M16 VDDHT_4 VDDPCIE_4 D6 J22 VSSAHT8 VSSAPCIE8 G4
D P16 E6 L17 H7 D
2
VDDHT_5 VDDPCIE_5 VSSAHT9 VSSAPCIE9
R16 VDDHT_6 VDDPCIE_6 F6 L22 VSSAHT10 VSSAPCIE10 J4
T16 VDDHT_7 VDDPCIE_7 G7 L24 VSSAHT11 VSSAPCIE11 R7
VDDPCIE_8 H8 L25 VSSAHT12 VSSAPCIE12 L1
H18 VDDHTRX_1 VDDPCIE_9 J9 M20 VSSAHT13 VSSAPCIE13 L2
1D1V_S0 0.45A per ANT Rev1.1, Page3 G19 K9 N22 L4
L45 VDDHTRX_2 VDDPCIE_10 VSSAHT14 VSSAPCIE14
F20 VDDHTRX_3 VDDPCIE_11 M9 P20 VSSAHT15 VSSAPCIE15 L7
1 2 +1.1V_RUN_VDDHTRX E21 L9 R19 M6
VDDHTRX_4 VDDPCIE_12 VSSAHT16 VSSAPCIE16
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
PBY201209T-221Y-N-GP C81 C89 C72 D22 P9 7A per ANT Rev1.1, Page3 R22 N4
1 VDDHTRX_5 VDDPCIE_13 VSSAHT17 VSSAPCIE17
1
220 ohm @ 100MHz,2A C594
68.00206.121
B23 VDDHTRX_6 VDDPCIE_14 R9 +NB_VCORE R24 VSSAHT18 VSSAPCIE18 P6
2ND = 68.00216.161
A23 VDDHTRX_7 VDDPCIE_15 T9 Per check list (Rev 0.02) R25 VSSAHT19 VSSAPCIE19 R1
V9 H20 R2
2
2
VDDPCIE_16 1D1V_S0 VSSAHT20 VSSAPCIE20
AE25 VDDHTTX_1 VDDPCIE_17 U9 RS780M: 1V ~ 1.1V, check PWR team U22 VSSAHT21 VSSAPCIE21 R4
AD24 VDDHTTX_2 V19 VSSAHT22 VSSAPCIE22 V7
GROUND
AC23 VDDHTTX_3 VDDC_1 K12 W22 VSSAHT23 VSSAPCIE23 U4
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1D2V_S0 AB22 J14 C39 C51 C26 C28 C19 C27 W24 V8
VDDHTTX_4 VDDC_2 VSSAHT24 VSSAPCIE24
1
AA21 U16 C37 C67 W25 V6
L44 VDDHTTX_5 VDDC_3 VSSAHT25 VSSAPCIE25
Y20 VDDHTTX_6 VDDC_4 J11 Y21 VSSAHT26 VSSAPCIE26 W1
1 2 +1.2V_RUN_VDDHTTX W19 K15 AD25 W2
2
VDDHTTX_7 VDDC_5 VSSAHT27 VSSAPCIE27
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
PBY201209T-221Y-N-GP C599 C598 C79 C61 V18 M12 W4
VDDHTTX_8 VDDC_6 VSSAPCIE28
1
POWER
220 ohm @ 68.00206.121
100MHz,2A C88 U17 L14 L12 W7
VDDHTTX_9 VDDC_7 VSS11 VSSAPCIE29
T17 VDDHTTX_10 VDDC_8 L11 M14 VSS12 VSSAPCIE30 W8
2ND = 68.00216.161 R17 M13 N13 Y6
2
2
VDDHTTX_11 VDDC_9 VSS13 VSSAPCIE31
P17 VDDHTTX_12 VDDC_10 M15 P12 VSS14 VSSAPCIE32 AA4
M17 VDDHTTX_13 VDDC_11 N12 P15 VSS15 VSSAPCIE33 AB5
VDDC_12 N14 R11 VSS16 VSSAPCIE34 AB1
J10 VDDA18PCIE_1 VDDC_13 P11 R14 VSS17 VSSAPCIE35 AB7
1D8V_S0 P10 P13 T12 AC3
VDDA18PCIE_2 VDDC_14 VSS18 VSSAPCIE36
K10 VDDA18PCIE_3 VDDC_15 P14 U14 VSS19 VSSAPCIE37 AC4
C L3 80mil Width M10 R12 U11 AE1 C
+1.8V_RUN_VDDA18PCIE VDDA18PCIE_4 VDDC_16 VSS20 VSSAPCIE38
1 2 L10 VDDA18PCIE_5 VDDC_17 R15 U15 VSS21 VSSAPCIE39 AE4
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1
SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
RS780M-GP-U2
1
C568 C36 C35
SC1U10V2KX-1GP
2
2
B ANB1D B
MEM_COMP_P and MEM_COMP_N trace
PAR 4 OF 6 width >=10mils and 10mils spacing from
AB12 MEM_A0 MEM_DQ0/DVO_VSYNC AA18
AE16 MEM_A1 MEM_DQ1/DVO_HSYNC AA20 other Signals in X,Y,Z directions
V11 MEM_A2 MEM_DQ2/DVO_DE AA19
AE15 MEM_A3 MEM_DQ3/DVO_D0 Y19
AA12 V17 1D8V_S0
MEM_A4 MEM_DQ4
AB16 MEM_A5 MEM_DQ5/DVO_D1 AA17
AB14 MEM_A6 MEM_DQ6/DVO_D2 AA15 1 R226 2
AD14 Y15 0R0402-PAD
MEM_A7 MEM_DQ7/DVO_D4
AD13 MEM_A8 MEM_DQ8/DVO_D3 AC20
AD15 MEM_A9 MEM_DQ9/DVO_D5 AD19
SBD_MEM/DVO_I/F
Title
RS780 (3 of 3)
Size Document Number Rev
WWW.AliSaler.Com SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 10 of 59
5 4 3 2 1
5 4 3 2 1
33R2J-2-GP ASB1A
R339
1 2 NB_RST# N2
SB700 P4 PCI_CLK0 1 TP237
9 PLT_RST1# A_RST# PCICLK0
Part 1 of 5 P3 PCI_CLK1 1 TP238
PCICLK1
PCI CLKS
1 2 ALINK_NBRX_C_SBTX_P0 V23 P1 PCI_CLK2 15
8 ALINK_NBRX_SBTX_P0 PCIE_TX0P PCICLK2
C703 1 2 SCD1U10V2KX-4GP ALINK_NBRX_C_SBTX_N0 V22 P2 PCI_CLK3 15
8 ALINK_NBRX_SBTX_N0 PCIE_TX0N PCICLK3
C701 1 2 SCD1U10V2KX-4GP ALINK_NBRX_C_SBTX_P1 V24 T4 CLK_PCI4 15
8 ALINK_NBRX_SBTX_P1 PCIE_TX1P PCICLK4
C291 1 2 SCD1U10V2KX-4GP ALINK_NBRX_C_SBTX_N1 V25 T3 CLK_PCI_LOM 15
8 ALINK_NBRX_SBTX_N1 PCIE_TX1N PCICLK5/GPIO41
C296 1 2 SCD1U10V2KX-4GP ALINK_NBRX_C_SBTX_P2 U25
8 ALINK_NBRX_SBTX_P2 PCIE_TX2P
C311 1 2 SCD1U10V2KX-4GP ALINK_NBRX_C_SBTX_N2 U24
D 8 ALINK_NBRX_SBTX_N2
C304 1 2 SCD1U10V2KX-4GP ALINK_NBRX_C_SBTX_P3 T23
PCIE_TX2N for TR D
8 ALINK_NBRX_SBTX_P3 PCIE_TX3P
C709 1 2 SCD1U10V2KX-4GP ALINK_NBRX_C_SBTX_N3 T22 N1 PCIRST#_SB 1 TP172
8 ALINK_NBRX_SBTX_N3 PCIE_TX3N PCIRST# 3D3V_S5
C705 SCD1U10V2KX-4GP
14
8 ALINK_NBTX_C_SBRX_P1 U19 PCIE_RX1P AD1 P7
8 ALINK_NBTX_C_SBRX_N1 V19 PCIE_RX1N AD2 V4
8 ALINK_NBTX_C_SBRX_P2 R20 T1 PLT_RST1#_B 9
PCIE_RX2P AD3 PE_RST
8 ALINK_NBTX_C_SBRX_N2 R21 PCIE_RX2N AD4 V3
PE_GPIO0 10
TR-MUX 8
8 ALINK_NBTX_C_SBRX_P3 R18 PCIE_RX3P AD5 U1
8 ALINK_NBTX_C_SBRX_N3 R17 PCIE_RX3N AD6 V1
1D2V_S0 +1.2V_RUN_PCIE_PVDD PCIE_VDDR V2 TSLVC08APW-1-GP
7
R144 AD7
1 2 562R2F-GP PCIE_CALRP T25 PCIE_CALRP AD8 T2 73.07408.L16
R146 1 2 2K05R2F-GP PCIE_CALRN T24 W1 2ND = 73.07408.L15
L36 PCIE_CALRN AD9
20mil Width AD10 T9
1 2 P24 PCIE_PVDD AD11 R6
PBY201209T-221Y-N-GP R7
AD12
1
3D3V_M92 3D3V_S5
SC1U10V2KX-1GP
SC1U10V2KX-1GP
AD15
1
AD16 Y7
TR-MUX R510 U73D
14
AD17 W8
V9 10KR2F-2-GP
AD18
AD19 Y8 12
AA8 TR-MUX 11 M92_RST# 50
2
AD20
AD21 Y4 47 RT8202_PGOOD_VGA 13
AD22 Y3
1
Y2 TR-MUX C862 TSLVC08APW-1-GP
PCI_AD23 15
7
C AD23 SCD1U10V2KX-4GP C
AD24 AA2 PCI_AD24 15 73.07408.L16
AB4 PCI_AD25 15
2
AD25
3D3V_S5 3 CLK_PCIE_SB N25 PCIE_RCLKP/NB_LNK_CLKP AD26 AA1 PCI_AD26 15 2ND = 73.07408.L15
3 CLK_PCIE_SB# N24 PCIE_RCLKN/NB_LNK_CLKN AD27 AB3 PCI_AD27 15
AD28 AB2 PCI_AD28 15
K23 NB_DISP_CLKP AD29 AC1 PCI_AD29 15
K22 NB_DISP_CLKN AD30 AC2 PCI_AD30 15
PCI INTERFACE
AD31 AD1
U6D
14
SLT_GFX_CLKP IRDY#
M22 SLT_GFX_CLKN TRDY# Y5 PE_GPIO0 VGA RESET H:Enable
73.07408.L16 PAR U6
J19 GPP_CLK0P STOP# W6 PE_GPIO1 VGA POWER ENABLE H:Enable
2ND = 73.07408.L15 J18 GPP_CLK0N PERR# W4
SERR# V7
L20 AC3 3D3V_S0
GPP_CLK1P REQ0#
L19 GPP_CLK1N REQ1# AD4
REQ2# AB7
1
M19 GPP_CLK2P REQ3#/GPIO70 AE6
R482
CLOCK GENERATOR
M20 AB6 DY
For SB710 N22
GPP_CLK2N
GPP_CLK3P
REQ4#/GPIO71
GNT0#
GNT1#
AD2
AE4
10KR2J-3-GP
PX Select
P22 AD5
2
GPP_CLK3N GNT2#
B TR GNT3#/GPIO72 AC6 PE_GPIO1 39,47 B
C385 2 1 25M_X1 L18 AE5
3 CLK_SB_14M 25M_48M_66M_OSC GNT4#/GPIO73
SC10P50V2JN-4GP R345 0R2J-2-GP AD6
CLKRUN# PM_CLKRUN# 34
2 1 32K_X1 V5
LOCK#
J21 25M_X1
AD3 INT_PIRQE# 1 TP160
INTE#/GPIO33 INT_PIRQF# 1 TP229
INTF#/GPIO34 AC4
AE2 INT_PIRQG# 1 TP161
PX Select
INTG#/GPIO35
3
LPCCLK1 EC511
A3 H24 LPC_LAD0 34,35,58 RF_UMA 2SC10P50V2JN-4GP
2
X1 LAD0 EC501
LAD1 H23 LPC_LAD1 34,35,58 RF_UMA 2SC10P50V2JN-4GP
RTC XTAL
SCD1U16V2ZY-2GP
1
1
A
C763 C762 A
SB700-1-GP-U1
71.SB700.M02
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
SB700 (1 of 5)
Size Document Number Rev
SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 11 of 59
5 4 3 2 1
5 4 3 2 1
3D3V_S0
ASB1D
20090114 SB
1
SB700 Part 4 of 5
9,39 NB_PWRGD 2 1 NB_PWRGD_R R347 TP179 1ICH_PME# E1
0R2J-2-GP R330 4K7R2F-GP TP178 PCI_PME#/GEVENT4#
DY 1 RI# E2 RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC C8 CLK48_USB
CLK48_USB 3
TP244 1 S2# H7 SLP_S2/GPM9# USB_PCOMP1
F5 G8 2
2
1D8V_S0 28,33,34,39,47,48 PM_SLP_S3# SLP_S3# USB_RCOMP R355 2CLK48_USB_R2
USB MISC
34,44,46 PM_SLP_S5# G1 SLP_S5# 11K8R2F-GP
1
R364
DY 1 DY2
C767
USB 1.1
R353 10KR2J-3-GP GA20IN/GEVENT0# USB_FSD12P
34 KBRCIN# W15 KBRST#/GEVENT1# USB_FSD12N E8
K4 signals in X, Y, Z directions.
FP_ID 34 ECSCI#_SB ECSMI#_KBC LPC_PME#/GEVENT3#
1 2 K24 LPC_SMI#/EXTEVNT1# USB_HSD11P H11 USBPP11 31
R329 10KR2J-3-GP TP177 1 GEVENT5# F1 J10 USBPN11 31
TP175 SYS_RST# S3_STATE/GEVENT5# USB_HSD11N
1 J2 SYS_RESET#/GPM7#
25 PCIE_WAKE# H6 WAKE#/GEVENT8# USB_HSD10P E11 USBPP10 18
3D3V_S5 34 EC_TMR F2 F11 USBPN10 18 USB
SMB_ALERT# BLINK/GPM6# USB_HSD10N
J6 SMBALERT#/THRMTRIP#/GEVENT2#
1 DY 2 SB_TEST2 NB_PWRGD_R W14 A11 USBPP9 32 Pair Device
R351 2K2R2F-GP NB_PWRGD USB_HSD9P
USB_HSD9N B11 USBPN9 32
1 DY 2 SB_TEST1 RSMRST#_KBC D3
R349 2K2R2F-GP RSMRST#
USB_HSD8P C10 USBPP8 24 11 CardReader
1 DY 2 SB_TEST0 D10 USBPN8 24
R348 2K2R2F-GP USB_HSD8N
10 CCD
FP_ID AE18 G11 USBPP7 24,58
TP228 GPIO6 SATA_IS0#/GPIO10 USB_HSD7P
PX Select 1 AD18 CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSD7N H12 USBPN7 24,58 9 Mini Card2
1 DY 2 ICH_PME# TP230 1 GPIO4 AA19
R148 10KR2J-3-GP HDMI SMARTVOLT/SATA_IS2#/GPIO4
W17 CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSD6P E12 USBPP6 24 8 USB4
1 DY 2 PCIE_WAKE# TP251 1 MXM_PWR_EN V17 E14 USBPN6 24
R350 10KR2J-3-GP CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSD6N
W20 CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40 7 USB3 OCP2#
1 DY 2 SMB_ALERT# 27 ACZ_SPKR W21 C12 USBPP5 23,58
SPKR/GPIO2 USB_HSD5P
USB 2.0
R341 10KR2J-3-GP SB_MEM_CLK 6 USB2
SB_MEM_DAT
AA18
W18
SCL0/GPOC0# USB_HSD5N D12 USBPN5 23,58 OCP1#
RN65 SDA0/GPOC1#
SB_ASF_CLK K1 SCL1/GPOC2# USB_HSD4P B12 5 BlueTooth
8 1 PM_SLP_S5# SB_ASF_DAT K2 A12
SDA1/GPOC3# USB_HSD4N
GPIO
C 7 2 ECSCI#_SB TP232 1 DDC1_SCL AA20 4 NC C
ECSWI#_SB TP234 DDC1_SDA DDC1_SCL/GPIO9
6 3 1 Y18 DDC1_SDA/GPIO8 USB_HSD3P G12
5 4 PM_SLP_S3# TP182 1 SATA_DET# C1 G14 3 NC
TP235 GPIO5 LLB#/GPIO66 USB_HSD3N
1 Y19 SHUTDOWN#/GPIO5
SRN10KJ-6-GP TP248 1 GEVENT7# G5 H14 2 NC
DDR3_RST#/GEVENT7# USB_HSD2P
USB_HSD2N H15
1 Mini Card1
USB_HSD1P A13 USBPP1 32
USB_HSD1N B13 USBPN1 32 0 USB1 OCP0#
USB_HSD0P B14 USBPP0 24
34 ECSWI#_SB B9 USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N A14 USBPN0 24
TP190 1USB_OC#5 B8
TP194 USB_OC5#/IR_TX0/GPM5#
1USB_OC#4 A8 USB_OC4#/IR_RX0/GPM4# IMC_GPIO8 A18
USB OC
Close to SB700 24,58 USB_OC#3
TP250
A9 USB_OC3#/IR_RX1/GPM3# IMC_GPIO9 B18
1 E5 USB_OC2#/GPM2# IMC_PWM0/IMC_GPIO10 F21
30 ACZ_BITCLK_MDC 2 1 TP193 1 F8 D21
R462 33R2J-2-GP USB_OC1#/GPM1# SCL2/IMC_GPIO11
24 USB_OC#0 E4 USB_OC0#/GPM0# SDA2/IMC_GPIO12 F19
27 ACZ_BITCLK 1 2 SCL3_LV/IMC_GPIO13 E20
R346 33R2J-2-GP ACZ_BTCLK_R M1 E21
ACZ_SDATAOUT_R AZ_BITCLK SDA3_LV/IMC_GPIO14
27,30 ACZ_SDATAOUT 1 2 M2 AZ_SDOUT IMC_PWM1/IMC_GPIO15 E19
27 ACZ_SDATAIN0 R342 33R2J-2-GP J7 D19 SB_GPO16 15
AZ_SDIN0/GPIO42 IMC_PWM2/IMC_GPO16
30 ACZ_SDATAIN1 J8 AZ_SDIN1/GPIO43 IMC_PWM3/IMC_GPO17 E18 SB_GPO17 15
HD AUDIO
TP240 1ACZ_SDIN2 L8
TP239 AZ_SDIN2/GPIO44
1ACZ_SDIN3 M3 AZ_SDIN3/GPIO46 IMC_GPIO18 G20
ACZ_SYNC_R
27,30 ACZ_SYNC
27,30 ACZ_RST#
1 2
R333 1 33R2J-2-GP
2 ACZ_RST#_R
L6
M4
AZ_SYNC IMC_GPIO19 G21
D25
Strap Pin / define to use LPC or SPI ROM
R338 33R2J-2-GP TP241 GPM8# AZ_RST# IMC_GPIO20
1 L5 D24
INTEGRATED uC
AZ_DOCK_RST#/GPM8# IMC_GPIO21
IMC_GPIO22 C25
B EC122 EC49 EC48 EC83 EC84 B
IMC_GPIO23 C24
2
SC12P50V2JN-3GP
SC12P50V2JN-3GP
SC12P50V2JN-3GP
SC12P50V2JN-3GP
IMC_GPIO25 C23
TO STRAPS
1
IMC_GPIO26 B24
DY DY DY DY DY IMC_GPIO27 B23
IMC_GPIO28 A23
IMC_GPIO29 C22
A22 3D3V_S5 3D3V_S0
IMC_GPIO30
IMC_GPIO31 B22
IMC_GPIO32 B21
IMC_GPIO33 A21
5
6
7
8
H19 IMC_GPIO0 IMC_GPIO34 D20
H20 C20 RN63
INTEGRATED uC
IMC_GPIO1 IMC_GPIO35
H21 SPI_CS2#/IMC_GPIO2 IMC_GPIO36 A20
F25 B20 SRN2K2J-2-GP
IDE_RST#/F_RST#/IMC_GPO3 IMC_GPIO37
IMC_GPIO38 B19
D22 A19
4
3
2
1
IMC_GPIO4 IMC_GPIO39
E24 IMC_GPIO5 IMC_GPIO40 D18
E25 IMC_GPIO6 IMC_GPIO41 C18 SB_ASF_CLK
D23 IMC_GPIO7 SB_ASF_DAT
3,16,17 SB_MEM_CLK
3,16,17 SB_MEM_DAT
SB700-1-GP-U1
71.SB700.M02
3D3V_S5
<Core Design>
A
HDMI A
1
1
R362
R328
10KR2J-3-GP
10KR2J-3-GP Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
DY
2
RSMRST#_KBC
2
34 RSMRST#_KBC Title
SB700 (2 of 5)
Size Document Number Rev
SJV50-TR -1
WWW.AliSaler.Com 5 4 3 2
Date: Monday, June 29, 2009 Sheet
1
12 of 59
5 4 3 2 1
D ASB1B D
Delete Test Pad
AD9
SB700 AA24
21 SATA_TXP0 SATA_TX0P IDE_IORDY
21 SATA_TXN0 AE9 SATA_TX0N Part 2 of 5 IDE_IRQ AA25
SATA HDD IDE_A0 Y22
21 SATA_RXN0 AB10 SATA_RX0N IDE_A1 AB23
21 SATA_RXP0 AC10 SATA_RX0P IDE_A2 Y23
IDE_DACK# AB24
22 SATA_TXP1 AE10 SATA_TX1P IDE_DRQ AD25
22 SATA_TXN1 AD10 SATA_TX1N IDE_IOR# AC25
SATA ODD IDE_IOW# AC24
22 SATA_RXN1 AD11 SATA_RX1N IDE_CS1# Y25
22 SATA_RXP1 AE11 SATA_RX1P IDE_CS3# Y24
ATA 66/100/133
IDE_D2/GPIO17
AE12 SATA_RX2N IDE_D3/GPIO18 AC22
AD12 SATA_RX2P IDE_D4/GPIO19 AD21
IDE_D5/GPIO20 AE20
AD13 SATA_TX3P IDE_D6/GPIO21 AB20
SERIAL ATA
AE13 SATA_TX3N IDE_D7/GPIO22 AD19
IDE_D8/GPIO23 AE19
AB14 SATA_RX3N IDE_D9/GPIO24 AC20
AC14 SATA_RX3P IDE_D10/GPIO25 AD20
IDE_D11/GPIO26 AE21
AE14 SATA_TX4P IDE_D12/GPIO27 AB22
AD14 SATA_TX4N IDE_D13/GPIO28 AD22
IDE_D14/GPIO29 AE23
C AD15 AC23 C
SATA_RX4N IDE_D15/GPIO30
AE15 SATA_RX4P
C244
Very Close to SB700 AB16
AC16
SATA_TX5P
SC15P50V2JN-2-GP SATA_TX5N SB_SPI_MISO TP247
SPI_DI/GPIO12 G6 1
2 1 AE16 D2 SPI_MOSI_R 1 TP181
R336 SATA_RX5N SPI_DO/GPIO11 ICH_SPICLK TP180
AD16 SATA_RX5P SPI_CLK/GPIO47 D1 1
1
SPI ROM
XTAL-25MHZ-102-GP R134 1 2 SATA_CAL V12 F3 ICH_SPICS0# 1 TP249
82.30020.851 10MR2J-L-GP SATA_CAL SPI_CS#/GPIO32
2ND = 82.30020.791 SATA_X1 Y12 U15 LAN_RST# 1 TP236
2
1
2
1D2V_S0 PLLVDD_SATA AA11 P5
PLLVDD_SATA FANIN0/GPIO50 20081201
SATA PWR
20mil Width FANIN1/GPIO51 P8
1 R332 2 W12 XTLVDD_SATA FANIN2/GPIO52 R8
0R0603-PAD RN66
1
SC1U10V2KX-1GP B6
4
3
TEMPIN0/GPIO61
A6
2
TEMPIN1/GPIO62
A5 PSW_CLR# 58
HW MONITOR
TEMPIN2/GPIO63
Close to SB700 TEMPIN3/TALERT#/GPIO64 B5 ALERT#_SB 33
A4 PSW_CLR#
VIN0/GPIO53
VIN1/GPIO54 B4
B 3D3V_S0 C4 B
XTLVDD_SATA VIN2/GPIO55
VIN3/GPIO56 D4
20mil Width VIN4/GPIO57 D5
1 R335 2 VIN5/GPIO58 D6
0R0603-PAD A7
VIN6/GPIO59
1
C706 B7
SC1U10V2KX-1GP VIN7/GPIO60
AVDD_HWM 3D3V_S5
2
1
R359 R360
SCD1U10V2KX-4GP
SC2D2U6D3V3KX-GP
DY
SB700-1-GP-U1
2
71.SB700.M02
3D3V_S0
Layout connect to Cap then GND
1
R337
10KR2J-3-GP
2
38 MEDIA_LED# MEDIA_LED#
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SA_20081030
Title
SB700 (3 of 5)
Size Document Number Rev
-1
SJV50-TR
Date: Monday, June 29, 2009 Sheet 13 of 59
5 4 3 2 1
5 4 3 2 1
ASB1C
1D2V_S0 ASB1E
L9
SB700 L15
VDDQ_1 VDD_1
M9 VDDQ_2 Part 3 of 5 VDD_2 M12 SB700 Part 5 of 5
3D3V_S0 T15 M14 A2
VDDQ_3 VDD_3 VSS_1
1
U9 N13 C730 C731 C718 C375 A25
VDDQ_4 VDD_4 VSS_2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SC10U10V5ZY-1GP
CORE S0
U16 VDDQ_5 VDD_5 P12 VSS_3 B1
PCI/GPIO I/O
D 3D3V_S0 U17 P14 D7 D
2
VDDQ_6 VDD_6 VSS_4
V8 VDDQ_7 VDD_7 R11 T10 AVSS_SATA_1 VSS_5 F20
W7 VDDQ_8 VDD_8 R15 U10 AVSS_SATA_2 VSS_6 G19
Y6 VDDQ_9 VDD_9 T16 U11 AVSS_SATA_3 VSS_7 H8
1
1
C279 C708 C714 C717 C702 C732 AA4 U12 K9
VDDQ_10 AVSS_SATA_4 VSS_8
SC10U10V5ZY-1GP
SC4D7U6D3V3KX-GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AB5 VDDQ_11 V11 AVSS_SATA_5 VSS_9 K11
DY-C.D.
DY-C.D.
DY-C.D.
AB21 V14 K16
2
2
VDDQ_12 AVSS_SATA_6 VSS_10
W9 AVSS_SATA_7 VSS_11 L4
Y9 AVSS_SATA_8 VSS_12 L7
CKVDD 1D2V_S0 Y11 L10
AVSS_SATA_9 VSS_13
Y14 AVSS_SATA_10 VSS_14 L11
Y20 VDD33_18_1 CKVDD_1.2V_1 L21 1 R147 2 Y17 AVSS_SATA_11 VSS_15 L12
AA21 L22 0R0402-PAD AA9 L14
VDD33_18_2 CKVDD_1.2V_2 AVSS_SATA_12 VSS_16
1
IDE/FLSH I/O
CLKGEN I/O
AA22 L24 C369 C370 AB9 L16
VDD33_18_3 CKVDD_1.2V_3 SB 980515 AVSS_SATA_13 VSS_17
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
AE25 VDD33_18_4 CKVDD_1.2V_4 L25 AB11 AVSS_SATA_14 VSS_18 M6
DY DY AB13 M10
2
1D2V_S0 AVSS_SATA_15 VSS_19
AB15 AVSS_SATA_16 VSS_20 M11
PCIE_VDDR AB17 M13
L33 AVSS_SATA_17 VSS_21
50mil Width AC8 AVSS_SATA_18 VSS_22 M15
1 2 AD8 AVSS_SATA_19 VSS_23 N4
PBY201209T-221Y-N-GP AE8 N12
AVSS_SATA_20 VSS_24
1
1
220 ohm 2A C334 C721 C722 C724 N14
POWER VSS_25
SC4D7U6D3V3KX-GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
68.00206.121 VSS_26 P6
2ND = 68.00216.161 P9
2
2
3D3V_S5 VSS_27
VSS_28 P10
P18 PCIE_VDDR_1 A15 AVSS_USB_1 VSS_29 P11
P19 PCIE_VDDR_2 B15 AVSS_USB_2 VSS_30 P13
P20 C14 P15
A-LINK I/O
PCIE_VDDR_3 AVSS_USB_3 VSS_31
1
P21 A17 C760 C729 C728 C757 D8 R1
PCIE_VDDR_4 S5_3.3V_1 AVSS_USB_4 VSS_32
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
R22 PCIE_VDDR_5 S5_3.3V_2 A24 DY D9 AVSS_USB_5 VSS_33 R2
C R24 B17 D11 R4 C
2
PCIE_VDDR_6 S5_3.3V_3 AVSS_USB_6 VSS_34
R25 J4 D13 R9
3.3V_S5 I/O
PCIE_VDDR_7 S5_3.3V_4 AVSS_USB_7 VSS_35
GROUND
S5_3.3V_5 J5 D14 AVSS_USB_8 VSS_36 R10
S5_3.3V_6 L1 D15 AVSS_USB_9 VSS_37 R12
S5_3.3V_7 L2 E15 AVSS_USB_10 VSS_38 R14
1D2V_S0 AVDD_SATA
L28
50mil Width 50mil Width F12 AVSS_USB_11 VSS_39 T11
F14 AVSS_USB_12 VSS_40 T12
1 2 AA14 AVDD_SATA_1 G9 AVSS_USB_13 VSS_41 T14
PBY201209T-221Y-N-GP 1D2V_S5
DY AB18 AVDD_SATA_4 H9 AVSS_USB_14 VSS_42 U4
1
EC85 68.00206.121 C218 C241 C712 C700 C699 AA15 H17 U14
AVDD_SATA_2
SATA I/O
AVSS_USB_15 VSS_43
1
1
SCD1U16V2ZY-2GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
CORE S5
AC18 G4 J11 Y21
2
1
DY-C.D.
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
AE17 AVDD_SATA_7 J14 AVSS_USB_19 VSS_47 AB19
DY-C.D.
J15 AB25
2
AVSS_USB_20 VSS_48
USB_PHY_1.2V_1 A10 K10 AVSS_USB_21 VSS_49 AE1
USB_PHY_1.2V_2 B10 K12 AVSS_USB_22 VSS_50 AE24
K14 AVSS_USB_23
K15 AVSS_USB_24
PCIE_CK_VSS_9 P23
PCIE_CK_VSS_10 R16
5V_S0 R19
R128 PCIE_CK_VSS_11
Use Plane Shape for +3.3V_AVDD_USB PCIE_CK_VSS_12 T17
A16 AE7 V5_VREF 2 1 U18
3D3V_S5 AVDDTX_0 V5_VREF PCIE_CK_VSS_13
B16 AVDDTX_1 H18 PCIE_CK_VSS_1 PCIE_CK_VSS_14 U20
1
L38 C16 J16 AVDDCK_3D3V C251 C255 1KR2J-1-GP J17 V18
AVDDTX_2 AVDDCK_3.3V 3D3V_S0 PCIE_CK_VSS_2 PCIE_CK_VSS_15
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
1 2 D16 AVDDTX_3 J22 PCIE_CK_VSS_3 PCIE_CK_VSS_16 V20
PBY201209T-221Y-N-GP AVDD_USB D17 K17 AVDDK_1D2V 3D3V_S5 RB751V-40-2-GP K25 V21
2
AVDDTX_4 AVDDCK_1.2V PCIE_CK_VSS_4 PCIE_CK_VSS_17
PLL
1
C387 C383 C739 C751 C741 C754 F18 C752 C765 68.00206.121 83.R2004.B8F P16 W25
AVDDRX_2 PCIE_CK_VSS_8 PCIE_CK_VSS_21
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
G15 2ND = 68.00216.161
G17
AVDDRX_3 2ND = 83.R0304.A8F F9 L17
2
2
AVDDRX_4 AVSSC AVSSCK
DY-C.D.
3D3V_S0
20mil Width
AVDDCK_3D3V 2 1
R354 0R0603-PAD
1
1
C736 C737
SCD1U10V2KX-4GP SC1U10V2KX-1GP
2
2
1D2V_S0
AVDDK_1D2V
20mil Width
1 2
R344 0R0603-PAD
1
C727 C733
SCD1U10V2KX-4GP SC1U10V2KX-1GP
A A
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
SB700 (4 of 5)
Size Document Number Rev
WWW.AliSaler.Com 5 4 3 2
Date: Monday, June 29, 2009
SJV50-TR
Sheet
1
14 of 59
-1
A B C D E
Delete DY Parts
REQUIRED STRAPS
REQUIRED SYSTEM STRAPS
4 4
3D3V_S5
PCI_CLK2 11
PCI_CLK3 11
TP170 1 CLK_PCI4 11
TP171 1 CLK_PCI_LOM 11
PCLK_FWH 11,35,58
TP186 PCLK_KBC 11,34
1 RTC_CLK 11,33
3 ACZ_RST#_R 12 3
SB_GPO17 12
1 R340
1
2
1
2
RN29
1
2
SRN2K2J-1-GP
RN62
SRN10KJ-5-GP RN61
DEBUG STRAPS
4
3
SRN10KJ-5-GP
4
3
10KR2J-3-GP
SB_GPO16 12
4
3
TP169 1
TP168 PCI_AD23 11
1 PCI_AD24 11
TP231 1
TP166 PCI_AD25 11
1 PCI_AD26 11
TP164 1
TP165 PCI_AD27 11
1 PCI_AD28 11
TP163 1
TP162 PCI_AD29 11
1 PCI_AD30 11
2
CLK_PCI_LOM PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD30 2
PCI_CLK2 PCI_CLK3 CLK_PCI4 PCLK_FWH PCLK_KBC RTCCLK AZ_RST# SB_GPO17 , SB_GPO16 PCI_AD29
ROM TYPE: USE USE PCI USE ACPI USE IDE USE DEFAULT
PULL WatchDOG USE CLKGEN INTERNAL ENABLE PCI PULL LONG PLL BCLK PLL PCIE STRAPS Reserved
HIGH (NB_PWRGD) DEBUG IMC ENABLED RTC ROM BOOT H, H = Reserved HIGH RESET
ENABLED STRAPS ENABLED
(DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT)
(Use Internal) DEFAULT H, L = SPI ROM DEFAULT Reserved
RESERVED
EXT. RTC DISABLE PCI USE BYPASS BYPASS BYPASS IDE USE EEPROM Reserved
PULL WatchDog IGNORE IMC CLKGEN (PD on X1, ROM BOOT L, H = LPC ROM PULL SHORT PCI PLL ACPI PLL PCIE STRAPS
LOW (NB_PWRGD) DEBUG DISABLED DISABLED apply LOW RESET BCLK
DISABLED STRAPS (Use External) 32KHz to DEFAULT L, L = FWH ROM
DEFAULT DEFAULT DEFAULT DEFAULT RTC_CLK)
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
SB700 (5 of 5)
Size Document Number Rev
SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 15 of 59
A B C D E
A B C D E
1
25 198 C860 C859 1 8
5 MEM_MA_DATA9 DQ9 SA0 MEM_MA_ADD14 5
35 200 SC2D2U6D3V3KX-GP SCD1U10V2KX-4GP 2 7
5 MEM_MA_DATA10 DQ10 SA1 MEM_MA_ADD11 5
5 MEM_MA_DATA11 37 DY DY 3 6 MEM_MA_ADD7 5
2
DQ11
20 50 4 5
5
5
MEM_MA_DATA12
MEM_MA_DATA13 22
36
DQ12
DQ13
NC#50
NC#69 69
83
(A0) SRN47J-4-GP
MEM_MA_ADD6 5
NORMAL TYPE
5 MEM_MA_DATA19 DQ19 VDD MEM_MA_ADD1 5
5 MEM_MA_DATA20 44 DQ20 VDD 82
5 MEM_MA_DATA21 46 87 SRN47J-4-GP
DQ21 VDD MEM_MA_CLK0_P
5 MEM_MA_DATA22 56 88 RN32
DQ22 VDD
5 MEM_MA_DATA23 58 DQ23 VDD 95 1 8 MEM_MA0_CS#1 5
1
5 MEM_MA_DATA24 61 DQ24 VDD 96 2 7 MEM_MA0_ODT1 5
63 103 C198 3 6
5 MEM_MA_DATA25 DQ25 VDD SC1D5P50V2CN-1GP MEM_MA_CAS# 5
5 MEM_MA_DATA26 73 104 4 5 MEM_MA_WE# 5
2
DQ26 VDD MEM_MA_CLK0_N
3
5 MEM_MA_DATA27 75 DQ27 VDD 111 3
62 112 SRN47J-4-GP
5 MEM_MA_DATA28 DQ28 VDD
64 117 MEM_MA_CLK1_P
5 MEM_MA_DATA29 DQ29 VDD
5 MEM_MA_DATA30 74 DQ30 VDD 118
1
5 MEM_MA_DATA31 76 DQ31 Do not share the Term resistor between
123 3 C186
5 MEM_MA_DATA32
125
DQ32 VSS
8 SC1D5P50V2CN-1GP the DDR addess and Control Signals.
5 MEM_MA_DATA33
2
DQ33 VSS MEM_MA_CLK1_N
5 MEM_MA_DATA34 135 DQ34 VSS 9
5 MEM_MA_DATA35 137 DQ35 VSS 12
5 MEM_MA_DATA36 124 DQ36 VSS 15
5 MEM_MA_DATA37 126 DQ37 VSS 18
5 MEM_MA_DATA38 134 DQ38 VSS 21
5 MEM_MA_DATA39 136 DQ39 VSS 24
5 MEM_MA_DATA40 141 DQ40 VSS 27
143 28
5
5
5
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
151
153
DQ41
DQ42
DQ43
VSS
VSS
VSS
33
34
Decoupling Capacitor
140 39
5
5
MEM_MA_DATA44
MEM_MA_DATA45 142
DQ44 VSS
40
Put decap near power(0.9V) and pull-up resistor
DQ45 VSS
5 MEM_MA_DATA46 152 DQ46 VSS 41
5 MEM_MA_DATA47 154 DQ47 VSS 42
157 47 0D9V_S3
5 MEM_MA_DATA48 DQ48 VSS
5 MEM_MA_DATA49 159 DQ49 VSS 48
5 MEM_MA_DATA50 173 DQ50 VSS 53
5 MEM_MA_DATA51 175 DQ51 VSS 54
1
158 59 C459 C420 C446 C445 C421 C451 C453
5 MEM_MA_DATA52 DQ52 VSS
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC10P50V2JN-4GP
5 MEM_MA_DATA53 160 DQ53 VSS 60
5 MEM_MA_DATA54 174 65
2
DQ54 VSS
5 MEM_MA_DATA55 176 DQ55 VSS 66
5 MEM_MA_DATA56 179 DQ56 VSS 71
5 MEM_MA_DATA57 181 DQ57 VSS 72
5 MEM_MA_DATA58 189 DQ58 VSS 77
5 MEM_MA_DATA59 191 DQ59 VSS 78
5 MEM_MA_DATA60 180 DQ60 VSS 121
5 MEM_MA_DATA61 182 DQ61 VSS 122
5 MEM_MA_DATA62 192 DQ62 VSS 127
5 MEM_MA_DATA63 194 DQ63 VSS 128
VSS 132
5 MEM_MA_DQS0_N 11 DQS0# VSS 133
5 MEM_MA_DQS1_N 29 DQS1# VSS 138
49 139
2
5
5
5
MEM_MA_DQS2_N
MEM_MA_DQS3_N
MEM_MA_DQS4_N
68
129
DQS2#
DQS3#
DQS4#
VSS
VSS
VSS
144
145
Place these Caps near DM2
1D8V_S3
2
1
13 161 C811 C808 C810 C809 C444 C477 C402 C403 Layout Note:
5 MEM_MA_DQS0_P DQS0 VSS
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
31 162
5 MEM_MA_DQS1_P
51
DQS1 VSS
165 Place one cap close to every 2 pullup
5 MEM_MA_DQS2_P
2
DQS2 VSS
DY-C.D.
DY-C.D.
5 MEM_MA_DQS3_P 70 DQS3 VSS 168 resistors terminated to 0D9V_S3
5 MEM_MA_DQS4_P 131 DQS4 VSS 171
5 MEM_MA_DQS5_P 148 DQS5 VSS 172
5 MEM_MA_DQS6_P 169 DQS6 VSS 177
5 MEM_MA_DQS7_P 188 DQS7 VSS 178
VSS 183
5 MEM_MA0_ODT0 114 OTD0 VSS 184
5 MEM_MA0_ODT1 119 OTD1 VSS 187
VSS 190
VREF_DDR_MEM 1 VREF VSS 193
2 VSS VSS 196
1
SCD1U10V2KX-4GP
C873 C861
SC2D2U6D3V3KX-GP
202 GND GND 201 Place these Caps near PARALLEL TERMINATION 1D8V_S3
2
1
SKT-SODIMM20020U4GP C408 C409 C465 C467 C469 C448 C412 C411 C456
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
62.10017.661
2ND = 62.10017.A41
2
DY-C.D.
DY-C.D.
DY-C.D.
DY-C.D.
3RD = 62.10017.G81
Place C2.2uF and 0.1uF <
500mils from DDR connector
DDR_VREF
1D8V_S3 VREF_DDR_MEM
1
SCD1U10V2KX-4GP
1 C419 1
SC1KP50V2KX-1GP
RN30
2
1 4
SCD1U10V2KX-4GP
2 3
1
C417 C418
SRN1KJ-7-GP
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
DDR2 Socket_1
Size Document Number Rev
SJV50-TR -1
WWW.AliSaler.Com A B C D
Date: Monday, June 29, 2009 Sheet
E
16 of 59
A B C D E
PARALLEL TERMINATION
Put decap near power(0.9V) and pull-up resistor
4 4
0D9V_S3
DM2
RN41
1 8 MEM_MB0_ODT1 5
5 MEM_MB_ADD0 102 A0 RAS# 108 MEM_MB_RAS# 5 2 7 MEM_MB0_CS#1 5
5 MEM_MB_ADD1 101 A1 WE# 109 MEM_MB_WE# 5 3 6 MEM_MB_CAS# 5
5 MEM_MB_ADD2 100 A2 CAS# 113 MEM_MB_CAS# 5 4 5 MEM_MB_WE# 5
5 MEM_MB_ADD3 99 A3
98 110 SRN47J-4-GP
5 MEM_MB_ADD4 A4 CS0# MEM_MB0_CS#0 5
5 MEM_MB_ADD5 97 115 MEM_MB0_CS#1 5 RN38
A5 CS1#
5 MEM_MB_ADD6 94 A6 1 8 MEM_MB_BANK2 5
5 MEM_MB_ADD7 92 A7 CKE0 79 MEM_MB_CKE0 5 2 7 MEM_MB_CKE0 5
5 MEM_MB_ADD8 93 A8 CKE1 80 MEM_MB_CKE1 5 3 6 MEM_MB_ADD15 5
5 MEM_MB_ADD9 91 A9 4 5 MEM_MB_CKE1 5
5 MEM_MB_ADD10 105 A10/AP CK0 30 MEM_MB_CLK0_P 5
90 32 SRN47J-4-GP
5 MEM_MB_ADD11 A11 CK0# MEM_MB_CLK0_N 5
5 MEM_MB_ADD12 89 RN44
A12
5 MEM_MB_ADD13 116 A13 CK1 164 MEM_MB_CLK1_P 5 1 8 MEM_MB_BANK1 5
5 MEM_MB_ADD14 86 A14 CK1# 166 MEM_MB_CLK1_N 5 2 7 MEM_MB0_CS#0 5
5 MEM_MB_ADD15 84 A15 3 6 MEM_MB0_ODT0 5
85 A16/BA2 DM0 10 MEM_MB_DM0 5 4 5 MEM_MB_ADD13 5
5 MEM_MB_BANK2 DM1 26 MEM_MB_DM1 5
107 52 SRN47J-4-GP
5 MEM_MB_BANK0 BA0 DM2 MEM_MB_DM2 5
5 MEM_MB_BANK1 106 67 MEM_MB_DM3 5 RN39
BA1 DM3
DM4 130 MEM_MB_DM4 5 1 8 MEM_MB_ADD5 5
DM5 147 MEM_MB_DM5 5 2 7 MEM_MB_ADD8 5
5 MEM_MB_DATA0 5 DQ0 DM6 170 MEM_MB_DM6 5 3 6 MEM_MB_ADD12 5
5 MEM_MB_DATA1 7 DQ1 DM7 185 MEM_MB_DM7 5 4 5 MEM_MB_ADD9 5
5 MEM_MB_DATA2 17 DQ2
19 SRN47J-4-GP
5 MEM_MB_DATA3 DQ3
5 MEM_MB_DATA4 4 195 SB_MEM_DAT 3,12,16 RN40
DQ4 SDA 3D3V_S0
5 MEM_MB_DATA5 6 DQ5 SCL 197 SB_MEM_CLK 3,12,16 1 8 MEM_MB_BANK0 5
5 MEM_MB_DATA6 14 DQ6 2 7 MEM_MB_ADD10 5
5 MEM_MB_DATA7 16 DQ7 VDDSPD 199 3 6 MEM_MB_ADD1 5
5 MEM_MB_DATA8 23 DQ8 4 5 MEM_MB_ADD3 5
1
25 198 DIMM2_SA0 1 R177 2 DY C457 C454
5 MEM_MB_DATA9 DQ9 SA0
SC2D2U6D3V3KX-GP
SCD1U10V2KX-4GP
35 200 10KR2J-3-GP SRN47J-4-GP
5 MEM_MB_DATA10 DQ10 SA1
5 MEM_MB_DATA11 37 RN42
2
DQ11
20 50 1 8
3
5
5
MEM_MB_DATA12
MEM_MB_DATA13 22
36
DQ12
DQ13
NC#50
NC#69 69
83
(A1) 2
3
7
6
MEM_MB_ADD14 5
MEM_MB_ADD11 5
3
STANDARD TYPE
5 MEM_MB_DATA21 DQ21 VDD MEM_MB_ADD0 5
5 MEM_MB_DATA22 56 DQ22 VDD 88 4 5 MEM_MB_RAS# 5
5 MEM_MB_DATA23 58 DQ23 VDD 95
61 96 MEM_MB_CLK0_P SRN47J-4-GP
5 MEM_MB_DATA24 DQ24 VDD
5 MEM_MB_DATA25 63 DQ25 VDD 103
1
5 MEM_MB_DATA26 73 DQ26 VDD 104
75 111 C203 Do not share the Term resistor between
5 MEM_MB_DATA27 DQ27 VDD SC1D5P50V2CN-1GP
62 112
5 MEM_MB_DATA28 the DDR addess and Control Signals.
2
DQ28 VDD MEM_MB_CLK0_N
5 MEM_MB_DATA29 64 DQ29 VDD 117
5 MEM_MB_DATA30 74 DQ30 VDD 118
76 MEM_MB_CLK1_P
5 MEM_MB_DATA31 DQ31
5 MEM_MB_DATA32 123 DQ32 VSS 3
1
5 MEM_MB_DATA33 125 DQ33 VSS 8
135 9 C197
5 MEM_MB_DATA34 DQ34 VSS SC1D5P50V2CN-1GP
137 12
5 MEM_MB_DATA35
Decoupling Capacitor
2
DQ35 VSS MEM_MB_CLK1_N
5 MEM_MB_DATA36 124 DQ36 VSS 15
5 MEM_MB_DATA37 126 DQ37 VSS 18
134 21
5
5
MEM_MB_DATA38
MEM_MB_DATA39 136
DQ38 VSS
24
Put decap near power(0.9V) and pull-up resistor
DQ39 VSS
5 MEM_MB_DATA40 141 DQ40 VSS 27
5 MEM_MB_DATA41 143 DQ41 VSS 28
151 33 0D9V_S3
5 MEM_MB_DATA42 DQ42 VSS
5 MEM_MB_DATA43 153 DQ43 VSS 34
5 MEM_MB_DATA44 140 DQ44 VSS 39
5 MEM_MB_DATA45 142 DQ45 VSS 40
1
152 41 C450 C461 C452 C460 C424 C462 C423
5 MEM_MB_DATA46 DQ46 VSS
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC10P50V2JN-4GP
5 MEM_MB_DATA47 154 DQ47 VSS 42
5 MEM_MB_DATA48 157 47
2
DQ48 VSS
5 MEM_MB_DATA49 159 DQ49 VSS 48
5 MEM_MB_DATA50 173 DQ50 VSS 53
5 MEM_MB_DATA51 175 DQ51 VSS 54
5 MEM_MB_DATA52 158 DQ52 VSS 59
5 MEM_MB_DATA53 160 DQ53 VSS 60
2 174 65 2
5 MEM_MB_DATA54 DQ54 VSS
5 MEM_MB_DATA55 176 DQ55 VSS 66
5 MEM_MB_DATA56 179 DQ56 VSS 71
5 MEM_MB_DATA57 181 DQ57 VSS 72 DY-C.D.
5 MEM_MB_DATA58 189 DQ58 VSS 77
5 MEM_MB_DATA59 191 DQ59 VSS 78
5 MEM_MB_DATA60 180 DQ60 VSS 121
182 122
5
5
5
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
192
194
DQ61
DQ62
DQ63
VSS
VSS
VSS
127
128
1D8V_S3
Place these Caps near DM2
VSS 132
5 MEM_MB_DQS0_N 11 DQS0# VSS 133
1
29 138 C476 C475 C472 C473 C404 C478 C401 Layout Note:
5 MEM_MB_DQS1_N DQS1# VSS
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
5 MEM_MB_DQS2_N 49 139
68
DQS2# VSS
144 Place one cap close to every 2 pullup
5 MEM_MB_DQS3_N
2
DQS3# VSS
DY-C.D.
DY-C.D.
5 MEM_MB_DQS4_N 129 DQS4# VSS 145 resistors terminated to 0D9V_S3
5 MEM_MB_DQS5_N 146 DQS5# VSS 149
5 MEM_MB_DQS6_N 167 DQS6# VSS 150
5 MEM_MB_DQS7_N 186 DQS7# VSS 155
VSS 156
5 MEM_MB_DQS0_P 13 DQS0 VSS 161
5 MEM_MB_DQS1_P 31 DQS1 VSS 162
5 MEM_MB_DQS2_P 51 DQS2 VSS 165
5 MEM_MB_DQS3_P 70 DQS3 VSS 168
5 MEM_MB_DQS4_P 131 DQS4 VSS 171
5 MEM_MB_DQS5_P 148 DQS5 VSS 172
5 MEM_MB_DQS6_P 169 DQS6 VSS 177
5 MEM_MB_DQS7_P 188 DQS7 VSS 178
183
Place these Caps near PARALLEL TERMINATION 1D8V_S3
VSS 0D9V_S3
5 MEM_MB0_ODT0 114 OTD0 VSS 184
5 MEM_MB0_ODT1 119 OTD1 VSS 187
VSS 190
1
1
1 193 C466 C468 C463 C447 C443 C413 C410 C464 C407
VREF_DDR_MEM VREF VSS
SC10U6D3V5MX-3GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2 VSS VSS 196
1
1
SC2D2U6D3V3KX-GP
SCD1U10V2KX-4GP
C458
2
2
DY-C.D.
DY-C.D.
DY-C.D.
C455 C449 202 201
GND GND
DY
2
DDR2-200P-22-GP-U3
1 1
62.10017.A61
2ND = 62.10017.A51
3RD = 62.10017.G71
Place C2.2uF and 0.1uF < 9.2 mm
500mils from DDR connector
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
DDR2 Socket_2
Size Document Number Rev
SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 17 of 59
A B C D E
RN3
SC10U25V6KX-1GP
C4
LCD1 SRN0J-7-GP
41 UMA-MUX
2
40 1 RN7
LCD_TXAOUT2+ 1 8 GMCH_TXAOUT2+ 9
39 2 LCD_TXAOUT2- 2 7 GMCH_TXAOUT2- 9
38 3 LCD_TXBOUT2+ 3 6 GMCH_TXBOUT2+ 9
37 4 LCD_TXBOUT2- 4 5 GMCH_TXBOUT2- 9
36 5 LCD_TXBCLK+
34 DBC_EN 35 6 LCD_TXBCLK- SRN0J-7-GP
3D3V_S0 34 7 LCD_TXBOUT2+ UMA-MUX
LCD_EDID_CLK 33 8 LCD_TXBOUT2- RN5
LCD_EDID_DAT 32 9 LCD_TXBOUT1+ LCD_TXBOUT1+ 1 8 GMCH_TXBOUT1+ 9
31 10 LCD_TXBOUT1- LCD_TXBOUT1- 2 7 GMCH_TXBOUT1- 9
30 11 LCD_TXBOUT0+ LCD_TXBOUT0- 3 6 GMCH_TXBOUT0- 9
29 12 LCD_TXBOUT0- LCD_TXBOUT0+ 4 5 GMCH_TXBOUT0+ 9
BRIGHTNESS_CN 28 13 LCD_TXACLK+
BLON_OUT_R 27 14 LCD_TXACLK- SRN0J-7-GP
26 15 LCD_TXAOUT2+ UMA-MUX
DCBATOUT 25 16 LCD_TXAOUT2-
F2 24 17 LCD_TXAOUT1+ RN4
1 2 DCBATOUT_LCD1 23 18 LCD_TXAOUT1- LCD_TXBCLK- 1 8 LVDS_M92_TXBCLK- 51
22 19 LCD_TXAOUT0+ LCD_TXBCLK+ 2 7 LVDS_M92_TXBCLK+ 51
1
SCD1U16V2ZY-2GP
69.50007.721 EC11 4
MLVG0402220NV05BP-GP-U
2
1
2
1
2
20.F0825.002
2ND = 20.F1214.002 RN20 RN19
2
SRN2K2J-1-GP SRN2K2J-1-GP
UMA-MUX DIS
RN45
SRN0J-10-GP-U
4
3
4
3
2 3 LCD_EDID_CLK
CCD1 51 M92_LCD_CLK LCD_EDID_DAT
51 M92_LCD_DAT 1 4
6
USBPN10_R 1 2 EC73 DY CCD_PWR 1 CCD_PWR CCD_PWR 58 DIS
SC22P50V2JN-4GP R188 RN16
USBPP10_R 1 2 EC72 DY 12 USBPN10 1 USBPN10_R
2 0R0402-PAD 2 USBPN10_R USBPN10_R 58 9 NB_LCD_CLK 1 4
SC22P50V2JN-4GP 12 USBPP10 2 1 USBPP10_R 3 9 NB_LCD_DAT 2 3
R189 4 USBPP10_R USBPP10_R 58
0R0402-PAD 5 SRN0J-10-GP-U
SB 980511 7 UMA-MUX
PX Select FOX-CON5-3-GP-U1
20.F0411.005
Layout 40 mil 3D3V_S0
2ND = 20.F1396.005
VariBright
LCDVDD
R484
0R2J-2-GP 1 TR 2 BRIGHTNESS_AMD 9,51
51 LCDVDD_ON 2 1 U1 R481 33R2J-2-GP
DIS BRIGHTNESS_CN 1 PU 2 for PU BRIGHTNESS 34
9 GMCH_LCDVDD_ON 2 1 LCDVDD_ON_EN 1 5 R477 33R2J-2-GP <Core Design>
EN IN#5 BLON_OUT_R
UMA-MUX 2 GND 1 2 BLON_OUT 34
R1 3 4 R475 33R2J-2-GP
OUT IN#4
1
1
0R2J-2-GP C2 C491 C490
Wistron Corporation
1
SCD1U16V2ZY-2GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
C1 R469
G5285T11U-GP DY DY 100KR2J-1-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
2
1
SC4D7U6D3V3KX-GP
2ND = 74.09724.09F 2
DY SC4D7U6D3V3KX-GP Title
2
SJV50-TR -1
RN12
1 8
2 7 GMCH_RED 9
3 6 GMCH_GREEN 9
4 5 GMCH_BLUE 9 CRT1
L16 16
SRN0J-7-GP
UMA-MUX CRT_R_1 1 2 CRT_R 6
51 CRT_RED SBK160808T-100Y-N-GP CRT_R
11 1
RN11 68.00119.081 2ND = 68.00230.021
1 8 L14 7
2 7 DAT_DDC1_5 12 2 CRT_G
3 6 CRT_G_1 1 2 CRT_G 8
51 CRT_GREEN
1
4 4 5 SBK160808T-100Y-N-GP C95 CRT_HSYNC1 13 3 CRT_B 4
68.00119.081 2ND = 68.00230.021 DY 9 5V_CRT_S0
1
SRN0J-7-GP C107 CRT_VSYNC1 14 4
L9
2
DIS DY 10 C53
1
CRT_B_1 1 2 CRT_B C108 CLK_DDC1_5 15 5
2
51 CRT_BLUE SBK160808T-100Y-N-GP SC100P50V2JN-3GP SCD01U16V2KX-3GP
DY
1
C94 C83 C70 68.00119.081 C93 C82 C69 C43 17
2
1
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
SC12P50V2JN-3GP
SC12P50V2JN-3GP
SC12P50V2JN-3GP
DY DY DY 2ND = 68.00230.021 SC18P50V2JN-1-GP DY
R49 R46 R44 VIDEO-15-58-GP-U1
2
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
Change SC18P50V2JN-1-GP 20.20431.015
Single Source
SC100P50V2JN-3GP
2
2
R49
TR use 140 ohm
PU use 150 ohm
3D3V_S0
ED8
5V_S0 R32 2
2 1 CRT_DEC_R 3 DY
34 CRT_DEC# 5V_S0
1
470R2J-2-GP 1
1
3 C98 C33 D10 3
1
SCD1U16V2ZY-2GP BAS16-1-GP
2
SC100P50V2JN-3GP BAV99-5-GP
83.00016.B11
2
2ND = 83.00016.K11
3RD = 83.00016.F11
14
1
DIS 3D3V_M92 3D3V_S0 5V_CRT_S0 3D3V_S0
RN56 RN15 F1
3
2 3 HSYNC_1 2 3 CRT_HSYNC1_R 2 3 CRT_HSYNC1 1 2
51,54 M92_HSYNC VSYNC_1 CRT_VSYNC1 FUSE-1D1A6V-4GP-U
51,54 M92_VSYNC 1 4 1 4
U7A 69.50007.691
1
2
1
2
8
7
6
5
SRN0J-10-GP-U TSAHCT125PW-GP SRN33J-5-GP-U 2ND = 69.50007.771 3D3V_S0
14
7
4
RN23 73.74125.L13
2 3 2ND = 73.74125.L12 RN18 RN13 RN50
9 GMCH_HSYNC CRT_VSYNC1_R SRN2K2J-1-GP SRN2K2J-1-GP SRN10KJ-6-GP
9 GMCH_VSYNC 1 4 5 6
DIS UMA-MUX
1
4
3
4
3
1
2
3
4
SC18P50V2JN-1-GP
UMA-MUX TSAHCT125PW-GP
Q15
7
SC18P50V2JN-1-GP
6 1
RN51
2 3 CLK_DDC1_5_Q 2N7002DW-1-GP
9 NB_CRT_CLK
9 NB_CRT_DAT UMA-MUX
1 4 84.27002.D3F
CLK_DDC1_5
2 SRN0J-10-GP-U 2
2ND = 84.27002.E3F
3RD = 84.27002.B3F
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CRT/TV Connector
Size Document Number Rev
SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 19 of 59
A B C D E
5 4 3 2 1
HDMI1
1
EC38 EC39 2ND = 68.00119.111 21 BAV99PT-GP-U
SCD1U16V2KX-3GP
1
SC220P50V2JN-3GP
SC220P50V2JN-3GP
3RD = 68.00084.A81
DY DY C115 23
2
SKT-HDMI19P-25-GP
Non-Level shift UMA change to 715 ohm 22.10296.061
3D3V_S0 2ND = 22.10296.011
DIS use 499 ohm 3RD = 22.10296.101
3D3V_S0 3D3V_M92 3D3V_S0
4K7R2J-2-GP
R286 4K7R2J-2-GP
for TR
1
2
499R2F-2-GP
499R2F-2-GP
499R2F-2-GP
499R2F-2-GP
499R2F-2-GP
499R2F-2-GP
499R2F-2-GP
499R2F-2-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C C654 C641 C670 C629 C
2
R289 2
4
3
4
3
R304
R299 Change
R287 Change
R284 Change
R280 Change
R279 Change
R274 Change
R272 Change
DY DY DY DY RN113 RN79
1
SRN1K5J-GP SRN1K5J-GP
Change
DIS UMA-MUX
2
PS8101_VDD35
PS8101_VDD34
DY DY
1
1
66.15236.04L 66.15236.04L
1
2
1
2
TMDS_R RN55 RN68
5V_S0 2 3 HDMI_CLK 2 3
9 HDMI_NB_CLK HDMI_M92_CLK 51
1 4 HDMI_DAT 1 4 HDMI_M92_DAT 51
D
9 HDMI_NB_DAT
Q17 SRN0J-6-GP SRN0J-6-GP
2N7002-11-GP UMA-MUX DIS
11
15
21
26
33
40
46
35
34
2
U10 3D3V_S0
G 84.27002.W31
2ND = 84.27002.N31
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
NC#35
NC#34
S
2
38 23 HDMI_TX2- R492
8,51 TMDS_A_TX2- IN_D1- OUT_D1- HDMI_TX2+ 2K2R2F-GP
8,51 TMDS_A_TX2+ 39 IN_D1+ OUT_D1+ 22
U40
41 20 HDMI_TX1- 5V_S0
1
8,51 TMDS_A_TX1- IN_D2- OUT_D2-
1
HDMI_TXC- TDMS_A_DAT B1
8,51 TMDS_A_TXC- 47 IN_D4- OUT_D4- 14 6 B2 GND 4
HDMI_TXC+
B 8,51 TMDS_A_TXC+ Recommended Equalization: [PC1,PC0]=01, 4dB
48 IN_D4+ DY OUT_D4+ 13
B
PI5C3305L-GP
R269 2 4K7R2J-2-GP PC0 HDMI_DAT 73.53305.A0B
3D3V_S0
R268 2 DY 1
4K7R2J-2-GP
1 PC1
3
4
PC0 SDA 8
9 HDMI_CLK
PC1 SCL PS8101_HPD
DY HPD 7
1
DY 2 HDMI_NB_HPD 9
REXT_HDMI 6 R265
RT_EN#_8101 REXT HDMI_A_HPD_CN 1KR2J-1-GP
10 RT_EN# HPD_SINK 30
PS8101_OE# TDMS_A_DAT
DY
2 1 DDC_EN_PS8101
25
32
OE# SDA_SINK 29
28 TDMS_A_CLK
3D3V_S0 DDC_EN SCL_SINK
R302
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
4K7R2J-2-GP
2
3D3V_S0 PS8101-GP
1
5
12
18
24
27
31
36
37
43
R267 71.P8101.003 49
499R2F-2-GP
1
DY
R303 DY R297-->PU-DIS & TR-DIS 0 ohm
1
20KR2J-L2-GP
UMA-MUX PU-UMA & TR-UMA & MUX 5.1K ohm
Change
2
1
2ND = 84.27002.N31 Change
R309
DY
S
R52
4K7R2J-2-GP 100KR2J-1-GP Wistron Corporation
DY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2
2
Taipei Hsien 221, Taiwan, R.O.C.
Title
RT_EN#_8101 HDMI CONNECTOR
Size Document Number Rev
A3
WWW.AliSaler.Com 5 4 3 2
Date: Monday, June 29, 2009
SJV50-TR
Sheet
1
20 of 59
-1
SATA HDD Connector
SATA1
24
NP2
22
C1431 SCD01U50V2KX-1GP
2 SATA_TXP0_C 21
13 SATA_TXP0 C1441 SCD01U50V2KX-1GP SATA_TXN0_C 20
13 SATA_TXN0 2
19
C1411 SCD01U50V2KX-1GP
2 SATA_RXN0_C 18
13 SATA_RXN0 C1421 SCD01U50V2KX-1GP SATA_RXP0_C 17
13 SATA_RXP0 2
16
15
14
13
12
5V_S0 11
PWR TRACE 100mil 10
9
8
RF_DY 7
1
6
D12 TC14 C620 EC78 5
SCD1U25V3ZY-1GP
SC10U10V5ZY-1GP
SC47P50V2JN-3GP
SSM24PT-GP
DY 4
2
3
2
A 1
NP1
23
ALP-CON22-GP-U1
20.F0754.022
2ND = 62.10065.151
SATA_RXN0_C
SATA_RXP0_C
SA_20081112
SATA_TXN0_C
SATA_TXP0_C
ED2 DY ED1 DY
3 2 3 2
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
5V_S0 4 1 5V_S0 4 1 Taipei Hsien 221, Taiwan, R.O.C.
SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 21 of 59
5 4 3 2 1
D
SATA ODD Connector D
5V_S0
RF_DY
1
D6 C431 TC6 EC58
SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
SC47P50V2JN-3GP
SSM24PT-GP
2
DY
A
ODD1
C
GND S1 C
C4391 2SCD01U50V2KX-1GP SATA_TXN1_C S3 S4
13 SATA_TXN1 C4401 SATA_TXP1_C S2 A- GND
13 SATA_TXP1 2SCD01U50V2KX-1GP A+ GND S7
GND P5
2
GND P6
C4411 2SCD01U50V2KX-1GP SATA_RXN1_C S5 8 R171
13 SATA_RXN1 B- GND
10KR2J-3-GP
C4421 2SCD01U50V2KX-1GP SATA_RXP1_C S6 9 DY
13 SATA_RXP1 B+ GND
1
SKT-SATA7P+6P-30-GP-U
62.10065.441
2ND = 62.10065.541
B B
SATA_RXN1_C
SATA_RXP1_C
SA_20081112
SATA_TXN1_C
SATA_TXP1_C
ED3 ED4
DY DY
3 2 3 2
<Core Design>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
5V_S0 4 1 5V_S0 4 1
Title
PRTR5V0U2X-GP PRTR5V0U2X-GP
83.5V0U2.0A3 83.5V0U2.0A3 ODD
Size Document Number Rev
SJV50-TR -1
WWW.AliSaler.Com 5 4 3
Date: Monday, June 29, 2009
2
Sheet 22
1
of 59
5 4 3 2 1
D D
BLUETOOTH MODULE
3D3V_BT_S0
U25 3D3V_S0 C486
SC4D7U10V5ZY-3GP
3D3V_BT_S0 1 5 DY
1 2
OUT IN
2 GND
C 1 3 NC#3 EN 4 C
EC66 DY BLUETOOTH_EN 34
SCD1U16V2ZY-2GP
G5240B1T1U-GP
2
ETY-CON4-21-GP-U
B
20.F0984.004 SB 980511 B
2ND = 20.D0197.104
<Core Design>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
BLUETOOTH
Size Document Number Rev
SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 23 of 59
5 4 3 2 1
SizeΚW:5.8 * H:6.3
5V_USB1_S5 දणΖ 5V_USB1_S5
100 mil
5V_S5
RF_DY
1
U42 TC20 DY EC80 DY EC86
EC95 SE220U6D3VM-7GP SCD1U16V2ZY-2GP SC1000P50V3JN-GP-U
SC47P50V2JN-3GP
1 8 79.22710.6AL
2
GND VOUT
2 VIN VOUT 7 2ND = 77.92271.021
3 VIN VOUT 6 3RD = 79.22710.E0L
5V_USB1_S5
RF_DY 4 EN# FLG# 5 USB_OC#0 12
1
1
C777 EC97
SC47P50V2JN-3GP
SC4D7U10V3KX-GP
1
RT9715DGF-GP DY EC94 USB1
2
SCD1U16V2ZY-2GP
74.09715.079
2ND = 74.00547.A79 1
2
VBUS
12 USBPN6 2 D-
3RD = 74.08015.07G 12 USBPP6 3 D+
34,58 USB_PWR_EN# 4 GND
5 SHELL#5
6 SHELL#6
EC82 EC81 7 SHELL#7
8
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SHELL#8
1
DY DY
SKT-USB-172-GP-U
2
22.10218.T31
2ND = 22.10254.031
3RD = 22.10254.041
5V_USB1_S5
USB3
USBCN1 1 VBUS
16 12 USBPN0 2 D-
12,58 USB_OC#3 14 12 USBPP0 3 D+
13 4 GND
12,58 USBPN7 12 5 SHELL#5
12,58 USBPP7 11 6 SHELL#6
10 EC90 EC87 7 SHELL#7
9 8
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
12 USBPN8 SHELL#8
1
12 USBPP8 8 DY DY
7
6 SKT-USB-172-GP-U
2
34,58 USB_PWR_EN# 5 22.10218.T31
4 2ND = 22.10254.031
3 3RD = 22.10254.041
5V_S5 2
SCD1U16V2ZY-2GP
SC1U16V3ZY-GP
1
1
EC96 C776 15
DY
ACES-CON14-8-GP
2
20.F0866.014
2ND = 20.F1261.014
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
USB Connector
Size Document Number Rev
SJV50-TR -1
3D3V_LAN_S5
1
SC4D7U10V5ZY-3GP
SCD1U10V2KX-4GP
DY-C.D.
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
2
2
D D
3D3V_LAN_S5
2 L6 1XTALVDD_G
LAN_VDC1 1 TP64 0R0603-PAD
1
C60
1D2V_LAN_S5 3D3V_S5 R234 3D3V_LAN_S5 LAN_VDC2 TP76 SCD1U10V2KX-4GP
1
0R0603-PAD
2
1 2 LAN_VDC3 1 TP77
1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
0R0603-PAD
56
61
15
19
38
52
68
6
1
DY-C.D.
U5 C592
2
SCD1U10V2KX-4GP
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
DC#38
DC#52
DC#68
2
1D2V_LAN_S5 VDDC_IO_12
36 BIASVDD_G
BIASVDDH
5 VDDC_IO
55 2 L17 1 LAN_AVDDH
VDDC_IO 0R0603-PAD
13 VDDC
1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C84 C87 C578 C66 C622 20 23 XTALVDD_G
VDDC XTALVDDH
1
SCD1U10V2KX-4GP
DY-C.D.
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY DY 34 C597 DY C603
VDDC
60
2
VDDC
2
48 LAN_AVDDH
AVDDH
AVDDH 42 Place PLLVDD/AVDDL
CKT as close to chip as
possible
AVDDL_G 39 AVDDL
45 AVDDL
51 AVDDL
TRD3_N 49 MDI3- 26
C
TRD3_P 50 MDI3+ 26 C
GPHY_PLLVDD 35 GPHY_PLLVDDL 3D3V_AUX_S5
TRD2_N 47 MDI2- 26
TRD2_P 46 MDI2+ 26
1
TRD1_N 43 MDI1- 26
44 MDI1+ 26 10KR2J-3-GP
PCIE_PLLVDD TRD1_P
30 PCIE_PLLVDDL DY R254
27 41
PCIE_PLLVDDL TRD0_N
40
MDI0-
MDI0+
26
26
EEPROM
2
TRD0_P ENERGY_DET
1
2 3D3V_LAN_S5
PCIE_SDSVDD LINKLED# C77 10KR2J-3-GP
33 PCIE_VDDL SPD100LED# 1 10M/100M/1G_LED# 26
24 67 SCD1U10V2KX-4GP DY R255
PCIE_VDDL SPD1000LED#
TRAFFICLED# 66 LAN_ACT_LED# 26 1 2
2
U39 R51
8 GPIO_2 1 TP68 1 8 10KR2J-3-GP
GPIO_2 A0 VCC EE_WP
2 A1 WP 7 1 2 3D3V_LAN_S5
3 6 SCLK
A2 SCL SO
4 GND SDA 5
9 UART_MODE 1 TP67
UART_MODE EE_WP TP69 AT24C02BN-SH-T-GP
GPIO_1/SERIAL_DI 7 1
8 PCIE_RXP1 SCD1U10V2KX-4GP 2 1 C64 PCIE_RXDP 26 4 GPIO_0 1 TP73 72.24C02.R01
SCD1U10V2KX-4GP 2 PCIE_RXDN PCIE_TXD_P GPIO_0/SERIAL_DO
8 PCIE_RXN1 1 C65 25 PCIE_TXD_N 2ND = 72.24C02.M01 1D2V_LAN_S5
8 PCIE_TXP1 31 PCIE_RXD_P
8 PCIE_TXN1 32 PCIE_RXD_N
12 PCIE_WAKE# 12 2 L46 1 AVDDL_G
LAN_RST WAKE#
11,31,32,34,35,50,58 PLT_RST1#_B 2 R232 1 10 PERST#
0R0603-PAD
1
0R0402-PAD 3 CLK_PCIE_LAN 29 65 SCLK C612 C600
PCIE_REFCLK_P SCLK/EECLK
1
SC150P50V2JN-3GP
SC4D7U10V5ZY-3GP
SCD1U10V2KX-4GP
C595 28 63 SI
SB 980515 3 CLK_PCIE_LAN# PCIE_REFCLK_N SI
64 SO
2
SO/EEDATA CS#
62
2
CS#
ENERGY_DET 34
2
59 L42
ENERGY_DET R252 R253 R466 1 2GPHY_PLLVDD
3D3V_LAN_S5 4K7R2J-2-GP 4K7R2J-2-GP 4K7R2J-2-GP FCM1608K-601T03GP
1
B 3D3V_S0 C591 C584 B
68.00217.241
SC4D7U10V5ZY-3GP
SCD1U10V2KX-4GP
2 R258 1VAUX_PRESENT54
1
VMAINPRSNT 53 VAUX_PRSNT
2 R259 1 1KR2J-1-GP
2
1KR2J-1-GP LOW_PWR VMAIN_PRSNT
34 LOW_PWR 3 LOW_PWR
2 R240 1 VDDC_IO_12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
0R2J-2-GPDY
DY 2 R256 0R2J-2-GP
1 LAN_SMB_CLK 58 17
32,33,34,38,51,58 KBC_THERM_CLK SMB_CLK VDDC_IO
DY 2 R257 0R2J-2-GP
1 LAN_SMB_DATA 57
32,33,34,38,51,58 KBC_THERM_DAT SMB_DATA
1
C71 C607
LAN_XO_R 1 2LAN_XO 2 L4 1 PCIE_PLLVDD
X1 R36 200R2J-L1-GP 22 18 0R0603-PAD
2
XTALO REGOUT12_IO
1
1 2LAN_XI 21 XTALI
C40 C50
SC4D7U10V5ZY-3GP
SCD1U10V2KX-4GP
XTAL-25MHZ-102-GP
2
2
SC15P50V2JN-2-GP
R233
1
1K24R2F-GP
2
2ND = 82.30020.791
1
14 REGCTL12 R48 C628 C580
REGCTL12
SC4D7U10V5ZY-3GP
SCD1U10V2KX-4GP
0R0603-PAD 2 L5 1 PCIE_SDSVDD
0R0603-PAD
1
C45 C576
1
SC4D7U10V5ZY-3GP
SCD1U10V2KX-4GP
LAN_1D2Q
2
3
1 Q8 1D2V_LAN_S5
2 R457 1 LAN_CLKREQ# 11 CLKREQ#
BCP69-GP
1KR2J-1-GP 84.00069.B1B
2
2ND = 84.DCP69.01B
1
SCD1U10V2KX-4GP
SUPER_IDDQ 16
R66 change to Bead
GND
BCM5764MKMLG-GP
for Transmitter Distortion
69
71.05764.M01
2ND = 71.05784.M03
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
BCM 5764
Size Document Number Rev
A2
SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 25 of 59
5 4 3 2 1
A B C D E
RN47
LAN Connector
1 4 CONN_PWR_2
3D3V_LAN_S5
3D3V_LAN_S5 2 3 CONN_PWR_1
RJ45
SRN220J-1-GP 9
25 10M/100M/1G_LED# A1
4 CONN_PWR_2 A2 A2(+),A1(-):GREEN 4
A3
A2(+),A3(-):ORANGE
10M/100M/1G_LED# EC17 1 DY 2 SC1KP50V2KX-1GP RJ45_1 1
RJ45_2 2
CONN_PWR_2 EC74 1 DY 2 SCD1U10V2KX-4GP RJ45_3 3
RJ45_4 4
CONN_PWR_1 EC75 1 DY 2 SCD1U10V2KX-4GP RJ45_5 5
RJ45_6 6
LAN_ACT_LED# EC9 1 DY 2 SC1KP50V2KX-1GP RJ45_7 7
RJ45_8 8
CONN_PWR_1 B1
25 LAN_ACT_LED# B2 B1(+),B2(-):YELLOW
10
RJ45-130-GP-U2
GIGA Lan Transformer 22.10277.041
2ND = 22.10277.351
XF1
25 MDI0+ 2 23 RJ45_1
25 MDI0- 3 22 RJ45_2
XRF_TDC_1 1 24 MCT1
3 XRF_TDC_2 4 21 MCT2 3
DY DY 25 MDI1+ 5 20 RJ45_3
1
C75 C76
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
2
25 MDI1- 6 19 RJ45_6
25 MDI2+ 8 17 RJ45_4
25 MDI2- 9 16 RJ45_5
XRF_TDC_3 7 18 MCT3
XRF_TDC_4 10 15 MCT4
DY DY 25 MDI3+ 11 14 RJ45_7
1
C74 C73
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
2
25 MDI3- 12 13 RJ45_8
2 2
XFORM-275-GP
1.route on bottom as differential pairs. 68.89240.30A
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs. 2ND = 68.IH601.301
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except
RJ-45 moat.
MCT4
MCT3
MCT2
MCT1
4
3
2
1
RN48
SRN75J-1-GP
1 <Core Design> 1
LAN_TERMINAL 1 2
Wistron Corporation
TD+ --> TX+ RJ45-1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SC1KP2KV8KX-GP Taipei Hsien 221, Taiwan, R.O.C.
TD- --> TX- RJ45-2
Title
WWW.AliSaler.Com
RD- --> RX- RJ45-6 SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 26 of 59
A B C D E
A B C D E
5V_S0 3VA_S0
1
C819 C820 3 4
EN NC#4
1
C818 C801 C780 C782
SCD1U10V2KX-4GP
SC10U10V5ZY-1GP
4 4
1
SC10U10V5ZY-1GP
SCD1U10V2KX-4GP
SC10U10V5ZY-1GP
SCD1U10V2KX-4GP
2
1
G9091-330T11U-GP
1
C790 74.09091.J3F C799
2
SC1U10V3KX-3GP 2ND = 74.09198.G7F SC10U10V5ZY-1GP
2
2
AUD_AVEE
3D3V_S0 1 R407 2 DVDD_IO
1
0R0603-PAD C789 C794
SC10U10V5ZY-1GP
SCD1U10V2KX-4GP
-1 090213 DY
C815
2
2
3VA_S0
SCD1U10V2KX-4GP
44
26
40
36
9
4
3
2
U50
R385
VDD_IO
AVEE
DVDD_1_8
DVDD_3_3
DVDD
AVDD
AVDD
1KR2J-1-GP
R384
34 FRONTL 29 4K7R2F-GP
1
PORTA_L
12,30 ACZ_RST# 11 RESET#
5.11K PORTA_R 35 FRONTR 29 1 2
1
12 ACZ_BITCLK 1 2 ACZ_BITCLK_1 6 BIT_CLK MICBIASB 19 C807
12,30 ACZ_SYNC R402 33R2J-2-GP 10 20 MIC_L C804 2 1 SC2D2U10V3KX-1GP INT_MIC1 18,58 SC10U10V5ZY-1GP
SYNC MIC_L MIC_R C803 2
12 ACZ_SDATAIN0 1 2 8 21 1 SC2D2U10V3KX-1GP R386
2
EC10612,30 ACZ_SDATAOUT R403 47R2J-2-GP SDATA_IN MIC_R 4K7R2F-GP
5 SDATA_OUT
1
SCD1U25V2ZY-1GP
DY MICBIASB
SB 980521 MICBIASC 18
16 MIC1-L_PORT-B C813 2 1 SC2D2U10V3KX-1GP
1 2
PORTC_L AUD_MICIN_L 29
43 20K PORTC_R 17 MIC1-R_PORT-B C806 2 1 SC2D2U10V3KX-1GP AUD_MICIN_R 29
2
DIB_P
2 1 42 DIB_N 1 DY 2
MONO 29
AUD_GPIO2 45 30 SOUNDL 28
AUD_GPIO1 GPIO2 STEREO_L
46 GPIO1 STEREO_R 31 SOUNDR 28
28 EAPD# 47 EAPD#/GPIO0
1
FLY_P 39 1 2SC1U10V3KX-3GP DY C798 C795
SCD1U10V2KX-4GP
37
SC10U10V5ZY-1GP
FLY_N
2
VREF_LO 22
VREF_HI 23
1
DVSS
DVSS
AVSS
AVSS
32
GND
RESERVED#32 C800 C802
RESERVED#33 33
2
SC1U10V3KX-3GP
SC1U10V3KX-3GP
CX20561-15Z-GP
49
7
41
25
38
PC BEEP GAIN CONTROL
AUD_GPIO2
AUD_GPIO1
2 2
3VA_S0
GAIN 10K GPIO RESISTORS
-1 090219 R388 R383
2
2
1
1 2 LINEOUT_JD# 29
1
1 1
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
AZALIA CODEC - CX20561
Size Document Number Rev
SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 27 of 59
A B C D E
5 4 3 2 1
AUDIO OP AMPLIFIER
D D
5VA_OP_S0
5V_S0 3D3V_S0
BYPASS 1 2
C10 C32
1
1
SC4D7U10V5ZY-3GP
SC1U16V3ZY-GP
C13
1
SC4D7U10V5ZY-3GP R61
DY-C.D.
10KR2J-3-GP
U4 R390
2
10KR2J-3-GP
2 5
2
VCC BYPASS 1454_SHUTDOWN
11 14
2
VCC SHUTDOWN
1
R_LINE_IN 7 1 SPKR_L- R57
D
RIN- LVO1 SPKR_L- 29
10KR2J-3-GP
RIN+ 8 4 SPKR_L+ DY
RIN+ LVO2 SPKR_L+ 29
L_LINE_IN 15 12 SPKR_R- . Q24
LIN- RVO1 SPKR_R- 29
LIN+ 16 9 SPKR_R+ 2N7002E-1-GP
SPKR_R+ 29
2
LIN+ RVO2
. . 84.2N702.D31
.
. 2ND = 84.2N702.I31
C
VSS 3 C
10 D11
G
VSS
6 NC#6 2 PM_SLP_S3# 12,33,34,39,47,48
13 NC#13 GND 17
T1# 3
DY
G1454R41U-GP 1 2 1 AMP_SHUTDOWN# 34
74.01454.013 R387 0R2J-2-GP
BAW56-5-GP
83.00056.Q11
2ND = 83.00056.K11 2 1 EAPD# 27
R391 0R2J-2-GP
-1 090220
R15
27 SOUNDL 1 2L_LINE_IN_1 1 2 L_LINE_IN
C792 18KR2F-GP
SCD47U16V3KX-1GP
R16
B 27 SOUNDR 1 2R_LINE_IN_11 2 R_LINE_IN B
C791 18KR2F-GP
SCD47U16V3KX-1GP
R21
1 2RIN+_1 1 2 RIN+
C21 20KR2F-L-GP
SCD47U16V3KX-1GP
R17
1 2LIN+_1 1 2 LIN+
C22 20KR2F-L-GP
SCD47U16V3KX-1GP
5V_S0 5VA_OP_S0
<Core Design>
L_LINE_IN R12 1 2 52K3R2F-L-GP SPKR_L- G5
1 2
A
LIN+ R13 1 2 52K3R2F-L-GP SPKR_L+
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1
Title
Size
AUDIO AMP (G1454)
Document Number Rev
SJV50-TR -1
WWW.AliSaler.Com
5 4 3
Date: Monday, June 29, 2009
2
Sheet 28
1
of 59
5 4 3 2 1
MIC IN
MICIN1
D R393 5 D
100R2J-2-GP 27 MIC_JD#
4
1 2 AUD_MIC_R 3
27 AUD_MICIN_R AUD_MIC_L
27 AUD_MICIN_L 1 2 2
1
1
1
R401 R389 R398 7
10KR2J-3-GP
MLVS0603M04-1-GP
MLVS0603M04-1-GP
DY DY PHONE-JK326-GP-U
22.10133.F61
2ND = 22.10133.H71
2
2
LINE OUT -1M 090325 A
LOUT1
LED
5V_SPDIF_S0 B DRIVE
C IC U44
27 SPDIF TX
R471
5D1R2F-GP 5 LINEOUT_JD# 4 3
LOUT_R+1 EN# NC#3
27 FRONTR 1 2 4 GND 2
5V_S0 5 1 5V_SPDIF_S0
C LOUT_L+1 IN OUT C
27 FRONTL 1 2 3
R472 2
1
1
5D1R2F-GP C783 DY G5240B2T1U-GP-U DY
SCD1U16V2ZY-2GP
L59 L60 1 74.05240.B7F C781
MLVS0603M04-1-GP
MLVS0603M04-1-GP
SCD1U16V2ZY-2GP
2ND = 74.09711.07F
2
PHONE-JK336-GP-U
1
2
22.10133.G91 R379 2 DY 1
ERN1 Single Source 0R2J-2-GP
SRN1KJ-7-GP
DY
2
2
4
3
27 LINEOUT_JD#
B
Internal Speaker B
SPKR1
2 1 SPKR_L-_R 5
28 SPKR_L- ER1 0R0402-PAD
1
2 1 SPKR_L+_R
28 SPKR_L+ ER2 0R0402-PAD 2
2 1 SPKR_R-_R 3
28 SPKR_R- ER3 0R0402-PAD 4
2 1 SPKR_R+_R 6
28 SPKR_R+ ER4 0R0402-PAD
ETY-CON4-21-GP-U
20.F0984.004
EC4 EC5 EC6 EC7 2ND = 20.D0197.104
1
DY DY DY DY
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
2
A <Core Design> A
SPKR_L-_R 58
SPKR_L+_R
SPKR_R-_R
58
58
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
SPKR_R+_R 58
Taipei Hsien 221, Taiwan, R.O.C.
Title
SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 29 of 59
5 4 3 2 1
5 4 3 2 1
D D
1
R179 C483
1
SC4D7U10V5ZY-3GP
470R2J-2-GP TYCO-CONN12A-2-GP-U1 R180 EC63
100KR2J-1-GP
SCD1U25V2ZY-1GP
20090108_SB 20.F0917.012
2
DY DY
2
1
SC22P50V2JN-4GP
2
B B
<Core Design>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
USB Connector
Size Document Number Rev
SJV50-TR -1
WWW.AliSaler.Com
5 4 3
Date:
2
Monday, June 29, 2009 Sheet 30
1
of 59
5 4 3 2 1
3D3V_S0 3D3V_D_S0
SD_CLK/XD_D1/MS_CLK
SD_DAT0/XD_D6/MS_D0
SD_DAT7/XD_D2/MS_D2
SD_DAT6/XD_D7/MS_D3
1 2
SD_DAT4/XD_WP#
SD_DAT3/XD_WE#
SD_DAT2/XD_RE#
R409 0R0603-PAD
SD_DAT1/XD_D4
SD_DAT5/XD_D0
XD_D5/MS_BS
XD_D3/MS_D1
MS_INS#
XD_R/B#
XD_CD#
SD_CD#
XD_CLE
XD_CE#
XD_ALE
CARD_3D3V_S0
SD_WP
D D
2
MODE_SEL C805
SC1U10V3KX-3GP
1
1
1
19
20
21
23
25
26
27
28
29
31
34
35
37
38
39
40
41
42
43
SC47P50V2JN-3GP 0R3J-0-U-GP RTS5159-GR-GP
2
DY
SP1
SP2
SP3
SP4
SP5
SP6
SP7
SP8
SP9
SP10
SP11
SP12
SP13
SP14
SP15
SP16
SP17
SP18
SP19
2
2
C826
2
SC1U10V3KX-3GP C844
SCD1U16V2ZY-2GP 9 24
1
CARD_3V3 MS_D5
22
1
VREG MS_D4
2 R431 1 AV_PLL 1 AV_PLL
0R0402-PAD
VREG 10 VREG
NC#30 30
3D3V_S0 2 1 3V_VBUS_S0 8 7
R410 0R0603-PAD 3V3_IN NC#7
NC#3 3
3D3V_D_S0 33 D3V3
1
1
SC4D7U6D3V5KX-3GP SCD1U16V2ZY-2GP C825
DY C824 SCD1U16V2ZY-2GP
2
SCD1U16V2ZY-2GP
2
MODE_SEL 45
LED1 SD_CMD MODE_SEL
36 SD_CMD GND 6
3D3V_S0 1 R394 2 VBUS_R ADY K VBUS_LED 14 GPIO0 GND 12
DY68R2F-GP R424 2 32
RREF GND
XTAL_CTR
LED-W-23-GP 1 2 RREF 44 46
6K19R2F-GP RST# GND
EEDO
EECS
EESK
XTLO
C RST# 1 R432 2 C
EEDI
XTLI
DM
0R0603-PAD
DP
3D3V_D_S0 SB 980515 71.05159.00G
5
4
13
47
48
17
16
15
18
1
DY
XDAL_CTR
2 1 USB_11+
R443 12 USBPP11 R419 0R0402-PAD
20090108_SB 100KR2J-1-GP USB_11-
12M_XO
12 USBPN11 2 1
R440 R422 0R0402-PAD
2
470R2J-2-GP C849
SC1U10V3KX-3GP 3D3V_D_S0 2 1
R395 0R0402-PAD
2
-1 090213
CARD_3D3V_S0
B C835 C828 B
SC4D7U10V5ZY-3GP SCD1U16V2ZY-2GP
2
CARD1
5 4 3 2 1
A B C D E
MINI1 MINI2
53 53
NP1 NP1
TPAD14-GP TP33
TPAD14-GPTP33 1 MINI_WAKE1# 1 2 TPAD14-GP TP74 1 MINI_WAKE2# 1 2
3 4 3 4
5 6 5 6
7 8 7 8
9 10 9 10
3 CLK_PCIE_MINI1# 11 12 3 CLK_PCIE_MINI2# 11 12
3 CLK_PCIE_MINI1 13 14 3 CLK_PCIE_MINI2 13 14
15 16 R216 15 16 R224
2
1 DY 2 1DY 10KR2J-3-GP
2
DY C582 DY
SC100P50V2JN-3GP 10KR2J-3-GP
17 18 17 18 20090108_SB
1
34 E51_RxD 34 E51_RxD
34 E51_TxD 19 20 WIRELESS_EN 34 34 E51_TxD 19 20 WIRELESS_EN 34
21 22 PLC_RST#_WLAN1 2 1 21 22 PLC_RST#_WLAN2 2 1
R228 0R2J-2-GP PLT_RST1#_B 11,25,31,34,35,50,58 R220 470R2J-2-GP PLT_RST1#_B 11,25,31,34,35,50,58
8 PCIE_RXN2 23 24 8 PCIE_RXN3 23 24
8 PCIE_RXP2 25 26 -1 090213 DY 8 PCIE_RXP3 25 26 1 2
27 28 27 28 C583DY SC100P50V2JN-3GP
29 30 UMI_CLK1 2 DY 1 29 30 UMI_CLK2 2 DY 1
KBC_THERM_CLK 25,33,34,38,51,58 KBC_THERM_CLK 25,33,34,38,51,58
8 PCIE_TXN2 31 32 UMI_DATA1 0R2J-2-GP
2 R227
1 8 PCIE_TXN3 31 32 UMI_DATA2 0R2J-2-GP
2 R212
1
0R2J-2-GP DY KBC_THERM_DAT 25,33,34,38,51,58 KBC_THERM_DAT 25,33,34,38,51,58
8 PCIE_TXP2 33 34 R231 8 PCIE_TXP3 33 34 0R2J-2-GP
DY R208
35 36 USBPN1 12 35 36 USBPN9 12
3 37 38 37 38 3
USBPP1 12 USBPP9 12
3D3V_S0_MINI 39 40 3D3V_S0_MINI 39 40
41 42 LED_WWAN#1 1 TP70 TPAD14-GP 41 42 LED_WWAN#2 1 TP219 TPAD14-GP
43 44 43 44 WLAN_LED# 1 TP218 TPAD14-GP
WLAN_LED# 38
45 46 45 46
47 48 47 48
49 50 49 50
5V_S5 51 52 5V_S5 51 52
NP2 NP2
54 54
SKT-MINI52P-13-GP SKT-MINI52P-13-GP
20.F1517.052 20.F1517.052
2ND = 62.10043.511 2ND = 62.10043.511
Symbol use 62.10043.461 Symbol use 62.10043.461
3D3V_S0
1
R250
0R0603-PAD 1D5V_S0
2 2
2
3D3V_S0_MINI
1
1
DY C535 C596 DY TC13 DY C574DY C15 C90 DY C547 C569 C590 DY C586DY C593 DY C16
SC10U6D3V5MX-3GP
SC1U16V3ZY-GP
ST220U6D3VDM-15GP
SC10U6D3V5MX-3GP
SC1U16V3ZY-GP
SCD1U16V2ZY-2GP
SC10U6D3V5MX-3GP
SC1U16V3ZY-GP
SCD1U16V2ZY-2GP
SC10U6D3V5MX-3GP
SC1U16V3ZY-GP
SCD1U16V2ZY-2GP
2
-1 090213
<Core Design>
1 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
MINI CARD
Size Document Number Rev
SJV50-TR -1
WWW.AliSaler.ComA B C D
Date: Monday, June 29, 2009 Sheet
E
32 of 59
5 4 3 2 1
FAN1_VCC
*Layout* 15 mil
5V_S0
1
DY FAN1_VCC FAN1_VCC 58
C614 C613 C615 FAN1_FG1 FAN1_FG1 58
3
SCD1U16V2ZY-2GP SC10U10V5ZY-1GP SC2200P50V2KX-2GP
1
D14
BAS16-1-GP R261 FAN1_VCC
83.00016.B11 10KR2J-3-GP -1M 090304
2ND = 83.00016.K11
3RD = 83.00016.F11 FAN1
2
D 5 D
FAN1_FG1 3
2
1
4
Setting T8 as 90 Degree *Layout* 15 mil
1
G792_32K ACES-CON3-GP-U1
C624 20.F0714.003
V_DEGREE SC1000P50V3JN-GP-U 2ND = 20.D0246.103
2
=(((Degree-72)*0.02)+0.34)*VCC EC31
1
DY
SCD1U25V2ZY-1GP
5V_S0
2
5V_S0 U8
R260 *Layout* 30 mil
1 2 5V_G792_S0 6 1
VCC FAN1
20 DVCC FG1 4
1
200R2F-L-GP 14
CLK
1
1
C623 SCD1U16V2ZY-2GP C92 16 84.T3904.C11 84.T3904.C11
SC1U10V3ZY-6GP SDA KBC_THERM_DAT 25,32,34,38,51,58
C610 C96 DY DY SCD1U16V2ZY-2GP 7 18 2ND = 84.03904.L06 2ND = 84.03904.L06
KBC_THERM_CLK 25,32,34,38,51,58
2
2
30K1R3F-GP DXP2 NC#19
11 DXP3 G792_DXP2
2
5 G792_DXP3 Q9
C
13 ALERT#_SB DGND
15 17 C134 MMBT3904-4-GP
ALERT# DGND
SC470P50V3JN-2GP
RSMRST# 13 B Q11 B
V_DEGREE THERM# C435
3 THERM_SET SGND1 8 MMBT3904-4-GP
2 10 G792_DXN2 C103 C606 SC470P50V3JN-2GP
E
2
2
C RESET# SGND2 G792_DXN3 C
SGND3 12
SC2200P50V2KX-2GP
1
GAP-CLOSE
GAP-CLOSE
SC2200P50V2KX-2GP
2
R263 G792SFUF-GP 74.00792.A79 G67 G15 2.System Sensor,
71K5R2F-1-GP
Put between CPU and NB. 3.T8 Sensor
2
1
39 S0_PWR_GOOD
1
Place near chip as close
DXP3:88 Degree as possible C104
SC2200P50V2KX-2GP
2
3D3V_S5 32K suspend clock output H_THERMDC 6
R50
12,28,34,39,47,48 PM_SLP_S3# 9 10R2J-2-GP
8 32KHZ 1 2 G792_32K
11,15 RTC_CLK 10
TSLVC08APW-1-GP
7
73.07408.L16 -1 090223
2ND = 73.07408.L15
3RD = 73.07408.02B
5V_AUX_S5
B B
5V_AUX_S5
1
3D3V_AUX_S5 EC123
1
SCD1U16V2ZY-2GP
R154
2
150R2J-L1-GP-U
DY 5V_AUX_S5
3
2
1
R158
setting 95 degree . Put Near SB.
1
10KR2J-3-GP DY D2 C388
BAT54PT-GP SCD01U16V2KX-3GP
DY R155
U22 0R2J-2-GP
R156 DY
2
2
RSMRST# 6,34,39
1 DY 2 SB_THSET 1 5
2
SET VCC
1
18KR2F-GP
C99 RSMRST#
2 GND DY SB_TH_HYST
3 OUT# HYST 4
2
SCD1U16V2ZY-2GP
1
G709T1UF-GP
74.00709.A7F R157
0R2J-2-GP
DY
OUT#: Hi active / mount R1110
Low active / mount R1108
2
<Core Design>
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
G792
Size Document Number Rev
A3 -1
SJV50-TR
Date: Monday, June 29, 2009 Sheet 33 of 59
5 4 3 2 1
A
1
C256 C685 C673 C195 C113 C111
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP SCD1U16V2ZY-2GP C252 DY SCD1U16V2ZY-2GP
SRN4K7J-10-GP
SC10U10V5ZY-1GP
2
8
7
6
5
RN21
1
2
3
4
3D3V_S0 3D3V_AUX_S5
KBC_BAT_CLK KBC_THERM_CLK
4
KBC_BAT_DAT KBC_THERM_DAT 4
1 R138 2
0R0603-PAD
C272 C270
SB 980515 SB 980515
1
SC1U16V3ZY-GP
SCD1U16V2ZY-2GP
2
2
1 2 PLT_RST1#_1
11,25,31,32,35,50,58 PLT_RST1#_B SB 980522
R313 DY 49 BAT_IN#
1
300R2J-4-GP C678 C147 X2
102
115
SC100P50V2JN-3GP
SC7P50V2DN-2GP C119
80
19
46
76
88
4
1 OF 2 U13A 3 2 SC7P50V2DN-2GP
1KBC_XO_R 2
2
GPIO41
VDD
AVCC
VCC
VCC
VCC
VCC
VCC
4 1
124 GPIO10/LPCPD# VREF 104 2 R59 1 10KR2J-3-GP
7 LRESET#
33KR2J-3-GP
2 X-32D768KHZ-34GPU
11,15 PCLK_KBC
3
LCLK A/D GPI90/AD0 97
98 TP_LOCK_BTN#
AD_IA 42
1 R76 82.30001.661
DY
11,35,58 LPC_LFRAME# LFRAME# GPI91/AD1
126 99 WIRELESS_BTN# 1 TP156 TPAD14-GP 2nd = 82.30001.B21 U13B 2 OF 2
11,35,58 LPC_LAD0 LAD0 GPI92/AD2
2
2
LAD2 GPIO05 S0_PWR_GOOD_TP KBC_XI KCOL1
DY 0R2J-2-GP 11,35,58 LPC_LAD3 1 LAD3 LPC GPIO04 96 1 1 2 77 32KX1/32KCLKIN KBSOUT0/JENK# 53 KCOL1 58
11 INT_SERIRQ 125 TP151 TPAD14-GP R73 10MR2J-L-GP 52 KCOL2
SERIRQ KBSOUT1/TCK KCOL2 58
11 PM_CLKRUN# 8 51 KCOL3
KCOL3 58
1
1
3RD = 83.R0304.B8H E51_RxD 113 27 BLON_OUT 18 TPAD14-GP 85 ECRST#
32 E51_RxD GPIO87/SIN_CR GPIO52/RDY# UMA_DISCRETE# C212 VCC_POR#
112 GPO84/BADDR0 GPIO53 28 DY
73 LOW_PWR 25 SC4D7P50V2CN-1GP
2
DC_BATFULL GPIO70
38 DC_BATFULL
114 GPIO16 GPIO71 74
14 75 BT_LED 38 WPCE773LA0DG-GP
GPIO34 GPIO72
RN28
43,58 S5_ENABLE 15 GPIO36 GPO82/TRIS# 110 USB_PWR_EN# 24,58 71.00773.00G
1 8 E51_TxD
2 7 DBC_EN
SER/IR
3 6 MODEL_ID0 RN26
20090105 SB modify
4 5 VCORF 44 3D3V_AUX_S5 5 4 ECRST#
VCORF LID_CLOSE#
6 3
1
1
SCD1U16V2ZY-2GP AGND
8 1
GND
GND
GND
GND
GND
GND
SC1U10V3KX-3GP
2
SRN10KJ-6-GP
2
WPCE773LA0DG-GP Q10
103
5
18
45
78
89
116
71.00773.00G 6,33,39 RSMRST# B
UMA_DISCRETE# 1 2
3D3V_S0 MMBT3906-4-GP
C
S5_ENABLE DIS R278 84.T3906.A11
10KR2J-3-GP RN27 2ND = 84.03906.F11
1
2 2
2
10KR2J-3-GP 10KR2J-3-GP 5V_S5 2 1 USB_PWR_EN#
DY SB: 0,1 R285 DY
R137 10KR2J-3-GP
2
27
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
28
PCB_VER0 AMP_SHUTDOWN#
-1M:1,1
1
PCB_VER1
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
1
R140 R142
10KR2J-3-GP 10KR2J-3-GP
DY
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
KCOL18
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
2
1 1
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
KBC WPC8768L
Size Document Number Rev
WWW.AliSaler.Com
A2 -1
SJV50-TR
A
Date: Monday, June 29, 2009 Sheet 34 of 59
3D3V_AUX_S5
5
6
7
8
RN24
SRN10KJ-6-GP
16M Bits
SPI_HOLD# 4
3
2
1
U14 3D3V_AUX_S5
34 SPICS# SPICS# 1 8
CS# VCC SPI_HOLD#
34 SPIDI 2 R86 1 2 DO HOLD# 7
0R0402-PAD SPI_WP# 3 6 2 R103 1 SPICLK 34
WP# CLK
4 5 2 R105 1 0R0402-PAD
SB 980515 GND DIO SPIDO 34
1
DY EC40 0R0402-PAD
1
SC4D7P50V2CN-1GP
DY
34 SPI_WP# W25X16AVSSIG-GP SB 980515 EC42
2
SC4D7P50V2CN-1GP
72.25X16.A01
2
1
1
2ND = 72.25165.A01DY EC43 DY EC41
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
3RD = 72.25161.001
2
EMI REQUEST
GF1
1
2 LPC_LAD0
LPC_LAD0 11,34,58
3 LPC_LAD1
LPC_LAD1 11,34,58
4 LPC_LAD2
LPC_LAD2 11,34,58
5 LPC_LAD3
LPC_LAD3 11,34,58
6 LPC_LFRAME#
LPC_LFRAME# 11,34,58
DY 7 PLT_RST1#_B
PLT_RST1#_B 11,25,31,32,34,50,58
8
9 PCLK_FWH
PCLK_FWH 11,15,58
10
11
12
D D
TOUCH PAD
5V_S0
5V_S0
DY DY
1
EC91 EC92
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1
2
2
RN67
SRN10KJ-5-GP TPCN1
13
TP_DATA
58 TP_DATA
4
3
C 1 TP_CLK C
58 TP_CLK
TP_LEFT
RN64 2 TP_RIGHT
34 TPDATA 1 4 TP_DATA 3
34 TPCLK 2 3 TP_CLK 4
2
5
SRN33J-5-GP-U 6 EC52 EC53 EC88 EC89
37,58 TP_RIGHT 7
1
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
8 DY DY DY DY
9
10
11
37,58 TP_LEFT 12
14
ACES-CON12-9-GP
20.K0315.012
2ND = 20.K0370.012
B B
1 12
T/P
<Core Design>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
TouchPad
Size Document Number Rev
SJV50-TR -1
WWW.AliSaler.Com
5 4 3
Date: Monday, June 29, 2009
2
Sheet 36
1
of 59
A B C D E
3D3V_AUX_S5 3D3V_AUX_S5
1
R7
10KR2J-3-GP
PWRCN1 LID1
3 2 LID_CLOSE#
LID_CLOSE# 34
2
KBC_PWRBTN#_R OUT
1 2 1 KBC_PWRBTN# 34
3 GND DY
2
2 G1 R8 EC2
2
4 GAP-OPEN 470R2J-2-GP C7 1 SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP VDD
ACES-CON2-3-GP-U
1
ME268-002-GP
20.F0825.002
1
2ND = 20.F1214.002 74.00268.07B
Single Source
2
EC109
3 SCD1U16V2ZY-2GP DY 3
1
RIGHT LEFT
TP_RIGHT 36,58 TP_LEFT 36,58
RIGHT1 LEFT1
1 2 1 2
2
2 EC65 EC114 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY 5 DY 5
1
3 4 3 4
SW-TACT-5P-1-GP SW-TACT-5P-1-GP
62.40009.A61 62.40009.A61
2ND = 62.40009.B21 2ND = 62.40009.B21
<Core Design>
1
Wistron Corporation 1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Switchs
Size Document Number Rev
SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 37 of 59
A B C D E
5 4 3 2 1
1
3 EC120 EC121
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
R1 LED-RB-4-GP
D
34 STDBY_LED 1
2
-1 090223 83.19226.C70 D
2
R2 3D3V_S0
2ND = 83.00195.M70
DTC143ZUB-GP
84.00143.G1K
2ND = 84.00143.D1K
3RD = 84.00143.E1K DY
1
EC19
Q31 MMB1 SCD1U10V2KX-4GP
3 CHARGER LED 5V_AUX_S5 17
2
1 R1
34 CHARGE_LED CHARGER_LED1
2 1
R2
DTC143ZUB-GP CHARGE_LED# 1 2 CHARGE_LED#_R
RED 2 3 2 20081218_SB rename
84.00143.G1K R454 1KR2J-1-GP 3 KBC_THERM_CLK 25,32,33,34,51,58
2ND = 84.00143.D1K 4 KBC_THERM_DAT 25,32,33,34,51,58
3RD = 84.00143.E1K BLUE 5 MEDIA_INT 34,58
DC_BATFULL# 1 2 DC_BATFULL#_R 1 4 6
Q30 R453 1K82R2F-1-GP DY DY 7
3 -1 090223 20081204_SWAP 8
1
1 R1 EC118 EC119 LED-RB-4-GP 9 WLAN_LED#_MMB
34 DC_BATFULL
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
2 83.19226.C70 10 CAP_LED#_MMB
R2 2ND = 83.00195.M70 11 NUM_LED#_MMB
2
DTC143ZUB-GP 12 MEDIA_LED#_MMB
84.00143.G1K 13
2ND = 84.00143.D1K 14 BT_LED#_MMB
3RD = 84.00143.E1K 15
16
Q4
3 CAP_LED# 1 2 CAP_LED#_MMB CAP_LED#_MMB 58 18 5V_S0
C 1 R1 R39 100R2J-2-GP DY C
34 CAP_LED
1
2 DY KYO-CON16-GP EC25
R2 20.K0384.016 SCD1U10V2KX-4GP
1
DTC143ZUB-GP EC23
2
SCD1U25V2ZY-1GP
84.00143.G1K
2ND = 20.K0429.016
EC28
EC27
EC26
EC21
EC30
2ND = 84.00143.D1K
2
3RD = 84.00143.E1K 3RD = 20.K0424.016
1
DY DY DY DY DY
SC220P50V2JN-3GP
SC220P50V2JN-3GP
SC220P50V2JN-3GP
SC220P50V2JN-3GP
SC220P50V2JN-3GP
Q3
3 NUM_LED# 1 2 NUM_LED#_MMB NUM_LED#_MMB 58
1 R1 R38 100R2J-2-GP
34 NUM_LED
2 DY
R2
1
DTC143ZUB-GP EC22
-1 090624
SCD1U25V2ZY-1GP
84.00143.G1K
2ND = 84.00143.D1K
2
3RD = 84.00143.E1K
Q6
3 MEDIA_LED#_R 1 2 MEDIA_LED#_MMB MEDIA_LED#_MMB 58
1 R1 R37 120R2J-2-GP
34 ALL_LED_OFF#
2
R2
DTC143ZUB-GP
84.00143.G1K
B B
2ND = 84.00143.D1K
3RD = 84.00143.E1K
13 MEDIA_LED#
Q7
3 BT_LED# 1 2 BT_LED#_MMB BT_LED#_MMB 58
1 R1 R35 300R2J-4-GP
34 BT_LED
2 DY
R2
1
DTC143ZUB-GP EC20
SCD1U25V2ZY-1GP
84.00143.G1K
2ND = 84.00143.D1K
2
3RD = 84.00143.E1K
3D3V_S0 -1 090213 DY DY
1 2 1 2 WLAN_LED#_MMB 58
R45 R40 100R2J-2-GP
1
2
WLAN_LED#_R1
WLAN_LED#_R2
33R2F-3-GP
DY RN70 DY
1
SRN10KJ-5-GP EC24
SCD1U25V2ZY-1GP
4
3
Q34
R2
Q5 E
A 3 WLAN_LED#_R B <Core Design> A
R1 R1
1 C
D
34 ALL_LED_OFF#
2 DY DY
DY R2 DDTA114YCA-7-F-GP .
DTC143ZUB-GP 84.00114.M11 Q13 Wistron Corporation
84.00143.G1K . 2N7002E-1-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2ND = 84.00143.D1K . .
. 84.2N702.D31 Taipei Hsien 221, Taiwan, R.O.C.
3RD = 84.00143.E1K 2ND = 84.2N702.I31
Title
S
G
4 3 2
Date: Monday, June 29, 2009
SJV50-TR
Sheet
1
38 of 59
2D5V_S0 3D3V_S0
1
U59
100KR2J-1-GP 100KR2J-1-GP S D
R237 R239 DY
C846
1
S D
8
2 7
84.S0610.B31 1 2 3 S D 6
2ND = 84.00610.C31 4 G D 5
2
DCBATOUT Q28 SCD1U25V3KX-GP
C602
D13 NDS0610-NL-GP RUN_POWER_ON AO4468-GP
2 1 2D5V_S0_PG 2 84.04468.037
1 2 Z_12V S D
SC1U10V2KX-1GP 3 R447 3D3V_S0 3D3V_S5
VCORE_EN 41,45
K
1
1
3D3V_S0 10KR2J-3-GP 1 U60
1 R428 C840 R433 D20 1 S D 8
G
12,28,33,34,47,48 PM_SLP_S3#
SCD22U25V3KX-GP
330KR2J-L1-GP
S D
10KR2J-3-GP
2 PDZ9D1B-GP 2 7
1
BAW56-5-GP 3 S D 6
83.00056.Q11 R426 1 2 Z_12V_G3 83.9R103.C3F 4 G D 5
A
2
2
2ND = 83.00056.K11 100R5J-3-GP R448
1
R246 3RD = 83.00056.G11 330KR2J-L1-GP AO4468-GP 1D8V_S0 1D8V_S3
DY DY 2ND = 83.9R103.F3F
3D3V_RUNPWR
43 3V/5V_POK 1 2 R449 84.04468.037
2
100KR2J-1-GP
0R2J-2-GP U41
DY R245 Z_12V_D4 1 S D 8
2
1 2 2 S D 7
44 1D8V_S3_PWRGD
R365 3 S D 6
Q27 G D
0R2J-2-GP 1 2 1D8V_S0_ON 4 5
1
4 3 1MR2F-GP C766 AO4468-GP
Z_12V_D3
D
Q29 SC22P50V2JN-4GP 84.04468.037
DY
2
2N7002-11-GP 5 2
2
R581
G Z_12V_D3 6 1 0R2J-2-GP
DIS
20081128
1
2N7002DW-1-GP 1D1V_M92 1D1V_S0
D5 84.27002.D3F
BAS16-1-GP for TR 2ND = 84.27002.E3F PM_SLP_S3# 12,28,33,34,47,48
2
3D3V_M92
3RD = 84.27002.B3F U61
1 S D 8
3 2 S D 7
RSMRST# 6,33,34
R486 3 S D 6
1
1 1 2 1D1V_M92_ON 4 G D 5
43 3V/5V_EN
R584
1
100R5J-3-GP 1MR2F-GP C787 AO4468-GP
83.00016.B11 TR-MUX SC22P50V2JN-4GP 84.04468.037
for TR TR-MUX
2ND = 83.00016.K11 TR-MUX TR-MUX
2
3RD = 83.00016.F11 3D3V_S0
M92_RUNPWR
1
Q36
D
2N7002-11-GP -1 980623 R500
3D3V_AUX_S5 10KR2J-3-GP
TR-MUX M92_RUNPWR_1
TR-MUX
G
2
U75
980602 SB DY 84.27002.W31 4 3
S
2
2ND = 84.27002.N31
1
R159 D4 5 2 DCBATOUT
10KR2J-3-GP BAT54-7-F-GP 3D3V_M92 3D3V_S5
DIS-MUX
1
DY DY 83.00054.Z81 6 1
2ND = 83.BAT54.D81 R583 S D
3RD = 83.00054.T81 2N7002KDW-GP 100KR2J-1-GP Q38
2
G
TR-MUX R499
(dummy, KBC already delay)
20080114 SB
1
K
SCD1U16V2ZY-2GP 11,47 PE_GPIO1
DIS-MUX
1
C871
2
2
51 PE_GPIO1_1
TR-MUX
A
U64
83.9R103.C3F 1 S D 8
2ND = 83.9R103.F3F 2 S D 7
R509 3 S D 6
P/H @ 1D8V_S3 PAGE 1 2 1D8V_M92_ON 4 G D 5
1
R251 1MR2F-GP C872 AO4468-GP
41 VRM_PWRGD 1 DY 2 1D1V_PWRGD 45 TR-MUX SC22P50V2JN-4GP 84.04468.037
2
TR-MUX TR-MUX
0R2J-2-GP
. .
1 R590 2 1 R585 2
R249 D 0R3J-0-U-GP 0R3J-0-U-GP
.
.
.
10KR2J-3-GP 3D3V_S5 S
DIS DIS
NB_PWRGD 9,12
1 R592 2 1 R586 2
2
2N7002E-1-GP
2ND = 84.2N702.I31 DIS DIS
1 84.2N702.D31
12,28,33,34,47,48 PM_SLP_S3#
3 SB_PWRGD 3,12 1 R591 2 1 R587 2
2 0R3J-0-U-GP 0R3J-0-U-GP
<Core Design>
DIS DIS
D15 TSLVC08APW-1-GP
7
45 1D1V_PWRGD 2
RUNPWROK_D
73.07408.L16 Wistron Corporation
3
2ND = 73.07408.L15 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1 Taipei Hsien 221, Taiwan, R.O.C.
33 S0_PWR_GOOD
BAW56-5-GP Title
83.00056.Q11 RUN POWER and AUX POWER
2ND = 83.00056.K11
3RD = 83.00056.G11 Size Document Number Rev
SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 39 of 59
5 4 3 2 1
TI TPS51125
CPU_CORE 3D3V/5V
1D5V_S0
ISL6264
Input Signal Output Signal 3D3V_S0 1D5V_S0
VID Setting Output Signal INPUT OUT
VID0
VID0(I / 3.3V) MAX8760_VRM
VROK() FOR G957
D VID1 51120_EN2 3.3V D
VID1(I / 3.3V) Pull High (3D3V)
PGOUT(OD / 5V)
VID2 51120_EN1 FOR 1D2V_S5
VID2(I / 3.3V) 5.0V
VID3 3D3V_S5 1D2V_S5
VID3(I / 3.3V) INPUT OUT
Output Power
VID4
VID4(I / 3.3V) VCC_CORE_S0(Imax=35A) G9091
VCC_CORE_PWR(O)
VID5 DCBATOUT_51120
VID5(I / 3.3V) VIN
2D5V_S0
5V_AUX_S5
Input Signal
Input Power Output Power 3D3V_S0 2D5V_S0
VCORE_EN INPUT OUT
EN (I / 3.3V)
3D3V_AUX_S5
DCBATOUT_51120 G9091
Voltage Sense VIN
5V_S5 (5.4A)
COREFB 5V(O)
VSEN(I / Vcore)
REG5V_IN(I / 5V) 0D9V_S3
C C
COREFB#
RGND(I / Vcore) 3D3V_S5 (4A)
3D3V(O) 5V_S5 0D9V_S3
INPUT OUT
Input Power
DCBATOUT RT9026
VCC(I)
5V_S0
VCC(I)
3D3V_S0
VCC(I) Adapter Charger_MAX8731
Input Signal Output Signal
AD_IN Input Signal Output Signal
AD_OFF (I) (O) CHARGE_OFF AD_IN
CLS (I / 3.3V) LDO (O / 5.4V)
BT_TH
THM (I / 3.3V) CHARGE_LED#
Input Power Output Power XTAL2/PB4 (O/5V)
BAT+SENSE
B
AD_JK AD+ BATT (I / 3.3V) B
VCC(I) VCC(O) XTAL1/PB3 (O/5V) BL2#
TI TPS51124 BT_SCL_5
5V_AUX_S5 SCL (IO / 5V)
1.8V / 1.2V VCC(I)
BT_SDA_5
SDA (IO / 5V)
Output Power
Input Signal Output Signal FLASH_GPIO1 DCBATOUT
RESET#/PB5 (I/5V) VCC (O)
PM_SLP_S5# S5
FLASH_GPIO2
S3 1D8V_S3_PG PB0/MOSI/AIN0 BT+
PGOOD(OD / 3.3V) VCC (O)
AC_IN
PB0/MOSI/AIN0
Input Power
AD+
Input Power DCIN (I)
Output Power
1.8V_S3
DCBATOUT VCC(O)
VCC(I)
1.2V_S0
5V_S5 VCC(O)
A VCC(I) <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
WWW.AliSaler.Com 5 4 3 2
SJV50-TR
Date: Monday, June 29, 2009 Sheet
1
40 of 59
-1
5 4 3 2 1
GAP-CLOSE-PWR GAP-CLOSE-PWR
TC29 G20 G11
1
1
SE100U25VM-L1-GP
1 2 1 2
TC18 DCBATOUT_6265_1
GAP-CLOSE-PWR SE68U25VM-3-GP GAP-CLOSE-PWR
2
2
G21 G12
SCD1U25V3KX-GP
D 1 2 1 2 D
79.68612.30L C287 C286 C285 C289
3RD = 79.10712.6JL
2ND = 79.10112.3JL
SC10U25V6KX-1GP
GAP-CLOSE-PWR 2nd = 79.68612.L01 GAP-CLOSE-PWR
5
6
7
8
1
SC10U25V6KX-1GP
SC10U25V6KX-1GP
G22 G13
U18 DY
D
D
D
D
1 2 1 2
1 2 SC33P50V2JN-3GP FDMS8692-GP VCC_CORE_S0_0
2
GAP-CLOSE-PWR GAP-CLOSE-PWR C216 C234 SC180P50V2JN-1GP 84.08692.037
-1 980624 G23 G14 1 2
Design Current: 12.6A
1 2 1 2 Peak current: 18A
G
S
S
S
1 R121 26265_FB_NB_R 1 2 OCP_min:24A
GAP-CLOSE-PWR GAP-CLOSE-PWR 5V_S0 44K2R2F-1-GP C233 SC1KP50V2KX-1GP
4
3
2
1
R124 2ND = 68.R3610.20A
1 2 1 2 VDDNB 68.R3610.20C VCC_CORE_S0_0
C222 SCD1U10V2KX-4GP UGATE0 L52 SB_980513 WAYNE
2R3J-GP PHASE0 1 2
2
1 R120 2 IND-D36UH-9-GP
1
C223 22KR2F-GP R130 BOOT0 1 2 Parts
SC1U10V2KX-1GP 10R2F-L-GP C196 R69
2
close to
5
6
7
8
5
6
7
8
1
GNDA_VCORE SCD22U10V3KX-2GP 16K2R2F-GP TC4 TC16 TC3
D
D
D
D
D
D
D
D
DCBATOUT DCBATOUT_6265_3
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
U16 U17 PWM IC
1
G26 GNDA_VCORE 1 R119 2 CPU_VDDNB_RUN_FB_H 6 FDMS7672-GP FDMS7672-GP 79.33719.L01
2
0R0402-PAD 84.07672.037 1 R72 DY 2ND = 77.C3371.051
1 2
DCBATOUT_6265_1 SB 980521 84.07672.037
2
4K02R2F-GP
GAP-CLOSE-PWR 1 R115 2 PHASE_NB 1 2
G
S
S
S
G
S
S
S
G25 1 R125 2 11K3R2F-2-GP C126 SCD1U16V2KX-3GP
6265_OCSET_NB
1 2 5V_S0 3D3V_S0 2R3J-GP LGATE_NB R67 R70 R236 close
4
3
2
1
4
3
2
1
1
1 DY 2 1 DY 2
to L13
6265_COMP_NB
GAP-CLOSE-PWR C225 PHASE_NB 10R2F-L-GP NTC-10K-9-GP
6265_VSEN_NB
ISP0
6265_FSET_NB
G24 SCD1U25V3KX-GP LGATE0 79.33719.L01
SB 980521
6265_FB_NB
2
1
1
1 2 UGATE_NB ISP0_R 79.33719.L01
6265_VCC
6265_VIN
R123 ISN0 2ND = 77.C3371.051
GAP-CLOSE-PWR R106DY 0R0603-PAD DY R117 GNDA_VCORE
SB 980521 G16
2 1
2ND = 77.C3371.051
10KR2F-2-GP 0R2J-2-GP CPU_VDDNB_RUN_FB_L_R 1 R118 2 CPU_VDDNB_RUN_FB_L 6 GAP-CLOSE-PWR-3-GP
0R0402-PAD
2
2
6265_OFS/VFIXEN
3D3V_S0 R131 DCBATOUT_6265_3
C 2009/04/08 WAYNE C
1
GNDA_VCORE 10R2F-L-GP
49
48
47
46
45
44
43
42
41
40
39
38
37
1
FB_NB
COMP_NB
FSET_NB
VSEN_NB
RTN_NB
OCSET_NB
PGND_NB
LGATE_NB
PHASE_NB
UGATE_NB
GND
VIN
VCC
1
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U25V3KX-GP
R110 0R2J-2-GP
1
10KR2F-2-GP DY
2
5
6
7
8
2
D
D
D
D
2
2
GNDA_VCORE 1 36 BOOT_NB U19
39 VRM_PWRGD
SB 980521 2
OFS/VFIXEN
PGOOD
BOOT_NB
BOOT0 35 BOOT0 SI4800BDY-T1
3 34 UGATE0 84.04800.D37
6 CPU_PWRGD_SVID_REG PWROK UGATE0
1 2 6265_SVD 4 33 PHASE0
6 CPU_SVD SVD PHASE0
R109 1 20R0402-PAD 6265_SVC 5 32 5V_S0 VDDNB: Design Current: 2.1A
6 CPU_SVC
G
S
S
S
R104 SVC PGND0
39,45 VCORE_EN 1 20R0402-PAD 6265_ENABLE 6 31 LGATE0 Peak current: 3A OCP_min:5A
4
3
2
1
R107 6265_RBIAS ENABLE LGATE0
1 20R0402-PAD 7 RBIAS U15 PVCC 30
VDDNB
SC2D2U6D3V3KX-GP
1 2 R102 93K1R2F-L-GP 6265_OCSET 8 29 LGATE1
OCSET LGATE1
1
R101 23K7R2F-GP 6265_VDIFF0 9 28 C184 UGATE_NB L55
6265_FB0 VDIFF0 PGND1 PHASE1 BOOT_NB 1 PHASE_NB
10 FB0 PHASE1 27 2 1 2
6265_COMP0 11 26 UGATE1 C381 IND-4D7UH-88-GP
2
GNDA_VCORE 6265_VW0 COMP0 UGATE1 BOOT1 SCD22U10V3KX-2GP
12 VW0 BOOT1 25 68.4R710.20D
2ND = 68.4R71C.10K TC17
5
6
7
8
1
SE220U2VDM-8GP
COMP1
VDIFF1
VSEN0
VSEN1
SCD1U10V2KX-4GP
RTN0
RTN1
D
D
D
D
ISN0
ISN1
ISP0
VW1
ISP1
FB1
1 2 SI4800BDY-T1 DY
2
84.04800.D37
GAP-CLOSE-PWR-3-GP ISL6265AHRTZ-T-GP
13
14
15
16
17
18
19
20
21
22
23
24
DCBATOUT_6265_2
74.06265.B73
GNDA_VCORE
G
S
S
S
ISP0 ISN1
6265_COMP1
6265_FB1
6265_VW1
6265_VDIFF1
4
3
2
1
ISN0 ISP1
C102 C106 C105 C109
1D8V_S3
SCD1U25V3KX-GP
LGATE_NB ESR=15mohm
5
6
7
8
1
VCC_CORE_S0_0
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
79.22719.20L
VCC_CORE_S0_1 U9 2ND = 80.2271V.A9L
D
D
D
D
1
FDMS8692-GP
DY
2
B R75 R483 84.08692.037 B
1
R56 R60
DY 0R2J-2-GP DY 0R2J-2-GP
G
S
S
S
Close to 10R2J-2-GP 10R2J-2-GP 2009/04/08 WAYNE
2
4
3
2
1
CPU socket 68.R3610.20C VCC_CORE_S0_1
2
2
BOOT1 1 2 Parts
6 CPU_VDD1_RUN_FB_H
C172 R84
close to
1
5
6
7
8
5
6
7
8
Parallel SCD22U10V3KX-2GP 16K2R2F-GP TC15 TC1 TC2
1
D
D
D
D
D
D
D
D
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
R55 R58 U12 U11 PWM IC DY SB_980513 WAYNE
10R2J-2-GP 10R2F-L-GP FDMS7672-GP FDMS7672-GP 79.33719.L01
1
PU Close to 84.07672.037 1 2 2ND = 77.C3371.051
2
84.07672.037 R82 4K02R2F-GP
2
CPU socket 1 2
G
S
S
S
G
S
S
S
C151 SCD1U16V2KX-3GP
SB_980513 WAYNE
4
3
2
1
4
3
2
1
R235 close
R81 R68 79.33719.L01
LGATE1 1 DY 2 1 DY 2 to L12 2ND = 77.C3371.051
6265_FB0_C C154 SC180P50V2JN-1GP 6265_FB1_C C129 SC180P50V2JN-1GP 10R2F-L-GP NTC-10K-9-GP 79.33719.L01
ISP1
1 2 DY 1 DY 2 ISP1_R 2ND = 77.C3371.051
R100 C176 C170 R78 C127 C136
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 ISN1 2 1
249R2F-GP C138 SC1KP50V2KX-1GP 249R2F-GP SC1KP50V2KX-1GP G17
SC4700P50V2KX-1GP SC180P50V2JN-1GP SC4700P50V2KX-1GP SC180P50V2JN-1GP C125 GAP-CLOSE-PWR-3-GP
2009/04/08 WAYNE
R71
R85 C161 R77 C117
1 R99 2 1 2 1 2 21 1 R79 2 1 2 1 2 1 R80 2
54K9R2F-L-GP 6K81R2F-1-GP
1KR2F-3-GP SC180P50V2JN-1GP 1KR2F-3-GP 54K9R2F-L-GP SC1KP50V2KX-1GP 6K81R2F-1-GP
A A
6265_FB0_R 1 2 6265_FB1_R 1 2
C156 SC1KP50V2KX-1GP C124 SC180P50V2JN-1GP
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
2009/05/05 WAYNE
AD+ 2009/04/08 WAYNE
U3 AD+_TO_SYS DCBATOUT
8 D S 1 BT+
7 D S 2 R4 U26
6 D S 3 1 2 SA_Wayne_980323 1 S D 8
5 D G 4 D01R3721F-GP-U 2 S D 7
AD+ 3 S D 6
AO4407A-GP R3 R2 G D C8
GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U
D 4 5 D
SCD1U25V3KX-GP
AD+_G_1 1 2 1 2
G9
G55
84.04407.F37 AO4407A-GP
1ISL88731_CSSN
10KR2J-3-GP 100KR2J-1-GP 84.04407.F37
2
1
1
1
R10
3
470KR2J-2-GP
GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U
Q12 -1 980623
1
2N7002KDW-GP
2
84.2N702.A3F
1
Single Source
G48
G45
G47
G46
R197 R194
2
2 R229 1 10R2J-2-GP 10R2J-2-GP
10KR2F-2-GP
C541
SCD1U25V3KX-GP
2
2
ISL88731_ACOK 2 1
D9
A K C540
SCD1U25V3KX-GP
1
1 2
1
ISL88731_CSSP
CH521S-30PT-GP-U C565 CHG_AGND C542
SCD047U25V3KX-GP
2
1
1
C543
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U25V3KX-GP
R205 U33 SC1U10V3KX-3GP
2ND = 83.R2003.F8F 2008/11/04CHG_AGND
C529
C530
C528
215KR3F-1-GP
NC#1
5
6
7
8
1
22 28 R195
2
D
D
D
D
ISL88731_ACIN 2 2 CHG_AGND SI4800BDY-T1
2
ACIN
SCD01U50V2KX-1GP
27 ISL88731_CSSN_R 84.04800.D37
2
CSSN
1
C
5V_S5 11 26 ISL88731_VCC 3 D8 DY C
VDDSMB VCC
1
C555
R204
1
49K9R2F-L-GP C585 1
G
S
S
S
SCD1U10V2KX-4GP 25 ISL88731_BST 1 R196 2ISL88731_BST1 C556
2
4
3
2
1
BOOT ISL88731_LDO 0R3J-0-U-GP BAT54PT-GP
21 1 2
2
ISL88731_ACOK VDDP
13 ACOK SC1U10V3KX-4GP
SA_20081104
CHG_AGND ISL88731_DHI
CHG_AGND 10
UGATE 24
1 2
2008/11/04 BT+
34,49 KBC_BAT_CLK SCL L40
C544 R187
PHASE 23 ISL88731_LX SCD1U50V3KX-GP ISL88731_LX 1 2 1 2 SA_Wayne_980323
IND-10UH-117-GP D01R3721F-GP-U
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
34,49 KBC_BAT_DAT 9 SDA 68.1001B.10R
ISL88731_DLO 2ND = 68.1001C.10Y
GAP-CLOSE-PWR-2U
GAP-CLOSE-PWR-2U
LGATE 20
C509
C506
C507
C508
5
6
7
8
1
G4
G3
U29
D
D
D
D
14 NC#14 PGND 19
R211 10R2F-L-GP SI4800BDY-T1
2
18 ISL88731_CSIP_R 1 2 84.04800.D37
CHG_AGND CSOP
1
17 C566
ISL88731_CSIP
ISL88731_IINP CSON SCD22U50V3ZY-1GP
1 2 8
G
S
S
S
34 AD_IA R223 1KR2F-3-GP ICM
4
3
2
1
ISL88731_CSIN
1ISL88731_CCV1
SCD01U16V2KX-3GP
R217
1 2 ISL88731_CCV 6
10KR2F-2-GP VCOMP
5 NC#5 NC#16 16
1
R221 ISL88731_CCS 4
B ICOMP B
SCD01U50V2KX-1GP
SCD015U25V2KX-GP
3
SCD01U50V2ZY-1GP
VREF
10KR2J-3-GP
SC1U10V3KX-3GP
C588
C575
DY 7
SCD1U25V2ZY-1GP
NC#7 PBATT_SENSE_R
12 15 1 R215 2
GND
1
C573
C563
C559
C581
0R3J-0-U-GP
2
DY DY
2008/11/04
2
29
DY ISL88731AHRZ-T-GP
74.88731.B73
20081008
1 2
G56
20090108_SB_Wayne GAP-CLOSE-PWR-2U
CHG_AGND
3D3V_AUX_S5 ISL88731_LDO
2008/10/24
1
R222
10KR2F-2-GP
2
2
R218
34 AC_IN#
10KR2J-3-GP
D
1
A
Q14 <Core Design> A
2N7002-11-GP G 1 R219 2 ISL88731_ACOK
84.27002.W31 0R0402-PAD
1
Title
ISL88731A Charger
Size Document Number Rev
A3 -1
WWW.AliSaler.Com 5 4 3 2
Date: Monday, June 29, 2009
SJV50-TR
Sheet
1
42 of 59
5 4 3 2 1
DCBATOUT DCBATOUT_51125
2009/03/23 Wayne
G36
1 2
1 2 5V_AUX_S5 5V_AUX_S5
34,58 S5_ENABLE 3V/5V_EN 39 5V_PWR 5V_S5
GAP-CLOSE-PWR R436
G34 2KR2F-3-GP G110
1
1 2 1 2
R439
GAP-CLOSE-PWR R444 10KR2J-3-GP GAP-CLOSE-PWR
G32 Q26 10KR2J-3-GP Q25 G111
D 1 2 1 2 D
2
1 6 1 6
GAP-CLOSE-PWR GAP-CLOSE-PWR
G30 2 5 2 5 G112
1 2 39 3V/5V_EN 39 3V/5V_EN 1 2
1
TC22 DY C848 51125_ENTIP2 3 4 DY C487 51125_ENTIP1 3 4
1
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
SE100U25VM-L1-GP GAP-CLOSE-PWR GAP-CLOSE-PWR
1
79.10712.L02 DY C847 G113
2
1
1
DCBATOUT_51125 R434 2N7002DW-1-GP R441
2ND = 79.10112.3JL DY C488 2N7002DW-1-GP 1 2
2
124KR2F-GP
SC18P50V2JN-1-GP
115KR2F-GP
SC18P50V2JN-1-GP
3RD = 79.10712.6JL 84.27002.D3F 84.27002.D3F
DCBATOUT DCBATOUT_51125_3V GAP-CLOSE-PWR
2ND = 84.27002.E3F 2ND = 84.27002.E3F
2
G35 3RD = 84.27002.B3F 3RD = 84.27002.B3F G114
2
1 2 1 2
1
GAP-CLOSE-PWR R65 GAP-CLOSE-PWR
G33 249KR2F-GP G108
1 2 1 2
2
GAP-CLOSE-PWR GAP-CLOSE-PWR
G31 SA_Wayne_980323 G115
1 2 51125_EN 1 2
GAP-CLOSE-PWR 2009/04/08 Wayne GAP-CLOSE-PWR
2009/04/08 Wayne
DCBATOUT_51125 DCBATOUT_51125
DCBATOUT_51125_3V
1
SC2D2U10V3KX-1GP
C C482 C481 DY DY C
1
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
DY C484 Id=7A
SC10U25V6KX-1GP
SC10U25V6KX-1GP
2
SCD1U50V3KX-GP Qg=8.7~13nC
D D
2
8
7
6
5
5
6
7
8
Id=7A Rdson=23~30mohm
D
D
D
D
U51
D
D
D
D
U52 Qg=8.7~13nC
16
SI4800BDY-T1
SI4800BDY-T1 Rdson=23~30mohm U58 3D3V_PWR 3D3V_S5
84.04800.D37
84.04800.D37 2009/03/20 Wayne 2009/03/20 Wayne
VIN
G97
SCD1U25V3KX-GP
Iomax=6A
Iomax=6A Cyntec 7*7*3 1 2
S
S
S
G
G
S
S
S
C842 R588 R589 C839
G S Cyntec 7*7*3 OCP>9A
1
2
3
4
4
3
2
1
OCP>9A DCR=30mohm, Irating=6A 1 4D7R2F-GP 51125_VBST2 51125_VBST1 1 4D7R2F-GP GAP-CLOSE-PWR
S
Isat=13.5A
G 2 1 2 9 BOOT2 BOOT1 22 2 1 2
DCR=30mohm, Irating=6A G99
3D3V_PWR SCD1U25V3KX-GP 51125_DRVH2 10 21 51125_DRVH1 Isat=13.5A 5V_PWR 1 2
L62 UGATE2 UGATE1 L61
1 2 51125_LL2 11 20 51125_LL1 1 2 GAP-CLOSE-PWR
IND-3D3UH-57GP PHASE2 PHASE1 IND-3D3UH-57GP G101
DY 68.3R310.20AD 51125_DRVL2 12 19 51125_DRVL1 68.3R310.20A 1 2
LGATE2 LGATE1
1
5
6
7
8
ST220U6D3VDM-20GP
SE220U6D3VM-7GP
2ND = 77.92271.021
DY DY GAP-CLOSE-PWR
SCD1U10V2KX-4GP
GAP-CLOSE-PWR-3-GP
D
D
D
D
D
D
D
D
7 24
2
VO2 VO1
1
U57 U56 G116 C836 TC28 TC27 1 2
GAP-CLOSE-PWR-3-GP
SCD1U10V2KX-4GP
2ND = 77.C2271.00L
ST220U6D3VDM-20GP
SE220U6D3VM-7GP
2ND = 77.92271.021
SI4812BDY-T1-E3-GP 51125_FB2 5 2 51125_FB1 SI4812BDY-T1-E3-GP
FB2 FB1 GAP-CLOSE-PWR
84.04812.A37 84.04812.A37
2
1
G109 G105
2
1 2 51125_EN 13 23 51125_PGOOD 1 2
S
S
S
G
G
S
S
S
R182 820KR2F-GP EN PGOOD
G S
1
2
3
4
4
3
2
1
51125_ENTIP2 6 51125_ENTIP1 GAP-CLOSE-PWR
S G 1
2
1
Id=7.7A 2008/10/17 G107
SA_Wayne_980323
1
Id=7.7A R427 R452 1 2
2
Qg=8.5~13nC
1
1
51125_SKIPSEL Rdson=16.5~21mohm DY GAP-CLOSE-PWR
R445 DY 0R2J-2-GP
Rdson=16.5~21mohm R446 change to poscap
VREG3
VREG5
2
1
7K15R2F-L-GP 30K9R2F-GP
1 2
R468 51125_FB1_R
1 2
51125_FB2_R 100KR2J-1-GP
2
2
C851 RT8205AGQW-GP DY C852 DY
3D3V_AUX_S5_5_51125 8
5V_AUX_S5_51125 17
2
3D3V_AUX_S5 5V_AUX_S5
2
1
1 2 1 2
1
R442
DY R183 GAP-CLOSE-PWR GAP-CLOSE-PWR-3-GP R450
51125_VREF 2 1 -1 090213
10KR2F-2-GP 0R2J-2-GP 20KR2F-L-GP
Close to VFB Pin (pin2)
2
2
SC10U10V5KX-2GP
51125_VREF 2 R416 1
2
0R2J-2-GP
A <Core Design> A
DY
Close to VFB Pin (pin5)
3D3V_AUX_S5 2 R415 1 Wistron Corporation
0R0402-PAD 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
R181
2 DY 1 Title
1
G85 G87
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
1 2 1 2
D
2
5
6
7
8
GAP-CLOSE-PWR GAP-CLOSE-PWR
D
D
D
D
G84 U48 G90
1 2 FDS8884-GP 1 2
D 84.08884.037 D
GAP-CLOSE-PWR GAP-CLOSE-PWR
Id=5A G92
G
S
S
S
1 2
Qg=8.7~13nC,
G S
4
3
2
1
Rdson=23~30mohm GAP-CLOSE-PWR
Iomax=6A G96
OCP>9A 1 2
1D8V_PWR GAP-CLOSE-PWR
L63
5V_S5 G98
1 2
Vo(cal)=1.8046V 1 2
IND-1D5UH-34-GP GAP-CLOSE-PWR
1
1
68.1R510.10J C841 C837 C874 TC23 G102
-1 980629 D
1
5
6
7
8
SE390U2D5VM-2GP
2ND = 77.93971.02L
C812 R417 2ND = 68.1R51A.10E DY DY DY 1 2
1
D
D
D
D
SC1U10V2KX-1GP 300R3F-GP R473 C831 U49
2
SC18P50V2JN-1-GP
SCD1U10V2KX-4GP
SC1U10V3KX-3GP
1 2 51117_VBST_1 2 1 FDS6690AS-GP R420 GAP-CLOSE-PWR
2
2
1
G
S
S
S
DY SC1U10V2KX-1GP 51117_1D8V_VFB GAP-CLOSE-PWR
D19
-1 980629 G94
G S
2
4
3
2
1
1
CH551H-30PT-GP U54 R488 1 2
83.R5003.C8F 4 13 51117_DRVH 1 2 51117_DRVH_1 R421
V5FILT DRVH 51117_DRVL 21KR2F-GP GAP-CLOSE-PWR
2ND = 83.R5003.H8H 10 9 SB_980513 WAYNE
2
2
51117_VBST VFB LL
14 VBST SB_980601 WAYNE
C 3 GAP-CLOSE-PWR C
20081128 VOUT
PGOOD 6
1D8V_PWR
Id=5A G104
12,34,46 PM_SLP_S5# 1 R413 2 1D8V_RUN ON 1 7 3D3V_S5 -1 980629 Wayne 1 2
0R0402-PAD
1 R414 2 51117_TON 2
EN_PSV GND
8 Qg=8.7~13nC,
TON PGND
1
249KR2F-GP 51117_TRIP1 11 15 Rdson=23~30mohm GAP-CLOSE-PWR
TRIP GND
SB 980521
1
TPS51117RGYR-GP R404
R397 74.51117.073 10KR2J-3-GP
16KR2F-GP
2
-1 980629 Wayne
2
1D8V_S3_PWRGD 39
20090108_SB Wayne
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
TPS51117_1D8V
Size Document Number Rev
A3
WWW.AliSaler.Com 5 4 3 2
Date: Monday, June 29, 2009
SJV50-TR
Sheet
1
44 of 59
-1
5 4 3 2 1
DCBATOUT DCBATOUT_51124
G6
1 2
SA_20081112
1D1V_PWR 1D1V_S0
GAP-CLOSE-PWR DCBATOUT_51124_1 G39
G7 1 2
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR G40
G8 C534
D 1 2
5
6
7
8
SCD1U25V3KX-GP
1 2 C532 C533
SC10U25V6KX-1GP
SC10U25V6KX-1GP
U28 GAP-CLOSE-PWR
D
D
D
D
D D
GAP-CLOSE-PWR SI4800BDY-T1 G41
2
84.04800.D37 1 2
1
TC9 GAP-CLOSE-PWR
SE68U25VM-3-GP SA_980327_Wayne G42
2
G
S
S
S
G S 1 2
4
3
2
1
79.68612.30L GAP-CLOSE-PWR
2nd = 79.68612.L01 DCBATOUT DCBATOUT_51124_1 Iomax=8A G43
G49 1 2
1D1V_PWR
1 2 Vtrip(mV)=Rtrip(Kohm)*10(uA) L39
Vo(cal)=1.1060V GAP-CLOSE-PWR
20081203 GAP-CLOSE-PWR Iocp=(Vtrip/Rdson)+((1/(2*L*f))*((Vin-Vout)*Vout)/Vin)) 1 2 G44
G50 COIL-1UH-34-GP-U 1 2
1
1 2 68.1R01A.20B
1
2ND = 68.1R01B.10K R28 C552 C875 TC7 GAP-CLOSE-PWR
D
5
6
7
8
SE390U2D5VM-2GP
2ND = 77.93971.02L
GAP-CLOSE-PWR 1 R18 2 16K9R2F-GP DY G52
D
D
D
D
G51 0R0402-PAD 3D3V_S0 U30 1 2
2
SCD1U10V2KX-4GP
SC1U10V3KX-3GP
1 2 SB 980521 SI4172DY-T1-GE3-GP SB_980513 WAYNE DY
2
3D3V_S0 84.04172.037 51124_VFB1 GAP-CLOSE-PWR
1
GAP-CLOSE-PWR R190 G53
1
5V_S5 1 2
G
S
S
S
R198 10KR2J-3-GP R206
DY 39K2R2F-L-GP GAP-CLOSE-PWR
G S
4
3
2
1
10KR2J-3-GP G54
2
1 2
2
1
C539 1
2
SC4D7U6D3V3KX-GP
C550
SC1U10V2KX-1GP
24
R199 U32
2
5
1
6
7
2
1 2
VO1
VFB1
VFB2
VO2
PGOOD1
PGOOD2
39,41 VCORE_EN
1
SC180P50V2JN-1GP
V5FILT DRVL1
16 V5IN
51124_2_EN1 23
SA_20081112
51124_2_EN2 EN1 DCBATOUT_51124
8
3
25
EN2
GND
10 51124_DRVH2
Change 4.7u C558
1D2V_PWR
G59
1D2V_S0
GND DRVH2
SCD1U25V3KX-GP
13 11 51124_LL2 1 2
PGND2 LL2
1
TONSEL
39,41 VCORE_EN R191 2 1 1KR2J-1-GP 18 12 51124_DRVL2 C562 C561
VBST1
VBST2
PGND1 DRVL2
5
6
7
8
TRIP1
TRIP2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
GAP-CLOSE-PWR
U34 G60
D
D
D
D
2
1 BC1 SI4800BDY-T1 1 2
SCD47U6D3V2KX-GP TPS51124RGER-GPU1 84.04800.D37 SA_980327_Wayne
17
14
22
9
2 DY 74.51124.073 GAP-CLOSE-PWR
51124_TRIP1 G61
51124_TRIP2
1D2V Iomax=5A
51124_TONSEL
1 2
G
S
S
S
1
B B
OCP>10A
4
3
2
1
1
GAP-CLOSE-PWR
R193 R203 1D2V_PWR G62
11KR2F-L-GP 10K5R2F-GP L41 1 2
1 2
2
IND-1D5UH-23-GP GAP-CLOSE-PWR
2
1
68.1R510.10K DY G63
20090108_SB Wayne
1
2ND = 68.1R51A.10F C572 C876 TC10 1 2
SCD1U10V2KX-4GP
SE390U2D5VM-2GP
2ND = 77.93971.02L
C23 R33 DY
2
5
6
7
8
51124_LL1 2 1 51124_VBST1 17K8R2F-GP GAP-CLOSE-PWR
2
SC1U10V3KX-3GP
DY R209 U31 G64
D
D
D
D
2
SCD1U16V2KX-3GP DY R202 0R2J-2-GP SI4812BDY-T1-E3-GP 51124_VFB2 1 2
84.04812.A37
1
C41 10KR2J-3-GP GAP-CLOSE-PWR
1
G
S
S
S
SCD1U16V2KX-3GP
4
3
2
1
GAP-CLOSE-PWR
2
51124_V5FILT G66
SB_980513 WAYNE 1 2
GAP-CLOSE-PWR
2009/04/08 WAYNE
GND OPEN V5FILT
TPS51124_1D1V_1D2V
Size Document Number Rev
A3
SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 45 of 59
5 4 3 2 1
5 4 3 2 1
1D2V_S5
Iomax=0.2A
5V_S5
0D9V_S3
Iomax=1.4A 1D8V_S3
SC10U6D3V3MX-GP
3D3V_S5 U21 1D2V_S5
1
C829 C814
SC10U10V5KX-2GP OCP>3A 1
2
VIN VOUT 5
2
GND
1
D 3 4 D
2
DDR_VREF_PWR 0D9V_S3 EN NC#4 C761
1
G88 SC1U10V2KX-1GP
2
U53 C735 G9091-120T11U-GP
1 2
SC2D2U10V3KX-1GP 74.09091.K3F
SB 980515
2
10 1 GAP-CLOSE-PWR
VIN VDDQSNS
12,34,44 PM_SLP_S5# 2 R412 1 51100_S5 9
S5 VLDOIN 2 G89
0R0402-PAD 8 3 1 2
GND VTT
2 R411 1 51100_S3 7 4
0R0402-PAD 6
S3 PGND
VTTREF VTTSNS 5 GAP-CLOSE-PWR Place near to SB600
G91
GND
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DDR_VREF_S3 1 2
1
C816 C817 GAP-CLOSE-PWR
11
1
RT9026PFP-GP G93
C827 74.09026.079 1 2
2
SCD1U10V2KX-4GP 2ND = 74.02997.A79
2
C C
1D5V_S0
Iomax=1A
G957 1D5V_S0_LDO 1D5V_S0
G58
1 2
2D5V_S0
1
C589 GAP-CLOSE-PWR
G57
Iomax=200mA OCP>430mA SC10U6D3V5KX-1GP 1 2
2
U36 GAP-CLOSE-PWR
3D3V_S0 U23 2D5V_S0
3 3D3V_S0
VOUT
1 VIN VOUT 5 GND 2
2 GND VIN 1
1
3 EN NC#4 4
1
C389 C391
1
2
B SC2D2U10V3KX-1GP B
74.09091.T3F
2
2ND = 74.09198.D7F
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
2D5V/1D5V0D9V
Size Document Number Rev
A3
WWW.AliSaler.Com 5 4 3 2
Date: Monday, June 29, 2009
SJV50-TR
Sheet
1
46 of 59
-1
5 4 3 2 1
DCBATOUT DCBATOUT_8202_VGA
G83
1 2
GAP-CLOSE-PWR
G82 5V_S5
1 2
D 79.10712.L02 D
1
2ND = 79.10112.3JL GAP-CLOSE-PWR R376
3RD = 79.10712.6JL G81 10R2F-L-GP
TC21 1 2 DIS-MUX SA_980327_Wayne
1
SE100U25VM-L1-GP
2
G80 RT8202_VDD_VGA
2009/0408 WAYNE
2
1 2
1
DIS-MUX
GAP-CLOSE-PWR C773
DCBATOUT_8202_VGA SC1U10V3ZY-6GP D18 C785 C786 C784 Iomax=13A, OCP>20A
5
6
7
8
1
3D3V_S0 CH521S-30-GP-U1
VGA_CORE_PWR VGA_CORE
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
1 R372 RT8202_TON_VGA 5V_S5 DIS-MUX U46
D
D
D
D
2
DIS-MUX
DIS-MUX
DIS-MUX
1MR2F-GP
RT8202_BST_VGA
SI4800BDY-T1
2
1
1
C770 84.04800.D37 G73
R378 DIS-MUX SC1KP50V2KX-1GP DIS-MUX 1 2
1
10KR2F-2-GP
2
DIS-MUX C778 -1 980625 bom check GAP-CLOSE-PWR
G
S
S
S
SC1U10V3ZY-6GP G75
2
4
3
2
1
11 RT8202_PGOOD_VGA 2 R377 1 DIS-MUX DIS-MUX C769 1 2
9
0R0402-PAD U43 1 2RT8202_LX_VGA DIS-MUX
1
VDDP
VDD
C779 R367 SCD1U25V3KX-GP IND-1UH-93-GP G74
SC100P50V2JN-3GP 16 13 RT8202_BST_VGA_L
1 2 DIS-MUX RT8202_LX_VGA 1 2 1 2
2
5
6
7
8
DIS 8 RT8202_DL_VGA G70
LGATE
D
D
D
D
1 2 RT8202_EN_VGA 15 U45 SB_980513 WAYNE C775 TC19 TC5 1 2
12,28,33,34,39,48 PM_SLP_S3# EN/DEM
1
R366 10KR2J-3-GP 10 RT8202_OC_VGA_L 1 2 RT8202_LX_VGA SI4172DY-T1-GE3-GP DY DY
OC
SCD1U10V2KX-4GP
C 3 RT8202_FB_VGA R373 5K9R2F-GP 84.04172.037 GAP-CLOSE-PWR C
FB
1
DIS-MUX79.33719.L01
TR-MUX C768 DY 5 DIS-MUX DIS-MUX G77
2
NC#5
SE330U2VDM-L-GP
SE330U2VDM-L-GP
1 2 14 1 VGA_CORE_PWR 1 2
11,39 PE_GPIO1 NC#14 VOUT
G
S
S
S
R485 10KR2J-3-GP SCD1U25V3ZY-1GP SB_980513 WAYNE
2
PGND
GAP-CLOSE-PWR
GND
GND
4
3
2
1
PX Select G71
2ND = 77.C3371.051
1 2
RT8202APQW-GP
7
17
6
74.08202.A73 GAP-CLOSE-PWR
DIS-MUX G78
RT8202_DL_VGA 1 2
GAP-CLOSE-PWR
G79
1 2
RT8202_FB_VGA
SA_Wayne_980323 GAP-CLOSE-PWR
G72
1 2
Vout=0.75*(1+Rh/Rl) GAP-CLOSE-PWR
G76
1 2
1
1
1
R371
2
R370 36K5R2F-GP
B 30KR2F-GP 20081125 DY DIS-MUX
B
1
DY
R374
NV_VID1_R 2
NV_VID0_R 2
43KR2F-GP
DIS-MUX
2
DY
D
D
Q22 DY Q23 DIS-MUX R368
2N7002-11-GP R369 2N7002-11-GP 10KR2J-3-GP
84.27002.W31 G NV_VID1 1 2 G NV_VID0 1 2
PWRCNTL_1 51 PWRCNTL_0 51
2ND = 84.27002.N31 DIS-MUX
1
1
S
S
C771 10KR2J-3-GP C772
SCD1U10V2KX-4GP
84.27002.W31 SCD1U10V2KX-4GP
2ND = 84.27002.N31
2
2
DY DIS-MUX
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
RT8202A_VGA CORE
Size Document Number Rev
SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 47 of 59
5 4 3 2 1
5 4 3 2 1
D D
for TR
Q18
3D3V_S0 SI2301BDS-T1-GP 3D3V_M92
S D
1
DIS-MUX
G
R271
C 100KR2J-1-GP C
DIS-MUX
VDDR3_G
2
D
Q19
DIS-MUX
R281
2N7002E-1-GP
DIS-MUX G VDDR3_GG 1 2 PM_SLP_S3# 12,28,33,34,39,47
84.2N702.D31
2ND = 84.2N702.I31 68K1R2F-1-GP
2
C655
SCD22U10V3KX-2GP
1
DIS-MUX
B B
<Core Design>
A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
VDDR3
Size Document Number Rev
A4
SJV50-TR -1
WWW.AliSaler.Com
5 4 3
Date: Monday, June 29, 2009
2
Sheet 48
1
of 59
A B C D E
AD+
4 AD+_JK
2009/05/05 WAYNE 4
AD+_JK 58
DCIN1
4 Layout Trace 200mil U2 Layout Trace 200mil
1 AD+_JK 1 S D 8
2 2 S D 7
K
3 D1 3 S D 6
P6SMBJ20A-GP AD+_2 4 G D 5
1
5 83.P6SMB.AAG ID = -10A/70deg
6 C3 2ND = 83.P6SBM.AAG AO4407A-GP C6
Rds(ON) = 24mohm
1
DY SCD1U50V3ZY-GP 84.04407.F37 SCD1U50V3ZY-GP
A
2
2
NP1 R6 SO-8
1
C5
200KR2F-L-GP
DC-JACK174-GP EC3 SCD47U50V5KX-1GP
SCD1U50V3ZY-GP Q1
65W_ 22.10037.I01
2
R2
2
90W_22.10037.I21 1 R1
3
DTA124EUB-GP
1
84.00124.T1K
2ND = 84.00124.N1K R5
Q2 3RD = 84.00124.K1K 100KR2J-1-GP
3
1 R1
34 AD_OFF
2
2
R2
1
DTC124EUB-GP
84.00124.S1K
R9 2ND = 84.00124.M1K
3 1KR2J-1-GP 3RD = 84.00124.H1K 3
2
3D3V_AUX_S5
BATTERY CONNECTOR
2
3D3V_AUX_S5
ED7 ED5 ED6
BAV99-5-GP BAV99-5-GP BAV99-5-GP
1
R186 DY DY DY
470KR2F-GP 83.00099.T11 83.00099.T11 83.00099.T11
3
RN46 BAT1
SRN27J-GP 1
2
GND
34 BAT_IN# 1 8 2 GND
2 7 KBC_BAT_DAT_1 3
34,42 KBC_BAT_CLK DAT
3 6 KBC_BAT_CLK_1 4
34,42 KBC_BAT_DAT CLK
4 5 BAT_IN#_1 5 BAT_IN
BT+ 6 BT+2
7 BT+1
2 2
Layout Trace 320mil 8
K
GND
DY DY DY DY DY DY 9 GND
1
D7
MM3Z5V6T1G-GP EC15 EC14 EC16 EC70 EC69 EC68 TYCO-CON7-19-GP
SCD1U50V3ZY-GP
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SCD1U50V3ZY-GP
83.5R603.E3F 20.81159.007
2
2ND = 83.5R603.D3F 2ND = 20.81235.007
A
G2
2 1
42 BATT_SENSE
1 <Core Design> 1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
AD/BATT CONN
Size Document Number Rev
A3
SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 49 of 59
A B C D E
5 4 3 2 1
AVGA1A 1 OF 8
D D
CLOCK
3 CLK_PCIE_PEG AB35 PCIE_REFCLKP
AA36
3 CLK_PCIE_PEG# PCIE_REFCLKN for TR
CALIBRATION R136 1K27R2F-L-GP 1D1V_M92
AJ21 Y30 M92_PCIE_CALRP 1 DIS-MUX2
NC#AJ21 PCIE_CALRP
AK21 NC#AK21
AH16 Y29 M92_PCIE_CALRN 1 DIS-MUX2
NC_PWRGOOD PCIE_CALRN R143 2KR2F-3-GP
DIS
11,25,31,32,34,35,58 PLT_RST1#_B 1 2 PLT_RST1#_M92 AA30 PERST#
R356 470R2J-2-GP
1
C870 M92-M2-GP
<Core Design>
A DY SC47P50V2JN-3GP A
2
Title
M92 (1/7)_PCIE
Size Document Number Rev
for TR A3 -1
SJV50-TR
WWW.AliSaler.Com
5 4 3 2
Date: Monday, June 29, 2009 Sheet
1
50 of 59
5 4 3 2 1
for TR DPLL_PVDD
L20
1D8V_M92 1 2
BLM15BD121SS1D-GP
SC10U6D3V5KX-1GP
SCD1U16V2KX-3GP
DIS-MUX
C131
C159
20090106_SB modify
1
SC1U10V2KX-1GP
C152
DIS-MUXDIS-MUX DIS-MUX AVGA1B 2 OF 8
AVGA1G 7 OF 8 TR-DIS
2
0R2J-2-GP 2 1 R464 BRIGHTNESS_AMD 9,18
AU24 TXCAP_DPAP3 RN60 1 4 SRN0J-10-GP-U TMDS_A_TXC+ 8,20 PU-DIS
TXCAP_DPA3P TXCAM_DPAN3 LVDS CONTROL M92_VARY_BL 0R2J-2-GP R465
TXCAM_DPA3N AV23 2 DIS-MUX
3 TMDS_A_TXC- 8,20 VARY_BL AK27 2 1 BLON_IN 9,34
DIGON AJ27 LCDVDD_ON 18
TX0P_DPAP2 RN59 4 SRN0J-10-GP-U
for TR DPLL_VDDC MUTI GFX TX0P_DPA2P AT25
AR24 TX0M_DPAN2
1
2 DIS-MUX
3
TMDS_A_TX0+ 8,20
L19 SA_20081103 DPA TX0M_DPA2N TMDS_A_TX0- 8,20
1
2
1 2 AU26 TX1P_DPAP1 RN58 1 4 SRN0J-10-GP-U TMDS_A_TX1+ 8,20
1D1V_M92 TX1P_DPA1P
D BLM15BD121SS1D-GP AV25 TX1M_DPAN1 2 DIS-MUX
3 TMDS_A_TX1- 8,20 AK35 LVDS_M92_TXBCLK+ 18 D
TX1M_DPA1N TXCLK_UP_DPF3P
SC10U6D3V5KX-1GP
SCD1U16V2KX-3GP
DIS-MUX TXCLK_UN_DPF3N AL36 LVDS_M92_TXBCLK- 18
C133
C160
AR8 AT27 TX2P_DPAP0 RN57 1 4 SRN0J-10-GP-U TMDS_A_TX2+ 8,20 DIS-MUXRN22
DVPCNTL_MVP_0 TX2P_DPA0P
1
1
SC1U10V2KX-1GP
C153 AU8 AR26 TX2M_DPAN0 2 DIS-MUX
3 TMDS_A_TX2- 8,20 AJ38 LVDS_M92_TXBOUT0+ 18 SRN10KJ-5-GP
DVPCNTL_MVP_1 TX2M_DPA0N TXOUT_U0P_DPF2P
DIS-MUXDIS-MUX DIS-MUX AP8 AK37 LVDS_M92_TXBOUT0- 18
4
3
DVPCNTL_0 TXOUT_U0N_DPF2N
AW8 AR30
2
2
DVPCNTL_1 TXCBP_DPB3P
AR3 DVPCNTL_2 TXCBM_DPB3N AT29 TXOUT_U1P_DPF1P AH35 LVDS_M92_TXBOUT1+ 18
AR1 DVPCLK TXOUT_U1N_DPF1N AJ36 LVDS_M92_TXBOUT1- 18
AU1 AV31
AU3
AW3
DVPDATA_0
DVPDATA_1 DPB
TX3P_DPB2P
TX3M_DPB2N AU30 SA_20081104 TXOUT_U2P_DPF0P AG38
AH37
LVDS_M92_TXBOUT2+ 18
PLL AP6
AW5
DVPDATA_2
DVPDATA_3 TX4P_DPB1P AR32
AT31
TXOUT_U2N_DPF0N
AF35
LVDS_M92_TXBOUT2- 18
2
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
2
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
TX5P_DPD0P
TX5M_DPD0N AR22
18 M92_LCD_CLK AK26 SCL
C 18 M92_LCD_DAT AJ26 SDA
C
AD39 CRT_RED 19
for TR
GENERAL PURPOSE I/O R R325
R# AD37 1 2 150R2F-1-GP
AH20 DIS-MUX DAC1_AVDD 1D8V_M92
3D3V_S0 54 GPIO_VGA_00 GPIO_0
AH18 AE36 CRT_GREEN 19 L30
54 GPIO_VGA_01 GPIO_1 G
SC10U6D3V5KX-1GP
AN16 AD35 R321 1 2 150R2F-1-GP 1 2
54 GPIO_VGA_02 GPIO_2 G#
C221
C220
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
1 GPIO_VGA_03 AH23 DIS-MUX BLM15BD121SS1D-GP
GPIO_3_SMBDATA
1
C242
R63 TP148 1 GPIO_VGA_04 AJ23 AF37
10KR2J-3-GP TP144 GPIO_4_SMBCLK B R319
CRT_BLUE 19 DIS-MUX
54 GPIO_VGA_05 AH17 GPIO_5_AC_BATT B# AE38 1 2 150R2F-1-GP
DIS-MUX 1 GPIO_VGA_06 AJ17 DAC1 DIS-MUX DIS-MUX DIS-MUX DIS-MUX
2
R94 GPIO_VGA_07_BLON AK17 GPIO_6
9,34 BLON_IN 1 2 0R2J-2-GP TP137
GPIO_7_BLON HSYNC AC36 M92_HSYNC 19,54
TR-DIS AJ13 AC38 M92_VSYNC 19,54
2
SC10U6D3V5KX-1GP
1 CLK_27M_SSIN_M92 AK14 AC33 DAC1_VDD1DI 1 2
GPIO_16_SSIN VDD1DI
C260
C261
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
TP143 THERMAL_INT AG30 AC34 BLM15BD121SS1D-GP
GPIO_17_THERMAL_INT VSS1DI
C243
1 GPIO_VGA_18 AN14 AVSSQ
TP126 VGA_CTF GPIO_18_HPD3 DIS-MUX
DY 1 AM17 GPIO_19_CTF
TP127 AL13 AC30 DIS-MUX DIS-MUX DIS-MUX
SA_20081103 47 PWRCNTL_1
2
R295 1 VGA_BB_EN GPIO_20_PWRCNTL_1 R2
2 AJ14 GPIO_21_BB_EN R2# AC31
10KR2J-3-GP AK13
54 GPIO_VGA_22 GPIO_22_ROMCSB
1 VGA_CLKREQ AN13 AD30
TP222 JTAG_TRSTB GPIO_23_CLKREQB G2
AM23 AD31
SA_20081104 1 JTAG_TDI AN23
JTAG_TRSTB
JTAG_TDI
G2#
1 JTAG_TCK
1KR2J-1-GP
GENERICC Y
TP139 1 GENERICD AK20 GENERICD COMP AF32 AVSSQ
PD = Disable TP134 1 GENERICE_HPD4
PU = Enable
for TR TP142 1 GENERICF
AJ24
AH26
GENERICE_HPD4 DAC2
GENERICF
TP136 1 GENERICG AH24 GENERICG H2SYNC AD29
TP146
B 1D8V_M92 V2SYNC AC29
for TR B
HPD1_M92 AK24 HPD1 DAC2_VDD2DI 1 R133
VDD2DI AG31 2 1D8V_M92
1
AG32 0R0402-PAD
R114 VSS2DI
499R2F-2-GP VREFG VOLTAGE DIVIDER IS
DIS-MUX
AG33 DAC2_A2VDD 1 R113 2 3D3V_M92
for TR
(VREFG = VDDR4,5(1.8V) / 3 = 0.6V) A2VDD 0R0402-PAD
2
AD33 3D3V_M92
VGA_VREFG A2VDDQ
AH13 VREFG -1 090219
A2VSSQ AF33
1
R111 C204
DIS-MUX DIS-MUX R127
249R2F-GP DIS-MUX SCD1U16V2KX-3GP AA29 M92_R2SET 1 2
2
R2SET
DIS-MUX
1
2
715R2F-GP C626
DPLL_PVDD DDC/AUX AM26 SCD1U16V2KX-3GP
M92_CRT_CLK 19
2
PLL/CLOCK DDC1CLK
DDC1DATA AN26 M92_CRT_DAT 19
Depending on OSC used select voltage divider resist AM32 R298 U38
DPLL_VDDC DPLL_PVDD 0R2J-2-GP
AN32 AM27 DIS-MUX
values R25 R70 to ensure XTALIN voltage level of
1.8V
DPLL_PVSS AUX1P
AUX1N AL27 SA_20081104 25,32,33,34,38,58
25,32,33,34,38,58
KBC_THERM_CLK
KBC_THERM_DAT
1
1
2DIS
2
SMBC_G781
SMBD_G781
8
7
SMBCLK VCC 1
2 GPU_DPLUS
G781_ALERT# 6 SMBDATA DXP GPU_DMINUS
AN31 DPLL_VDDC DDC2CLK AM19 HDMI_M92_CLK 20 DIS ALERT# DXN 3
1
SC22P50V2JN-4GP C853 AL19 HDMI_M92_DAT 20 R277 5 4 GPU_THERM# C230
DDC2DATA GND THERM#
SC2200P50V2KX-2GP
DIS-MUX 0R2J-2-GP DIS-MUX
XTALIN
1 2 AV33 AN20
for TR
2
XTALOUT XTALIN AUX2P
AU34 XTALOUT AUX2N AM20 DIS-MUX
G781P8F-GP
AL30 3D3V_M92
DDCCLK_AUX3P
4
1
82.30034.611 DIS-MUX DIS-MUX DDCDATA_AUX3N AM30
2ND = 82.30034.421 X6 R262 R270
XTAL-27MHZ-74-GP 1MR2F-GP AL29 2K2R2F-GP 2K2R2F-GP
R461 GPU_DPLUS DDCCLK_AUX4P
AF29 DPLUS DDCDATA_AUX4N AM29 DIS-MUXDIS-MUX
GPU_DMINUS AG29 THERMAL
C
1
2
DMINUS
DIS-MUX For Thermal sensor DDCCLK_AUX5P AN21
SC22P50V2JN-4GP C854 AM21 Q21 B HDMI_M92_HPD 20
DDCDATA_AUX5N
1 2 TP133 1VGA_TS_VDD AK32 TS_FDO MMBT3904-4-GP DIS-MUX
AJ32 AJ30 3D3V_M92
E
TSVDD DDC6CLK
AJ33 TSVSS DDC6DATA AJ31
HPD1_M92
A A
20090106_SB add NC_DDCCLK_AUX7P AK30
for TR
1
NC_DDCDATA_AUX7N AK29
R276
for TR DIS-MUX
10KR2J-3-GP 39 PE_GPIO1_1
-1 980623
L21 M92-M2-GP
2
<Core Design>
1 2 TSVDD
1D8V_M92
BLM15BD121SS1D-GP SA_20081030 Q39
SC1U10V3KX-3GP
SCD1U16V2KX-3GP
SC10U6D3V5KX-1GP
KBC_THERM_CLK 6 1 SMBC_G781
DIS-MUX Wistron Corporation
C137
C146
1
C130
Title
2N7002KDW-GP
84.2N702.A3F M92 (2/7)_ IO
Single Source Size Document Number Rev
TR-MUX A2 -1
SJV50-TR
Date: Monday, June 29, 2009 Sheet 51 of 59
5 4 3 2 1
5 4 3 2 1
for TR
1D8V_M92
PCIE_IO 500mA
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SC10U6D3V5KX-1GP
for TR
C361
1
1
C349
C350
AVGA1E 5 OF 8
1D8V_M92
C351
D 10ux1, 1ux20 VRAM-IO MEM I/O DIS-MUX DIS-MUXDIS-MUX D
2
PCIE DIS-MUX
AC7 VDDR1 PCIE_VDDR AA31
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
AD11 VDDR1 PCIE_VDDR AA32
AF7 VDDR1 PCIE_VDDR AA33
1
C353
C352
C346
C343
C325
C339
C338
AG10 VDDR1 PCIE_VDDR AA34
AJ7 VDDR1 PCIE_VDDR V28
DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX AK8 W29
2
VDDR1 PCIE_VDDR
AL9
G11
VDDR1 PCIE_VDDR W30
Y31
for TR
VDDR1 PCIE_VDDR 1D1V_M92
G14
G17
VDDR1
VDDR1
PCIE_Core 1920mA
G20 VDDR1 PCIE_VDDC G30
G23 VDDR1 PCIE_VDDC G31
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP
G26 VDDR1 PCIE_VDDC H29
C359
G29 VDDR1 PCIE_VDDC H30
1
C329
C317
C322
C333
C326
C336
C342
C348
C313
C323
C307
C328
H10 VDDR1 PCIE_VDDC J29
J7 VDDR1 PCIE_VDDC J30
DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX J9 L28 DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX
DIS-MUX
2
2
VDDR1 PCIE_VDDC
K11 VDDR1 PCIE_VDDC M28
K13 VDDR1 PCIE_VDDC N28
K8 VDDR1 PCIE_VDDC R28
L12 VDDR1 PCIE_VDDC T28
L16 VDDR1 PCIE_VDDC U28
L21 VDDR1
SC10U6D3V5KX-1GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
L23 VDDR1
L26 VDDR1 VDDC AA15
1
1
C253
C315
C239
C229
C237
C332
L7 CORE AA17
C337 VDDR1 VDDC VGA_CORE
M11 VDDR1 VDDC AA20
DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX N11 AA22
2
2
VDDR1 VDDC
DIS-MUX P7 VDDR1 VDDC AA24
R11 VDDR1 VDDC AA27
U11 VDDR1 VDDC AB13
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
U7 VDDR1 VDDC AB16
Y11 VDDR1 VDDC AB18
1
C250
C214
C246
C247
C238
C312
C226
C227
C290
C298
C280
C266
C284
C271
C257
for TR Y7 VDDR1 VDDC AB21
AB23
VDDC
AB26 DIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUX
2
1D8V_M92 VDDC
AB28
L34 10ux1, 1ux4 110mA VDDC
VDDC AC12
1 2 VDD_CT LEVEL AC15
VDDC
SC10U6D3V5KX-1GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C BLM15BD121SS1D-GP TRANSLATION AC17 C
VDDC
POWER
DIS-MUX AF26 VDD_CT VDDC AC20
1
1
C236
C211
C215
C200
VDD_CT VDDC
DIS-MUX VDDC AD13
AD16
for TR I/O VDDC
AD18
VDDC
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
AF23 VDDR3 VDDC AD21
3D3V_M92 AF24 AD23
10ux1, 1ux3 VDDR3 VDDC
1
C264
C248
C209
C224
C274
C219
C263
C319
C294
C745
C746
C747
C749
C750
C748
AG23 VDDR3 VDDC AD26
AG24 VDDR3 VDDC AF17
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP
AF20 DIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUXDIS-MUX
2
VDDC
VDDC AF22
1
1
C693
C692
C691
VDDR5 VDDC
AG15 VDDR5 VDDC AH22
for TR VDDC M16
M18
VDDC
AD12 VDDR4 VDDC M23
1D8V_M92 AF11 M26
VDDR4 VDDC
AF12 VDDR4 VDDC N15
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
for TR AG11 VDDR4 VDDC N17
C742
C753
C759
C744
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VDDC N20
1
VDDC N22
1
1D8V_M92
C308
C295
C276
C275
N24
L32 VRAM-CLK MEM CLK VDDC
N27 DIS-MUX DIS-MUX DIS-MUX DIS-MUX
2
VDDRHA VDDC
DIS-MUX DIS-MUX DIS-MUX DIS-MUX 1 2
for TR M20 R13
2
VDDRHA VDDC
SC1U6D3V2KX-GP
1D8V_M92
C324
L31 R21
VDDRHB VDDC
1 2 V12 VDDRHB VDDC R23
DIS-MUX BLM15BD121SS1D-GP U12 R26
2
VSSRHB VDDC
1
C372
DIS-MUX DIS-MUX T15
SC1U6D3V2KX-GP VDDC
VDDC T17
T20
2
VDDC
VDDC T22
PLL
for TR PCIE_PVDD AB37
VDDC T24
T27
PCIE_PVDD VDDC
VDDC U16
B 1D8V_M92 H7 U18 B
L53 PCIE-PLL 40mA H8
NC_MPV18#1
NC_MPV18#2
VDDC
VDDC U21
1 2 VDDC U23
BLM15BD121SS1D-GP U26
DIS-MUX VDDC
SC10U6D3V5KX-1GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
1
C698
C697
VDDC V22
DIS-MUX AN10 V24
2
SPVSS VDDC
DIS-MUX DIS-MUX VDDC V27
VDDC Y16
VDDC Y18
VDDC Y21
VGA_CORE BACK BIAS Y23
VDDC
VDDC Y26
AA13 BBP VDDC Y28
Y13 BBP VDDC AH27
AH28 VGA_CORE
VDDC 2A
VGA_CORE M15
L47 Core-PLL 120mA ISOLATED VDDCI
VDDCI N13
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
CORE I/O
SC10U6D3V5KX-1GP
1 2 VDDCI R12
C756
BLM15BD121SS1D-GP T12
VDDCI
1
C281
C282
C265
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
SC10U6D3V5KX-1GP
DIS-MUX
C155
1
1
C180
C181
2
C187
M92-M2-GP
DIS-MUX DIS-MUX DIS-MUX
2
DIS-MUX
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
M92 (3/7)_Power
Size Document Number Rev
A2 -1
SJV50-TR
WWW.AliSaler.Com
Date: Monday, June 29, 2009 Sheet 52 of 59
5 4 3 2 1
5 4 3 2 1
AVGA1F 6 OF 8
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP
2 0R0402-PAD DPC_VDD10 DPA_VDD10
SC4D7U6D3V3KX-GP
1 AP13 DPC_VDD10 DPA_VDD10 AP31 1 2 P34 PCIE_VSS GND AC2
C163
AT13 AP32 HCB1608KF-1-GP P39 AC21
DPC_VDD10 DPA_VDD10 PCIE_VSS GND
1
1
C663
C179
C175
DIS-MUX DIS-MUX DIS-MUX DIS-MUX R34 PCIE_VSS GND AC23
-1 090219 T31 PCIE_VSS GND AC26
DIS-MUX AN17 AN27 T34 AC28
2
2
DPC_VSSR DPA_VSSR PCIE_VSS GND
AP16 DPC_VSSR DPA_VSSR AP27 T39 PCIE_VSS GND AC6
AP17 DPC_VSSR DPA_VSSR AP28 U31 PCIE_VSS GND AD15
AW14 DPC_VSSR DPA_VSSR AW24 U34 PCIE_VSS GND AD17
AW16 DPC_VSSR DPA_VSSR AW26 V34 PCIE_VSS GND AD20
V39 PCIE_VSS GND AD22
W31 PCIE_VSS GND AD24
W34 PCIE_VSS GND AD27
AP22 AP25 Y34 AD9
NC_DPD_VDD18#1 NC_DPB_VDD18#1 for TR PCIE_VSS GND
for TR AP23 NC_DPD_VDD18#2 NC_DPB_VDD18#2 AP26 Y39 PCIE_VSS GND AE2
AE6
1D1V_M92 1D1V_M92 GND
GND AF10
GND AF16
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
2 R292 1 DPD_VDD10 AP14 AN33 DPB_VDD10 2 R91 1 AF18
0R0402-PAD DPD_VDD10 DPB_VDD10 0R0402-PAD GND
AP15 AP33 AF21
DPD_VDD10 DPB_VDD10
GND GND
1
1
C664
C182
GND AG17
-1 090219 F15 GND GND AG2
C
-1 090219 DIS-MUX DIS-MUX F17 AG20 C
2
2
GND GND
AN19 DPD_VSSR DPB_VSSR AN29 F19 GND GND AG22
AP18 DPD_VSSR DPB_VSSR AP29 F21 GND GND AG6
for TR AP19
AW20
DPD_VSSR DPB_VSSR AP30
AW30
for TR F23
F25
GND GND AG9
AH21
R293 DPD_VSSR DPB_VSSR GND GND
2 1 AW22 DPD_VSSR DPB_VSSR AW32 1 R300 2 F27 GND GND AH29
DIS-MUX DIS-MUX F29 GND GND AJ10
1D8V_M92 150R2F-1-GP 150R2F-1-GP 1D8V_M92 F31 AJ11
L49 L22 GND GND
F33 GND GND AJ2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
DPCD_CALR AW18 DPAB_CALR
SC4D7U6D3V3KX-GPSC4D7U6D3V3KX-GPSC4D7U6D3V3KX-GPSC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2 DPCD_CALR DPAB_CALR AW28 1 2
for TR F7 GND GND AJ28
C677
C164
BLM15BD121SS1D-GP BLM15BD121SS1D-GP F9 AJ6
GND GND
1
1
C676
C675
C185
C177
DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX G2 GND GND AK11
1D8V_M92 G6 AK31
DP E/F POWER DP PLL POWER GND GND
DPE_VDD18 DPA_PVDD
for TR AH34 AU28 H9 AK7
2
2
DPE_VDD18 DPA_PVDD GND GND
SC1U6D3V2KX-GP
AJ34 DPE_VDD18 DPA_PVSS AV27 2 R83 1 J2 GND GND AL11
0R0402-PAD J27 AL14
GND GND
1
C178
1D1V_M92 J6 AL17
L24 GND GND
-1 090219 J8 GND GND AL2
SC1U6D3V2KX-GP
2
DPE_VDD10 DPB_PVDD GND GND
C171
1
C168
C169
GND GND
SC1U6D3V2KX-GP
AN34 AU18 DPC_PVDD 2 R288 1 L22 AL6
DPE_VSSR DPC_PVDD 0R0402-PAD GND GND
AP39 DPE_VSSR DPC_PVSS AV17 L24 GND GND AL8
1
1D8V_M92
C668
AR39 L6 AM11
L27 AU37
DPE_VSSR
DPE_VSSR
DIS-MUX -1 090219 M17
GND
GND
GND
GND AM31
SC1U6D3V2KX-GP
2
DPE_VSSR GND GND
C205
1
C206
C207
SC1U6D3V2KX-GP
L25 2 R282 1 N6 AP9
GND GND
SC1U6D3V2KX-GP
1
C190
C659
BLM15BD121SS1D-GP AK34 R17 AW34
DPF_VDD10 GND GND
1
1
C192
C193
DIS-MUX DIS-MUX DIS-MUX DIS-MUX NC_DPF_PVDD AL38 -1 090219 R2 GND GND B11
AM35 DIS-MUX R20 B13
2
NC_DPF_PVSS GND GND
for TR R22 B15
2
B GND GND B
AF39 DPF_VSSR R24 GND GND B17
AH39 DPF_VSSR R27 GND GND B19
AK39 DPF_VSSR R6 GND GND B21
AL34 1D8V_M92 T11 B23
DPF_VSSR L50 GND GND
AM34 DPF_VSSR T13 GND GND B25
SCD1U16V2KX-3GP
SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP
1 2 T16 GND GND B27
C682
BLM15BD121SS1D-GP T18 B29
GND GND
1
C680
C679
DIS-MUX DIS-MUX DIS-MUX T21 B31
2 R108 1 DPEF_CALR AM39 DPEF_CALR
DIS-MUX
T23
GND
GND
DIS-MUX GND
GND B33
150R2F-1-GP T26 B7
2
GND GND
DIS-MUX U15 GND GND B9
M92-M2-GP U17 C1
GND GND
U2 GND GND C39
U20 GND GND E35
U22 GND GND E5
U24 GND GND F11
U27 GND GND F13
U6 GND
V11 GND
V16 GND
V18 GND
V21 GND
V23 GND
V26 GND
W2 GND
W6 GND
Y15 GND
Y17 GND
Y20 GND
Y22 A39 VCC_MECH_A39 1 TP242TPAD14-GP
GND VSS_MECH VCC_MECH_AW1 TP122TPAD14-GP
Y24 GND VSS_MECH AW1 1
Y27 AW39 VCC_MECH_AW39 1 TP123TPAD14-GP
GND VSS_MECH
U13 GND
V13 GND
M92-M2-GP
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
5 4 3 2 1
5 4 3 2 1
SA_20081104
AMD RESERVED CONFIGURATION STRAPS
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
D
M92-M2 uses memory group B only THEY MUST NOT CONFLICT DURING RESET
D
MEMORY INTERFACE B
E3 DQB_2 MAB_2 P9 51 GPIO_VGA_01
MDB3 E1 N7 MAB3
MDB4 DQB_3 MAB_3 MAB4
F1 DQB_4 MAB_4 N8
MDB5 F3 N9 MAB5
MDB6 DQB_5 MAB_5 MAB6
F5 DQB_6 MAB_6 U9 51 GPIO_VGA_05 1 R92
DIS-MUX 2 10KR2J-3-GP
MDB7 G4 U8 MAB7
MDB8 DQB_7 MAB_7 MAB8
H5 DQB_8 MAB_8 Y9 If BIOS_ROM_EN (GPIO22) = 0 If BIOS_ROM_EN (GPIO22) = 1
MDB9 H6 W9 MAB9 DY 1 R96 2 10KR2J-3-GP
DQB_9 MAB_9 51 GPIO_VGA_08
MDB10 J4 AC8 MAB10 Size of the primary
MDB11 DQB_10 MAB_10 MAB11
K6 DQB_11 MAB_11 AC9 51 GPIO_VGA_11 1 R89
DIS-MUX 2 10KR2J-3-GP memory apertures GPIO[13,12,11] Manufacturer Part Number GPIO[13,12,11]
MDB12 K5 AA7 MAB12
MDB13 DQB_12 MAB_12 BA2
L4 DQB_13 MAB_13/BA2 AA8 BA2 55,56
MDB14 M6 Y8 BA0 DY 1 R87 2 10KR2J-3-GP 128MB x000 M25P05A 0100
DQB_14 MAB_14/BA0 BA0 55,56 51 GPIO_VGA_22
MDB15 M1 AA9 BA1 ST
MDB16 DQB_15 MAB_15/BA1 BA1 55,56 256MB x001 M25P10A 0101
M3 DQB_16 V Microelectronics
MDB17 M5 H3 DQMB#0 1 R326
DIS-MUX 2 10KR2J-3-GP 64MB x010 M25P20 0101
DQB_17 DQMB_0 DQMB#0 55 19,51 M92_HSYNC
MDB18 N4 H1 DQMB#1 1 R327
DIS-MUX 2 10KR2J-3-GP 32MB x M25P40 0101
DQB_18 DQMB_1 DQMB#1 55 19,51 M92_VSYNC
MDB19 P6 T3 DQMB#2
MDB20 DQB_19 DQMB_2 DQMB#3
DQMB#2 55 512MB x M25P80 0101
P5 DQB_20 DQMB_3 T5 DQMB#3 55
MDB21 R4 AE4 DQMB#4 1GB x
DQB_21 DQMB_4 DQMB#4 56 Chingis
MDB22 T6 AF5 DQMB#5 2GB x Pm25LV512A 0100
DQB_22 DQMB_5 DQMB#5 56
MDB23 T1 AK6 DQMB#6 (formerly PMC)
MDB24 DQB_23 DQMB_6 DQMB#7
DQMB#6 56 4GB x Pm25LV010A 0101
MDB25
U4
V6
DQB_24 DQMB_7 AK5 DQMB#7 56 SA_20081105
MDB26 DQB_25 RDQSB0
V1 DQB_26 QSB_0/RDQSB_0 F6 RDQSB0 55
MDB27 V3 K3 RDQSB1
DQB_27 QSB_1/RDQSB_1 RDQSB1 55
MDB28 Y6 P3 RDQSB2
DQB_28 QSB_2/RDQSB_2 RDQSB2 55
MDB29 Y1 V5 RDQSB3 1 R90
DIS-MUX 2 10KR2J-3-GP RECOMMENDED SETTINGS
DQB_29 QSB_3/RDQSB_3 RDQSB3 55 51 GPIO_VGA_02
MDB30 Y3 AB5 RDQSB4 STRAPS PIN DESCRIPTION 0= DO NOT INSTALL RESISTOR
DQB_30 QSB_4/RDQSB_4 RDQSB4 56
( 0.5 * VDDR1 ) ( for SSTL-1.8/SSTL-2/DDR2 ) MDB31 Y5 AH1 RDQSB5 DY 1 R98 2 10KR2J-3-GP 1 = INSTALL 10K RESISTOR
DQB_31 QSB_5/RDQSB_5 RDQSB5 56 51 GPIO_VGA_13
C ( 0.7 * VDDR1 ) ( for GDDR3/GDDR4 ) MDB32 AA4 AJ9 RDQSB6 X = DESIGN DEPENDANT C
DQB_32 QSB_6/RDQSB_6 RDQSB6 56
MDB33 AB6 AM5 RDQSB7 DY 1 R97 2 10KR2J-3-GP NA = NOT APPLICABLE
DQB_33 QSB_7/RDQSB_7 RDQSB7 56 51 GPIO_VGA_12
MDB34 AB1 PCIE FULL TX OUTPUT SWING
MDB35 DQB_34 WDQSB0
AB3 DQB_35 QSB_0B/WDQSB_0 G7 WDQSB0 55
Tansmitter Power Savings Enable
DIVIDER RESISTORS DDR2 DDR3 MDB36 AD6 K1 WDQSB1 TX_PWRS_ENB GPIO0 0= 50% Tx output swing
DQB_36 QSB_1B/WDQSB_1 WDQSB1 55
MDB37 AD1 P1 WDQSB2 1= Full Tx output swing
DQB_37 QSB_2B/WDQSB_2 WDQSB2 55
MDB38 AD3 W4 WDQSB3 (Internal PD) 1
DQB_38 QSB_3B/WDQSB_3 WDQSB3 55
MVREF TO 1.8V 100R 40.2R MDB39 AD5 AC4 WDQSB4 DY 1 R88 2 10KR2J-3-GP
DQB_39 QSB_4B/WDQSB_4 WDQSB4 56 51 GPIO_VGA_09
MDB40 AF1 AH3 WDQSB5
DQB_40 QSB_5B/WDQSB_5 WDQSB5 56
MDB41 AF3 AJ8 WDQSB6 Transmitter De-emphasis Enable
DQB_41 QSB_6B/WDQSB_6 WDQSB6 56
MVREF TO GND 100R 100R MDB42 AF6 AM3 WDQSB7 TX_DEEMPH_EN GPIO1 0= Tx de-emphasis disabled
DQB_42 QSB_7B/WDQSB_7 WDQSB7 56
MDB43 AG4 1= Tx de-emphasis enabled 1
MDB44 DQB_43 ODTB0
AH5 DQB_44 ODTB0 T7 ODTB0 55 (Internal PD)
MDB45 ODTB1 HDMI must only be enabled on systems that are
for TR MDB46
AH6
AJ4
DQB_45 ODTB1 W7 ODTB1 56
MDB47 AK3
DQB_46
L9 CLKB0 legally entitled. It is the responsibility of the system PCIE GNE2 ENABLED
DQB_47 CLKB0 CLKB0 55
1D8V_M92 MDB48 AF8 DQB_48 CLKB0# L8 CLKB0#
CLKB0# 55
designer to ensure that the system is entitled to 0 = Advertises the PCI-E device
MDB49 AF9 support this feature. BIF_GEN2_EN_A GPIO2 as 2.5GT/s
MDB50 DQB_49 CLKB1 1
AG8 AD8
MDB51 AG7
DQB_50
DQB_51
DIS-MUXCLKB1#
CLKB1
AD7 CLKB1#
CLKB1
CLKB1#
56
56
1 = Advertises the PCI-E device
as 5GT/s
1
MDB52 AK9
R152 MDB53 DQB_52 RASB0#
AL7 DQB_53 RASB0# T10 RASB0# 55
100R2F-L1-GP-U
DIS-MUX MDB54 AM8 Y10 RASB1#
DQB_54 RASB1# RASB1# 56
MDB55 AM7 AC_BATT GPIO5 AC (Performance mode) = 3.3 V
MDB56 DQB_55 CASB0#
AK1 W10 CASB0# 55 Battery saving mode = 0.0 V
2
SCD1U16V2KX-3GP
DIS-MUX DIS-MUX MDB61 AP3 ROMSO GPIO8 Serial ROM Output from ROM 0
DQB_61
C377
C379
DQB_63 CSB1_1#
1
WEB0# WEB1#
WEB1# AB11 WEB1# 56
if BIOS_ROM_EN=1,then Config[3:0]
ROMIDCFG[3:0] defines the ROM type X X X
GPIO[13,12,11] if BIOS_ROM_EN=0,then Config[3:0]
SCD01U50V2KX-1GP
SCD1U16V2KX-3GP
B DIS-MUX DIS-MUX B
C378
C380
1
1KR2J-1-GP
4K7R2F-GP
4K7R2F-GP
voltage regulator
2
DIS-MUXDIS-MUXDIS-MUX
M92-M2-GP BB_EN GPIO21 Back Bias (body bias) which minimizes
2
CCBYPASS GENERICC 0
A A
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
M92 (5/7)_Memory_Straps
Size Document Number Rev
A2 -1
SJV50-TR
WWW.AliSaler.Com
Date: Monday, June 29, 2009 Sheet 54 of 59
5 4 3 2 1
5 4 3 2 1
VGARAM1
BA0 L2 B9 MDB20 VGARAM2
54,56 BA0 BA0 DQ15
D BA1 L3 B1 MDB21 BA0 L2 B9 MDB5 D
54,56 BA1 BA1 DQ14 54,56 BA0 BA0 DQ15
D9 MDB18 BA1 L3 B1 MDB2
DQ13 54,56 BA1 BA1 DQ14
MAB12 R2 D1 MDB22 D9 MDB7
MAB11 A12 DQ12 MDB23 MAB12 DQ13 MDB0 MAB[12..0]
P7 A11 DQ11 D3 R2 A12 DQ12 D1 54,56 MAB[12..0]
MAB10 M2 D7 MDB17 MAB11 P7 D3 MDB1
MAB9 A10/AP DQ10 MDB19 MAB10 A11 DQ11 MDB4
P3 A9 DQ9 C2 M2 A10/AP DQ10 D7
MAB8 P8 C8 MDB16 MAB9 P3 C2 MDB3
MAB7 A8 DQ8 MDB8 MAB8 A9 DQ9 MDB6 MDB[63..0]
P2 A7 DQ7 F9 P8 A8 DQ8 C8 54,56 MDB[63..0]
MAB6 N7 F1 MDB14 MAB7 P2 F9 MDB30
MAB5 A6 DQ6 MDB9 MAB6 A7 DQ7 MDB25
N3 A5 DQ5 H9 N7 A6 DQ6 F1
MAB4 N8 H1 MDB13 MAB5 N3 H9 MDB31
MAB3 A4 DQ4 MDB15 MAB4 A5 DQ5 MDB24
N2 A3 DQ3 H3 N8 A4 DQ4 H1
MAB2 M7 H7 MDB11 MAB3 N2 H3 MDB28
MAB1 A2 DQ2 MDB12 MAB2 A3 DQ3 MDB29
M3 A1 DQ1 G2 M7 A2 DQ2 H7
MAB0 M8 G8 MDB10 MAB1 M3 G2 MDB27 CLKB0#
A0 DQ0 MAB0 A1 DQ1 MDB26
M8 A0 DQ0 G8
CLKB0
CLKB0# K8 A9
54 CLKB0# CK# VDDQ
1
56R2F-1-GP
CLKB0 J8 C1 CLKB0# K8 A9
54 CLKB0 CK VDDQ 54 CLKB0# CK# VDDQ
56R2F-1-GP
C3 CLKB0 J8 C1 R352
CKEB0 VDDQ 54 CLKB0 CK VDDQ R343
54 CKEB0 K2 CKE VDDQ C7
for TR VDDQ C3 DIS-MUX
C9 CKEB0 K2 C7 DIS-MUX
VDDQ
E9
54 CKEB0 CKE VDDQ
C9
for TR
2
VDDQ 1D8V_M92 VDDQ
VDDQ G1 VDDQ E9
CSB0#_0 L8 G3 G1 1D8V_M92
54 CSB0#_0 CS# VDDQ CSB0#_0 VDDQ
VDDQ G7 54 CSB0#_0 L8 CS# VDDQ G3
WEB0# K3 G9 G7
54 WEB0# WE# VDDQ WEB0# VDDQ CLKB0_R
54 WEB0# K3 WE# VDDQ G9
RASB0# K7 A1
C 54 RASB0# RAS# VDD RASB0# C
VDD E1 54 RASB0# K7 RAS# VDD A1
CASB0# L7 J9 E1 1 C734
54 CASB0# CAS# VDD L54 CASB0# VDD
VDD M9 54 CASB0# L7 CAS# VDD J9 DIS-MUXSCD47U6D3V2KX-GP
DQMB#1 F3 R1 1 2 M9 L35 2
54 DQMB#1 DQMB#2 LDM VDD BLM15BD121SS1D-GP DQMB#3 VDD
54 DQMB#2 B3 UDM 54 DQMB#3 F3 LDM VDD R1 1 2
J1 VDDL_M1 DIS-MUX DQMB#0 B3 BLM15BD121SS1D-GP
VDDL 54 DQMB#0 UDM VDDL_M2
VSSDL J7 VDDL J1 DIS-MUX
1
ODTB0 K9 C716 DIS-MUX J7
54 ODTB0 ODT VSSDL
1
ODTB0 K9 C341 DIS-MUX
SC1U6D3V2KX-GP for TR 54 ODTB0 ODT
2
RDQSB1 F7 SC1U6D3V2KX-GP
2
54 RDQSB1 WDQSB1 LDQS RDQSB3
54 WDQSB1 E8 LDQS# VSSQ A7 54 RDQSB3 F7 LDQS
B2 1D8V_M92 WDQSB3 E8 A7
VSSQ 54 WDQSB3 LDQS# VSSQ
VSSQ B8 VSSQ B2
VSSQ D2 VSSQ B8
1
RDQSB2 B7 D8 R334 D2
54 RDQSB2 UDQS VSSQ VSSQ
4K99R2F-L-GP
WDQSB2 A8 E7 RDQSB0 B7 D8
54 WDQSB2 UDQS# VSSQ 54 RDQSB0 WDQSB0 UDQS VSSQ
VSSQ F2 DIS-MUX 54 WDQSB0 A8 UDQS# VSSQ E7
VSSQ F8 VSSQ F2
VRAM_VREF1 J2 H2 F8
2
VREF VSSQ VRAM_VREF1 VSSQ
VSSQ H8 J2 VREF VSSQ H2
A2 NC#A2 VSSQ H8
1
1
C715 E2 A3 A2
NC#E2 VSS NC#A2
1
4K99R2F-L-GP
BA2 L1 E3 R145 C331
DIS-MUX E2 A3
54,56 BA2 BA2 VSS NC#E2 VSS
SCD1U16V2KX-3GP
R3 J3 BA2 L1 E3
2
SCD1U16V2KX-3GP
DIS-MUX R7 N1 DIS-MUX R3 J3
2
NC#R7 VSS NC#R3 VSS
R8 P9 R7 N1
2
NC#R8 VSS NC#R7 VSS
R8 NC#R8 VSS P9
B K4N1G164QQ-HC20-GP B
K4N1G164QQ-HC20-GP
72.41164.D0U
for TR SAMSUNG 72.41164.D0U
HYNIX 2ND = 72.51G63.A0U
1D8V_M92 2ND = 72.51G63.A0U
DIS-MUX
DIS-MUX
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C743 C358 C363 C725 C357 C740 C738 C704 C707 C713
1
1
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C356 DIS-MUX
DIS-MUX C374 DIS-MUX
C371 DIS-MUX
C157
C382 C758 C376 C344
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX
2
2
DIS-MUX DIS-MUX DIS-MUX DIS-MUX
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
M92 (6/7)_VRAM_B0
Size Document Number Rev
A3 -1
SJV50-TR
Date: Monday, June 29, 2009 Sheet 55 of 59
5 4 3 2 1
5 4 3 2 1
VGARAM4
BA0 L2 B9 MDB49 VGARAM3
54,55 BA0 BA0 DQ15
BA1 L3 B1 MDB55 BA0 L2 B9 MDB47
54,55 BA1 BA1 DQ14 54,55 BA0 BA0 DQ15
D D9 MDB50 BA1 L3 B1 MDB41 D
DQ13 54,55 BA1 BA1 DQ14
MAB12 R2 D1 MDB54 D9 MDB44
MAB11 A12 DQ12 MDB53 MAB12 DQ13 MDB43
P7 A11 DQ11 D3 R2 A12 DQ12 D1
MAB10 M2 D7 MDB51 MAB11 P7 D3 MDB40 MAB[12..0]
A10/AP DQ10 A11 DQ11 54,55 MAB[12..0]
MAB9 P3 C2 MDB52 MAB10 M2 D7 MDB46
MAB8 A9 DQ9 MDB48 MAB9 A10/AP DQ10 MDB42
P8 A8 DQ8 C8 P3 A9 DQ9 C2
MAB7 P2 F9 MDB34 MAB8 P8 C8 MDB45
MAB6 A7 DQ7 MDB38 MAB7 A8 DQ8 MDB62 MDB[63..0]
N7 A6 DQ6 F1 P2 A7 DQ7 F9 54,55 MDB[63..0]
MAB5 N3 H9 MDB32 MAB6 N7 F1 MDB59
MAB4 A5 DQ5 MDB36 MAB5 A6 DQ6 MDB63
N8 A4 DQ4 H1 N3 A5 DQ5 H9
MAB3 N2 H3 MDB39 MAB4 N8 H1 MDB56
MAB2 A3 DQ3 MDB33 MAB3 A4 DQ4 MDB60
M7 A2 DQ2 H7 N2 A3 DQ3 H3
MAB1 M3 G2 MDB37 MAB2 M7 H7 MDB58
MAB0 A1 DQ1 MDB35 MAB1 A2 DQ2 MDB57
M8 A0 DQ0 G8 M3 A1 DQ1 G2
MAB0 M8 G8 MDB61
A0 DQ0
CLKB1# K8 A9
54 CLKB1# CLKB1 CK# VDDQ CLKB1#
54 CLKB1 J8 CK VDDQ C1 54 CLKB1# K8 CK# VDDQ A9
C3 CLKB1 J8 C1
CKEB1 VDDQ 54 CLKB1 CK VDDQ
K2 C7 C3
54 CKEB1 CKE VDDQ
C9
for TR CKEB1 K2
VDDQ
C7 CLKB1#
VDDQ
E9
54 CKEB1 CKE VDDQ
C9
for TR
VDDQ 1D8V_M92 VDDQ CLKB1
VDDQ G1 VDDQ E9
CSB1#_0 L8 G3 G1 1D8V_M92
54 CSB1#_0 CS# VDDQ VDDQ
1
56R2F-1-GP
G7 CSB1#_0 L8 G3
VDDQ 54 CSB1#_0 CS# VDDQ
56R2F-1-GP
WEB1# K3 G9 G7 R324 R320
54 WEB1# WE# VDDQ WEB1# VDDQ
54 WEB1# K3 WE# VDDQ G9
RASB1# K7 A1 DIS-MUX DIS-MUX
54 RASB1# RAS# VDD RASB1#
E1 K7 A1
2
C CASB1# VDD 54 RASB1# RAS# VDD C
54 CASB1# L7 CAS# VDD J9 VDD E1
M9 L51 CASB1# L7 J9
DQMB#4 VDD 54 CASB1# CAS# VDD L26
54 DQMB#4 F3 LDM VDD R1 1 2 VDD M9
DQMB#6 B3 BLM15BD121SS1D-GP DQMB#7 F3 R1 1 2
54 DQMB#6 UDM VDDL_M3 54 DQMB#7 DQMB#5 LDM VDD BLM15BD121SS1D-GP CLKB1_R
VDDL J1 DIS-MUX 54 DQMB#5 B3 UDM
J7 J1 VDDL_M4 DIS-MUX
VSSDL VDDL
1
ODTB1 K9 C684 DIS-MUX J7
54 ODTB1 ODT DIS-MUX VSSDL
1
ODTB1 K9 C213 DIS-MUX 1 C688
SC1U6D3V2KX-GP for TR 54 ODTB1 ODT DIS-MUX DIS-MUXSCD47U6D3V2KX-GP
2
RDQSB4 F7 SC1U6D3V2KX-GP 2
2
54 RDQSB4 WDQSB4 LDQS RDQSB7
54 WDQSB4 E8 LDQS# VSSQ A7 54 RDQSB7 F7 LDQS
B2 1D8V_M92 WDQSB7 E8 A7
VSSQ 54 WDQSB7 LDQS# VSSQ
VSSQ B8 VSSQ B2
VSSQ D2 VSSQ B8
1
RDQSB6 B7 D8 R323 D2
54 RDQSB6 UDQS VSSQ VSSQ
4K99R2F-L-GP
WDQSB6 A8 E7 RDQSB5 B7 D8
54 WDQSB6 UDQS# VSSQ 54 RDQSB5 WDQSB5 UDQS VSSQ
VSSQ F2 54 WDQSB5 A8 UDQS# VSSQ E7
VSSQ F8 DIS-MUX VSSQ F2
VRAM_VREF2 J2 H2 F8
2
VREF VSSQ VRAM_VREF2 VSSQ
VSSQ H8 J2 VREF VSSQ H2
A2 NC#A2 VSSQ H8
1
1
C231 E2 A3 R116 A2
NC#E2 VSS NC#A2
1
4K99R2F-L-GP
BA2 L1 E3 C689 E2 A3
54,55 BA2 BA2 VSS NC#E2 VSS
SCD1U16V2KX-3GP
R3 J3 BA2 L1 E3
2
SCD1U16V2KX-3GP
DIS-MUX R7 N1 DIS-MUX R3 J3
2
NC#R7 VSS NC#R3 VSS
R8 P9 DIS-MUX R7 N1
2
NC#R8 VSS NC#R7 VSS
R8 NC#R8 VSS P9
K4N1G164QQ-HC20-GP
B K4N1G164QQ-HC20-GP B
72.41164.D0U
for TR 72.41164.D0U
2ND = 72.51G63.A0U
1D8V_M92 2ND = 72.51G63.A0U
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C686 C249 C254 C695 C683 C210 C158 C240 C671 C201
1
1
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C690 DIS-MUX
DIS-MUX C681 DIS-MUX
C672 DIS-MUX
C694
C191 C173 C674 C174
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX DIS-MUX
2
2
DIS-MUX DIS-MUX DIS-MUX DIS-MUX
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
M92 (7/7)_VRAM_B1
Size Document Number Rev
A3
WWW.AliSaler.Com SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 56 of 59
5 4 3 2 1
A
B
C
D
SA
HOLE355X355R111-S1-GP HOLE355X355R111-S1-GP
1 1
GND6
GND1
EC32 EC98
DY
DY
HOLE355X355R111-S1-GP HOLE315X315R91-S1-GP
SCD1U10V2KX-4GP SCD1U25V3KX-GP
1 2 1 2
5V_S5
1 1
EC56 EC34
DCBATOUT
GND7
GND2
DY
SCD1U10V2KX-4GP SCD1U25V3KX-GP
HOLE355X355R111-S1-GP HOLE355X355R111-S1-GP
1 2 1 2
5
5
EC115 EC33 1 1
DY
DY
SCD1U10V2KX-4GP SCD1U25V3KX-GP
GND8
GND3
SB
1 2 1 2 HOLE355X355R111-S1-GP HOLE355X355R111-S1-GP
EC100 EC18
DY
SCD1U10V2KX-4GP SCD1U25V3KX-GP 1 1
1 2 1 2
GND9
GND4
HOLE355X355R111-S1-GP HOLET276B315X315R91-S
EC67 EC13
-1 090223_EMI
DY
DY
SCD1U10V2KX-4GP SCD1U25V3KX-GP
1 2 1 2 1 1
GND5
GND10
EC117 EC29
DY
DY
SCD1U10V2KX-4GP SCD1U25V3KX-GP
1 2 1 2
EC110 EC12
-1
DY
DY
SCD1U10V2KX-4GP SCD1U25V3KX-GP
1 2 1 2
EC46
DY
SCD1U25V3KX-GP
EC64 1 2
DY
SCD1U10V2KX-4GP
1 2 EC93 34.42Y01.031 34.42Y01.031
DY
SCD1U25V3KX-GP
5V_S0
EC61 1 2
H7
DY
SCD1U10V2KX-4GP 1 H11 1
1 2 EC57
Type-I
SCD1U25V3KX-GP
Type-M
EC36 1 2
DY
SCD1U10V2KX-4GP
4
4
HOLE236R142
1 2 EC60
DY
SCD1U25V3KX-GP
HOLE256R142-GP
EC99 1 2
DY
SCD1U10V2KX-4GP
1 2 EC59 34.42Y01.031 34.42Y01.031
SCD1U25V3KX-GP
EC55 1 2
H8
DY
M-STANDOFF
SCD1U10V2KX-4GP
H12
1 1
1 2 EC62
Type-I
DY
2nd 34.42Y01.021
use 34.42Y01.031
SCD1U25V3KX-GP
Type-M
EC79 1 2
DY
SCD1U10V2KX-4GP
HOLE236R142
1 2 EC1
DY
SCD1U25V3KX-GP
HOLE256R142-GP
EC116 1 2
-1 090223_EMI
DY
SCD1U10V2KX-4GP
1 2 EC8 34.42Y01.031 34.4B804.011
9
SCD1U25V3KX-GP 7 14
EC54 1 2
DY
5V_S0
SCD1U10V2KX-4GP
H13
H15
1 1 10
DY
1 2
Type-I
EC77 EC37
8
DY
DY
SCD1U10V2KX-4GP SCD1U10V2KX-4GP
HOLE276R110
1 2 1 2
73.74125.L13
HOLE256R142-GP
EC35 EC71
U7C
DY
DY
for TR
TSAHCT125PW-GP
1D1V_M92
SCD1U10V2KX-4GP SCD1U10V2KX-4GP
1 2 1 2 34.42Y01.031 34.4B804.011
2ND = 73.74125.L12
2nd 34.42Y01.021
3D3V_S0
EC45
DY
SCD1U10V2KX-4GP
H14
H20
1 1
S-STANDOFF
3
3
1 2
Type-I
2nd 34.4B804.001
use 34.4B804.011
EC76
12
DY
SCD1U10V2KX-4GP 7 14
HOLE276R110
1 2
5V_S0
HOLE256R142-GP
1 2 13
EC107
DY
SC33P50V2JN-3GP
SCD1U10V2KX-4GP
1D8V_M92
C416
1 2 34.42Y01.031
11
EC10 1 2
73.74125.L13
use 34.42Y01.031/ZZ.00PAD.801
DY
SCD1U10V2KX-4GP
H16
SC33P50V2JN-3GP 1
1 2
Type-I
U7D
C425
SB 980519_RF
EC113
DY
RF_DY RF_DY
SCD1U10V2KX-4GP
2ND = 73.74125.L12
TSAHCT125PW-GP
1 2
HOLE256R142-GP
20081202
34.42Y01.031
H17
1
Type-I
HOLE256R142-GP
2
2
SPRING-71-GP
1
DY
SPR1
34.4H551.001
SPRING-71-GP
1
DY
SPR2
Title
34.4H551.001
Size
SPRING-71-GP
1
DY
<Core Design>
SPR3
20081203
34.4H551.001
Document Number
Sheet
SJV50-TR
SB 980521 DEL
57
EMI/Spring/Boss
of
Taipei Hsien 221, Taiwan, R.O.C.
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
59
Rev
Wistron Corporation
-1
A
B
C
D
5 4 3 2 1
GAP-OPEN
20081201
34 KROW1 1
AFTE14P-GP TP93
34
34
KROW2
KROW3
1
1 AFTE14P-GP TP80 Wistron Corporation
1 AFTE14P-GP TP85 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
34
34
KROW4
KROW5 1 AFTE14P-GP TP95 SPKR Conn. Test Point Taipei Hsien 221, Taiwan, R.O.C.
1 AFTE14P-GP TP86
34 KROW6 Title
1 AFTE14P-GP TP88 1
34 KROW7 29 SPKR_L-_R
1 AFTE14P-GP TP96 1 AFTE14P-GP TP3
34 KROW8
AFTE14P-GP TP87 29
29
SPKR_L+_R
SPKR_R-_R 1 AFTE14P-GP TP1 Test point
1 1 AFTE14P-GP TP2 Size Document Number Rev
AFTE14P-GP TP50 29 SPKR_R+_R AFTE14P-GP TP4
WWW.AliSaler.Com SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 58 of 59
5 4 3 2 1
5 4 3 2 1
D D
C645~C652
Non-Level shift UMA mount 0 ohm
DIS use DUMMY
C C
B B
A <Core Design> A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
SJV50-TR -1
Date: Monday, June 29, 2009 Sheet 59 of 59
5 4 3 2 1