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Answer:
Answer: The gap between valence band and conduction band on the energy
level diagram is called forbidden energy gap. It is denoted by Eg. In case of Ge,
the value of Eg is 0.7eV and in case of Si, the value of Eg is 1.1eV.
Answer:
1. Intrinsic semiconductor
2. Extrinsic semiconductor
Depending upon the type of impurity added, extrinsic semiconductors are two
types. They are:
Answer:
Answer:
Answer:
Depending upon the type of impurity added, extrinsic semiconductors are two
types. They are
1. p-type semiconductor
2. n-type semiconductor
Answer:
Silicon Germanium
1. The valence electrons in silicon 1. The valence electrons in
are in the third orbit. germanium are in the fourth orbit.
2. Silicon is less unstable than 2. Germanium is more unstable than
germanium at high temperature. silicon at high temperature.
3. Atomic number of silicon is 14. 3. Atomic number of germanium is 32.
4. The energy gap between valence 4. The energy gap between valence
band and conduction band is 1.1eV. band and conduction band is 0.7eV.
Answer:
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Majority charge carrier: When forward bias is applied to PN junction, then
those charge carriers for which majority current flows is called majority
charge carrier.
In n-type material, free electrons are considered majority carriers since the
majority portion of current in n-type material is by the flow of free electrons.
Similarly, in p-type material, holes are considered majority carriers since the
majority portion of current in p-type material flows due to holes.
Answer:
(i) At absolute zero: At absolute zero temperature, all the electrons are
tightly held by the semiconductor atoms. The inner orbit electrons are bound
whereas the valence electrons are engaged in co-valent bonding. At this
temperature, the covalent bonds are very strong and there are no free
electrons. Therefore, the semiconductor crystal behaves as a perfect insulator.
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In terms of energy band description, the valence band is filled and there is a
large energy gap between valence band and conduction band. Due to the non-
availability of free electrons, a semiconductor behaves as an insulator.
(ii) Above absolute zero: When the temperature is raised, some of the
covalent bonds in the semiconductor break due to the thermal energy
supplied. The breaking of bonds sets those electrons free which are engaged
in the formation of these bonds. This means that a few free electrons exist in
the semiconductor. These free electrons can constitute a very little electric
current if potential difference is applied across the semiconductor crystal.
This shows that the resistance of a semiconductor decreases with the rise in
temperature. At room temperature, current through a semiconductor is too
small to be any practical value.
Answer:
Answer:
Answer:
Answer:
1. Half-wave rectifier: The rectifier which conducts current only during the
positive half-cycle of a.c supply and suppresses the negative half-cycle of
a.c supply is called half-wave rectifier.
2. Full-wave rectifier: The rectifier which conducts current through the load
in the same direction for both positive half-cycle and negative half-cycle of
a.c supply is called full-wave rectifier.
Answer: The a.c input voltage to be rectified, the diode and load RL are
connected in series. During the positive half-cycle of a.c input voltage, the
diode is forward biased and conducts current in the circuit. So, the depletion
layer of p-n junction is decreased. However, during the negative half-cycle of
input a.c voltage, the diode becomes reverse biased. Then the depletion layer
increased. As a result, no current pass through the diode. Thus we get current
flow only for the positive half-cycles and negative half-cycles are suppressed.
In this way diode has been able to do rectification i.e. change a.c (source) into
d.c.
Answer:
Ripple factor: The ratio of r.m.s value of a.c. component to the d.c. component
in the rectifier output is known as ripple factor. It is denoted by .
Ripple factor ( ) =
= Iac/Idc
Efficiency of rectifier: The ratio of d.c. power output to the applied input a.c.
power is called efficiency of rectifier. It is denoted by η.
Question: Find the efficiency and ripple factor for half-wave rectifier.
Answer:
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d.c. output power: The output current is pulsating direct current. Therefore,
in order to find the d.c. power, average current has to be found out.
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The efficiency will be maximum of rf is negligible as compared to RL.
We know,
=
= 1.21
i.e. = 1.21
Question: Find the efficiency and ripple factor for full wave rectifier.
Answer:
d.c. output power: The output current is pulsating direct current. Therefore,
in order to find the d.c. power, average current has to be found out.
Iav = Idc = ∫
= ∫ * + + ∫ * +
= * +∫ – * +∫
= {Vm/(rf+RL)}[ - {Vm/(rf+RL)}[
= {Vm/(rf+RL)}[-cosп+cos0] - {Vm/(rf+RL)}[-cos2п+cosп]
= {Vm/(rf+RL)}[-(-1)+1] - {Vm/(rf+RL)}[-1-1]
= {Vm/(rf+RL)}(1+1) - {Vm/(rf+RL)}(-2)
= {Vm/(rf+RL)} 2 + {Vm/(rf+RL)} 2
= {Vm/(rf+RL)}(2+2)
= {Vm/(rf+RL)} 4
= . 4Im
= . 2Im
Idc = 2Im/п
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d.c. power output, Pdc = Idc2 RL
= (2Im/п)2 RL
Pac = Irms2(rf+RL)
Irms = Im/√
We know,
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= 0.48
i.e. = 0.48
This shows that in the output of a full-wave rectifier, the d.c. component is
more than the a.c. component.
Answer:
Half wave rectifier: The rectifier which conducts current only during the
positive half-cycle of a.c supply and suppresses the negative half-cycle of a.c
supply is called half-wave rectifier. In half wave rectifier, during negative half
cycles no current is conducted and hence no voltage appears across the load.
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Operation: The a.c. voltage across the secondary winding AB changes
polarities after every half cycle. During the positive half cycle of input a.c.
voltage, end A becomes positive with respect to end B. this makes the diode
forward biased and hence it conducts current. During the negative half-cycle,
PREPARED BY: HASAN BIN FIROZ (533)
3rd Semester
ELECTRONICS-I
end A is negative with respect to end B. under this condition, the diode is
reverse biased and it conducts no current. Therefore, current flows through
the diode during positive half-cycles of input a.c. voltage only; it is blocked
during the negative half-cycles. In this way, current flows through load RL
always in the same direction. Hence d.c. output is obtained across RL.
Answer:
Full wave centre-tap rectifier: The circuit employs two diodes D1 and D2 as
shown in the figure. A centre-tapped secondary winding AB is used with two
diodes connected so that each uses one half-cycle of input a.c.
it may be seen that current in the load RL is in the same direction for both half-
cycles of input a.c. voltage. Therefore, d.c. is obtained across the load RL.
Answer:
Full wave bridge rectifier: Four diodes D1, D2, D3 and D4 connected to form
bridge as shown in given figure. The a.c. supply to be rectified is applied to the
diagonally opposite ends of the bridge through the transformer. Between
other two ends of the bridge, the load resistance RL is connected.
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through the load RL as shown in the given figure (1). The conventional current
flow is shown by dotted arrows. During the negative half-cycle of secondary
PREPARED BY: HASAN BIN FIROZ (533)
3rd Semester
ELECTRONICS-I
voltage, end P becomes negative and end Q positive. This makes diodes D2 and
D4 forward biased whereas diodes D1 and D3 are reverse biased. Therefore,
only diodes D2 and D4 conduct. These two diodes will be in series through the
load RL as shown in the given figure (2). The current flow is shown by solid
arrows. The current flows from A to B through the load i.e. in the same
direction as for the positive half-cycle. Therefore, d.c. output is obtained
across load RL.
Answer: The nature of output of rectifier is pulsating d.c. The fact that a
pulsating d.c. contains both d.c. and a.c.
components can be beautifully illustrated by
referring figure (a). Figure (1) shows a pure d.c.
component whereas figure (2) shows a.c.
component. If these two waves are added
together, the resulting will be shown in figure (3). Figure (a)
It is clear that the wave shown in figure (3) never becomes negative, although
it contains both a.c. and d.c. components. The striking resemblance between
the rectifier output wave shown in figure (a) and the wave shown in figure (3)
may be noted. It follows, therefore, that a pulsating output of a rectifier
contains a d.c. component and an a.c. component.
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Answer: The difference between half wave rectifier and full wave rectifier is
given below:
Question: What is filter circuit and filtering? Write down the necessity of
filter circuit.
Answer:
Filter circuit: A filter circuit is a device which removes the a.c. component of
rectifier output and allows the d.c. component to reach the load.
output of a rectifier has pulsating character i.e. it contains a.c. and d.c.
components. The a.c. component is undesirable and must be kept away from
the load. To do so, a filter circuit is used which removes the a.c. component
and allows only the d.c. component to reach the load. This is the necessity of
filter circuit.
1. Capacitor filter
2. Choke input filter
3. Capacitor input filter or -filter.
Answer:
then XL=2пfL=0. As a result maximum d.c. will flow through the load with a
small amount of a.c. This small amount of a.c. is minimized by the capacitor
because capacitor is low resistive for a.c. So, a.c. goes through the capacitor
and absorbed by it. But d.c. portion goes directly through the load because for
d.c. portion capacitive resistance is infinity. (f=0, XC= = ). Thus maximum
a.c. is blocked and almost pure d.c. will go through the load but 100% d.c.
cannot be found on the load. In this way the pulsating d.c. can be purified.
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Answer:
1. n-p-n transistor
2. p-n-p transistor
Figure: Transistor
Answer:
The emitter layer is heavily doped and collector only lightly doped. The ratio
of total layer to the central layer is 150:1. A transistor has three terminals
emitter, base and collector.
Operation: The basic operation of a transistor will be described using the pnp
transistor. The pnp transistor is considered without base-collector connection
(Figure-a). Then the majority carrier flows through the circuit as it is forward
biased. Then we considered the pnp transistor without emitter bas
connection. Then the minority carrier flows through the circuit as it is reverse
biased.
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Figure: (a) Figure: (b)
carrier will refuse across the forward biased pn junction into the n-type
material. Since the sandwiched n-type material is very thin and has a low
conductivity, a very small number of these carriers will take this path of high
resistance to the base terminal. The current flow the base terminal is very
small considered few micro amperes. As the base collector junction is
reversed biased then all carrier pass through the circuit. Only 5% of the input
passes through the base and 95% of the input passes through the collector.
Now, we can say that emitter current is the sum of collector and base current.
i.e. IE = IC + IB
Answer:
Working principle of npn transistor: The npn transistor with forward bias
to emitter-base junction and reverse bias to collector-base junction. The
forward bias causes the electrons in the n-type emitter to flow towards the
base. This constitutes the emitter current IE. As these electrons flow through
the p-type base, they tend to combine with holes.
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As the base is lightly doped and very thin, therefore, only a few electrons (less
than 5%) combine with holes to constitute base current IB. the remainder
(more than 95%) cross over into the collector region to constitute collector
current IC. In this way, almost the entire emitter current flows in the collector
circuit. It is clear that emitter current is the sum of collector and base currents
i.e. IE = IB + IC
The remainder (more than 95%) crosses into the collector region to constitute
collector current IC. In this way, almost the entire emitter current flows in the
collector circuit. It may be noted that current conduction within pnp
transistor is by holes.
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Answer:
We know,
IE = I C + I B
= [ = ]
α =
We know,
IE = I C + I B
or, IB = I E - IC
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From the definition of amplification factor of common emitter,
= [ = ]
β =
We know,
IE = I C + I B
or, IB = I E - IC
=
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= [ = ]
γ =
We know,
IE = I C + I B
= +
= 1+β [ = ]
γ = 1+β
linger remains forward biased and normal transistor action is lost. The
collector-emitter voltage is nearly equal to VCC i.e.
VCE(cutoff)=VCC
2. Saturation region: The point where the load line intersects the IB=IB(sat)
curve is called saturation. At this point, the base current is maximum and so is
the collector current. At saturation, collector-base junction no longer remains
reverse biased and normal transistor action is lost.
IC(sat)= ; VCE=VCE(sat)=Vknee
3. Active region: The region between cut off and saturation is known as
active region. In the active region, collector-base junction reverse biased while
base-emitter junction remains forward biased. Consequently, the transistor
will function normally in this region.
Answer:
Load line: The resistance RC connected to the device is called load or load
resistance for the circuit and therefore, the line we have just constructed is
called the load line.
VCE=VCC - ICRC
As VCC and RC are fixed values, therefore, it is a first degree equation and can
be represented by a straight line on the output characteristics. This is called
d.c. load line. To add load line, two end points of the straight line is needed.
These two points can be obtained as below:
= VCC ( IC=0)
Max. IC = VCC/RC
(iii)
It gives the second point A (OA = VCC/RC) on the collector current axis as
shown in figure (ii). By joining these two points d.c. load line AB is
constructed.
characteristic when the transistor is silent i.e. in the absence of the signal.
1. Common base connection: In this circuit the input is given to the emitter
and output is taken from the collector. Here for pnp common base connection
the emitter is forward biased and collector is reverse biased. The emitter base
voltage is VEE and the collector base voltage is VCB. For npn common base
connection emitter is forward biased and collector is reverse biased. Output is
taken from the load situated in the collector side.
b) Output characteristic:
(i) The collector current IC varies with VCB only at very low voltage.
(ii) When the value of VCB is raised above 1-2V, the collector current
becomes constant. It means that IC is independent on VCB and
dependent on IE.
(iii) A very large change in collector base voltage produces only a tiny
change in collector current.
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Output resistance, ro = at constant IE.
a) Input characteristic:
(i) It resembles that of a forward biased diode curve.
(ii) As compared to CB arrangement, IB increases less rapidly with
VBE. Therefore input resistance of CE circuit is higher than CB
circuit.
Input resistance, ri = at constant VCE.
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b) Output characteristic: It is the curve between collector current IC and
collector-emitter voltage VCE at constant base current IB.
Answer: There are many kinds of biasing method. The following methods are
commonly used.
1. Base resistor method
2. Emitter bias method
3. Biasing with collector-feedback resistor
4. Voltage-divider bias
IB =
or, RB =
RB =
IB =
or, IE =
( )
IC =
( )
or, RB =
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or, RB = [ IC = βIB]
RB =
I1 =
V2 = R2
V2 = VBE + VE
or, IE =
Since, IE IC
IC =
RE =
or, RC =
1. Off region: When the input voltage is zero or negative then the
transistor is said to be in the off condition. In this condition I B=0 and
collector current is equal to the collector leakage current ICEO.
Power loss = Output current Output voltage
= VCC ICEO
Since ICEO is very small and it is negligible, the power loss is very low i.e.
the transistor has a high efficiency as a switch in the off condition.
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3. By active region: It is the region that lies between off and on condition. In
this region the transistor operates as a linear amplifier where small changes
in input current causes relatively large changes in output current.
PREPARED BY: HASAN BIN FIROZ (533)
3rd Semester
ELECTRONICS-I
Answer: A transistor raises the strength of a weak signal and thus acts as an
amplifier.
The weak signal is applied between emitter base junction and output is taken
across the load RC connected in the collector circuit. In order to achieve
faithful amplification the input circuit
should always remain forward biased. To
do so a dc voltage VEE is applied in the input
circuit in addition to the signal as shown in
the figure. This dc voltage and its
magnitude is such that it always keeps the
input circuit forward biased regardless of
the polarity of the signal. As the input
circuit has low resistance therefore a small
signal change in signal voltage causes an appreciable change in emitter
current. This causes almost the same change in collector current. The collector
current flowing through a high load resistance RC produces a large voltage
across it. Thus a weak signal applied in the input circuit appears in the
amplifier form in the collector circuit. It is in this way that a transistor acts as
an amplifier.
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Answer:
Hybrid means “mixed”. Since those parameters have mixed dimensions, they
are called hybrid parameters.
Answer: The major reason for the use of h parameters is the relative ease
with which they can be measured. The h parameters of a circuit is shown in
the given figure
We know that voltage and currents of the circuit in above figure can be
expressed in terms of h parameters as under-
(i) If we short the output terminals, we can say that output voltage, v2=0.
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v1 = h11i1 + h12 0
or, v1 = h11i1
or, i2 = h21i1
Putting the value of i1=0 in both equation (i) and (ii) we get,
v1 = h11 0 + h12v2
or, v1 = h12v2
Since h12 is a ratio of input and output voltages and is called ‘voltage feedback
ratio with input terminals open’. Similarly, h22 is a ratio of output current and
output voltage and is called ‘output admittance with input terminals open’.
Answer:
Figure 1
Figure 2
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Figure (2) shows h parameter equivalent circuit of figure (1) and is derived
from equations (i) and (ii). The input circuit appears as a resistance h11 in
series with a voltage generator h12v2. This circuit is derived from equation (i).
The output circuit involves two components: a current generator h21i1 and
PREPARED BY: HASAN BIN FIROZ (533)
3rd Semester
ELECTRONICS-I
shunt resistance h22 and is derived from equation (ii). The following points are
worth not about the h parameter equivalent circuit.
This circuit is called hybrid equivalent because its input portion is a Thevenin
equivalent or voltage generator with series resistance while output portion is
Norton equivalent or current generator with shunt resistance. Thus it is a
mixture or a hybrid. The symbol ‘h’ is simply the abbreviation of the word
hybrid.
Answer: Any linear circuit with input and output has a set of h parameters.
We shall now develop formulas for input impedance, current gain, voltage
gain, output impedance of a linear circuit in terms of h parameters.
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We know,
v1 = h11i1 + h12v2
i2 = -(v2/rL)
Again,
i2 = h21i1 + h22v2
Zin = h11 –
( )
2. Current gain:
v2 = -i2rL
We know,
i2 = h21i1 + h22v2
or, =
Ai =
3. Voltage gain:
AV =
= [ v1 = i1. Zin]
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or, AV = . ---------------------(i)
=–
( )
AV = [– ]
( )
AV =–
( )
Zout = --------------------(i)
With v1=0 and applying Kirchhoff’s voltage law to the input circuit, we
have,
0 = i1h11 + h12v2
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or, i1h11 = -h12v2
or, i1 =-
Again,
i2 = h21i1 + h22v2
or, i2 =- + h22v2
or, i2 = v2 (h22 - )
or, =
Zout =
Answer:
type of carrier i.e. electrons or holes. The JFET has high input impedance and
low noise level
Answer:
1. It has a very high input impedance. This permits high degree of isolation
between the input and output circuits.
2. The operation of a JFET depends upon the bulk material current carriers
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that do not cross junctions.
3. A JFET has a negative temperature co-efficient of resistance.
4. A JFET has a very high power gain.
5. A JFET has a smaller size, longer life and high efficiency.
Disadvantage of JFET:
BJT JFET
1. Both hole and electron take part 1. Either hole or electron takes part to
to current conduction. current conduction.
2. It is called bipolar transistor. 2. It is called unipolar transistor.
3. Input circuit is always forward 3. Input circuit is reverse biased.
biased.
4. Input impedance is low. 4. Input impedance is high.
5. In BJT base controls the current 5. In JFET gate controls the current
flow. flow.
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6. There are two junctions in BJT. 6. No junction is applied in JFET.
7. The base current might be μA. 7. The gate current is zero.
8. Noise level is high from JFET. 8. Boise level is very low or small.
9. Symbol 9. Symbol
PREPARED BY: HASAN BIN FIROZ (533)
3rd Semester
ELECTRONICS-I
Question: Write down the name of parameters of JFET and define them./
Define the parameters of JFET.
Answer: Like vacuum tubes, a JFET has certain parameters which determine
its performance in a circuit. The main parameters of JFET are-
Answer: We know,
We know,
μ=
μ=
= rd gfs
μ = rd gfs
In FET, there is only one type of carrier, holes in p-type channel and electrons
in n-type channel. For this reason it is called unipolar transistor.
In FET, current flow is controlled by an electric field and that’s why it is called
field effect transistor.
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Answer: The relation between IDSS and VP is shown in figure. We note that
gate-source cut off voltage [i.e. VGS(off)] on the transfer characteristic is equal to
pinch off voltage VP on the drain characteristic.
i.e. VP = VGS(off)
ID = IDSS* ( )
+
Where,
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Answer:
Output characteristics of JFET: The curve between drain current (ID) and
drain-source voltage (VDS) of a JFET at constant gate-source voltage (VGS) is
known as output characteristics of JFET. Keeping VGS fixed at some value, say
1V, the drain-source voltage is changed in steps. Corresponding to each value
of VDS, the drain current ID is noted. The figure shown in below shows a family
of output characteristics.
1. At first, the drain current ID rises rapidly with drain-source voltage VDS
but then becomes constant. The drain-source voltage above which drain
current becomes constant is known as pinch off voltage. In figure, OA is
the pinch off voltage VP.
2. After pinch off voltage, the channel width becomes so narrow that
depletion layers almost touch each other.
3. The characteristics resemble that of a pentode value.
Operation of JFET: In a JFET, the two pn junctions at the sides form two
depletion layers. The current conduction is happened by charge carrier
through the channel between the two depletion layers and out of the drain.
The input voltage is reversed biased. A JFET operates on the basis of width
and resistance of conducting channel by changing the input voltage. The
working of JFET is given below:
1. When a voltage VDS is applied between drain and source terminals and
voltage on the gate is zero (Fig-i) then the depletion layer is created. The
size of these layers determines the width of the channel and hence the
current conduction through the bar.
2. When a reverse voltage VGS is applied between the gate and source (fig-
ii) the width of the depletion layers is increased. This reduces the width
of conducting channel, thereby increasing the resistance of n-type bar.
For this reason, the current from source to drain is decreased. On the
other hand, if the reverse voltage on the gate is decreased, the width of
depletion layers also decreases. This increases the width of the
conducting channel and hence increases source to drain current.
Question: Define (i) pinch off voltage (ii) gate-source cut off voltage (iii)
shorted-gate drain current.
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Answer:
(i) Pinch off voltage (VP): The minimum drain-source voltage at which the
drain current essentially becomes constant is called pinch off voltage.
PREPARED BY: HASAN BIN FIROZ (533)
3rd Semester
ELECTRONICS-I
The pinch off voltage is denoted by VP. It is always less than VDS. When
VDS>VP then the drain current becomes constant and when VDS=VP then
channel becomes closed.
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Answer:
Amplifier: The device or circuit by which the strength of a weak signal can be
raised is known as amplifier.
Answer:
Answer:
Common-mode rejection radio (CMRR): A differential amplifier should
have high differential voltage gain (ADM) and very low common-mode voltage
gain (ACM). The ratio of differential voltage gain (ADM) to the common mode
voltage gain (ACM) is called common mode rejection ratio (CMRR).
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CMRR =
Very often, The CMRR is expressed in decibels (dB). The decibel measure for
CMRR is given by-
PREPARED BY: HASAN BIN FIROZ (533)
3rd Semester
ELECTRONICS-I
MEC
2. Input offset current: At the time of eliminating output offset voltage, there
will be slight difference between the input currents to the non-inverting and
inverting inputs of the device. The slight difference in input current is called
input offset current.
Answer:
It may be mentioned here that total gain is less than the product of the gains
of individual stages. It is because when a second stage is made to follow the
1st stage, the effective load resistance of 1st stage is reduced due to the
shunting effect of the input resistance of second stage. This reduces the gain of
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the stage which is loaded by the next stage. For instance, in a three stage
amplifier, the gain of first and second stages which has no loading effect of
subsequent stage remains unchanged. The overall gain shall be equal to the
product of the gains of three stages.
Answer:
Classification of MOSFET: There are two basic types of MOSFET. They are-
Answer: The SiO2 layer is an insulator. The gate terminal is made of a metal
conductor. Thus, going from gate to substrate, there is a metal oxide
semiconductor and hence the name MOSFET. Since the gate is insulated from
the channel, the MOSFET is sometimes called insulated-gate FET (IGFET).
However this term is rarely used in place of the term MOSFET.
1. n-channel D-MOSFET
2. p-channel D-MOSFET
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Tranconducta
nce curve
Transconductance
curve
Answer: Figure (i) shows the circuit of n-channel D-MOSFET. The gate forms
a small capacitor. One plate of this capacitor is the gate and the other plate is
the channel with metal oxide layer as the dielectric. When gate voltage is
changed, the electric field of the capacitor changes which in turn changes the
resistance of the n-channel. Since the gate is insulated from the channel, we
can apply either negative or positive voltage to the gate. The negative-gate
operation is called depletion mode whereas positive-gate operation is known
as enhancement mode.
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(i) Depletion mode: Figure (i) shows depletion-mode operation of n-
channel D-MOSFET. Since gate is negative, it means electrons are on the
gate as shown in figure (ii). These electrons repel the free electrons in
PREPARED BY: HASAN BIN FIROZ (533)
3rd Semester
ELECTRONICS-I
Operation: The input signal (Vin) is capacitively coupled to the gate terminal.
In the absence of the signal, d.c. value of VGS=0V. When signal (Vm) is applied,
VGS swings above and below its zero value, producing a swing in drain current
Id .
(i) A small change in gate voltage produces a large change in drain current
as in a JFET. This fact makes MOSFET capable of raising the strength of a
weak signal; thus acting as an amplifier.
(ii) During the positive half-cycle of the signal, the positive voltage on the
gate increases and produces the enhancement-mode. This increases the
channel conductivity and hence the drain current.
(iii) During the negative half-cycle of the signal, the positive voltage on the
gate decreases and produces depletion-mode. This decreases the
conductivity and hence the drain current.
The result of above action is that a small change in gate voltage produces a
large change in the drain current. This large variation in drain current
produces a large a.c. output voltage across drain resistance RD. in this way, D-
MOSFET on transconductance curve.
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Answer: The figure given below shows the circuit operation of n-channel E-
MOSFET. The circuit action is as under:
(i) When VGS=0V [figure (i)], there is no channel connecting the source and
drain. The p substrate has only a few thermally produced free electrons
(minority carriers) so that drain current is essentially zero. For this
reason, E-MOSFET is normally OFF when VGS=0V.
(ii) When gate is made positive as shown in figure (ii), it attracts free
electrons into the p region. The free electrons combine with the holes next
to the SiO2 layer. If VGS is positive enough, all the holes touching the SiO2
layer are filled and free electrons begin to flow from the source to drain.
The effect is the same as creating a thin layer of n-type material adjacent
to the SiO2 layer. Thus the E-MOSFET is turned ON and drain current ID
starts flowing from the source to the drain.
The minimum value of VGS that turns the E-MOSFET ON is called threshold
voltage [VGS(th)]
(iii) When VGS is less than VGS(th), there is no induced channel and the drain
current ID is zero. When VGS is equal to VGS(th), the E-MOSFET is turned ON
and the induced channel conducts drain current from the source to the
drain. Beyond VGS(th), if the value of VGS is increased, the newly formed
channel becomes wider, causing ID to increase. If the value of VGS decreases
[not less than VGS(th)], the channel becomes narrower and ID will decrease.
This fact is revealed by the transconductance curve of n-channel E-
MOSFET shown in figure (iii).
MEC
The digital integrated circuitry in which both n- and p-channel MOSFETs are
used is called CMOS. One very effective use of the complementary
arrangement is as an inverter. As introduced for switching transistors, an
inverter is a logic element that “inverts” the applied signal. That is, if the logic
levels of operation are 0 V (0-state) and 5 V (1-state), an input level of 0 V will
result in an output level of 5 V, and vice versa. Note in Fig. 5.44 that both gates
are connected to the applied signal and both drain to the output Vᴏ. The source
of the p-channel MOSFET (Q2) is connected directly to the applied voltage VSS,
MEC
while the source of the n-channel MOSFET (Q1) is connected to ground.
MEC
Answer:
1. Positive clipper
2. Negative clipper
3. Biased clipper
4. Combination clipper
1. Positive clipper: A positive clipper is that which removes the positive half
cycles of the input voltage. The figure below shows the typical circuit of a
positive clipper using a diode. As shown the output voltage has all the
positive half cycles removed or clipped off.
During the negative half cycle of the input voltage, the diode remains
reverse biased. Therefore, almost entire negative half cycle appears across
the load. It is desired to clip a portion of negative half cycles of input
voltage, the only thing to be done is to reverse the polarities of diode or
battery. Such a circuit is then called biased negative clipper.
Answer:
Clamping circuit: A circuit that places either the positive or negative peak
signal at a desired dc level is known as a clamping circuit. A clamping circuit
(or a clamper) essentially adds a dc component to the signal.
1. Positive clamper
2. Negative clamper
1. Positive clamper: If the shape of the original signal has not changed but
only there is vertical shift in the signal, then such a clamper is called
positive clamper.
MEC
The input signal is assumed to be a square wave with time period T. the
clamped output is obtained across RL. Figure shows the circuit is positive
clamper. Here, the input signal has been pushed upward by V volts so that
negative peaks fall on the zero level.
The figure above shows the protection of a typical digital circuit against
transients by the diode clipper. When the transient shown in the figure
occurs on the input line, it causes diode D2 to be forward biased. The diode
D2 will conduct; thus shorting the transient to the ground. Consequently,
the input of the circuit is protected from the transient.
MEC