ELL201 L4 19aug21 1629299249057

Please note all course content is exclusively for registered IIT-D ELL-201 students(S2101).
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ELL 201: Digital Electronics
Lecture 4
Prof. Manan Suri (EE)

manansuri@ee.iitd.ac.in
http://web.iitd.ac.in/~manansuri/
ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

1
Academic Fair Use Only
Recap: Signed & Unsigned Numbers
- ve integers : No issue in paper algebra → just denote by a – ve sign
What will you do in Hardware?
Binary Electronics hardware → Primarily has only 2 states: 1 & 0
‘On’ and ‘Off’
So how do you differentiate between – ve & + ve numbers
Don’t have a 3rd symbol in Hardware to denote + or - signs

2
8 bits = 1 byte
If MSB is 0: positive number

If MSB is 1: negative number
Range: –(2n-1 – 1) to + (2n-1 – 1); In 8-bit : -127 to + 127

Also contains – 0 and + 0
Formula: (1 sign bit) (N-1 magnitude bits)

3
Let’s say you have to design a digital circuit for an adder
that adds 2 signed magnitude number
What all blocks/logic you need in that adder?
-Something to determine if the number is + or –ve by checking the MSB

-If the signs are different then compare the magnitude and subtract the smaller one
-Use the sign of the bigger one with the final result
-So you need “Ifs”, “adds”, “subtracts”, “compares” → that is a lot of logic circuits, just
to add two numbers!
Solution: Complement Systems were developed for representation of –ve numbers

→ a methodology or a standard protocol → to simplify digital circuits and the amount
of hardware needed

4
Recap: 1s Complement
• A system used to represent – ve numbers
• Also known as the diminished-radix complement for Binary System
• +ve number stays “as it is” in binary
• MSB acts as the sign bit
• To obtain the 1s complement of a Binary number: flip all the bits
Range: –(2n-1 – 1) to + (2n-1 – 1); In 8-bit : -127 to + 127

Also contains – 0 and + 0
Formula: Just flip all the bits of the binary number
Examples:
1710 = 0001 00012 12710 = 0111 11112

→1110 11102 = - 1710 → 1000 00002 = - 12710

5
• To find decimal equivalent of 1s comp: use position-based power summation
• Weight of MSB is not 2n, instead it is: – (2n-1 – 1)

6
• Most computers and digital systems use this to represent - ve numbers
• Also known as the radix complement for Binary System
• Stays same for + ve numbers as their signed binary equivalent
• MSB acts as the sign bit
Formula: Find 1s complement of the + ve number then add 1 to it
Range: : – (2n-1) to + (2n-1 – 1); In 8-bit : -128 to + 127
Contains only + 0
Examples:
1710 = 0001 00012 12710 = 0111 11112

→1110 11102 + 12 → 1000 00002 + 12
→1110 11112 = - 1710 → 1000 00012 = - 12710

7
• To find decimal eq. of 2s complement: use position based power summation
• But Weight of the MSB is not 2n, instead it is : – (2n-1)

8
Recap: Binary Addition
1 + 1 + 1 = 1 1 (Carry bit)
• If a N bit system, produces a result that has N+1 bits, it leads to : carry out bit
• For now, disregard the carry out bit; will deal later in hardware design
• Addition is simple and straightforward for UNSIGNED or if both are POSITIVE
• Any carry bit moves left to the next significant bit in the operation

9
Recap: Binary Subtraction (using 2’s complement)
X – Y = X + ( -Y )
• Find 2’s complement of ‘Y’ (Note: for +ve number 2s complement is same)
• Add the two numbers
• If Final Carry is ‘1’ then the result is +ve and in its true form
• If Final Carry is ‘0’ then the result is –ve and in its 2’s complement form
• Final carry bit itself is discarded from the result
5 = 0000 0101, 3 = 0000 0011
Example 1: 5 – 3
Example 2: 3 - 5

10
Recap: Overflow (in Binary Addition/Subtraction)
• Computers don't know the difference between signed and unsigned binary numbers.
• Good → it makes logic circuits fast.
• Bad → distinguishing between signed and unsigned is our responsibility.
•distinction is very important when detecting an overflow after addition or subtraction
•Correct approach to detect the overflow is to consider two separate cases:

• Overflow when adding unsigned numbers.
• Overflow when adding signed numbers.
•When two signed 2's complement numbers are added, overflow is detected if:
• both operands are positive and the result is negative, or

• both operands are negative and the result is positive
•When two unsigned numbers are added, overflow occurs if

• there is a carry out of the leftmost bit.

11
Tentative Timeline
(Note: timeline may change during the semester without any prior notice → details are only of indicative nature)
Lec. No Date Content

1 Intro + Logistics + Course Policy + Motivation etc
2 Why digital, Number Systems + Conversions etc.
3 Fractional, Complements, Addn, Subtraction
4 Logic Gates, Boolean Algebra, Minterm, Maxterm, SOP, POS
5
KMaps, Minimization, Logic Gates
6
7
Adders (half/full) + Parity bit circuits + 4-bit adder + subtraction + overflow detection
8
+ BCD adder, Ripple Carry, CLA, 4-bit, 16-bit, 64-bit, Timing Analysis, etc.
9
10
Mux + Decoder + Encoder-1
11
12 PB Set/Assignment or as per need
Minor Exam
13
14
Sequential Logic - Latches. Flip flops, varieties, counters, registers, digital CMOS,
15
Verilog intro
16
17
18 PB Set/Assignment or as per need
Mid term break
19
20 FSM intro, Moore, Mealy, Examples, Conversions etc.
21
22
Memory, Advanced topics, etc.
23
24 Extra/Buffer/Cover-up class/As per need
Major Exam
12
Logic States & Truth Tables
• Any logical function or logical expression that takes in certain inputs and gives a
certain output (maps a rule or function from input → output)
F (inputs) → Output
• Truth table is a mathematical table or an empirical way of listing the function

outputs corresponding to all combinations of input cases
• Always has 1 column to represent each input variable
• Always has 1 column to denote the final output state
• Thus for ‘n-input’ logical expression a truth table will have at least n+1 coloumns
• Number of rows in truth table = 2N for an N-input variable system (in boolean
algebra)

13
Logic Gates – NOT Gate (’)
• Simplest Logic Gate – also known as the complement or the invertor
Truth Table
Symbol

14
Truth Table
Symbol Truth Table
X Y=X’
Y = NOT X
X Y=X’

15
Truth Table
Symbol Truth Table
X Y=X’
Y = NOT X
X Y=X’ 0 1

16
Truth Table
Symbol Truth Table
X Y=X’
Y = NOT X
X Y=X’ 0 1
1 0
Single Input Gate

17
Logic Gates – OR Gate (+)
Symbol Truth Table
X R = X+Y
Y X Y R = X+Y
R = X OR Y

18
Symbol Truth Table
X R = X+Y
Y X Y R = X+Y
R = X OR Y
0 0 0

19
Symbol Truth Table
X R = X+Y
Y X Y R = X+Y
R = X OR Y
0 0 0
0 1 1

20
Symbol Truth Table
X R = X+Y
Y X Y R = X+Y
R = X OR Y
0 0 0
0 1 1
1 0 1

21
Symbol Truth Table
X R = X+Y
Y X Y R = X+Y
R = X OR Y
0 0 0
0 1 1
1 0 1
1 1 1
2-Input OR Gate

22
Logic Gates – AND Gate (*)
Symbol Truth Table
X R = X*Y
Y X Y R=X*Y
R = X AND Y

23
Symbol Truth Table
X R = X*Y
Y X Y R=X*Y
R = X AND Y
0 0 0

24
Symbol Truth Table
X R = X*Y
Y X Y R=X*Y
R = X AND Y
0 0 0
0 1 0

25
Symbol Truth Table
X R = X*Y
Y X Y R=X*Y
R = X AND Y
0 0 0
0 1 0
1 0 0

26
Symbol Truth Table
X R = X*Y
Y X Y R=X*Y
R = X AND Y
0 0 0
0 1 0
1 0 0
1 1 1
2-Input AND Gate

27
Boolean Algebra
• Mathematical framework developed by George Boole to handle systems
with just two values
• Digital computer circuits work in Binary system – speak language of 1s &

0s
• Need to simplify and reduce the binary circuits
• For this manipulation/reduction rules of Boolean Algebra are the basis
• Everything can be expressed in terms of just 5 entities –
1, 0, +, *, ’
• + and * : Binary operators
• ’ : unary operator

28
Boolean Algebra
1.
2.
3.
4.

29
Boolean Algebra
1 is identity element for AND (*): x*1=x
0 is identity element for OR (+): x+0=x
DeMorgan’s Rule: (A*B)’ = A’ + B’

(A+B)’ = A’*B’

30
Universal Logic Gates – NAND & NOR
Symbol
Not-AND
Truth Table
R = (X*Y)’
X X Y R = X NAND Y
Y 0 0
0 1
1 0
1 1

31
Symbol
Not-AND
Truth Table
R = (X*Y)’
X X Y R = X NAND Y
Y 0 0 1
0 1
1 0
1 1

32
Symbol
Not-AND
Truth Table
R = (X*Y)’
X X Y R = X NAND Y
Y 0 0 1
0 1 1
1 0
1 1

33
Symbol
Not-AND
Truth Table
R = (X*Y)’
X X Y R = X NAND Y
Y 0 0 1
0 1 1
1 0 1
1 1

34
Symbol
Not-AND
Truth Table
R = (X*Y)’
X X Y R = X NAND Y
Y 0 0 1
0 1 1
Symbol 1 0 1
Not-OR 1 1 0
X R = (X+Y)’ X Y R = X NOR Y
Y 0 0
0 1
1 0
1 1
35
Symbol
Not-AND
Truth Table
R = (X*Y)’
X X Y R = X NAND Y
Y 0 0 1
0 1 1
Symbol 1 0 1
Not-OR 1 1 0
Y 0 0 1
0 1
1 0
1 1
36
Symbol
Not-AND
Truth Table
R = (X*Y)’
X X Y R = X NAND Y
Y 0 0 1
0 1 1
Symbol 1 0 1
Not-OR 1 1 0
Y 0 0 1
0 1 0
1 0
1 1
37
Symbol
Not-AND
Truth Table
R = (X*Y)’
X X Y R = X NAND Y
Y 0 0 1
0 1 1
Symbol 1 0 1
Not-OR 1 1 0
Y 0 0 1
0 1 0
1 0 0
1 1
38
Symbol
Not-AND
Truth Table
R = (X*Y)’
X X Y R = X NAND Y
Y 0 0 1
0 1 1
Symbol 1 0 1
Not-OR 1 1 0
Y 0 0 1
0 1 0
1 0 0
1 1 0
39
Prove that NAND is a Universal Gate!
Build a NOT Gate using NAND ?
Output = X’
R = (X*Y)’
X
Y

40
Prove that NAND is a Universal Gate!
Output = X’
R = (X*X)’
X
X Y=X’
X
Build AND Gate using NAND ? 1 NAND Gate to build NOT

Output → X*Y
R = (X*Y)’ R1 = (R*R)’
X
Y R1 = ((XY)’)’= XY
2 NAND Gates to build AND
Build OR Gate using NAND ?
Output → X+Y
X X’ R = (X’*Y’)’
= (X+Y)
Y Y’
3 NAND Gates to build OR
41
Prove that NOR is a Universal Gate!
Output = X’
R = (X+X)’
X
X Y=X’
X
Build OR Gate using NOR ? 1 NOR Gate to build NOT

Output → X+Y
R = (X+Y)’ R1 = (R+R)’
X
Y R1 = ((R)’)’= X+Y
2 NOR Gates to build OR
Build AND Gate using NOR ?
Output → X*Y
Try on you own

42
Boolean Functions - Terminology
F(x,y,z) = x’zy + xyz’ + zy + z
Variables: (can be 0 or 1), x, y, z – 3
Literals: x, y, z, x’, y’, z’ (variable or its complemented form)
Product Term: product of literals → 4 → x’zy, xyz’, zy, z
Sum of Products (SOP): Format of above equation

43
a b F
Boolean Functions – Different Representations
0 0 1
tations of Boolean Functions
F
0 1 1 : (i) English (ii) Truth Table (iii) Eqn. (iv)
F outputs 1 when a is 0 and b is 01 or0when
0, Circuits
0 a is 0 and b is 1
1.
(c)
English 2:
1: 1F outputs 1 when 1a is10, regardless
Circuit 0 of b’s value
Equation 1: Fa(a,b) = a’ Truth table Circuit 1:
a F (d) a b F
’ + a’b
Representations of Boolean Functions
Circuit 2b
F
a
0 0 1
F=a’
English 1: F outputs 1 when a is 0 and 0 b1 is 0 1 or when a is 0 and b is 1

0, 1.
F English 2: F outputs 11 when 0 0a is 0, regardless of b’s value
(a) (c)
epresentations of Boolean Functions
n different ways Circuit 1 a 1 1 0
a b F
ns of the same functions F(a,b), using
English 1: F outputs 1 when a is 0 andb b is 0
2: Truth table
0, or when a is 0 and b is 1 1.
quation, Circuit, and Truth
a Table F 0 0 1
Equation 2: English 2:
Equation 1: F(a,b) = a’b’ + a’b a’b
F outputs 1 when
Circuit 2: a is 0, (d)
regardless ofFb’s value
(a) 0 1 1
Equation 2: F(a,b) = a a’Circuit
a 2
1 0 0
(b) 7 representations
(c) a b F of
Circuit the 1 same function 1 1 0
function F b 0 0 1 !!
n 1: F(a,b) = a’b’ + a’b F Truth table
0 1 1
en represented
2: F(a,b) = a a’ in different ways a F (d)
1 0 0
ven representations of the sameELL201,functions F(a,b),
M. Suri, IIT-D, using
Circuit
(copyright
2
2021), Intended for
(c) 44
methods: English, Equation, Circuit, and Truth
Circuit Table 1 1 1 0
Standard Form or Canonical Form
• Truth tables can become impractical for high number of inputs
• Standard Equations can handle large number of inputs
- Sum of Products (SOP)

- Product of Sums (POS)

45
Minterms
Index of minterm is important !

46
Minterms
Minterms of 3 variables
X Y Z Product Symbol m0 m1 m2 m3 m4 m5 m6 m7
Term
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

47
Minterms
mi = ith minterm
Term
0 0 0 X’Y’Z’
0 0 1 X’Y’Z
0 1 0 X’YZ’
0 1 1 X’YZ
1 0 0 XY’Z’
1 0 1 XY’Z
1 1 0 XYZ’
1 1 1 XYZ
0-complemented
1-uncomplemented

48
Minterms
mi = ith minterm
Term
0 0 0 X’Y’Z’ m0
0 0 1 X’Y’Z m1
0 1 0 X’YZ’ m2
0 1 1 X’YZ m3
1 0 0 XY’Z’ m4
1 0 1 XY’Z m5
1 1 0 XYZ’ m6
1 1 1 XYZ m7
0-complemented
1-uncomplemented

49
Minterms
mi = ith minterm
Term
0 0 0 X’Y’Z’ m0 1
0 0 1 X’Y’Z m1 0
0 1 0 X’YZ’ m2 0
0 1 1 X’YZ m3 0
1 0 0 XY’Z’ m4 0
1 0 1 XY’Z m5 0
1 1 0 XYZ’ m6 0
1 1 1 XYZ m7 0
0-complemented mi = 1 only for 1 unique combination of variables

1-uncomplemented i indicates the binary combination for which it is 1

50
Minterms
mi = ith minterm
Term
0 0 0 X’Y’Z’ m0 1 0 0 0 0 0 0 0
0 0 1 X’Y’Z m1 0 1 0 0 0 0 0 0
0 1 0 X’YZ’ m2 0 0 1 0 0 0 0 0
0 1 1 X’YZ m3 0 0 0 1 0 0 0 0
1 0 0 XY’Z’ m4 0 0 0 0 1 0 0 0
1 0 1 XY’Z m5 0 0 0 0 0 1 0 0
1 1 0 XYZ’ m6 0 0 0 0 0 0 1 0
1 1 1 XYZ m7 0 0 0 0 0 0 0 1
0-complemented mi = 1 only for 1 unique combination of variables

1-uncomplemented i indicates the binary combination for which it is 1

51
Maxterms

52
Maxterms
MAXTERMS of 3 variables
X Y Z Sum Symbol M0 M1 M2 M3 M4 M5 M6 M7
Term
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

53
Maxterms
Mi = ith maxterm
Term
0 0 0 X+Y+Z
0 0 1 X+Y+Z’
0 1 0 X+Y’+Z
0 1 1 X+Y’+Z’
1 0 0 X’+Y+Z
1 0 1 X’+Y+Z’
1 1 0 X’+Y’+Z
1 1 1 X’+Y’+Z’
0-UNcomplemented
1-complemented

54
Maxterms
Mi = ith maxterm
Term
0 0 0 X+Y+Z M0
0 0 1 X+Y+Z’ M1
0 1 0 X+Y’+Z M2
0 1 1 X+Y’+Z’ M3
1 0 0 X’+Y+Z M4
1 0 1 X’+Y+Z’ M5
1 1 0 X’+Y’+Z M6
1 1 1 X’+Y’+Z’ M7
0-UNcomplemented
1-complemented

55
Maxterms
Mi = ith maxterm
Term
0 0 0 X+Y+Z M0 0
0 0 1 X+Y+Z’ M1 1
0 1 0 X+Y’+Z M2 1
0 1 1 X+Y’+Z’ M3 1
1 0 0 X’+Y+Z M4 1
1 0 1 X’+Y+Z’ M5 1
1 1 0 X’+Y’+Z M6 1
1 1 1 X’+Y’+Z’ M7 1
0-UNcomplemented Mi = 0 only for 1 unique combination of variables

1-complemented i indicates the binary combination for which it is 0

56
Maxterms
Mi = ith maxterm
Term
0 0 0 X+Y+Z M0 0 1 1 1 1 1 1 1
0 0 1 X+Y+Z’ M1 1 0 1 1 1 1 1 1
0 1 0 X+Y’+Z M2 1 1 0 1 1 1 1 1
0 1 1 X+Y’+Z’ M3 1 1 1 0 1 1 1 1
1 0 0 X’+Y+Z M4 1 1 1 1 0 1 1 1
1 0 1 X’+Y+Z’ M5 1 1 1 1 1 0 1 1
1 1 0 X’+Y’+Z M6 1 1 1 1 1 1 0 1
1 1 1 X’+Y’+Z’ M7 1 1 1 1 1 1 1 0
0-UNcomplemented Mi = 0 only for 1 unique combination of variables

1-complemented i indicates the binary combination for which it is 0

57
Thank you

58

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Please note all course content is exclusively for registered IIT-D ELL-201 students(S2101).

ELL 201: Digital Electronics

Prof. Manan Suri (EE)

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

What will you do in Hardware?

Binary Electronics hardware → Primarily has only 2 states: 1 & 0

‘On’ and ‘Off’

So how do you differentiate between – ve & + ve numbers

Don’t have a 3rd symbol in Hardware to denote + or - signs

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

If MSB is 0: positive number

Range: –(2n-1 – 1) to + (2n-1 – 1); In 8-bit : -127 to + 127

Formula: (1 sign bit) (N-1 magnitude bits)

What all blocks/logic you need in that adder?

-Something to determine if the number is + or –ve by checking the MSB

Solution: Complement Systems were developed for representation of –ve numbers

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

Range: –(2n-1 – 1) to + (2n-1 – 1); In 8-bit : -127 to + 127

Formula: Just flip all the bits of the binary number

1710 = 0001 00012 12710 = 0111 11112

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

Formula: Find 1s complement of the + ve number then add 1 to it

Range: : – (2n-1) to + (2n-1 – 1); In 8-bit : -128 to + 127

1710 = 0001 00012 12710 = 0111 11112

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

• Addition is simple and straightforward for UNSIGNED or if both are POSITIVE

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

•distinction is very important when detecting an overflow after addition or subtraction

•Correct approach to detect the overflow is to consider two separate cases:

• both operands are positive and the result is negative, or

•When two unsigned numbers are added, overflow occurs if

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

Lec. No Date Content

• Truth table is a mathematical table or an empirical way of listing the function

• Always has 1 column to represent each input variable

• Always has 1 column to denote the final output state

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

Symbol Truth Table

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

Symbol Truth Table

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

Symbol Truth Table

Single Input Gate

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

Symbol Truth Table

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

Symbol Truth Table

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

Symbol Truth Table

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

Symbol Truth Table

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

Symbol Truth Table

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

Symbol Truth Table

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

Symbol Truth Table

ELL201, M. Suri, IIT-D, (copyright 2021), Intended for

Symbol Truth Table