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Publication date: July 2009

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Part No.
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Package Code No.

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SDB00169AEB
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AN5891K

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DATA SHEET

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1
 AN5891K

Contents
„ Features …………………………………………………………………………………………………………… 3
„ Applications ……………………………………….……………………………………………………………….. 3
„ Package ………………………………………….………………………………………………………………… 3
„ Type ……………………………………………….……………………………………………………………….. 3

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„ Application Circuit Example …………………………………….……………………………………………….. 4
„ Block Diagram …………………………….………………………………………………………………………. 5

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„ Pin Descriptions ………………………….……………………………………………………………………….. 6

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„ Absolute Maximum Ratings ………….…………………………………………………………………………… 7

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„ Operating Supply Voltage Range ……….………………………………………………………………………. 7

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„ Electrical Characteristics …………….…………………………………………………………………………… 8

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„ Electrical Characteristics (Reference values for design) ……………………………………………………… 11

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„ Electrical Characteristics Test Procedures …………………………………………………………………….. 14
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„ Electrical Characteristics (Reference values for design) Test Procedures …………………………………. 16

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„ Technical Data …………………………………………………………………………………………………….. 17

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y I/O block circuit diagrams and pin function descriptions ……………………………………………………... 17

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y I2C bus ……………………………………………………………………………………………………………. 22
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y Adjust method of AGC control ………………………………………………………………………………….. 25

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„ Usage Notes ………………………………………………………………………………………………………. 26

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SDB00169AEB 2
 „ Type
„ Package
„ Features
AN5891K

y TV, Audio
„ Applications
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y Silicon monolithic bipolar IC

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y Sound Processor using I2C bus

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y 24 pin Plastic Shrink Dual Inline Package (SDIP Type)

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SDB00169AEB
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y This IC has Mute, AGC, super bass, tone, volume balance control, and 3-D surround.

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3
 AN5891K

„ Application Circuit Example

VCC Rin Rout SDA SCL

10 μF 10 μF 0.68 μF 0.1 μF 10 μF 10 μF
10 μF 10 nF 10 μF

MODE VCC RIN VREF BB RB RT BLD TD ROUT SDA SCL

24 23 22 21 20 19 18 17 16 15 14 13

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tin nc Tone Volume Balance

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SURR 2.2 kΩ /MUTE

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AGC Control
Control

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1 2 3 4 5 6 7 8 9 10 11 12

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PF1 AGC LIN PF2 PF3 PF4
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GND LT LB BD VD LOUT
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10 μF 33 nF 10 μF 10 μF
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33 nF 10 μF 10 nF 0.1 μF 10 μF
39 nF
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15 nF

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220 kΩ
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Lin Lout

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Application circuit to get L+R output instead of Super Bass Boost

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VCC Rin L+R Out Rout SDA SCL

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10 μF 10 μF
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10 μF 10 μF 10 μF 0.1 μF 10 nF 10 μF 10 μF
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MODE VCC RIN VREF BB RB RT BLD TD ROUT SDA SCL

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24 23 22 21 20 19 18 17 16 15 14 13
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Volume
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Tone 2.2 kΩ /MUTE

AGC SURR Control
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1 2 3 4 5 6 7 8 9 10 11 12
PF1 AGC LIN PF2 PF3 PF4 GND LT LB BD VD LOUT
33 nF 10 μF 33 nF 0.1 μF 10 μF 10 μF 10 μF
10 μF 39 nF 10 nF
15 nF
220 kΩ
Lin Lout

Note) This application circuit is shown as an example but does not guarantee the design for mass production set.

SDB00169AEB 4
 AN5891K

„ Block Diagram

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MODE VCC RIN VREF BB RB RT BLD TD ROUT SDA SCL

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24 23 22 21 20 19 18 17 16 15 14

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I2C BLOCK
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TONE VOL BAL

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AGC

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SUPER
VCA BASS
SURR
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AGC TONE VOL BAL

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LEVEL SENSE

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CONTROL
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1 2 3 4 5 6 7 8 9 10 11 12
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PF1 AGC LIN PF2 PF3 PF4 GND LT LB BD VD LOUT

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Note) This block diagram is for explaining functions. The part of the block diagram may be omitted, or it may be simplified.
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SDB00169AEB 5
 AN5891K

„ Pin Descriptions
Pin No. Pin name Description
1 PF1 Phase filter 1
2 AGC AGC level sensor
3 LIN L-ch. input

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4 PF2 Phase filter 2
5 PF3 Phase filter 3
6 PF4 Phase filter 4

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7 GND Ground

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8 LT L-ch. treble Fc adjustment

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9 LB L-ch. bass Fc adjustment
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10 BD BASS DAC output

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11 VD Volume DAC output

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12 LOUT L-ch. output
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13 SCL SCL
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14 SDA SDA

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15 ROUT R-ch. output

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16 TD Treble DAC output
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17 BLD Balance DAC output

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18 RT R-ch. treble Fc adjustment
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19 RB R-ch. bass Fc adjustment

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20 BB Bass mixer gain adjustment

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21 VREF 1/2VCC
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22 RIN R-ch. input

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23 VCC Power supply pin (VCC)

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24 MODE Mode control

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SDB00169AEB 6
 AN5891K

„ Absolute Maximum Ratings

Note) Absolute maximum ratings are limit values which are not destructed, and are not the values to which operation is guaranteed.

A No. Parameter Symbol Rating Unit Notes

1 Supply voltage VCC 11.0 V *1

2 Supply current ICC 50 mA ⎯

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3 Power dissipation PD 550 mW —
4 Operating ambient temperature Topr –25 to +75 °C *2
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5

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Storage temperature Tstg –55 to +150 *2

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Notes) *1 : The values under the condition not exceeding the above absolute maximum ratings and the power dissipation.

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*2 : Except for the power dissipation, operating ambient temperature, and storage temperature, all ratings are for Ta = 25°C.

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„ Operating Supply Voltage Range

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Parameter Symbol
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Supply voltage range VCC 6.0 to 10.0 V *
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Note) * : The values under the condition not exceeding the above absolute maximum ratings and the power dissipation.

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SDB00169AEB 7
 AN5891K

„ Electrical Characteristics at VCC = 9.0 V

Note) Ta = 25°C±2°C unless otherwise specified.

B Limits
Parameter Symbol Conditions Unit Notes
No. Min Typ Max

1 Quiescent Current ICCT No input — 45 60 mA —

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VIN = 1 V[rms]
2 Volume (Max Level) VVmax –1 0 1 dB *1
f = 1 kHz
VIN = 1 V[rms]
3

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Volume (Mid Level) VVmid
f = 1 kHz
–14.5 –12.5 –10.5 dB *1

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VIN = 1 V[rms]

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4 Volume (Min Level) VVmin — –100 –90 dB *1
f = 1 kHz

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VIN = 1 V[rms]

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5 THD (1 kHz) THDmax — 0.1 0.3 % *1
f = 1 kHz

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THD = 1%

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6 Max input level VImax 2.0 2.2 — V[rms] *1
f = 1 kHz

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VIN = 0 V[rms]
7 Output noise at volume min VNmin — 3 10 μV *2
Rg = 4.7 kΩ
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VIN = 0 V[rms]
8 Output noise at volume max VNmax — 65 100 μV *2

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Rg = 4.7 kΩ

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VIN = 1 V[rms]
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9 Mute Level VMUTE — –100 –90 dB *1
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VIN = 1 V[rms]
10 Balance (Max Level) VBmax –1 0 1 dB *1
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f = 1 kHz
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VIN = 1 V[rms]
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11 Balance (Min Level) VBmin — –82 –80 dB *1

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VIN = 400 mV[rms]

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12 Bass (Max Level) VBBmax 10 12.5 15 dB —

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f = 50 Hz
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VIN = 400 mV[rms]

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13 Bass (Min Level) VBBmin –13.5 –11.0 –8.5 dB —

f = 50 Hz
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VIN = 400 mV[rms]

14 Treble (Max Level) VTBmax 10 12.5 15 dB —
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VIN = 400 mV[rms]

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15 Treble (Min Level) VTBmin –13.5 –11.0 –8.5 dB —

f = 20 kHz
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VIN = 400 mV[rms]

16 Super bass (Max Level) VXBmax 3 5 7 dB *1
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f = 50 Hz
VIN = 400 mV[rms]
17 Super bass (Min Level) VXBmin 0 2 4 dB *1
f = 50 Hz

Notes) *1 : DIN AUDIO filter used.

*2 : A-weighted noise filter used.

SDB00169AEB 8
 AN5891K

„ Electrical Characteristics (continued) at VCC = 9.0 V

Note) Ta = 25°C±2°C unless otherwise specified.

B Limits
Parameter Symbol Conditions Unit Notes
No. Min Typ Max

VIN = 50 mV[rms]
18 AGC gain 1 VAGC1 77 110 150 mV[rms] *1
f = 1 kHz

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VIN = 1 V[rms]
19 AGC gain 2 VAGC2 230 345 470 mV[rms] *1
f = 1 kHz
VIN = 50 mV[rms]

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20 Surround level 1 VSU1
f = 50 Hz
200 240 280 mV[rms] *1

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VIN = 50 mV[rms]

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21 Surround level 2 VSU2 130 170 210 mV[rms] *1
f = 10 kHz

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VIN = 0 mV

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22 Surround noise Level VSN — 110 150 μV[rms] *2
Rg = 4.7 kΩ

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VIN = 400 mV[rms]

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23 THD (Surround) THDSU — 0.1 0.3 % *1
f = 1 kHz

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VIN = 1 V[rms]
24 Cross talk CT — –78 –66 dB *2
f = 1 kHz
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VIN = 1 V[rms]
25 Channel balance (Max) CBmax –1 0 1 dB *1

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f = 1 kHz

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VIN = 1 V[rms]
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26 Channel balance (1/4) CB1/4 –2 0 2 dB *1

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Notes) *1 : DIN AUDIO filter used.
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*2 : A-weighted noise filter used.

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SDB00169AEB 9
 AN5891K

„ Electrical Characteristics (continued) at VCC = 9.0 V

Note) Ta = 25°C±2°C unless otherwise specified.

Limits
B
Parameter Symbol Conditions Unit Notes
No. Min Typ Max

I2C Interface
Max. suction current value of Pin

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27 Suction current during ACK IACK 3.0 10 — mA —
14 at 0 4 V
28 SCL, SDA signal input High level VIHI — 3.0 — 5.0 V —

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29 SCL, SDA signal input Low level VILO — 0 — 1.5 V —

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30 Max frequency allowable to input fimax — — — 100 kbit/s —

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SDB00169AEB 10
 AN5891K

„ Electrical Characteristics (Reference values for design) at VCC = 9.0 V

Note) Ta = 25°C±2°C unless otherwise specified.
The characteristics listed below are reference values derived from the design of the IC and are not guaranteed by inspection.
If a problem does occur related to these characteristics, we will respond in good faith to user concerns.

Reference values
B No. Parameter Symbol Conditions Unit Notes
Min Typ Max

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I2C interface
1 Bus free before start tBUF — 4.0 — — μs —
2 Set-up time of START condition tSU,STA — 4.0 — — μs —

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3 Hold time of START condition tHD,STA — 4.0 — — μs —

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4 Low period of SCL, SDA tLO — 4.0 — — μs —

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5 High period of SCL tHI — 4.0 — — μs —
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6 SCL, SDA rise time tR — — — 1.0 μs —

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7 SCL, SDA fall time tF — — — 0.35 μs —

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8 Data set-up time (Write) tSU,DAT — 0.25 — — μs —
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9 Data hold time (Write) tHD,DAT — 0 — — μs —

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10 Acknowledge set-up time tSU,ACK — — — 3.5 μs —

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11 Acknowledge hold time tHD,ACK — 0 — — —

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12 [STOP] condition set-up time tSU,STO — 4.0 — — μs —
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13 6 bit DAC DNLE L6 0.1 1.0 1.9 —

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[Data (max) – Data (00)]/63 STEP

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SDB00169AEB 11
 AN5891K

„ Electrical Characteristics (Reference values for design) (continued) at VCC = 9 V

Note) Ta = 25°C±2°C unless otherwise specified.
The characteristics listed below are reference values derived from the design of the IC and are not guaranteed by inspection.
If a problem does occur related to these characteristics, we will respond in good faith to user concerns.

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START Slave Acknowledge Subaddress Acknowledge Data Acknowledge STOP
condition address bit bit byte bit condition

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SDA

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tLO
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tBUF tSU,DAT tHD,DAT

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tSU,STO

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SCL

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tSU,STA
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tHD,STA tR tF tHI tLO

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SDB00169AEB 12
 AN5891K

„ Electrical Characteristics (Reference values for design) (continued) at VCC = 9.0 V

Note) Ta = 25°C±2°C unless otherwise specified.
The characteristics listed below are reference values derived from the design of the IC and are not guaranteed by inspection.
If a problem does occur related to these characteristics, we will respond in good faith to user concerns.

Reference values
B No. Parameter Symbol Conditions Unit Notes
Min Typ Max

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AGC gain 3 VIN = 100 mV[rms]
14 VAGC3 — 150 — mV[rms] *1
(Sub address 04H : 05H) f = 1 kHz
AGC gain 4 VIN = 140 mV[rms]
15 VAGC4 — 200 — mV[rms] *1

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(Sub address 04H : 03H) f = 1 kHz

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AGC gain 5 VIN = 200 mV[rms]
16 VAGC5 — 250 — mV[rms] *1

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(Sub address 04H : 01H) f = 1 kHz

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AGC gain 6 VIN = 280 mV[rms]
17 VAGC6 — 350 — mV[rms] *1
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(Sub address 04H : 07H) f = 1 kHz

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AGC gain 7 VIN = 500 mV[rms]
18 VAGC7 180 290 430 mV[rms] *1

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(Sub address 04H : 03H) f = 1 kHz

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Note) *1 : DIN AUDIO filter used.
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SDB00169AEB 13
 AN5891K

„ Electrical Characteristics Test Procedures

C SW Sub address
Parameter Symbol Input conditions
No. 1 2 3 4 5 6 00H 01H 02H 03H 04H

1 Quiescent Current ICCT — — — — ON OFF VIN = 0 mV FC 80 77 00 00

VIN = 1 V[rms]
2 Volume (Max Level) VVmax b, a a, b b, a a ON OFF FC 80 77 00 00

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f = 1 kHz
VIN = 1 V[rms]
3 Volume (Mid Level) VVmid b, a a, b b, a a ON OFF 80 80 77 00 00
f = 1 kHz

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Volume (Min Level) VVmin b, a a, b b, a a ON OFF
VIN = 1 V[rms]
00 80 77 00 00

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f = 1 kHz

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VIN = 1 V[rms]
5 THD (1 kHz) THDmax b, a a, b b, a a ON OFF FC 80 77 00 00
f = 1 kHz

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THD = 1%
6 Max input level VImax b, a a, b b, a a ON OFF FC 80 77 00 00

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f = 1 kHz

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VIN = 0 mV

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7 Output noise at volume min VNmin c c b, a b ON OFF 00 80 77 00 00
Rg = 4.7 kΩ
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VIN = 0 mV
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8 Output noise at volume max VNmax c c b, a b ON OFF FC 80 77 00 00
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Rg = 4.7 kΩ

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VIN = 1 V[rms]

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9 Mute Level VMUTE b, a a, b b, a a ON OFF FE 80 77 00 00

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f = 1 kHz
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VIN = 1 V[rms] FC,

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10 Balance (Max Level) VBmax b, a a, b b, a a ON OFF FC 77 00 00

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f = 1 kHz 00
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VIN = 1 V[rms] FC,

11 Balance (Min Level) VBmin b, a a, b b, a a ON OFF FC 77 00 00
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f = 1 kHz 00
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VIN = 400 mV[rms]

12 Bass (Max Level) VBBmax b, a a, b b, a c ON OFF FC 80 7F 00 00
f = 50 Hz
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VIN = 400 mV[rms]

13 Bass (Min Level) VBBmin b, a a, b b, a c ON OFF FC 80 70 00 00
isc

f = 50 Hz
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VIN = 400 mV[rms]

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14 Treble (Max Level) VTBmax b, a a, b b, a c ON OFF FC 80 F7 00 00

f = 20 kHz
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VIN = 400 mV[rms]

15 Treble (Min Level) VTBmin b, a a, b b, a c ON OFF FC 80 07 00 00
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f = 20 kHz
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VIN = 400 mV[rms]

16 Super bass (Max Level) VXBmax b, a a, b b, a c ON OFF FD 80 77 00 00
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f = 50 Hz
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VIN = 400 mV[rms]

17 Super bass (Min Level) VXBmin b, a a, b b, a c ON OFF FD 83 77 00 00
f = 50 Hz

SDB00169AEB 14
 AN5891K

„ Electrical Characteristics Test Procedures (continued)

C SW Sub address
Parameter Symbol Input conditions
No. 1 2 3 4 5 6 00H 01H 02H 03H 04H
VIN = 50 mV[rms]
18 AGC gain 1 VAGC1 b, a a, b a, b a ON OFF FC 80 77 00 03
f = 1 kHz
VIN = 1 V[rms]
19 AGC gain 2 VAGC2 b, a a, b a, b a ON OFF FC 80 77 00 03

ue e/
f = 1 kHz
VIN = 50 mV[rms]
20 Surround level 1 VSU1 b, a a, b b, a a ON OFF FC 80 77 80 00
f = 50 Hz

tin nc VIN = 50 mV[rms]

d
.
21 Surround level 2 VSU2 b, a a, b b, a a ON OFF FC 80 77 80 00

ge
f = 10 kHz

sta
VIN = 0 mV[rms]
22 Surround noise Level VSN c c b, a b ON OFF FC 80 77 80 00

cle
Rg = 4.7 kΩ
on na

cy
VIN = 400 mV[rms]

life
23 THD (Surround) THDSU b, a a, b a a ON OFF FC 80 77 80 00
f = 1 kHz

ct
du
VIN = 1 V[rms]
24 Cross talk CT b, a a, b a, b b ON OFF FC 80 77 00 00
mi UR ue ued pe pe Pro
f = 1 kHz
sc te

VIN = 1 V[rms]
.se ng ntin tin ty e ty ur
25 Channel balance (Max) CBmax — — — — ON OFF FC 80 77 00 00
ww wi co on ce c fo

f = 1 kHz

n.
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Di ain

VIN = 1 V[rms]

o
26 Channel balance (1/4) CB1/4 — — — — ON OFF 40 80 77 00 00

i
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f = 1 kHz
d te t o

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SDB00169AEB 15
 AN5891K

„ Electrical Characteristics (Reference values for design) Test Procedures

C SW Sub address
Parameter Symbol Input conditions
No. 1 2 3 4 5 6 00H 01H 02H 03H 04H
VIN = 100 mV[rms]
14 AGC gain 3 VAGC3 b, a a, b b, a a ON OFF FC 80 77 00 05
f = 1 kHz
VIN = 140 mV[rms]
15 AGC gain 4 VAGC4 b, a a, b b, a a ON OFF FC 80 77 00 03

ue e/
f = 1 kHz
VIN = 200 mV[rms]
16 AGC gain 5 VAGC5 b, a a, b b, a a ON OFF FC 80 77 00 01
f = 1 kHz

tin nc VIN = 280 mV[rms]

d
.
17 AGC gain 6 VAGC6 b, a a, b b, a a ON OFF FC 80 77 00 07

ge
f = 1 kHz

sta
VIN = 500 mV[rms]
18 AGC gain 7 VAGC7 b, a a, b b, a a ON OFF FC 80 77 00 03

cle
f = 1 kHz
on na

cy
life
ct
du
mi UR ue ued pe pe Pro
sc te

.se ng ntin tin ty e ty ur

ww wi co on ce c fo

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d te t o

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SDB00169AEB 16
 AN5891K

„ Technical Data
y I/O block circuit diagrams and pin function descriptions
Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed.

Pin Waveform and

Internal circuit Description
No. voltage

ue e/
1 4.5 V 1 5k 2k Phase filter 1

tin nc
d
.
ge
sta
cle
Level 2 Level 1
on na

cy
life
Depend on input

ct
du
2 level AGC level sensor
0.5 V to 2.0 V 1k 50k 2k
mi UR ue ued pe pe Pro
sc te

.se ng ntin tin ty e ty ur

2
ww wi co on ce c fo

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Di ain

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ic. t in
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3
an ut e
lan nclu

3 4.5 V 1.5k L-ch. input

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82k
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tin
p

1/2 VCC
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4 4.5 V 4 Phase filter 2

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5
5 4.5 V 2k Phase filter 3

2.5k

SDB00169AEB 17
 AN5891K

„ Technical Data (continued)

y I/O block circuit diagrams and pin function descriptions (continued)
Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed.

Pin Waveform and

Internal circuit Description
No. voltage

ue e/
6 5k 2k
6 4.5 V Phase filter 4

tin nc
d
.
ge
sta
cle
7 0V — GND
on na

cy
life
ct
du
6.3k
mi UR ue ued pe pe Pro
sc te

8 4.5 V 900 L-ch. Treble Fc adjustment

.se ng ntin tin ty e ty ur
8
ww wi co on ce c fo

n.
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Di ain

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d te t o

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8.64k
e
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9 L-ch. Bass Fc adjustment

9 4.5 V 1.36k
tin
p
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10 250
ea

Depend on I2C
Pl

10 data 9.4k Bass DAC output

250
1.6 V to 2.5 V

2.0 V

SDB00169AEB 18
 AN5891K

„ Technical Data (continued)

y I/O block circuit diagrams and pin function descriptions (continued)
Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed.

Pin Waveform and

Internal circuit Description
No. voltage

ue e/
3.5 V 5k
11
2C
Depend on I 11k
11 data 600 Volume DAC output

tin nc
2.0 V to 4.0 V

d
.
ge
sta
cle
on na

cy
life
250

ct
du
12 4.5 V L-ch. output
mi UR ue ued pe pe Pro
sc te

12
.se ng ntin tin ty e ty ur
500
ww wi co on ce c fo

n.
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Di ain

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d te t o

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2k

/
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pla m d m des

13 ic. t in
13 — I2C bus clock input
on es
an ut e
lan nclu

15p
M

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tin
p
on
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2k
/D

14
ce

14 — I2C bus data input

an

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250
15 4.5 V R-ch. output
15

500

SDB00169AEB 19
 AN5891K

„ Technical Data (continued)

y I/O block circuit diagrams and pin function descriptions (continued)
Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed.

Pin Waveform and

Internal circuit Description
No. voltage

ue e/
16 250
Depend on I2C
16 data 9.4k Treble DAC output

tin nc
1.6 V to 2.5 V
250

d
.
ge
2.0 V

sta
cle
on na

cy
life
ct
3.5 V 5k 17

du
Depend on I2C
mi UR ue ued pe pe Pro
sc te

17 data 250 Balance DAC output

250
.se ng ntin tin ty e ty ur
2.5 V to 3.5 V
ww wi co on ce c fo

n.
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Di ain

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d te t o

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pla m d m des

ic. t in
6.3k
on es
an ut e
lan nclu
M

as lat

18 4.5 V R-ch. Treble Fc adjustment

di

900
18
e
ue
tin
p
on
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8.64k
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19
int

19 4.5 V 1.36k R-ch. Bass Fc adjustment

Ma

se
ea
Pl

20

20 4.5 V 2.2k Bass mix gain adjustment

2k

SDB00169AEB 20
 AN5891K

„ Technical Data (continued)

y I/O block circuit diagrams and pin function descriptions (continued)
Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed.

Pin Waveform and

Internal circuit Description
No. voltage

ue e/
70k
21
500
21 4.5 V Reference voltage stabilizing

tin nc
d
.
70k

ge
sta
cle
on na

cy
life
ct
du
22

mi UR ue ued pe pe Pro
sc te

22 4.5 V 1.5k R-ch. input

.se ng ntin tin ty e ty ur
82k
ww wi co on ce c fo

n.
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Di ain

i o
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1/2VCC
d te t o

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pla m d m des

23 9.0 V — VCC
ic. t in
on es
an ut e
lan nclu
M

as lat
di
e
ue
tin

Depend on I2C 30.8k

p
on

24 data 24 Mode control

1k
isc

0.6 V to 2.6 V
/D
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an

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SDB00169AEB 21
 AN5891K

„ Technical Data (continued)

y I2C-bus

2. Transmission Message

SDA

ue e/
SCL

tin nc
START condition Slave address ACK Sub address ACK Data ACK STOP

d
.
ge
condition

sta
1 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 1 0

cle
8 2 0 2 1 2
on na

cy
Fig.1 Example of transmission message

life
ct
du
For transmission messages, both SCL and SDA are transferred in the form of synchronized serial transmission.
mi UR ue ued pe pe Pro
sc te

SCL is a clock of a specific frequency, and SDA indicates address data for controlling the receiving side and is transferred in
parallel, being synchronized with SCL.
.se ng ntin tin ty e ty ur
ww wi co on ce c fo

Data is transferred in principle in 3 octets (bytes), and each one octet (one octet = 8 bits) includes one acknowledge bit.

n.
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Di ain

o
Frame structure is described below.

i
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d te t o

.jp rm
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n.p bo yp pe

(a) START condition

co fo
/
co L a d t ty
pla m d m des

The receiver becomes possible to receive data when SDA changes from High to Low while SCL is High.
ic. t in
on es
an ut e
lan nclu

(b) STOP condition

M

as lat

The receiver halts receiving when SDA changes from Low to High while SCL is High.
di
e
ue

(c) Slave address

tin
p

This is an address which is determined for each device. If other device address is sent, receiving will be halted.
on
isc

(d) Sub address

/D

This is an address which is determined for each function.

ce
an

(e) Data
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This is control data.

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Ma

(f) Acknowledge bit

se

This is a bit by which the master acknowledges that data was successfully received in each octet. Master sends the High
ea

signal and the receiver sends back the Low signal as shown in Figure 1 with dotted line, causing the master to
Pl

acknowledge the reception by the receiver. If the Low signal is not returned, communication will be halted.
Except START and STOP conditions, SDA does not change while SCL is High.

SDB00169AEB 22
 AN5891K

„ Technical Data (continued)

y I2C-bus (continued)
3. I2C Bus Addressing
(1) This contains 7 DAC controls and 4 SWs.
(2) オートインクリメント機能は以下のとおりです。
y Sub address 0xxxxxxx : Auto-increment mode
(When the data is sent in consecutive order, the Sub address will be changed in consecutive order, as data is input.)

ue e/
y Sub address 1xxxxxxx : Data update mode
(When the data is sent consecutively, it is sent to the same Sub address.)
(3) I2C bus protocol

tin nc
y Slave address : 10000010 (82H)

d
.
y Format (Usual)

ge
sta
cle
on na

cy
life
ct
S Slave address A Sub address A Data byte A P

du
mi UR ue ued pe pe Pro
sc te

.se ng ntin tin ty e ty ur

START Ack STOP
ww wi co on ce c fo

condition condition

n.
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Di ain

i o
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n.p bo yp pe

co fo
/
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pla m d m des

y Auto increment mode/Data update mode

ic. t in
on es
an ut e
lan nclu

S Slave address A Sub address A Data 1 A Data 2 A Data n A P

M

as lat
di
e
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START Ack
tin

STOP
p

condition
on

condition
isc
/D
ce
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p:/ fo

(4) Since the DAC initial status is not guaranteed, the standard data input is certainly necessary when power is turned ON.
en

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SDB00169AEB 23
 AN5891K

„ Technical Data (continued)

y I2C-bus (continued)
3. I2C Bus Addressing (continued)

(5) Sub address byte and data byte format

Sub Upper MSB Data byte

ue e/
address
D7 D6 D5 D4 D3 D2 D1 D0
Mute Super Bass
00 Volume
ON/OFF ON/OFF

tin nc
d
.
BASS Mix

ge
01 Balance
Effect

sta
cle
02 L/R Treble L/R Bass
on na

cy
life
03 MODE × × Surround Effect

ct
du
Not defined AGC
04 AGC ADJ
mi UR ue ued pe pe Pro ON/OFF
sc te

.se ng ntin tin ty e ty ur

ww wi co on ce c fo

1) MODE 6) Bass Mix ON/OFF

n.
/w llo dis disc nan enan wing
Di ain

o
"00" = Bypass DATA = "0" : OFF

i
/en at
d te t o

"01" = Simulated Stereo DATA = "1" : ON

d

.jp rm
ne ain ain foll

n.p bo yp pe

co fo
"10" = Stereo Surround

/
co L a d t ty
pla m d m des

ic. t in
"11" = Mono surround 7) Bass Mix Effect
on es
an ut e
lan nclu

DATA = "11" : min

M

as lat

2) Volume DATA = "00" : max

di
e
ue

DATA = "000000" : min

tin

DATA = "111111" : max 8) AGC ON/OFF

p
on

DATA = "0" : OFF

isc

3) Balance DATA = "1" : ON

/D

DATA = "000000" : Lout : min, Rout : max

ce
an

DATA = "100000" : CENTER 9) AGC ADJ (0 dB Adjustment) *

p:/ fo
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DATA = "111111" : Lout : max, Rout : min DATA = "00" : 200 mV[rms]
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DATA = "01" : 140 mV[rms]

Ma

se

4) L/R Treble, Bass DATA = "10" : 100 mV[rms]

ea

DATA = "0000" : min DATA = "11" : 280 mV[rms]

Pl

DATA = "0111" : CENTER

DATA = "1111" : max 10) Surround Effect
DATA = "1111" : min
5) Mute ON/OFF DATA = "0000" : max
DATA = "0" : OFF
DATA = "1" : ON

Note) * : 0 dB Adjustment level of AGC is reference value, and not guaranteed by shipping inspection.

SDB00169AEB 24
 AN5891K
M
Output level VO (mV[rms])
Ma
int
en
„ Technical Data (continued)
y Adjust method of AGC control

an
ce
Di ain
/D
isc
on
sc te
tin
ue
di
Pl plan nclu
on na
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se pla m d m des

SDB00169AEB
htt visit ne ain ain foll
d te t o
AGC Characteristic

p:/ fo
tin nc
/w llo dis disc nan enan wing

Input level VIN (mV[rms])

ww wi co on ce c fo
します。また，AGCの入出力特性は下記のとおりI2Cによって制御できます。

.se ng ntin tin ty e ty ur

mi UR ue ued pe pe Pro
ue e/
co L a d t ty du
n.p bo yp pe ct
an ut e d life
as lat
on es
d cy
cle
ic. t in sta
co fo ge
.jp rm
/en at .
/ i on.
AGCがONの場合，入出力ゲインは小信号レベルにおいては0 dB，標準信号レベルでは上昇し，大信号レベルでは減少

25
 AN5891K

„ Usage Notes
y Special attention and precaution in using
1. This IC is intended to be used for general electronic equipment [Television].
Consult our sales staff in advance for information on the following applications:
x Special applications in which exceptional quality and reliability are required, or if the failure or malfunction of this IC may
directly jeopardize life or harm the human body.
x Any applications other than the standard applications intended.
(1) Space appliance (such as artificial satellite, and rocket)

ue e/
(2) Traffic control equipment (such as for automobile, airplane, train, and ship)
(3) Medical equipment for life support
(4) Submarine transponder
(5) Control equipment for power plant

tin nc
(6) Disaster prevention and security device

d
.
ge
(7) Weapon

sta
(8) Others : Applications of which reliability equivalent to (1) to (7) is required
2. Pay attention to the direction of LSI. When mounting it in the wrong direction onto the PCB (printed-circuit-board), it might

cle
smoke or ignite.
on na

cy
3. Pay attention in the PCB (printed-circuit-board) pattern layout in order to prevent damage due to short circuit between pins. In

life
addition, refer to the Pin Description for the pin configuration.

ct
4. Perform a visual inspection on the PCB before applying power, otherwise damage might happen due to problems such as a solder-

du
bridge between the pins of the semiconductor device. Also, perform a full technical verification on the assembly quality, because
mi UR ue ued pe pe Pro
sc te

the same damage possibly can happen due to conductive substances, such as solder ball, that adhere to the LSI during
.se ng ntin tin ty e ty ur
transportation.
ww wi co on ce c fo

5. Take notice in the use of this product that it might break or occasionally smoke when an abnormal state occurs such as output pin-

n.
/w llo dis disc nan enan wing
Di ain

VCC short (Power supply fault), output pin-GND short (Ground fault), or output-to-output-pin short (load short) .

i o
/en at
And, safety measures such as an installation of fuses are recommended because the extent of the above-mentioned damage and
d te t o

.jp rm
ne ain ain foll

n.p bo yp pe

smoke emission will depend on the current capability of the power supply.

co fo
/
co L a d t ty

6. When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions
pla m d m des

ic. t in
(operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed the range of absolute
on es
an ut e
lan nclu

maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any
M

as lat
di

defect which may arise later in your equipment.

e
ue

Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure
tin

mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire
p
on

or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products.
isc

7. When using the LSI for new models, verify the safety including the long-term reliability for each product.
/D

8. When the application system is designed by using this LSI, be sure to confirm notes in this book.
ce

Be sure to read the notes to descriptions and the usage notes in the book.
an

p:/ fo
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SDB00169AEB 26
 Request for your special attention and precautions in using the technical information and
semiconductors described in this book
(1) If any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and
regulations of the exporting country, especially, those with regard to security export control, must be observed.

(2) The technical information described in this book is intended only to show the main characteristics and application circuit examples
of the products. No license is granted in and to any intellectual property right or other right owned by Panasonic Corporation or any
other company. Therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any
other company which may arise as a result of the use of technical information described in this book.

(3) The products described in this book are intended to be used for standard applications or general electronic equipment (such as office
equipment, communications equipment, measuring instruments and household appliances).
Consult our sales staff in advance for information on the following applications:
– Special applications (such as for airplanes, aerospace, automobiles, traffic control equipment, combustion equipment, life support
systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the prod-

ue e/
ucts may directly jeopardize life or harm the human body.
– Any applications other than the standard applications intended.

(4) The products and product specifications described in this book are subject to change without notice for modification and/or im-

tin nc
provement. At the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date Product
Standards in advance to make sure that the latest specifications satisfy your requirements.

d
.
ge
sta
(5) When designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions
(operating power supply voltage and operating environment etc.). Especially, please be careful not to exceed the range of absolute

cle
on na
maximum rating on the transient state, such as power-on, power-off and mode-switching. Otherwise, we will not be liable for any

cy
defect which may arise later in your equipment.

life
Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure
mode, possible to occur to semiconductor products. Measures on the systems such as redundant design, arresting the spread of fire

ct
du
or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products.

mi UR ue ued pe pe Pro
sc te

(6) Comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (ESD, EOS,
.se ng ntin tin ty e ty ur
thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. When using products for which
ww wi co on ce c fo

damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages.

.
/w llo is isc nan nan ing

/ on
Di ain

(7) This book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our company.

i
d d te te ow

/en at
d

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ne ain ain foll

n.p bo yp pe

20080805
co fo
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