Shenzhen Kstar Science & Technology Development Co.,LTD.

Memo Plus
9310/9315/9320
Maintenance Manual
Content:

1 PRODUCT..................................................................... 3

1.1 Features..................................................................................................................................................... 3

2 CIRCUIT STRUCTURE AND WORKING PRINCIPLE..................................... 5

2.1 System block............................................................................................................................................. 5

2.2 Working Principle.................................................................................................................................... 5
2.2.1 System blocks ............................................................................................................................... 6
2.2.2 PFC circuit.................................................................................................................................... 8
2.2.3 Inverter circuit working principle ............................................................................................ 14
2.2.4 Principle of charging circuit...................................................................................................... 19
2.2.5 Power supply circuit .................................................................................................................. 24
2.2.6 Working principle of relay circuit ............................................................................................ 26
2.2.7 Battery Cold start circuit .......................................................................................................... 27
2.2.8 IGBT drive circuit...................................................................................................................... 28
2.2.9 SCR drive circuit........................................................................................................................ 29
2.2.10 Others.......................................................................................................................................... 29

3 COMMON TROUBLESHOOTING..................................................... 32

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1 Product
Memo 3/1 series are on line intelligent UPS, can provide safe protection for small and middle sized servers
and industry equipments, and can be used to various network system devices. On line design ensures a stable and
clean power supply environment. Parallel design and intelligent management meet the requirements of the advanced
network system.

1.1 Features

z Advanced intelligent control

High frequency double conversion on line design, DSP control, wide input voltage and frequency range, multiple
band options, high precision, low output voltage harmonic, phase locked regulated pure sine wave power supply, low
noise, lightning and surge protections, so that UPS can provide more comprehensive and perfect protection for user’s
devices.

z Advanced PFC technology

Advanced input power factor correction(PFC) technology, enhances the UPS’s utilization to power, eliminates the
harmonic pollution of UPS to grid, and reduces the operation costs of UPS.

z System’s High Reliability design

¾ DSP control technology, ensures the reliability of UPS.
¾ Parallel operation, up to four units, increases system’s reliability too.

z Intelligent Battery Management

CC(constant current)/CV(constant voltage) auto-conversion three stages charging technology, activate the batteries
in the maximum, and can prolong the battery’s life time.

z Reliable protections
With many kinds of protection: input low voltage protection, output over current/overload/short circuit protection,
PFC and inverter over temperature protection, battery over charged and low voltage alarm protections, and so on.
Those all can ensure the stability and reliability of system’s operation.

z Auto bypass function.

When output overloads or fails, this function can make UPS auto transfer to bypass mode to supply the load by AC
uninterrupted.

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z DC start function.
Start up UPS without AC input directly, meets the emergency needs of users.

z Centralized monitoring system

Centralized monitoring card can monitor two or above units at the same time, and records the events
and alarms of each unit.
RS232,SNMP and other communication interfaces can realize the real time monitoring to UPS.
LCD can provide accurate UPS information.

z Convenient Maintenance
Bypass maintenance module. When UPS fails and needs maintenance, with that module we can
remove the power module on line, and loads with constant power supply.

Products: Memo 3/1 series have: Memo9310S ( standard unit), Memo9310H ( lone time unit),
Memo9315H, Memo9320H.

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2 Circuit structure and working principle

2.1 System block

I/P EMI PFC Inverter EMI O/P

BUS
rectifier

LCD Battery Buck charger/

Aux. power Communication

DSP
Fig.1 System Block

2.2 Working Principle

Working principle: AC is sent to double Boost-PFC rectifier after being filtered by input filter. High power factor
correction PFC rectifier will transfer the AC input into positive and negative DC BUS voltages, DC BUS voltage
inverted by half bridge inverter and outputs pure sine wave, then provides to the load after being filtered by output
filter.

AC mode: UPS inverter is continuous working, rectifier converts AC into DC to supply the inverter, equalized
charging or float charging the battery through the charger constituted by Buck converter.

Battery mode: when AC fails, inverter needs to supply the load uninterrupted. And at that time, battery is boosted
by double boost-PFC circuit to maintain the BUS and supplies the power. So no matter AC fails or comes back, UPS
can realize the uninterrupted power supply.

Bypass mode: while inverter fails, inverter’s overload delay time is timing up or inverter shuts down manually, UPS
will enter the bypass mode. And if bypass and inverter are synchronization at this moment, system will transfer to
bypass from inverter mode uninterrupted.
Maintenance mode: if UPS needs maintenance or repair, shutting down the inverter, system will transfer to bypass

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mode. At this moment, we can shut down the UPS via the internal or external maintenance bypass.
DSP controls PFC rectifier’s power parts, operations of Buck circuit and working of inverter. Provide dates LCD and
communication need at the same time.

2.2.1 System blocks

Main circuit
Q1

Q2

3-Boost PFC
L2
D1
K1
L3
D2

L4
D9

Q5

D3 D4 D5
D6 D7 D8
R1
C4 Q13 Q14 Q16
D12
L6 Q6
BAT+
Q7 Q9 Q11
Q3
1 K4 L7
VO
K3
LINE-R D10 C5
BAT+
C3

BT1 K2

N N
2

LINE-S BT2 BAT-

BATTERY
RLY模块
D11 C6
RL module
R2
K5 Q8 Q10 Q12 D13
L5
BAT-
Q15 Q17
LINE-T
Q4

D14 D15 D16 D17 D18 D19 C7 Q18

RELAY-SPST

三相继电器 L8
D20
DIODE
L9
D21

DIODE
L10
D22 CHG模块 INV模块
DIODE CHG module INV module
PFC模块
PFC module
Fig.2 Main circuit’s topology
Memo9310S/9310H Maintenance Bypass EMI box’s connections

输入开关
Input Switch
维修旁路开关
Maintenance Bypass Switch
63A 3Pin Breaker
63A 2Pin Breaker S3
Input EMI filter

J2 R LINE-R
S 35A 1
T 35A
35A
2 S4 器
3
G 35A 4
S LINE-S
5 滤
6
R 75A S5
Nin 75A
7
T 波 LINE-T
J1 S1 8
Vo 75A
9 EM
R N 75A 联动 功率模块
1
S
10 I Power
2
T S2 Nin 入 N module
3
4
Nin 模块对接端子 BAT+
输
Lout J3
5
Nout
6 联动 1 BATGND
2
65A导轨式端子台 L1 C2 3 BAT-

C1 65A导轨式端子台

维修旁路小盒
Maintenance bypass box 机箱本体
Cabinet

Fig.3 Maintenance bypass & EMI topology 1

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Memo9315/9320 Maintenance Bypass EMI box’s connections

Maintenance bypass switch

维修旁路开关 输入开关
Input switch
125A 2Pin Breaker S3 125A 3Pin Breaker

Input EMI filter

器 LINE-R

S4 波
滤

gnetic ring
LINE-S
I
S5 磁环 M
E
入 LINE-T Power
输 N module
J1 S1
R
1
S 联动
linkage 功率模块
2 S2
T
3
Nin
4 BAT+
Lout
5
Nout
6
BAT+ 联动 N
7
N
8
BAT- BAT-
9

C2
gnetic ring

125A锁线端子
C1
磁环 VO1+VO2

Fig.4 maintenance bypass &EMI topology 2

Double Boost-PFC rectifier part: Rectifier and boost circuit. Through controlling the conduction time of SCR to
achieve the slow start of positive and negative BUS.
Battery boost part: lead the battery voltage into PFC circuit through relay. Share the double Boost-PFC circuit to
maintain a stable positive and negative BUS and the working of inverter.
Inverter part: through the half bridge converter converts positive and negative BUS voltage into AC sine wave output
Charge part: positive and negative BUS voltages via Buck circuit respectively, and then charge the battery.

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2.2.2 PFC circuit

1. PFC power circuit

Fig.5 PFC power part circuit (the upper is power board, the next is inductance board)

Inductance board QJ2,QJ3 are slow start SCR, A phase’s voltage through controlling the SCR’s conduction time to
achieve the boost slow start of positive and negative BUS.
Inductance board: D16, D14, D12, D6, D4, D2 are positive and negative rectifier diodes of A, B, C phase
respectively. D17、D13、D11、D5、D3、D1 are rectifier diodes of battery mode PFC circuit.
Power board: D16, L6, Q4, D10 constitute the positive Boost PFC circuit of A phase.
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Power board: D16, L6, Q4, D10 constitute the negative Boost PFC circuit of A phase.

Power board: D14、L5、Q5、D11 constitute the positive Boost PFC circuit of B phase.
Power board: D4、L2、Q2、D8 constitute the negative Boost PFC circuit of B phase.
Power board: D12、L4、Q6、D12 constitute the positive Boost PFC circuit of C phase.
Power board: D2、L1、Q3、D9 constitute the negative Boost PFC circuit of C phase.

The CTs in the loop of Q4, Q5, Q6 are: A, B, C phase positive IGBT current testers.
The CTs in the loop of Q1, Q2, Q3 are: A, B, C phase negative IGBT current testers.

2. PFC drive signals

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 Fig.6 PFC drive circuit

SDP sends out C phase PFC control signals PFCC.PWM+、PFCC.PWM-, when PFCC.PWM+、PFCC.PWM-
are high level, REC_GH3S（REC_GH3S2）、REC_GB3S（REC_GB3S2）are low level, otherwise are high level.
When positive IGBT current IC+(IC+2) or negative IGBT IC-(IC-2) is greater than PFC current limiting value,
comparator U38 and U31 will reverse and then D50/D51 or D3/D4 turn on, OC-C sends out high level, RS trigger
U12A reverses, makes NOT Q output high level, thus driving Q3 to lock PFC PWM signal.
NOTE: Memo9315/9320 have two parallel power modules, REC_GH3S2 and REC_GB3S2 are drive signal of
parallel power module, IC+2 and IC-2 are parallel power module’s IGBT current.
The PFC drive working principles of A and B phase are the same.

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3. AC voltage (VINA, VINB, VINC) detection circuit

Fig.7 A phase AC voltage detection circuit

R156、R157、R158、R159 and U22 constitute BUCK circuit, it will reduce the AC voltage (100-300Vac) to 0-3V
DSP detectable signal. Step-down ratio of U22 PIN1 is VIN=VLINE-A*15/2000.
The AC detection signal V-IN sent to DSP is VINA=VIN/2+REF3.0/2
The working principles of AC voltage detection circuit of phase B and C are the same.

4. IA_IN+, IA_IN- detection circuit

Fig.8 A phase current detection circuit of PFC input part

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 The current signal detected by CTA1+ through the circuit composed by D14、R18、R271、R40 generates A
phase’s positive IGBT current. IA_IN+=(IAL+)*47/3/300.
The current signal detected by CTA2+ through the circuit composed by D2、R1、R272、R43 generates A phase’s
negative IGBT current.
IA_IN+ and IA_IN- are sent to DSP as input current detection signals.
The current detection circuit’s working principles of phase B and C are the same.
Memo9315/9320 have two paralleled power boards, but DSP only detects one of its IGBT’s current.

5. Vbus-t-1, Vbus-t-2 detection circuit and BUS over voltage protection circuit

Fig.9 BUS over voltage protection circuit

BUS over voltage protection
R92、R93、R94、R95 and U14 constitute positive BUS over voltage protection circuit. When the positive BUS
voltage is more than 476V, U14-A will reverse and sends out SHUT and BUS_OV signal, makes UPS enter into fault
mode.
R84、R85、R86、R87 and U14 constitute negative BUS over voltage protection circuit. When the negative BUS
voltage is more than 476V, U24_C will reverse and sends out SHUT and BUS_OV signals, makes UPS enter into
fault mode.
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Fig.10 BUS voltage detection circuit

R68、R69、R70、R71、U24-A constitute positive BUS voltage detection circuit.

VBUS+ = BUS+ * (12.4/2000)
R76、R77、R78、R79、U24-B constitute negative BUS voltage detection circuit.
V_BUS- = BUS- * (12.4/2000)

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2.2.3 Inverter circuit working principle

1. Inverter power circuit

4 3
+DCBUS 5 2
6 1
P1
M5 Copper Terminal
1 02/25 0V /Y 2 ( N C)
C1 4

472 /250 V ac/Y 2 ( N C)

fsw=18kHz, dead time=1.5us

A l- W4 0 .3* H 56 .5* L 1 50 mm, 8 Fin s

FG1

R3 4
LL4148 LL4148
D1 D2

1
Q2
2

HS1
0 .02 2u F/6 3 0V ( N C)

D1 0
U F2 00 6
10/F(1206) 10/F(1206)

1
4 70 uF, 4 50 V

Q1
R5 R6
4 70 uF, 4 50 V
4 70 uF, 4 50 V

2 1 2 1

FG SYMBOL IGBTHi.G 1Q1G 1Q2G

R1 R2
10/F(1206) 10/F(1206)

2
2
I K W40N 1 2 0T 2
R9
47.5 k( 1 206 )

I K W40N 1 2 0T 2
1SM A 1 5CA T 3
TV S1

R1 0
47.5 k( 1 206 )
1SM A 1 5CA T 3
TV S2

100, 5W

C3 0
471, 2kV
C1
C2

1
C3

R1 4

C2 6
3

3
1
1
1

Q1G: +14V/-7.5V GND

2
C1 6

1 20 k, 5W

IGBT.E1C2
2
2
2

IL
2

HCT1 L18P 050 D15, TAMURA

C9
1 04

C1 0
1 04
4
GND 2 GND
C7 3 1
0.33uF/1.2kVDC(CDE DMPP) +15V -15V

N InvL-T1 InvL-T2 5 6
INVL
C8 P3 P4 P5
0.33uF/1.2kVDC(CDE DMPP) double-screw stud double-screw stud double-screw stud

GND

INVL TP2
TEST POINT
2
C4
C5
C6

C1 7

R1 5
1
1
1

C3 1
4 71 , 2 kV
0.0 2 2uF/6 30V ( N C)

120 k , 5W

LL4148 LL4148
2
2
2

D3 D4
Q4

A l- W4 0.3 * H 56.5 * L 150mm, 8 Fins

HS2
2

10/F(1206) 10/F(1206) 2
1

R7
4 70 uF, 4 50 V

R8
4 70 uF, 4 50 V
4 70 uF, 4 50 V

Q3

TP1
R3 5
2 1 2 1 N

C2 7 4 72 /25 0 V ac/Y 2 ( N C)
D11
U F2 006
TEST POINT

1
IGBTLo.G 1Q3G 1Q4G
R3 R4
FG2
1 SM A 15CA T 3
T VS3
1

10/F(1206) 10/F(1206)
I K W4 0N 1 2 0T 2

I K W4 0N 1 2 0T 2
R1 1
47. 5 k( 1 20 6)

R1 2
47. 5 k( 1 20 6)
1SM A 1 5CA T 3
T VS4

2
3

P6
1 00 , 5W
102/25 0V /Y 2( N C)
C1 5

FG SYMBOL GND double-screw stud

2

4 3
-DCBUS 5 2
6 1
P2

Fig.11 Inverter power part circuit

Positive BUS capacitor C1,C2,C3 and Q1/Q2 constitute positive half-bridge

Negative BUS capacitor C4,C5,C6 and Q3,Q4 constitute negative half-bridge

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2. Inverter Control signals

Fig.12 Inverter Control Signal

INV_DSP_GH, INV_DSP_GB are the control signals sent by DSP. When INV_DSP_GH、INV_DSP_GB are
high level, INVPWM+（INVPWM+2）、INVPWM-（INVPWM-2）are low level, otherwise high level. While invert
inductance current IL(IL2) is greater than inverter limiting current value, comparator U26/U28 will reverse, then
D9/D10/D15/D55 turn on and send out high level, RS trigger U12-B will reverse, and makes not Q outputs high
level and then drives Q8 to lock INV PWM pulse signal.

Note: Memo9315/9320 have tow paralleled inverter power modules, INVPWM+2 and INVPWM-2 are the drive
signals of that paralleled inverter power modules, IL2 is inverter inductance current of paralleled power modules.

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3. Inverter Voltage and DC component detection

C32 102(reserved)

+15V -15V R27 15k

2
1
-15V GND
D6
C18

4
MMBD7000
N R16 1M R18 1M 2 104
33 1 Vinv
INVL R17 1M R19 1M 3 U1A
LF353
R2 6
C3 3
D5 C19

8
MMBD7000 104
+15V GND
1 5k
1 02 ( reserv
1
2

-15V +15V

Floating-Ground-Input Differential Amp. GND

+15V -15V
N R20 1M R21 1M C22

2
1
105
ZD1
5 .6 V (N C )
2

1MΩ Resistor:
D7 R30 R31
LED2
LED1

MMBD7000 1M 1M
0.25W Metal glaze coated resistors,
2
1

1W Metal film resistor and

C20 C21 R22 1M C11 R28 100k 6
7 InvDCoffset
1206, 0.25W, 200V Thick film chip resistor
11

33
ZD2
5 .6 V (N C )

are recommended. DO NOT use only

R25 1M R29 100k 5 U1B
NC
NC

103 103 103 LF353

3 pcs 0.25W Metal film resistor
D8 R32 R33
1
2

in series.
MMBD7000 1M 1M
INVL R23 1M R24 1M C23 105
2

1
2

-15V +15V
GND

Fig.13 Inverter voltage and DC component detection

R16、R17、R18、R19 and U1A constitute buck circuit, reduces inverter voltage (100-300Vac) to 0-3V what DSP
can detect. The step down ratio is VINV/Vinv=15/2000.
The calculation formula of AC detection signal V_INV sent to DSP is V_INV=Vinv/2+Vref/2

R20、R21、R23、R24、C20、C21、U1B constitute DC component detection circuit, the inverter AC voltage via

RC filter and extracts DC offset voltage at both ends of C20 and C21. through proportional operation getting
InvDCoffset. Add offset and then send to DSP to detect. InvDCoffset=VINVDC*2/1.1
The calculation formula of AC detection signal VINV_DC sent to DSP is VINV_DC=InvDCoffset/2+Vef/2.
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4. output over voltage and Zero-crossing detection

Fig.14 output voltage and zero-crossing detection

R142,R144,R145,R146 and U21-D constitute BUCK circuit, will reduce output voltage(100-300Vac) to 0-3V
DSP detectable voltage. Step down ratio of U21’s PIN14 is Vout=Vo*15/2000.
The output detection signal VOUT sent to DSP is VOUT=Vout/2+Vref/2

Vout is sent to comparator composed by U21-B and Q12 too, and transfer it into square signal, when the output
voltage passes zero, the comparator will reverse. Send it to DSP as output voltage zero crossing signal.

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5. inverter inductance/inverter/output current detection

Fig.15 inverter inductance current detection

Fig.16 inverter current detection

Fig.17 output current detection

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R10, U20-D and their surrounding circuits constitute Proportional operation circuit, magnify the inductance
current IL and add offset, then sent to DSP as inverter inductance current detection value.
I_L= (IL*2.4/10)/2 + Vref/2
The calculation formula of inverter inductance current detection signal I_L sent to DSP is
I_L=(IL*2.4/10)/2+Vref/2
Detection principles of Inverter current I_INV, output current I_OUT are as the above.
Note: Memo9315/9320 have tow paralleled inverter power modules. DSP only detects one of their inverter
inductance current IL.

2.2.4 Principle of charging circuit

1. charge’s main power circuit

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 Positive charging current detection

BUCK main charging circuit

Negative charging current detection

Fig.18 Main charging power circuit

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C29、C30、C31、C32、C101、Q11、D33、L1、C39 constitute Buck charging circuit of positive battery group.
C12、C14、C28、C33、C34、Q12、D37、L2、C40 constitute Buck charging circuit of negative battery group
T1 tests the positive charging IGBT current.
T2 tests the negative charging IGBT current

2. charge’s control signal

Charging current peak value limited

Fig.19 charge’s control circuit

CHRG.PWM+、CHRG.PWM- are control signals sent by DSP. When CHRG.PWM+、CHRG.PWM- are high
level, CHG_GH_LED1 、 CHG_GB_LED2 are low level, otherwise high level. The posterior poles of
CHG_GH_LED1 and CHG_GB_LED2 are connected with IGBT drive board.
When charging inductance current CHG_GH_IL、CHG_GB_IL are greater than charging current limited value,
comparator U5 will reverse, then D10 or D12 turns on and outputs high level, NOT-AND gate reverses, making
drive pulse signal being pulled low, charging signal is locked.

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3. charging current/ battery voltage detection

Fig.20 charging current detection

R1、R3、R4、R5、U2 constitute positive charging voltage detection circuit.

VCHGP = CHARGE+ * (36/2000)
R1、R3、R4、R5、U2 constitute negative charging voltage detection circuit.
VCHGN = CHARGE- * (36/2000)

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Fig.21 battery voltage detection R15、

R17、R18、R19、U3 constitute positive battery voltage detection circuit. R23、
R25、R26、R27、U4 constitute negative battery voltage detection circuit.

4. charging current detection

Fig.22 charging current detection

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Refer to charge’s main power circuit, charging IGBT current is sent to DSP after being filter by R/C filter
Positive charging IGBT current ICHG+=Ichg+*100/300
Negative charging IGBT current ICHG-=Ichg-*100/300

2.2.5 Power supply circuit

Fig.23 UPS on/off circuit

Q13, Q14, Q15, J12 and their surrounding circuits constitute UPS on/off circuit.
Battery start: when J12 button is closed, Q14 turns on, BAT+ will through D19, Q13 and Q14 being sent to
power control chip, makes power circuit start to work. At the same time, through U14 and its surrounding circuits,
send out rising edge signal of SW_ON to DSP, as the symbol of power on. After the power established, the power
supply part generates BACK-POWER1 to self- power supply.
AC auto start: LINE instantaneous powers, via the circuit composed by D42, D45 and U12, pulls down B pole
of Q15, makes Q14 turn on, N voltage through D20, Q13 and Q14 being sent to power control chip. The follow up
actions are the same as battery mode.

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Fig.24 power supply part: power circuit

Power supply part: T5, Q18 and Q19 constitute two groups fly-back circuit, reduces the AC voltage, battery
voltage or BUS voltage into Aux. power +/-15V, 24V.
AC via the D51, D52, D58 and D59 as high voltage input being supplied to those two flyback groups. Positive
battery group and negative battery group are as high voltage input through D55 and D57 respectively. When the
system powers on and bus voltage is stable, positive and negative BUS voltage are as high voltage input through the
D53 and D60

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2.2.6 Working principle of relay circuit

Fig.25 relay’s control circuit

Relay K1 is the switch of bypass to output, when output overloads or inverter fails, UPS will transfer to bypass.
Q1 and Q2 are SCR, before relay closed, SCR will turn on firstly, so that the impact current passes through the SCR.
While the voltage difference between two ends of relay are the same, relay closes, achieves relay’s zero voltage turns
on and prevents arc discharge.
Q8, Q9, C19 and their surrounding circuits constitute relay’s voltage multiple drive circuit. At the moment of
relay operating, the voltage between relay’s winding is 12-24VDC for a short period, and that accelerates the
operation speed of relay.

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2.2.7 Battery Cold start circuit

Fig.26 battery cold start circuit

When cold starts on battery mode, first needing to pre-charge the BUS capacitor to make the voltages of
capacitor and battery almost the same, and to avoid the damage of power devices for the instant high current when
PFC acts.
Positive battery voltage is sent to PFC BUS+ through R3、R4、R5、R10、Q5、D2.
Negative battery voltage is sent to PFC BUS- through R8、R9、R20、R21、Q6、D5.
When DSP sends out SOFT_START signal, U2 and U3 will act, SCR Q5 and Q6 turn on, battery voltage
through SCR charges positive and negative BUS voltage into battery voltage. SCR automatically turns off after
charging finished.

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2.2.8 IGBT drive circuit
+15V

MC14093B

1
U1C
C6 Measured value: fosc=580kHz, Duty=48% 8
47uF/25V MC14093B 10
U1B
14
9
2

5
+15V
GND
1 4 BDRV
3 6 U1D

R1
2 12
U1A 11
MC14093B 13
7

5.1k
GND MC14093B
C11
R5 4 7k 101 J(MLCC NP0)
+15V

1uF/50V(MLC) D1 BYV26A
C8 +15V @ no load
2

1 2
VGE+15V
C5 ZD4

R3
47uF/50V
C10
1 Q1 104 15V/0.5W(NC)

2
1
ZD11N4742ARL( 12V ) ZD2 1N
2N4401
NPN GND R2 10/1W R4
D2

C9

200
BDRV * 2 11 6 2.2k/1W
2
33

C7 C2

1
1uF/50V(MLC)
IGBT.E
1 Q2 Np=7Ts Ns=19Ts

2
1
BYV26A

104

C3
2N4403 3 4
2
47uF/50V

220uF/35V
1

PNP 2 5 12
* TX1
2

104
E-10747A
2

ZD3 7.5
C12

1
1

VGE-7.5V
GND GND -7.5V @ no load
Voltage Doubler Rectifier

VGE+15V
2

VGE+15V Q3
1 2SC5706
U2 NPN
1 8 SANYO
2

NC
PWM 2 7 R9 31.6 IGBT.G
33
R8

D3 3 6 C4
LL4148 4 5 104 C15 1 Q4
NC
1

331 2SA2039
30k

TLP250 PNP
GND VGE-7.5V SANYO
2

VGE-7.5V

Fig.27 IGBT drive circuit

U1,R1, R5, C11 and surrounding circuit constitute self excited oscillation circuit, generates Vmax=15V,
Duty=50%, f=600Khz square wave. Drive the power circuit composed by Q1, Q2, C7, TX1, D1 and D2, generates
22.5V DC voltage. Then By ZD3 and R4 it will be divided into +15V/-7.5V isolate drive power.
Drive signals pass through drive circuit composed by U2, Q3 and Q4 to drive IGBT power tube.

28
 Shenzhen Kstar Science & Technology Development Co.,LTD.
Document
Name Memo Plus 9310/9315/9320 Maintenance Manual Page:

2.2.9 SCR drive circuit

+15V

R9 24, 2W

1
R4 C2 TX1 10 K2
1k ZD1 104 1 C3
18V, 1W N5, D0.14, 44Ts 104(reser

2
+15V +15V +15V N1, D0.14, 49Ts 91 2 G2
GND 2 D4 UF4004
D2 N4, D0.14, 29Ts
R7 C1 LL4148 3 8
1.3k R2

21
D13 104
8
2LL4148 1k N2, D0.14, 55Ts, 300uH 7 K1
GND U1 4 C4
R8 R3 Q2
2

12k 6 3 OUT 1kBDRV1 N3, D0.14, 52Ts 104(reser

V CC
Vth Out
D1 2SC5706 5 61 2 G1
TRIGENABLE 1 12 Q1 2
Reset
4 R6 D5
Trig
R1 1k MMBT2222A 10k TX900-15010-00 UF4004
GND

3
LL4148 7 5
Disch. Vctrl
R5
3

10k C5 NE555 C6 C7
472 103 103 GND +15V CN1
1

1
+15V

1
2
GND
C8 3 TRIGENABLE
GND GND GND GND GND 47uF/25V 4
5

2
6 G1
GND 7 K1
8
9
10 G2
11 K2

Fig.28 SCR drive circuit

U1, TX1, Q2 and their surrounding circuits constitute SCR drive circuit, TRIGENABLE is DSP control signal.
When DSP sends out high level TRIGENABLE, U1 will be enabled and sends out square wave, then gets SCR pulse
drive signal via isolated drive transformer.

2.2.10 Others
1. Fan speed control circuit

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 Fan speed control circuit

Fig.29 Fan Speed adjust circuit

Fan power is the Buck circuit composed by U20, D87, L5 and C27, transfers the P24 power generated by aux.
power into adjustable power and supply to main power fans
Fan power voltage adjust circuit is composed by U9, U10 and their surrounding circuits. The principle of it is
changing adjust voltage value sent to U20FB voltage feedback terminal; VFB=1.25V.
When DSP FAN-PMW signal is low level, U9 doesn’t operate, U10’s anode is no voltage, VFB=P24-2*(1/21).
When DSP FAN_PWM signal is high level, U9 will operate, U10’s anode will generate 5V voltage as regulated
quantity, and then sent to FB after being voltage divided.

2. detection signal’s time sampling circuit

30
 Fig.30 time sampling circuit
U33、U34、U35、U36、U19 and their surrounding circuits constitute detection signals’ time sampling circuit.
AD_SW is time sampling drive signal. When AD_SW sets high, then ADSW=0, multi-way switch AY, BY and CY
output. Or else, when AD_SW sets low, ADSW=1, multi-way switch AX, BX and CX output.

3 Common troubleshooting
Refer to user’s manual

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