Tariqul Islam, MSc

House 12-13, Rd-2, P C culture housing society

Shyamoli, 1207 Mohammadpur, Dhaka, Bangladesh
Email: tariqul.mul@gmail.com
Mobile: +8801300209212

Executive Summary:
 Working experience as a process engineer in high tech semiconductor industries
 Expert in characterization, thermo-mechanical deformation behavior of
semiconductor materials and reliability assessment, semiconductor metrology
 Hands on experience in wet cleaning of semiconductor wafers and analyses
 An enthusiast goal oriented individual and an effective team player

Experience: Sr. Lecturer, University of Science and Technology Chittagong Aug. 2022 – July, 2023
 Conducting lectures on the courses such as VLSI design, , digital logic design,
electronic devices and circuits

PhD Thesis Writing, University of Leoben, Austria Feb. 2019 – Sept. 2023 (Expected)
 PhD topic: Material behaviour of semiconductor devices during real time
operation – method development and verification
 Analysis of thermo-mechanical behaviour of metallization materials used in
semiconductor devices during extreme heating and cooling rates
 Method development to calculate stress data from electrical stress tests
 Automation of data analysis by MATLAB coding and NI Vision builder AI

Process Engineer, Lam Research AG, Villach, Austria June 2017 – Oct 2018
 Conducted defect analysis by wet cleaning processes on semiconductor
wafers by Lam wet cleaning tools DV Prime and EOS
 Compared the surface properties undergoing different process parameters
 Extensive collection of data and analysis of data by data analysis tools
 Investigated defects for advanced technology node test structures undergoing
different semiconductor process steps
 Managed projects to qualify systems for semiconductor manufacturing
 Worked with international customers and fulfilled their requirements by
constantly updating in-house technologies – report and data generation
 Wafer surface analysis by SEM, EDX, SP3, FX200, LD10 and Raytex systems

Research Engineer at KAI GmbH, Villach, Austria June 2013 – March 2017
 Developed a novel experimental setup to investigate thermo-mechanical
failure mechanisms of metal thin films used in semiconductor devices
undergoing very high heating (105 - 106 K/s) and cooling rates
 Investigated material properties and reliability of power metallization thin
films during conditions close to the real time operating conditions
 Conducted Thermal-Electric simulation in ANSYS Workbench; Compared the
experimental results with the ANSYS FEM (APDL) simulation results

Visiting Scientist, WPI-AIMR, Tohoku University, Japan March 2013 – May 2013
 Study of metallic glassy materials for MEMS applications
 Investigated reactive ion etching (RIE) profile of metallic glassy thin films
 Master Thesis, Infineon Technologies, Dresden, Germany Jan. 2012–Sep. 2012
 Responsible for "Fabrication and characterization of Cu-Al based self-forming
diffusion barrier for modern Cu interconnect technology"
 Conducted electrical failure analysis tests and electrical characterization of
MOS interfaces by the bias temperature stress(BTS)and the voltage ramp(V-
Ramp) techniques: HP4155A, Agilent4155C
 Design of Experiments (DOE): Defining experimental set-ups (e.g.
deposition conditions, suitable annealing condition to realize the self-forming
barrier, measurement conditions)
 Explanation and interpretation of TEM, EDX, AES, XPS and ToF-SIMS
analyses results on metal-oxide-semiconductor (MOS) interface properties

Master Research Project, Leibniz Institute for Solid State and Materials Research,
Dresden, Chemnitz site, Germany Feb. 2011 – Aug. 2011
 Responsible for Fabrication of self-rolling micro-tubes on flexible polymer foil
for sensoric applications by sputtering deposition technique

Relevant  Working experience as process engineer in high tech semiconductor industries

Skills:  Research and development of semiconductor materials related technologies
including in the interconnect technology area and project management
 Working experience as a failure analysis and metrology engineer in high tech
semiconductor industries managing international customers
 Hands on experience in wet cleaning of semiconductor wafers
 Semiconductor Metrology: Surface analysis for advanced technology node test
structures by SEM, EDX, SP3, LD10, Raytex, FX200
 Expertise in reliability and electrical characterization of thin films
 Materials characterization and failure analysis techniques: BTS, V-Ramp, Fast
wafer curvature measurement, laser scanning Doppler vibrometry (LSDV)
 Thin film deposition and characterization techniques: photolithography,
sputtering, ALD, SEM, TEM, EDX, AES, XPS, ToF SIMS, RIE
 In depth knowledge of semiconductor devices fabrication technologies
 Software: ANSYS Workbench, MATLAB, National Instruments Vision
Builder AI, C/C++, Mathcad, SRIM, PSPICE, VHDL, Microwind and Dsch 3.0
 Documentation: Microsoft Office applications, VISIO, Nuance power pdf

Education:  PhD, University of Leoben, Austria Feb.2019 – Sept. 2023 (Expected)

 Thesis title: Material behavior of semiconductor devices during real time
operation – method development and verification
 Supervisor: Prof. Dr. Reinhard Pippan

 MSc, Chemnitz University of Technology, Germany 10/2009-10/20012

Degree Program: Micro and Nano Systems

 BSc, Military Institute of Science and Technology 03/2004-12/2008

University of Dhaka, Bangladesh
Degree Program: Electrical Electronics & Communication Engineering

Language:  Excellent written and oral communication in English ; German: A2 Level

Interests:  Football, Cycling, Cricket, Hiking, Reading