Unit 2 Architecture of 8051 Microcontroller

UNIT 2.
ARCHITECTURE OF 8051 MICROCONTROLLER : ( 16 M )
8051 microcontroller:- Block diagram
Q 1: Draw the block diagram of microcontroller 8051 (4) or Q 2: Draw the architecture of
microcontroller 8051 (4)
OR
1
SYBSC. Ele-402. Unit-2. Architecture of 8051 Microcontroller Prof. Anil Sonawane
Features of microcontroller 8051
Q.2 State the Features of microcontroller 8051 (4)
 Internal RAM of 128 bytes.
 Internal ROM / EPROM of 4 K bytes.
 4 I/O ports ( 8 bit each ).
 Two 16 bit timer/ counter T0 &T1.
 Full duplex serial data receiver/ transmitter SBUF.
 CPU with register A ( Accumulator ) & register B ( 8 bit each )
 PC & Data Pointer DPTR ( 16 bit each )
 Program Status Word ( PSW ) - ( 8 bit )
 Stack Pointer -( 8 bit )
 Four Register bank each containing 8 registers.
 16 bytes which may be addressed at any bit level.
 8 bytes of general purpose data memory.
 Control Registers TCON, TMOD, SCON, PCON, IP, IE.
 Three internal & two external interrupt sources.
 Oscillator & clock circuits.
2
Pin configuration of 8051 :
Q. Draw the Pin diagram of 8051 microcontroller (4) or Q : Explain the Pin configuration of 8051 (6).
Microcontroller 8051 is 40 pin IC available in DIP as shown in figure.
P1.0 1 + Vcc
40
P1.1 2 P0.0 ( AD 0 )
39
P1. 2 3
38 P0.1 ( AD 1 )
Port 1 P1. 3 4 P0. 2 ( AD 2 )

37
5
Pin1-8 P1. 4 36 P0. 3 ( AD 3 ) Port 0
P1. 5 6 P0. 4 ( AD 4 ) Pin 32-39

35
P1. 6 7 P0. 5 ( AD 5 )
34
P1. 7 8 P0. 6 ( AD 6 )
33
RST 9 P0. 7 ( AD 7 )
32
( RXD ) P3.0 10 EA / Vpp

31
( TXD ) P3.1 11 30 ALE / PROG

1
12
Port 3 ( INTO ) P3.2 29 PSEN
13
Pin 10-17 ( INT1 ) P3.3 28 P2.7 ( A 15 )
14
( TO ) P3.4 27 P2.6 ( A 14 )
15
( T1 ) P3.5 26 P2.5 ( A 13 )
16
( WR ) P3.6 25 P2.4 ( A 12 ) Port 2
17
( RD ) P3.5 24 P2.3 ( A 11 ) Pin 21-28
18
XTAL 2 23 P2.2 ( A 10 )
19
XTAL 1 22 P2.1 ( A 9 )
20
GND 21 P2.0 ( A 8 )
3
PIN DESCRIPTION OF 8051
Pin 1 to Pin 8 are the port 1 pins for bit 0 to bit 7 respectively.
Pin 9 : RST ; It is reset pin . It is active high input pin. Normally is at logic low level. When
logic high level is applied to this pin , 8051 resets & all the ports act as output ports. Also PC = 00 H.
Pin 10 to Pin 17 have dual functions. Pin 10 to Pin 17 act as a port 3 pins for bit 0 to bit 7 respectively.
Pin 10 : RXD ; Receive data for serial communication.
Pin 11 : TXD ; Transmit data for serial communication.
Pin 12 : INT0 ; Interrupt 0 , it is active low external hardware interrupt 0 pin.
Pin 13 : INT1 ; Interrupt 1 , it is active low external hardware interrupt 1 pin.
Pin 14 : T0 ; Timer 0 input pin ; it is timer 0 external input pin .
Pin 15 : T1 ; Timer 1 input pin ; it is timer 1 external input pin .
Pin 16 : WR ; Write Strobe ; It is active low write enable pin for memory.
Pin 17 : RD ; Read Strobe ; It is active low read enable pin for memory.
Pin 18 : XTAL 2 & Pin 19 : XTAL 1 are the crystal input pins .
Pin 20 : GND ; It is ground pin.
Pin 21 to Pin 28 : P2.0 – P2.7 / A8 – A15. Pin 21 to Pin 28 act as port 2 pins for bit 0 to bit 7
respectively. Also act as higher byte address pins for memory.
Pin 29 : PSEN , It is output pin stands for Program Store Enable. It is active low. When program
codes are stored in external ROM , PSEN pin is connected to OE ( output Enable ) pin of
external ROM.
Pin 30 : ALE / PROG : This pin has dual function.
i] ALE :- Address Latch Enable . It is active high output pin. When external memory is connected
to 8051, ALE is used for de-multiplexing the address & data by connecting it to the strobe pin of latch
( IC 74 LS 373 ) . Now port 0 acts as AD0 – AD7 for communication of address & data with external
memory.
ii] PROG :- The dual function of pin 30 is to receive Program pulse for EPROM programmer.
Pin 31 : VPP / EA : This pin has dual function
i] VPP :- During programming of EPROM the programming voltage is applied to this pin.
4
ii] EA :- External Access:- When external memory is connected to 8051 & if EA = 0 then program
code are fetched from external memory only. If EA = 0 then program code are fetched from internal
memory when (PC) are less than 1FFF H. When ( PC ) are greater than 1FFF H then program code are
fetched from external memory.
Pin 32 – Pin 39 : ( P0. 7 – P0.0 ) / ( AD7 – AD0 ) :- These pins have dual functions.
i] ( P0. 7 – P0.0 ) :- These pins act as port 0 pins for bit 7 to bit 0 respectively.
ii] ( AD7 – AD0 ) :- These pins act as address / data pins for memory.
Pin 40 : + VCC : This pin is power supply pin for 8051 & has operating voltage of + 5 V.
Q : Explain the functions of i] ALE ii] PSEN .
1] ALE :- Address Latch Enable . It is active high output pin. When external memory is connected to
8051 , ALE is used for de-multiplexing the address & data by connecting it to the strobe pin of latch (
IC 74 LS 373 ) .Now port 0 acts as AD0 – AD7 for communication of address & data with external
memory.
2] PSEN :- It is output pin stands for Program Store Enable. It is active low. When program codes are
stored in external ROM , PSEN pin is connected to OE ( output Enable ) pin of external ROM.
CPU registers :
Q : Explain the functions of following registers .
1] CPU Registers:-
i. Micro-controller 8051 contains 34 general purpose registers or working registers. Register A & B
holds results of many instructions e. g. arithmetic & logical operations of 8051 CPU.
ii. The other 32 registers are arranged a part of internal RAM in 4 register banks as B0, B1, B2, B3 each
comprises the mathematical core.
iii. Accumulator A is most versatile & used for many operations like +, -, integer multiplication &
division and Boolean bit manipulation.
iv. A is also used for data transfer between 8051 & external memory.
v. Register B is also used with register A for multiplication , division & has no other function other than
as a location where data may be stored.
5
2] PROGRAM COUNTER ( PC ) :-
i. It is 16 bit register which holds the address of byte in a memory
ii. Program instruction bytes are fetched from memory location having address in program counter.
iii. The program ROM on-chip may have address from 0000h to 0FFFh.
iv. External ROM may have address that exceeds 0FFFh.
v. The PC is automatically incremented after each instruction byte is fetched from memory.
vi. The PC may be altered by certain instructions.
vii. The PC is 16 bit register that does not have internal address.
3] DATA POINTER ( DPTR ) :-
i. Data pointer is 16 bit register made from two 8 bit registers named as DPH & DPL
ii. DPTR is used to furnish memory address for internal & external code access & external data access.
iii. DPTR is under the control of program instruction & can be specified by it’s 16 bit name.
iv. DPTR or DPH & DTL does not have internal address. DPH & DPL each are assigned address.
Q : Explain the Program Status Word ( PSW ) OR flags register
4] PROGRAM STATUS WORD ( PSW ) : -
i. Flags are 1 bit registers provided to store result of certain program instructions.
ii. Other instructions can test the conditions of flags & make decisions based on flag states.
iii. The flags are grouped inside PSW & power control registers PCON.
iv. Micro-controller 8051 contains four math flags that responds automatically to result of math
operations
v. It has three general purpose flags that can be set to 1 or reset to 0 by programmer as desired.
PROGRAM STATUS WORD ( PSW )
7 6 5 4 3 2 1 0
CY AC FO RS1 RS0 OV - P
6
Bit Symbol Function
7 CY Carry Flag ; used in arithmetic , jump, rotate & Boolean instruction
6 AC Auxiliary Carry flag ; used for BCD arithmetic.
5 FO User Flag 0
4 RS1 Register Bank Select bit 1

3 RS0 Register Bank Select bit 0
RS1 RS0
0 0 select register bank 0
2 OV Overflow Flag ; used in arithmetic instruction

1 - reserved for future use.
0 P Parity Flag ; shows parity of a ; P = 1 for odd parity
P = 0 for even parity
Special function registers

Timer / Counter
i. 8051 has two timer / counters.
ii. They can be used as timer to generate time delay using internal clock or as counter to count number of
events outside the microcontroller.
iii. Timer 0 & Timer 1 are two separate 16 bit registers.
iv. Each timer register can be accessed as two separate 8 bit register as lower byte & higher byte as TH 0
TL 0 & TH 1 TL 1
Timer 0 Register :- The 16 bit register of Timer 0 can be separately accessed as lower byte TL0 & higher
byte TH0.
7
These register can be accessed like any other register such as A , B , R0 , R1 etc.
e.g. MOV TL0 , # 4F H ; moves value of 4F H into TL0.
These registers can also be read like any other registers
e. g. MOV R5 , TH0 ; saves TH0 onto register R5.
TH 0 TL 0
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Timer 1 Register :- The 16 bit register of Timer 1 can be separately accessed as lower byte TL1 & higher
byte TH 1.
These register can be accessed like any other register such as A , B , R0 , R1 etc.
e.g. MOV TL1 , # 4F H ; moves value of 4F H into TL1.
These registers can also be read like any other registers
e. g. MOV R5 , TH 1 ; saves TH 1 onto register R5.
TH 1 TL 1
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Timer Mode Register ( TMOD )
Q . Explain the format of Timer Mode Register ( TMOD ) .
Timer 0 & Timer 1 uses same mode control register called as Timer Mode Register ( TMOD )to set
various timer operations
It is 8 bit register in which lower 4 bits are used for Timer 0 & upper 4 bits for Timer 1.
8
For Timer 1 For Timer 0
Gate C/T M1 M0 Gate C/T M1 M0
Pin Symbol Function.
7/4 Gate : Used to START or STOP Timer 1 / Timer 0 .
When Gate = 0 , Timer1 / Timer 0 Starts or stops by software using instructions
SETB TRX ( Start ) & CLR TRX ( stop ) if TR 1 / TR 0 is Set in TCON register.
When Gate =1,Timer / Counter starts only when INTX pin is high & TRX pin is Set.
6/3 C/T : When C / T = 0 , Timer 1 / Timer 0 acts as a timer to count internal clock frequency
or to generate time delay .
When C / T = 1 , Timer 1 / Timer 0 acts as a counter to count pulses from external
source at input pins P 3. 5 ( T 1 ) / P 3. 4 ( T 0 ) .
5/1 M1 : Timer / Counter operating mode select bit 1.
4/0 M0 : Timer / Counter operating mode select bit 0.
M1 M0 Mode
0 0 0
0 1 1
1 0 2
1 1 3
9
TCON register.
Q . Explain the format of TCON register.
TF 1 TR 1 TF 0 TR 0 IE 1 IT 1 IE 0 IT 0
Bit Symbol Function.
7 TF 1 : Timer 1 overflow flag
TF 1 = 1 , if Timer 1 rolls from all 1 s to 0.
TF 1 = 0 , if processor vectors to execute interrupt service routine .
6 TR 1 : Timer 1 run control bit.
Set / Cleared by software to tern Timer 1 / counter 1 On / OFF.
5 TF 0 : Timer 0 overflow flag
TF 0 = 1 , if Timer 0 rolls from all 1 s to 0.
TF 0 = 0 , if processor vectors to execute interrupt service routine .
4 TR 0 : Timer 0 run control bit.
Set / Cleared by software to tern Timer 0 / counter 0 On / OFF.
3 IE 1 : External Interrupt 1 edge flag.
Set by CPU when external interrupt edge ( - Ve ) is detected.
Cleared by CPU when interrupt is processed.
2 IT 1 : Interrupt 1 type control bit.
Set / cleared by software to specify falling edge triggered external interrupt.
1 IE 0 : External Interrupt 0 edge flag.
Set by CPU when external interrupt edge ( - Ve ) is detected.
Cleared by CPU when interrupt is processed.
0 IT 0 : Interrupt 0 type control bit.
Set / cleared by software to specify falling edge triggered external interrupt.
10
Stack and Stack Pointer (SP) : -
Q : Explain the Stack operation in 8051. OR Explain the PUSH and POP operations on Stack.
i. Stack is a area of internal RAM used to store certain op codes & take out data quickly.
ii. The register used to access the stack is called Stack Pointer ( SP ) register SP is 8 bit register.
iii. It is used by 8051 to hold an internal RAM address called as top of the stack.
iii. The SP is set to 07 h when 8051 is reset & can be changed to any internal RAM address by the
programmer.
PUSH OPERATION :-
When data is to be placed on the stack , the SP increments before storing data on the stack so that stack grows
up as data is stored. The following example illustrates the PUSU operation on the stack.
Show the stack and stack pointer for the following program.
MOV R6 , # 25 H
MOV R1 , # 12 H
MOV R4 , # 08 H
PUSH R6
PUSH R1
PUSH R4
On resetting 8051 , SP = 07H
After PUSH 6 After PUSH 1 After PUSH 4
0B 0B 0B 0B 0B
0A 0A 0A 0A 08
09 09 09 12 09 12
08 08 25 08 25 08 25
Start SP = 07 SP = 08 SP = 09 SP = 0A
11
POP OPERATION :-
i. With every POP operation , the top byte of the stack is copied to the register specified by the
instruction and then the stack pointer is decremented by one to indicate new stack top
ii. The following example illustrates the POP operation on the stack
iii. Examining the stack , show the contents of register and SP
POP 3
POP 5
POP 2
After POP 3 After POP 5 After POP 2
54
0B 0B 0B 0B 0B
0A F9 0A F9 0A 0A
09 76 09 76 09 76 09
08 6C 08 6C 08 6C 08 6C
Start SP = 0B SP = 0A SP = 09 SP = 08
Internal RAM
Q : Explain the internal RAM of 8051 with diagram .
Micro-controller 8051 contains internal RAM of 128 bytes divided into three different areas as
1] Working registers 2] Bit Addressable area 3] General Purpose area.
1] Working registers :-
i. It consists of 32 working registers organized into four register banks B0 , B1 , B2 , B3.
ii. Each register is 8 bit wide named as R0 , R1 , R2 , R3 , R4 , R5 , R6, R7.
iii. Each register is addressed by it’s name ( when it’s bank is selected ) or by it’s RAM address.
iv. The bits RS1 & RS0 in PSW determines which bank of register is currently in use at any time when
program is running.
12
iv. Register banks not selected can be used as general purpose RAM. Bank 0 is always selected on reset
of 8051.
2] Bit Addressable Area :-
i. Bit Addressable Area of internal RAM consists of 16 bytes having address from 20H to 2FH.
ii. It has 16 x 8 = 128 addressable bits .
iii. Addressable bits are useful when program needs only binary event (switching ON & OFF light)
3] A general purpose RAM area :
It is RAM area above bit addressable area having address from 30H to 7FH as addressable bytes.
7F H
Scratch pad RAM
30H
2F H
Bit Addressable RAM
20 H
1FH
Register Bank 3
Register Bank 2
Register Bank 1
Internal ROM Register Bank 0

00H
13
Q : Explain the internal ROM of 8051 with diagram .
i. Internal ROM of 8051 contains the internal program codes having address space from 0000h to
0FFFh.
ii. PC is ordinarily used to address program code bytes from address 0000h to 0FFFh.
iii. The program address higher than 0FFFh will cause 8051 automatically to fetch code bytes from
external program memory.
iv. When External Access pin ( EA pin 31 ) of 8051 is grounded , PC uses same address space from 0000h
to 0FFFh to fetch program codes from the external memory.
v. i.e. When EA = 1 , the 8051 will fetch program codes from internal ROM ; if PC contains address from
0000h to 0FFFh. And , the 8051 will fetch program codes from in external ROM ; if PC contains address
higher than 0FFFh.
vi. i.e. When EA = 0 , the 8051 will fetch program codes from external ROM , in this case PC uses
same address space from 0000h to 0FFFh & has nothing to do with the operation codes in the internal
ROM. It implies that , when EA = 0 , only external ROM is accessible.
Byte
0FFF H
4 K Byte
Internal ROM
0000 H
14
Oscillator & Clock
Q : Explain the oscillator & clock circuit used by 8051.
i. Oscillator & clock circuit generates the clock pulses that synchronizes all internal operations.
ii. XTAL1 & XTAL2 pin are provided to 8051 to connect external resonating circuit to form the
oscillator.
iii. Generally a quartz crystal & capacitors are connected to form a clock circuit as shown in figure.
8051
Crystal
XTAL1 XTAL2
C1 C2
iv. The clock circuit is designed for specific minimum & maximum frequency typically 1 MHz to 16
MHz .
v. The clock freq should be above min value to operate internal dynamic memories to avoid the loss
of data .
vi. Serial data communication needs a discrete frequency so that the basic clock rate must be divided
by internal counters to result a standard communication baud rate ( bits /sec. ).
vii. Ceramic resonators are also used but they have poor frequency stability & accuracy.
viii. Ceramic resonators are not useful in high speed serial data communication & in critical timing
operations
ix. The time required to execute the instruction is given by ,
Tinst = C x 12 / crystal frequency. Where C = no. of clock cycles for the instruction.
A 12 MHz crystal yields , C=1 for one machine cycle instruction.
Tinst = (1x12) / 12x106
1 micro second per cycle

15
External memory
Connecting external memory to 8051 :-
1. Microcontroller 8051 has internal RAM & ROM but an external RAM , ROM / EPROM can be interfaced
to 8051 .
2. Microcontroller 8051 access external ROM when EA ( External Access ) pin is grounded .
3. When EA = 1 , microcontroller 8051 can access internal ROM if PC contains the address higher than
0FFF h ( i.e. above the last address of the 4 K byte internal ROM ) .
4. If the PC contains the address less than 0FFF h , 8051 can access the internal ROM having address space
from 0000 h to 0FFF h.
5. When EA = 0 , 8051 access external ROM only & uses same address space 0000 h to 0FFF h.
6. Figure shows the external memory access. During many memory cycles , PORT 0 is time multiplexed .
7. It provides lower byte address for external memory & then acts as bidirectional data bus to read & write
memory data.
8. PORT 2 provides higher byte address for external memory during entire memory Read / Write cycle.
9. The lower byte address of the memory must be latched into external register to save the byte .
10. The address byte save is done by ALE clock pulse then PORT 0 pins act as data pins.
11. When memory access is for program code in ROM then PSEN ( Program Store Enable ) will go low to
enable ROM & place a byte of program code on the data bus.
EA PSEN CS
OE
A15 A15
PORT2 A8 A8
ALE ROM
8051 64 K Byte
Strobe
AD7 AD7 A7 A7
PORT 0 AD0 AD0 A0 A0
Latch D7 D0
16
Port 0, 1, 2, 3 & Circuits
Q. Draw port 0 circuit & explain it as Input , Output & I / O port.
Port 0 circuit :-
1. Port 0 circuit consists of D Latch , Tri State buffer TB1 to read latch bit , Tri State buffer TB2 to read
pin data and MOSFET M1 as shown in figure.
2. Port 0 circuit do not use internal pull up resistors so it allows multiplexed lower byte ADDRESS /DATA
lines for external memory interfaced using IC 74LS 373 Latch
3. Port 0 is used as I/O port.
4. ON RESET , PORT 0 acts as output port.
5. To use PORT 0 as input port , 1 must be written into port latch
6. Now Q = 1 and Q= 0 so that MOSFET M1 is off and causes the port pin to float so external pull up
resistor is necessary to use port 0 as a simple I/O port.
Read Latch Bit

TB1
D Q
Internal Bus
Pin 0 . X
Write to Latch
CLK Q
M1
M1
TB2
Read Pin data
Q. Draw port 1 circuit & explain it as Input & Output port.
Port 1 circuit :-
1. Port 1 circuit consists of D Latch , Tri State buffer TB1 to read latch bit , Tri State buffer TB2 to read
pin data and MOSFET M1 as shown in figure.
17
2. Port 1 circuit uses internal pull up resistors
3. Port 1 simply acts as a I/O port.
4. On reset , port 1 acts as a output port.
5. To use PORT 1 as input port , 1 must be written into port latch .
Read Latch Bit
TB 1 + VCC
Internal pull up resistor
Internal Bus D Q
Pin 1 . X
---
Write to Latch M 1
CLK Q
Read Pin Data TB2
Port 1 as input port :-
1. To use Port 1 pin as input , 1 must be written to the latch by program.

2. This turns MOFET OFF, the pin & input to pin buffer is pulled high by FET load.
3. When the external input is low, the external circuit can overcome high impedance pull up & drive the
pin low.
4. If the external input is high , it is left high to indicate 1 state on the pin.
5.
Q. Draw Port 2 circuit & explain it as Input & Output port .
1. Port 2 is 8 bit port used as a input & output port similar to port 1.
2. Also it is used to supply higher byte address for external memory.
3. When port 2 supplies higher byte address for external memory , it’s pins are momentarily changed by address
control signal .
4. Port 2 pins remains stable when external memory is addressed & do not turn around for data input as in case
of port 0 pins.
18
Read Latch Bit
TB 1 + VCC

D Q
Internal Bus
Pin 2 . X
CLK Q
Write to Latch M1
TB2
Read Pin Data
1. To use Port 2 pin as input, 1 must be written into the latch by program.
2. This turns FET OFF, the pin & input to pin buffer is pulled high
3. When the external input is low, the external circuit can overcome high impedance pull up & drive the
pin low.
4. If the external input is high, it is left high to indicate 1 state on the pin.
Q. Draw Port 3 circuit & explain it as Input & Output port .
1. Port 3 acts as a input & output port similar to port 1 .
2. The I / O functions can be programmed under the control of Port 3 latches & different special
function registers.
19
Read Latch Bit
TB 1 + VCC

D Q
Internal Bus
Pin 3 . X
CLK Q
Write to Latch M 1
TB2
Read Pin Data
1. To use Port 3 pin as input , 1 must be written to the latch by program.

2. This turns lower FET OFF, the pin & input to pin buffer is pulled high by FET load.
3. When the external input is low , the external circuit can overcome high impedance pull up & drive the
pin low.
4. If the external input is high , it is left high to indicate 1 state on the pin.
Port 3 as output port :-
1. To use Port 3 pin as output , the pin latches containing 1 can drive input of external circuit high through
pull up.
2. If 0 is written to latch , lower FET is ON & pull up FET is OFF and pin can drive the input of external
circuit to low.
3. Each pin of port 3 may be individually programmed as a input or output or for one of the alternate
function.
Counter & Timer
Timer Modes of operation
Q : Explain Mode 0 operation of Timer :-
1. In mode 0 , the timer 1 / timer 0 works as a 13 bit Timer / counter as shown in figure.
2. TL – TH can hold values between 0000 H to 1FFF H.
3. When timer rolls from 1FFF H to 0000 H then Timer over flow flag TF 1 / TF 0 is set to 1.
20
8 bit 5 bit over flow flag
XTAL
Oscillator
 12 TH TL TF
C/T=0 TR = 1 TF goes high when 1FFF H to 0000 H.
Steps to program Timer in mode 0 :-
1] Load TMOD register indicating which timer is to be used in mode 0 .
2] Load register TH & TL with initial values.
3] Start timer using SETB T 0 / T 1 instruction.
4] keep monitoring TF flag with JNB TFX , Target instruction to see if TF is set.
Get out of loop when TF becomes high.
5] Stop the timer using CLR TRX instruction.
6] Clear TF flag for next round.
7] Go back to step 2 & load TH & TL again.
1. In mode 1 , the timer 1 / timer 0 works as a 16 bit Timer / counter as shown in figure.
2. TL – TH can hold values between 0000 H to FFFF H.
3. When timer rolls from FFFF H to 0000 H then Timer over flow flag TF 1 / TF 0 is set to 1.
8 bit 8 bit over flow flag

XTAL
Oscillator
 12 TH TL TF
C/T=0 TR = 1 TF goes high when FFFF H to 0000 H.
21
Steps to program Timer in mode 1 :-
1] Load TMOD register indicating which timer is to be used in mode 1
2] Load register TH & TL with initial values.
3] Start timer using SETB T 0 / T 1 instruction.
4] keep monitoring TF flag with JNB TFX , Target instruction to see if TF is set.
5] Get out of loop when TF becomes high.
6] Stop the timer using CLR TRX instruction.
7] Clear TF flag for next round.
8] Go back to step 2 & load TH & TL again.
1. Mode 2 operation is 8 bit auto- reload of T / C operation.

2. THX holds the value of data which is to be reloaded into TLX each time TFX overflows.
XTAL
Oscillator
 12 TLX TFX
Interrupt
C/T=0 TR = 1 THX
8 bit.
Steps for mode 2 programming :-
T / C generate time delay using timer mode 2 operation.
1] Load TMOD register indicating which timer is selected in mode 2 operation.
2] Load THX with initial count value .
3] Start the timer.
4] Keep monitoring timer flag ( TF ) with JNB TFX , Target instruction to see whether it is raised .
22
5] Get out of loop when TFX goes high.
6] Clear TFX flag.
7] Go back to step 4 since mode 2 is auto- reload operation.
1. Timer 0 & Timer 1 can be programmed in mode 0 , 1 & 2 independently

2. Or both the timers can operate in the same mode.
3. But both the timers can not operate in mode 3 independently.
4. If mode 3 is chosen for timer 0 , placing timer 1 in mode 3 causes it to stop counting because counter bit
TR 1 & TF 1 are used by timer 0 .
5. Timer 0 in mode 3 becomes completely separate 8 bit counter & timer 1 can operate in mode 0 , mode 1
or mode 2 .
Input pulse Interrupt

TL 0 8 bit TF 0
TH 0 8 bit TF 1
f / 12 Interrupt
TR 1 bit in TCON
Serial data input/output transfers

SBUF Register (Serial Buffer Register) :-
1. SBUF is 8 bit register used for serial communication in 8051.

2. Data to be transferred serially on TXD line is loaded in SBUF register.
3. SBUF register holds the Data received on RXD line
4. SBUF register can be accessed like any other register in 8051.
SCON Register (Serial Control Register) :-
SCON Register is 8 bit register used to program the start bit, stop bit and data bits of data framing with other
things as shown.
SM0 SM1 SM2 REN TB8 RB8 TI RI
SM0 :- Serial Mode Specifier
23
SM1 :- Serial Mode Specifier
SM2 :- Used for multiprocessor communication (make it 0 )
REN :- Set or Cleared by software to enable or disable reception
TB8 :- Not widely used (make it 0 )
RB8 :- Not widely used (make it 0 )
TI :- Transmit Interrupt flag , Set by hardware at the beginning of stop bit in mode 1.
Must be cleared by software
RI :- Receive Interrupt flag , Set by hardware halfway through stop bit time in mode 1.
Must be cleared by software
Interrupts
Interrupt Enable ( IE ) Register
Q : Explain the format of Interrupt Enable ( IE ) Register.
Interrupt Enable (IE) Register is 8 bit special function register having bit format as shown .
7 6 5 4 3 2 1 0 Bit
EA -- -- ES ET1 EX1 ET0 EX0
Bit : Symbol : Function.
7 : EA : Enable Interrupt bit: : Cleared by program to disable all interrupts.
: Set by program to enable individual interrupt by their enable bit .
6 : --- : Not implemented.
4 : ES : Enable serial port interrupt : Cleared by program to disable serial port interrupt
Set by program to enable serial port interrupt.
3 : ET1 : Enable Timer 1 interrupt : Cleared by program to disable Timer 1 interrupt
Set by program to enable Timer 1 interrupt.
24
2 : EX1 : Enable External Interrupt 1 : Cleared by program to disable External interrupt 1
Set by program to enable External interrupt 1 .
1 : ET0 : Enable Timer 0 interrupt : Cleared by program to disable Timer 0 interrupt
Set by program to enable Timer 0 interrupt
0 : EX0 : Enable External Interrupt 0 : Cleared by program to disable External interrupt 0
Set by program to enable External interrupt 0
Interrupt Priority ( IP ) Register
Q : Explain the format of Interrupt Priority ( IP ) Register.
Interrupt Priority ( IP ) Register is 8 bit special function register having bit format as shown .
7 6 5 4 3 2 1 0 Bit
-- -- PT2 PS PT1 PX1 PT0 PX0
Bit : Symbol : Function.
7 : --- : Not implemented .
5 : PT2 : Priority of Timer 2 interrupt : Not applicable for 8051
4 : PS : Priority of serial port interrupt : Set / cleared by programs.
3 : PT1 : Priority of Timer 1 interrupt : Set / cleared by programs.
2 : PX1 : Priority of external interrupt 1 : Set / cleared by programs.
1 : PT0 : Priority of Timer 0 interrupt : Set / cleared by programs.
0 : PX0 : Priority of external interrupt 0 : Set / cleared by programs
25

Unit 2 Architecture of 8051 Microcontroller

Uploaded by

Document Information

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Unit 2 Architecture of 8051 Microcontroller

Uploaded by

Copyright:

Available Formats

UNIT 2.

ARCHITECTURE OF 8051 MICROCONTROLLER : ( 16 M )

8051 microcontroller:- Block diagram

Q.2 State the Features of microcontroller 8051 (4)

 Internal RAM of 128 bytes.

 Internal ROM / EPROM of 4 K bytes.

 4 I/O ports ( 8 bit each ).

 Two 16 bit timer/ counter T0 &T1.

 Full duplex serial data receiver/ transmitter SBUF.

 CPU with register A ( Accumulator ) & register B ( 8 bit each )

 PC & Data Pointer DPTR ( 16 bit each )

 Program Status Word ( PSW ) - ( 8 bit )

 Stack Pointer -( 8 bit )

 Four Register bank each containing 8 registers.

 16 bytes which may be addressed at any bit level.

 8 bytes of general purpose data memory.

 Control Registers TCON, TMOD, SCON, PCON, IP, IE.

 Three internal & two external interrupt sources.

 Oscillator & clock circuits.

Microcontroller 8051 is 40 pin IC available in DIP as shown in figure.

Port 1 P1. 3 4 P0. 2 ( AD 2 )

P1. 5 6 P0. 4 ( AD 4 ) Pin 32-39

( RXD ) P3.0 10 EA / Vpp

( TXD ) P3.1 11 30 ALE / PROG

Pin 10 : RXD ; Receive data for serial communication.

Pin 11 : TXD ; Transmit data for serial communication.

Pin 12 : INT0 ; Interrupt 0 , it is active low external hardware interrupt 0 pin.

Pin 13 : INT1 ; Interrupt 1 , it is active low external hardware interrupt 1 pin.

Pin 14 : T0 ; Timer 0 input pin ; it is timer 0 external input pin .

Pin 15 : T1 ; Timer 1 input pin ; it is timer 1 external input pin .

Pin 20 : GND ; It is ground pin.

Pin 30 : ALE / PROG : This pin has dual function.

Pin 31 : VPP / EA : This pin has dual function

Q : Explain the functions of i] ALE ii] PSEN .

i. It is 16 bit register which holds the address of byte in a memory

iv. External ROM may have address that exceeds 0FFFh.

vi. The PC may be altered by certain instructions.

3] DATA POINTER ( DPTR ) :-

Q : Explain the Program Status Word ( PSW ) OR flags register

4] PROGRAM STATUS WORD ( PSW ) : -

PROGRAM STATUS WORD ( PSW )

4 RS1 Register Bank Select bit 1

0 0 select register bank 0

0 1 select register bank 1

1 0 select register bank 2

1 1 select register bank 3

2 OV Overflow Flag ; used in arithmetic instruction

Special function registers

i. 8051 has two timer / counters.

iii. Timer 0 & Timer 1 are two separate 16 bit registers.

e.g. MOV TL0 , # 4F H ; moves value of 4F H into TL0.

These registers can also be read like any other registers

e. g. MOV R5 , TH0 ; saves TH0 onto register R5.

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

e.g. MOV TL1 , # 4F H ; moves value of 4F H into TL1.

These registers can also be read like any other registers

e. g. MOV R5 , TH 1 ; saves TH 1 onto register R5.

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Timer Mode Register ( TMOD )

Q . Explain the format of Timer Mode Register ( TMOD ) .

Gate C/T M1 M0 Gate C/T M1 M0

Pin Symbol Function.

7/4 Gate : Used to START or STOP Timer 1 / Timer 0 .

When Gate = 0 , Timer1 / Timer 0 Starts or stops by software using instructions