2564
5, MAY 2014
Improving the Reliability of Series Resonant
Inverters for Induction Heating Applications
Vicente Esteve, Member, IEEE, José Jordán, Member, IEEE, Esteban Sanchis-Kilders, Member, IEEE,
Enrique J. Dede, Member, IEEE, Enrique Maset, Member, IEEE, Juan B. Ejea, and Agustín Ferreres
Abstract—This paper analyzes a high-power (100-kW) high-
frequency (50-kHz) voltage-fed inverter with a series resonant
load circuit for industrial induction heating applications which is
characterized by a full-bridge inverter composed of isolated-gate
bipolar transistors and a new power control based on phase-shift
(PS) control. This power control circuit incorporates a load-
adaptive variable-frequency controller and automated blanking
time management in order to allow the inverter to work in zero-
voltage switching for all output power levels and load conditions.
An important improvement of the inverter reliability is achieved
by choosing an appropriate and novel switching sequence for
the PS inverter. The results are verified experimentally using a
prototype for induction hardening applications. A comparative
study between the proposed and standard PS power control will
be made.
Index Terms—Induction heating, phase-shift (PS)-modulated
inverters, resonant power conversion, zero-voltage switching
(ZVS).
I. I NTRODUCTION
I NDUCTION heating generators are resonant inverters in
which the resonant tank is formed by the heating coil and
a capacitor in a series resonant inverter (SRI) [1] or in a parallel
resonant inverter (PRI) [2]. They are used to heat metals to be
welded, melted, or hardened. The use of SRIs that are fed with
a voltage source represents a cost-effective solution. In order
to regulate the output power, using a diode bridge rectifier as
a dc voltage source, inverters with power control by frequency
(FC) [3], phase-shift (PS) variation [4], [5], or pulse density
modulation (PDM) [6], [7] are normally used.
These power control schemes, however, may result in an
increase of switching losses and electromagnetic noise because
it is impossible for switching devices to be always turned on and
off under zero-current condition. Therefore, in high-frequency
induction heating applications, only MOSFET inverters can be
used. Nevertheless, isolated-gate bipolar transistors (IGBTs)
are preferred in high-power industrial applications (availability,
cost, etc.), and it will only be possible if a low-loss power
control scheme is found. Induction heating applications, par-
Manuscript received December 3, 2012; revised March 8, 2013 and May 2,
2013; accepted June 24, 2013. Date of publication August 15, 2013; date of
current version October 18, 2013.
V. Esteve, J. Jordán, E. Sanchis-Kilders, E. Maset, J. B. Ejea, and A. Ferreres
are with the Department of Electronic Engineering, Universitat de València,
46100 Valencia, Spain (e-mail: vesteveg@uv.es).
E. J. Dede is with the Department of Electronic Engineering, Universitat de
València, 46100 Valencia, Spain, and also with GH Electrotermia S.A., 46184
Valencia, Spain.
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TIE.2013.2278509
0278-0046 © 2013 IEEE
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO.
ticularly induction hardening, are repetitive processes with
relatively low periods. This means that an induction heating
inverter can make several cycles per minute. Under these con-
ditions, the IGBT power cycling capability is one of the most
important reliability items that relates directly to the lifetime
of the inverter. Since the failure mechanism depends on the
IGBT ΔTj , we can improve the inverter reliability reducing the
transistor losses or improving the thermal management [8].
This paper describes an induction heating system of 100 kW
and 50 kHz for industrial applications, which uses a novel
control scheme based on a PS IGBT full-bridge SRI that allows
us to improve its reliability significantly by increasing the
lifetime of the IGBTs. To achieve this, the inverter should
always perform zero-voltage switching (ZVS) operation and
the impact of the turn-off switching losses in the temperature
increase of the IGBT junction should be as low as possible. The
inverter working frequency is automatically adjusted close to
the resonance frequency in order to allow a quasi-zero-current
switching inverter operation of one leg of the inverter for any
load condition. The blanking time of the inverter transistors is
designed to maintain ZVS mode [7]. Additionally, an appropri-
ate switching sequence for the PS control of the inverter allows
the reduction of the ΔTj of the IGBTs of the other leg of the
inverter.
This paper is organized as follows. Section II shows the
configuration of the inverter, and Section III analyzes the basic
operation and main parameters of the inverter. Section IV
describes the new inverter switching sequence and the con-
trol strategy and gives relevant simulation results. Section V
validates the simulation results using experimental data, and
Section VI makes a comparative study between the proposed
and the standard PS power control. Finally, the conclusions are
drawn.
II. S YSTEM C ONFIGURATION
Fig. 1 shows the typical system configuration of a series
converter for induction heating. The output power stage consists
of a single-phase voltage-source full-bridge inverter using four
IGBT modules. The output of the inverter is connected to
a series resonant circuit composed of CL and the induction
heating loads (heating coil and workpiece) that can be modeled
by means of a series combination of its equivalent resistance
RL and inductance LL [9]. The matching transformer T1 adapts
the impedance of the load circuit. Cd is the dc-link capacitor,
and Cs is an ac coupling capacitor. The dc power supply for
the inverter is a three-phase diode bridge rectifier connected to
ESTEVE et al.: IMPROVING THE RELIABILITY OF SRIs FOR INDUCTION HEATING APPLICATIONS 2565

each leg of the bridge are turned on and off approximately

(except the blank time) 180◦ out of phase. It operates above
resonance, and the load current io lags the quasi-square wave
voltage vo , as shown in Fig. 3. Free-wheeling diodes conduct
current after CS is discharged. During this diode conduction
period, the IGBTs can be turned on at zero voltage Q1 and Q2
are the main leg transistors of the inverter that switch on and off
near to the zero crossing of the output current. The output power
Fig. 1. System configuration. of the inverter is regulated by varying the PS between switches
Q1 and Q3 (or Q2 and Q4 ). The resulting voltage across the
resonant circuit is a quasi-square wave clamped at zero during
the time corresponding to the PS φ. The power module current
(diode and transistor) of the main leg and the phase-shifted leg
are iQD1 and iQD3 , respectively. Note that only iQD3 presents a
high value of the switching current IC (collector current being
turned off).
We call vo the voltage between points a and b (Fig. 2).
Fig. 2. Schematic diagram of the inverter. It represents the output voltage of the inverter, and v1 is its
corresponding first harmonic whose amplitude is
4Vd ϕ
V1 = cos (1)
π 2
where Vd is the average value of the dc-link voltage.
The phase between the output current and output voltage
and, hence, the phase of the resonant circuit impedance at the
working frequency is α, and the module of this impedance can
be expressed by
 
 1  R

|Z(jω)| = R + jLω + = . (2)
jCω  cos α

As the value of α is approximately equal to φ/2, then the

amplitude of the output current is given by
4Vd ϕ
Io = cos2 . (3)
πR 2
Therefore, the output power is
Fig. 3. Simplified output voltage and current waveforms.  2
Io 8V 2 ϕ
P = √ R = 2 d cos4 . (4)
the 400-V 50-Hz power line through the inductances Ld . The 2 π R 2
working frequency is 50 kHz, the maximum rms value of the
output voltage is 450 V, and the maximum output power is The phase portion β, where the output voltage is increasing
100 kW. The values of the main components of the circuit are from zero to positive and the output current is negative, is
shown in Fig. 1. essential to determine the ZVS operation. A mathematical
expression for the minimum values of β required to achieve
ZVS is obtained from the following charge analysis [6]: The
III. A NALYSIS OF THE I NVERTER current in the resonant circuit must be large enough to change
Fig. 2 shows the idealized schematic diagram of the inverter the voltage in the switching capacitor CS up to Vd (or −Vd )
circuit where the transformer T1 has been removed and, hence, in the time βmin /ω just before the output current crosses zero.
the impedances have been transformed by the turns ratio n1 . From these charge relations, βmin can be calculated as
Q1 –Q4 and D1 –D4 are, respectively, the IBGT transistors and  
−1 2ωo CS Vd
the free-wheeling diodes that compose each power module. βmin = cos 1− . (5)
I
C1 –C4 represent the equivalent capacitance of the inverter
switches, including the snubbing capacitor and the output ca- The phase βmin determines the minimum blank time between
pacitance of the IGBTs. We will suppose that all these capaci- the transistors of the main leg of the inverter. The blank time
tances have the same value CS . must be calculated continuously using (5) with enough safety
The simplified output voltage and current waveforms of the margin. In practice, we adjust β = 1.1βmin .
inverter are represented in Fig. 3. The four transistors Q1 –Q4 On the other hand, the PS regulation implies a change of
are operated with almost a 50% duty cycle. The switches in switching frequency ω above the resonant frequency ωo as a
2566 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 5, MAY 2014

function of PS angle, as shown in the following [7]:


tan ϕ2 + tan2 ϕ2 + 4Q2
ω = ω0 (6)
2Q
where Q is the quality factor of the series resonant circuit
1 Lωo
ωo = √ Q= . (7)
LC R
We can calculate the conduction losses of the transistor and
the diodes of the inverter using a linear approximation of its
direct characteristic. This means that the relations between the Fig. 4. Power losses of the transistor of the inverter versus output power.
device drop voltage and current (vF and iF for the diode and
vCE and iC for the transistor) are The switching current of the inverter transistor IC is
4Vd ϕ
v F = k 1 iF + k 2 and vCE = k3 iC + k4 . (8) IC = cos2 sin δ (13)
πR 2
For the power device used in our inverter, the values of the where δ is equal to β for the transistors of the main leg of the
constants are inverter and δ is equal to φ for the transistors of the other leg.
k1 = 0.0017 Ω Fig. 4 shows the results of the calculation of the conduction
and switching losses for one of the four IGBT transistors of the
k2 = 0.8 V inverter obtained by (10) and (12).
k3 = 0.004 Ω PCQ1Q2 represents the conduction power losses of one of the
transistors of the main leg (Q1 or Q2 ), PCQ3Q4 represents the
k4 = 1.6 V. conduction power losses of one of the transistors of the phase-
shifted leg (Q3 or Q4 ), PSQ1Q2 represents the switching power
Under these conditions, we can obtain the conduction power
losses of one of the transistors of the main leg (Q1 or Q2 ), and
losses of the diode as
    PSQ3Q4 represents the switching power losses of one of the
Io Io sin 2δ transistors of the phase-shifted leg (Q3 or Q4 ). Note that the
PCD = k1 δ− + k2 (1 − cos δ) (9)
2π 2 2 power switching losses of these last transistors, calculated by
(12), increase when the output power regulation decreases due
and transistor conduction losses can be expressed as to two factors: the increase of the switching current IC given by
    (13) and the increase of the working frequency given by (6).
Io Io sin 2δ
PCT = k3 π−δ+ + k4 (1 + cos δ) (10)
2π 2 2
where δ is equal to β for the transistors of the main leg of the IV. S WITCHING S EQUENCE AND C ONTROL S TRATEGY
inverter and δ is equal to φ for the transistors of the other leg. The results that are shown in Fig. 4 are the key for the
Switching losses must be also computed. Considering that development of the new PS inverter switching sequence that
there are no significant losses in the switching process of the is presented in this paper. For full output power regulation, the
diodes and that the ZVS operation of the transistor is allowed, switching and conduction losses are the same in both legs of
the only switching losses correspond to the turn-off of the the inverter. This situation can be considered the optimum for
IGBTs. In this situation, the switching losses can be calculated standard PS full-bridge inverters. In other circumstances, for
by the following: instance, at 60% of the full power, the switching losses in the leg
composed by Q3 and Q4 increase dangerously. For industrial
PST = f Eoff (11) applications like induction heating, the required output power
of the converter is usually below 100% in order to increase
where f is the inverter switching frequency and Eoff denotes
the reliability of the whole installation. This situation is very
the turn-off energy losses of the IGBT. The manufacturer of the
bad for an IGBT PS inverter because, for a standard thermal
transistor gives in the data sheets of the device the characteristic
management, the temperature of the junction of Q3 and Q4
curve of Eoff as a function of the switching current IC . If
will increase substantially, and therefore, the problems of low-
we linearize this curve, we can give a simple expression for
power cycling capacity will appear.
calculating the switching power losses
The problem would be solved if we allocate losses equally
PST = f (k5 IC + k6 ) (12) between the two arms of the inverter. Thus, the total power
losses of the inverter do not change but the maximum junction
where, for our transistor, the constants are temperature of the IGBTs will decrease. In fact, through this
strategy, it will raise the temperature of the main leg transistors,
k5 = 0.0664 V · s
and it will lower the temperature of the other leg until they are
k6 = 1.75 W · s. equal for any output power regulation status. To achieve this
ESTEVE et al.: IMPROVING THE RELIABILITY OF SRIs FOR INDUCTION HEATING APPLICATIONS
Fig. 5. Complete switching sequence of the modified PS inverter.
solution, we must extend the switching cycle of the standard PS
inverter so that the main branch will be alternately formed by
Q1 and Q2 in one cycle and Q3 and Q4 in the next cycle.
Fig. 5 shows the complete switching sequence of the mod-
ified PS inverter organized in four columns. The top of each
column shows the simulated waveforms of the output voltage
vo and the output current io of the inverter and the four trigger
signals of the gates of the IGBT transistors vg1 −vg4 . The
steps of the switching sequence are identified by numbers. The
inverter schematics corresponding to each step are shown in
the lower portion of the figure. The current-carrying devices
are drawn with solid lines, and the voltage-blocking devices
are drawn with dotted lines. The direction of the current and
the voltage polarity obtained at the end of each step has been
expressed with arrows and ± signs. The first full period of the
oscillation corresponds to the first two columns on the left of
2567
Fig. 5. Here, the transistors that have larger switching current
are Q3 and Q4 , while the switching of Q1 and Q2 is relatively
soft. The second period corresponds to the two columns on the
right of the figure.
Now, the switching are softer in Q3 and Q4 , and most of the
losses are in Q1 and Q4 . Since the time of these cycles is much
smaller than the thermal time constant of the transistor modules,
the temperatures reached will be the same for all transistors.
Fig. 6 shows the switching sequence for the full output power
regulation. Note that, now, the conditions in the first and second
periods of the oscillation are the same; therefore, the work of
modified and standard PS inverters is the same.
The control circuit designed to implement this modified
PS inverter is a load-adaptive variable-frequency system [11],
[12], [15] that must be able to perform ZVS under all operat-
ing conditions and generate the switching sequence discussed
2568 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 5, MAY 2014
Fig. 6. Switching sequence for full output power regulation.
earlier. Fig. 7 shows the block diagram of the proposed control
circuit. Since the phase detector and the voltage-controlled
oscillator (VCO) act like a phase-locked loop, the signal Q
will be in phase with the inverter output current io . This square
signal determines the rising slope of the trigger signal of the
inverter main leg transistors and therefore defines its turn-on
switching.
The delay block is used to advance this turn-on switching
with respect to the zero cross of the inverter current such as that
represented in steps 5, 10, 15, and 20 of Fig. 5 or steps 3 and 6
of Fig. 6.
The signal φ inputs the PS modulator to generate the signal
that defines the turn-on switching of the phase-shifted leg
transistors of the inverter.
The blanking time indicates the time interval between the
turn-off and turn-on switching of the transistors of the same
leg. The blanking time control circuit generates the signal that
references the turn-off switching of all transistors of the inverter
taking into account the calculation of (5) in order to achieve
ZVS operation such as that represented in steps 4, 9, 14, and
19 of Fig. 5 or steps 2 and 5 of Fig. 6. Analog circuits like
a summer, a divider, a limiter, a peak detector, an arccosine
calculator, and an amplifier carry out this calculation.
The value of the switching frequency is obtained from the
input of the VCO (supposing that it has enough linearity).
The values of the voltage of the dc link Vd and the equivalent
output transistor capacitance CS are included in the adjustment
of the amplifier gain.
The logic circuit collects all these signals to generate the
trigger signals that need a standard PS inverter.
Finally, the block named “sequence generator” is responsible
for distributing adequately the drive signals vg1 −vg4 to the
corresponding transistors according to the switching sequence
of the modified PS inverter. This means that, for one whole
cycle, the transistor gate signals of the main inverter leg came
from the VCO block and the signal of the phase-shifted leg
transistors came from the PS modulator. In the next cycle, the
origin of the trigger signals are interchanged automatically.
V. E XPERIMENTAL R ESULTS
The prototype described in Section III is tested in order to
meet the industrial application requests. The four IGBTs of the
inverter (Eupec FZ600R12KS4) are rated at 1200 V and 600 A.
Tests made with this prototype allow us to make the validation
of the calculations and simulations and a comparative study be-
tween the proposed modified PS inverter and the standard one.
The inverter is fed by 540 V which is the average value of
the output voltage of a noncontrolled rectifier connected to the
three-phase 400-V 50-Hz utility power system used in Europe.
The maximum peak amplitude of the output current is rated
to 300 A. The experimental values of the components of the
output circuit are as follows: LL = 1.5 μH, CL = 6.7 μF, and
n1 = 7 : 1 (the turns ratio of T1). The value of LL includes the
inductance of the corresponding inductor and its connections
to the rest of the circuit. For long time tests, a water-cooled
dummy load is used. The equivalent resistance of the load is
47 mΩ. This load configuration represents a quality factor of
approximately ten which remained constant during all the tests.
The experimental resonant frequency of the output circuit was
50.2 kHz. The control circuit set automatically the switching
frequency between 50.5 and 60.5 kHz depending on the output
power regulation.
A photograph of the experimental implementation of the
inverter is shown in Fig. 8. The red rectangles marked with
letter “A” represent the four IGBT modules, “B” and “C”
indicate the position of the dc-link and ac coupling capacitors,
respectively, and “D” shows the position of the snubbing ca-
pacitors. In this implementation, the equivalent capacitance of
each inverter switch CS , including the snubbing capacitor and
the output capacitance of the IGBT, is approximately 10 nF.
The thermal management of the IGBT modules was carried out
by using water-cooled heat sinks. The experimentally measured
thermal resistance from the transistor junction to the water
(ambient) is RthJA = 0.05 K/W. For all power measurements,
a calorimetric method was used [13].
Fig. 9 shows the experimental waveforms of the modified PS
inverter output vo and the current of the diode and the transistors
of the main leg iQD1 and the phase-shifted leg iQD3 for full
output power (100 kW approximately) with a frequency of
50.5 kHz. In this case, the modified and the standard PS inverter
have the same behavior.
Fig. 10 shows the same waveforms of Fig. 9 for 50% of
the output power (50 kW approximately) with a frequency of
52.2 kHz. Note that the hard turn-off commutations are alterna-
tively present in both legs of the inverter.
Compare this waveform with that shown in Fig. 11 where
the inverter works like a standard PS control. Now, the hard
ESTEVE et al.: IMPROVING THE RELIABILITY OF SRIs FOR INDUCTION HEATING APPLICATIONS
Fig. 7. Simplified diagram of the control stage.
Fig. 8. Inverter view of the equipment under test.
Fig. 9. Experimental waveforms of vo (CH1), iQD1 (CH2), and iQD3 (CH2)
of the modified PS inverter for full output power. (CH1: 500 V/div; CH2 and
CH3: 200 A/div; time: 10 μs/div).
turn-off commutations are present only in the leg of Q3 and
D3 (CH3).
Figs. 12 and 13 show the details of the experimental voltage
and current waveforms at the output of the inverter where it
2569
Fig. 10. Experimental waveforms of vo (CH1), iQD1 (CH2), and iQD3
(CH2) of the modified PS inverter for 50% of the output power. (CH1:
500 V/div; CH2 and CH3: 200 A/div; time: 10 μs/div).
Fig. 11. Experimental waveforms of vo (CH1), iQD1 (CH2), and iQD3
(CH2) of the standard PS inverter for 50% of the output power. (CH1:
500 V/div; CH2 and CH3: 200 A/div; time: 10 μs/div).
is possible to observe that ZVS operation is fulfilled. Fig. 12
shows the switching process for full output power regulation
and validates the simulation in Fig. 6. Fig. 13 shows the same
experimental waveforms for 50% of the output power and
validates the results presented in Fig. 5.
Fig. 14 plots the results of the calculation of the conduction
losses PCQ and switching losses PSQ for one of the four
IGBT transistors located in any leg of the modified PS inverter
obtained by (10) and (12) which we can compare with Fig. 4 in
order to quantify the obtained improvement.
2570
Fig. 12. Experimental waveforms of vo (CH1) and io (CH2) for 100% of the
output power. (CH1: 200 V/div; CH2: 100 A/div; time: 500 ns/div).
Fig. 13. Experimental waveforms of vo (CH1) and io (CH2) for 50% of the
output power. (CH1: 200 V/div; CH2: 100 A/div; time: 500 ns/div).
Fig. 14. Power losses of the transistor of the modified PS inverter versus
output power.
VI. C OMPARATIVE S TUDY
This section shows the significant impact of the results
obtained using the modified PS inverter on the reliability of
the system compared with those obtained using standard PS
control. Fig. 15 illustrates, in the left vertical axis, the the-
oretical and experimental values of the power losses of one
of the four modules used in the inverter as a function of the
output power. As the experimental points were obtained using
the calorimetric method applied to each power module, it is
only possible to measure the sum of the losses of the diode
and the transistor included in each module. Since diode losses
are significantly lower than transistor losses, it is possible to
neglect them and assume that the experimental points obtained
represent approximately the IGBT losses.
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 5, MAY 2014
Fig. 15. Theoretical and experimental power losses and the increase of the
junction temperature of a transistor of the (green) main leg and (blue) phase-
shifted leg of the standard PS inverter and (red) of any transistor in the modified
PS inverter versus output power.
Fig. 16. Expected power cycling capability and expected lifetime
(1.267 million cycles per year) of (blue) the standard and (red) modified PS
inverters.
The green and blue traces represent the power losses of the
IGBTs of the main and phase-shifted legs, respectively, in a
standard PS inverter. The red trace indicates the losses of a
transistor of any leg of the modified PS inverter. Experimental
points are marked with squares and triangles. In the right
vertical axis are the calculated increase of temperature ΔTj of
the IGBT junction with RthJA = 0.05 K/W.
In order to know the impact of this result in the reliability
of the inverter, we need to move these data to the “power
cycling curve” of the IGBT’s manufacturer [14]. This curve
indicates the expected number of on–off cycles of the device as
a function of its junction temperature swing. Taking these data
for industrial modules based on IGBT4 working with Tjmax less
than 100 ◦ C makes it possible for us to draw Fig. 16, which
shows, in the left axis, the power capability of a transistor of
the standard PS inverter (blues trace) and of the modified PS
inverter (red trace) as a function of the output power. Note that
the minimum for the standard PS inverter is around 2 million
cycles and that for the modified PS inverter is almost ten times
bigger.
In order to clarify this phenomenon, we can imagine an
industrial induction heating application where four pieces per
minute are treated. This means that after a year, there have
been over 1.27 million cycles. According to this specification,
the right axis in Fig. 16 indicates the lifetime of the two types
of inverters. If the output power is around 60%, the expected
lifetime of the standard PS inverter is less than 20 months but
the modified PS inverter will still be working after 14 years.
ESTEVE et al.: IMPROVING THE RELIABILITY OF SRIs FOR INDUCTION HEATING APPLICATIONS
VII. C ONCLUSION
The purpose of this work was the development of an IGBT
PS full-bridge inverter of 100 kW and 50 kHz where the
switching sequence was modified in order to improve its reli-
ability in industrial applications like induction heating where
a large number of cycles are required. The modified PS in-
verter is a cost-effective solution that incorporates the following
improvements.
1) The output power is regulated by varying the PS between
the switches that compose the legs of the inverter.
2) The control circuit was designed to perform ZVS under
all operating conditions.
3) The increment of temperature of the IGBT’s junctions
was minimized by the use of a novel switching sequence
of the transistors.
4) The power cycling capability of the inverter was sig-
nificantly improved in comparison with the standard PS
inverter.
5) The lifetime of the inverter can be incremented for ap-
plications of a large number of cycles like induction
hardening and others.
Comparing the experimental and simulated results, the valid-
ity of the proposed inverter has been demonstrated.
R EFERENCES
[1] S. Faucher, F. Forest, J.-Y. Gaspard, J.-J. Huselstein, C. Joubert, and
D. Montloup, “Frequency-synchronized resonant converters for the sup-
ply of multiwinding coils in induction cooking appliances,” IEEE Trans.
Ind. Electron., vol. 54, no. 1, pp. 441–452, Feb. 2007.
[2] A. Shenkman, B. Axelrod, and V. Chudnovsky, “Assuring continuous
input current using a smoothing reactor in a thyristor frequency converter
for induction metal melting and heating applications,” IEEE Trans. Ind.
Electron., vol. 48, no. 6, pp. 1290–1292, Dec. 2001.
[3] L. A. Barragán, D. Navarro, J. Acero, I. Urriza, and J. M. Burdío, “FPGA
implementation of a switching frequency modulation circuit for EMI
reduction in resonant inverters for induction heating appliances,” IEEE
Trans. Ind. Electron., vol. 55, no. 1, pp. 11–20, Jan. 2008.
[4] H. Sarnago, O. Lucia, A. Mediano, and J. M. Burdio, “Modulation scheme
for improved operation of an RB-IGBT-based resonant inverter applied to
domestic induction heating,” IEEE Trans. Ind. Electron., vol. 60, no. 5,
pp. 2066–2073, May 2013.
[5] C. A. F. Ferreira and B. V. Borges, “Sine-wave amplitude-modulation con-
cept for linear behavior of phase-modulated resonant converters,” IEEE
Trans. Ind. Electron., vol. 60, no. 5, pp. 2074–2083, May 2013.
[6] V. Esteve, E. Sanchis-Kilders, J. Jordan, E. J. Dede, C. Cases, E. Maset,
J. B. Ejea, and A. Ferreres, “Improving the efficiency of IGBT series-
resonant inverters using pulse density modulation,” IEEE Trans. Ind.
Electron., vol. 58, no. 3, pp. 979–987, Mar. 2011.
[7] H. Fujita and H. Akagi, “Pulse-density-modulated power control of a
4 kW 450 kHz voltage-source inverter for induction melting applications,”
IEEE Trans. Ind. Appl., vol. 32, no. 2, pp. 279–286, Mar./Apr. 1996.
[8] A. Morozumi, K. Yamada, T. Miyasaka, S. Sumi, and Y. Seki, “Reliability
of power cycling for IGBT power semiconductor modules,” IEEE Trans.
Ind. Appl., vol. 39, no. 3, pp. 665–671, May/Jun. 2003.
[9] J. Acero, O. Lucia, I. Millan, L. A. Barragan, J. M. Burdio, and R. Alonso,
“Identification of the material properties used in domestic induction heat-
ing appliances for system-level simulation and design purposes,” in Proc.
APEC, 2010, pp. 439–443.
[10] S. Chudjuarjeen, A. Sangswang, and C. Koompai, “An improved LLC
resonant inverter for induction-heating applications with asymmetrical
control,” IEEE Trans. Ind. Electron., vol. 58, no. 7, pp. 2915–2925,
Jul. 2011.
[11] Y.-K. Lo, C.-Y. Lin, M.-T. Hsieh, and C.-Y. Lin, “Phase-shifted full-bridge
series-resonant DC–DC converters for wide load variations,” IEEE Trans.
Ind. Electron., vol. 58, no. 6, pp. 2572–2575, Jun. 2011.
2571
[12] O. Lucia, J. M. Burdio, L. A. Barragan, C. Carretero, and J. Acero,
“Series resonant multiinverter with discontinuous-mode control for im-
proved light-load operation,” IEEE Trans. Ind. Electron., vol. 58, no. 11,
pp. 5163–5171, Nov. 2011.
[13] X. Sun and M. Cheng, “Thermal analysis and cooling system design of
dual mechanical port machine for wind power application,” IEEE Trans.
Ind. Electron., vol. 60, no. 5, pp. 1724–1733, May 2013.
[14] M. Schulz, “Designed to last—Electrical and thermal aspects in power
electronic designs,” in Proc. IEEE ICIT, 2013, pp. 499–502.
[15] H. P. Ngoc, H. Fujita, K. Ozaki, and N. Uchida, “Phase angle control of
high-frequency resonant currents in a multiple inverter system for zone-
control induction heating,” IEEE Trans Power Electron., vol. 26, no. 11,
pp. 3357–3366, Nov. 2011.
Vicente Esteve (M’03) was born in Valencia, Spain,
in 1961. He received the M.Sc. and Ph.D. degrees
from the University of Valencia, Valencia, Spain, in
1986 and 1999, respectively.
He joined the Electronic Engineering Department,
University of Valencia, where he is currently an
Associate Professor. His research activities include
high-frequency rectifiers and inverters for indus-
try applications, high-power inverters for induction
heating, and electronic instrumentation. He is a Con-
sultant to several electronic companies in the field of
power supplies and advanced topologies.
José Jordán (M’08) was born in 1964. He received
the M.Sc. degree in physics with specialization in
electronics and the Ph.D. degree in electronics en-
gineering from the University of Valencia, Valencia,
Spain, in 1989 and 2003, respectively.
He is currently an Assistant Professor with the
University of Valencia, where his activities are fo-
cused on the design of high-frequency and high-
power converters.
Esteban Sanchis-Kilders (M’00) was born in
Valencia, Spain, on January 2, 1967. He received
the M.Sc. degree in physics, with specialization in
electronics, and the Ph.D. degree from the University
of Valencia, Valencia, in 1990 and 1997, respectively.
His employment experience includes one year
with GH Industrial S.A., two years in the Power Con-
ditioning Section, European Space Agency, Noord-
wijk, The Netherlands, and five years as an Assistant
Professor with the University of Valencia, where he
is currently an Associate Professor.
Enrique J. Dede (M’95) received the Ph.D. de-
gree in electronics from the University of Valencia,
Valencia, Spain.
He is a Full Professor of Power Electronics with
the University of Valencia and the R&D Director of
GH Electrotermia S.A., Valencia.
Dr. Dede is a Member of the European Working
Group of the IEEE Industry Applications Society and
the International Advisory Board of PCIM—Europe
and China, the Past President of the Spanish Joint
Chapter of the IEEE Power Electronics and IEEE
Industrial Electronics Societies, the Vice President of the EPE Association, and
the General Chair of EPE 2009 held in Barcelona, Spain.
2572 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 5, MAY 2014

Enrique Maset (M’00) was born in Xàtiva, Spain,
in October 1965. He received the M.Sc. and Ph.D.
degrees in physics from the University of Valencia,
Valencia, in 1988 and 1993, respectively.
He is currently an Associate Professor with the
Electronic Engineering Department, University of
Valencia, where he belongs to the Laboratory of
Industrial Electronics and Instrumentation. His main
research areas are space power systems and high-
frequency and soft-switching conversion techniques
for industrial applications.
Agustín Ferreres was born in Sant Mateu,
Castellón, Spain, on November 26, 1963. He re-
ceived the M.Sc. degree in physics and the Ph.D.
degree in electronics engineering from the University
of Valencia, Valencia, Spain, in 1993 and 1999,
respectively.
For two years, he was a Power Electronics Re-
searcher with the R&D Department, GH Industrial.
In 1995, he joined the Laboratory of Industrial Elec-
tronics and Instrumentation, University of Valencia,
where he is currently an Associate Professor.

Juan B. Ejea was born in Xàtiva, Spain, on June 27,

1969. He received the M.Sc. degree in physics, with
specialization in electronics, and the Ph.D. degree
in electronics engineering from the University of
Valencia, Valencia, in 1993 and 2000, respectively.
His employment experience includes two years
with GH Industrial S.A. and two years in the Power
Section, European Laboratory for Particle Physics,
CERN, Geneva, Switzerland. Currently, he is an
Associate Professor with the University of Valencia.