Project 4

4-bit Adder-Subtractor

Objectives:
 Learn the concept of hierarchical design
 Implement and simulate the 1-bit adder, 4-bit adder-subtractor and test its performance

What to do?
In this project, we will build a circuit to do adding and subtraction of 4-bit numbers and display the result.

Part One: One-bit Full adder

Describe your circuits using Verilog HDL code

As shown in the following code, we can use the module name FullAdd to describe the 1-bit full adder used in the circuit.
This module can be directly used to build the 4-bit adder. As shown in the following code, we can use the module name
FullAdd to describe the 1-bit full adder used in the circuit.

Cin

A
Sum
B FA

Cout

Figure 1. 1-bit Full Adder

a) Now, we are ready to do pin assignment for implementation.

b) Simulate your 1-bit full adder

Part 1 Screenshots

1
2
Part Two: 4-bit Full adder
We can see that for the 1st 1-bit FullAdd, Cin is 0. For the rest of the 1-bit FullAdd, their Cin is the carryout from the
previous FullAdd (just as shown in Figure 2).

3
 Figure 2. Build 4-bit adder using 1-bit FA

Here is the complete Verilog code to describe the 4-bit adder:

a) Now, we are ready to do pin assignment for implementation.

b) Simulate your 4-bit Adder

Part 2 Screenshot

4
5
6
Part Three: Simulate your 4-bit Adder-Subtractor
Write the Verilog Code to describe the 4-bit Adder/Subtractor based on the circuit learned in class (check your notes). You
can call the module AddSub as shown below.(For subtractor use 2’s complement).

7
8
 Figure 3. Build 4-bit adder-Subtractor using 1-bit FA

The inputs of the circuit are x, y, and select.

Using the method from Project 2, you can provide different input values in the test bench code to test your circuit. A 200
ns delay is required between each input change.
For example we can add 4 + 3 using this code:

Note that initially x and y have 0’s in each of their 4 bits, so we only have to modify a single bit in x and 2 bits in y to
change their values to 4 and 3, respectively. We also could have directly set x and y to 4 and 3 using this code:

9
You can try a few simple values to make sure that your design works. To run simulation, first save your testbench (you
shall see a “test” showing up in the source window once you save the test bench). Highlight the test in the source window,
then click on Simulator  Simulate Behavioral model, you should see the simulation results showing up.

a) Now, we are ready to do pin assignment for implementation.

b) Simulate your 4-bit adder-subtractor

Part 3 Screenshot

10
11
12
 In-Class Project 4 – Worksheet: 4-bit Adder-Subtractor

Student Name______Kendrick Seumen___________________ Student CIN___________029857098___________

1. Copy your Verilog HDL code to describe your 4-bit Adder-subtractor

module AddSub(
input [3:0] x,
input [3:0] y,
input Select,
output [3:0] Result,
output Cout
);

xor (y0_Out, Select, y[0]);

xor (y1_Out, Select, y[1]);
xor (y2_Out, Select, y[2]);
xor (y3_Out, Select, y[3]);

FullAdd u1 (x[0] , y0_Out, Select, C0, Result[0]);

FullAdd u2 (x[1] , y1_Out, C0, C1, Result[1]);
FullAdd u3 (x[2] , y2_Out, C1, C2, Result[2]);
FullAdd u4 (x[3] , y3_Out, C2, Cout, Result[3]);

endmodule

module AddSubSim(

);
reg [3:0]x, y;
reg Select;
wire [3:0]Result;
wire Cout;

AddSub uut (x[3:0], y[3:0], Select, Result[3:0], Cout);

13
 initial begin
x=0; y=1; Select =0; #100;
x=5; y=9; Select=0 ; #100;
x=7; y=8; Select=0 ; #100;
x=1; y=0; Select=1; #100;
x=9; y=9; Select=1; #100;
x=1; y=2; Select=1; #100;
end
endmodule

2. Record the simulation results of 4-bit Adder-Subtractor

 Adder (select = 0)
test case: 0 + 1; 5+9; 7+8;
 Subtractor (select = 1)
Test case: 1-0; 9-9; 1-2;

Select x y X[3:0] Y[3:0] Result [3:0] Result (Hex) Cout

(binary) (binary) (binary)
0 0 1 0000 0001 0001 1 0
0 5 9 0101 1001 1110 E 0
0 7 8 0111 1000 1111 F 0
1 1 0 0001 0000 0001 1 1
1 9 9 1001 1001 0000 0 1
1 1 2 0001 0010 1111 F 0

3. Copy and Paste your simulation result waveform here.

14
 In-Class Project 4 – Worksheet 2: 4-bit Adder-Subtractor

(Board Testing) Play with your board to record the following calculation result:

15
Select X y Displayed result Cout Correct or not? (judge if there is
overflow if x and y are signed
numbers)
0 0 1 1(0001) 0 Correct, No overflow

0 2 3 0101 (5) 0 Correct, No overflow

0 5 7 1100 (12) or (C) 0 Correct, No overflow

0 7 A 0001(1) 1 Incorrect, Overflow Occurred

0 A B 0101(5) 1 Incorrect, Overflow Occurred

1 0 1 1111 (-1) 0 Correct, No Overflow

1 F F 0000 (0) 1 Correct, No Overflow

1 C 2 1010 (10) 1 Correct, No Overflow

1 7 A 1101 (-3) 0 Correct, No Overflow

1 1 8 1001 (-7) 0 Correct, No Overflow

Questions:

1. What is the range of a 4-bit unsigned number?

 The range of four-bit unsigned numbers is: 24 = 16

2. What is the range of a 4-bit signed number?

 The range of four-bit signed numbers is 23 = 8

3. What is overflow? When does overflow occur?

 Overflow occurs when the resulting value of an operation performed on a valid representation of
numbers is out of the range of the valid values. The sum of two identically signed numbers may
very well exceed the range of the bit field of those two numbers, so overflow is a possibility in
this case.

4. (True/False) Overflow cannot occur when subtracting numbers with the same sign.

 True

16
17