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in
SYLLABUS
COURSE OBJECTIVES
To understand the behavior of PN junction diode, zener diode and transistor
To analyze frequency response characteristics of transistor
To design and test various oscillator circuits
To understand the behavior of half wave and full wave rectifier circuits
To understand the behavior of astable and monostable multivibrator
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To implement differential amplifier using FET
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To realize passive filters
To study frequency and phase measurements using CRO
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LIST OF EXPERIMENTS ee
1. Characteristics of PN Junction diode and zener diode
2. Characteristics of an NPN Transistor under common emitter , common collector and common base
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configurations
3. Characteristics of JFET(To draw the equivalent circuit)
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6. a. Characteristics of photo diode & photo transistor b. Study of light activated relay circuit
7. Design and testing of RC phase shift oscillator and LC oscillator
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8. Single phase half-wave and full wave rectifiers with inductive and capacitive filters
9. Differential amplifiers using FET
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COURSE OUTCOMES
CONTENTS
CYCLE 1 EXPERIMENTS
1 Characteristics of PN Junction Diode 6
2 Characteristics of zener diode 11
3 Characteristics of an NPN transistor under common emitter configuration 16
4 Characteristics of an NPN transistor under common base configuration 20
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5 Characteristics of an NPN transistor under common collector configuration 24
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6 Characteristics of JFET (To draw the equivalent circuit) 28
7 Characteristics of UJT 33
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8 Generation of saw tooth waveform using UJT 37
9 Design and Frequency Response Characteristics of a Common Emitter amplifier 40
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10 Characteristics of photo diode 44
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CYCLE 2 EXPERIMENTS
13 Design and testing of RC phase shift oscillator 52
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18 Monostable multivibrator 71
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5
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.in
1 Regulated Power Supply
2 Ammeter
3 Voltmeter
ng
4 Diode
5 Resistor
eri
6 Bread board ---
7 Connecting Wires ine ---
Theory:
Donor impurities (pentavalent) are introduced into one-side and acceptor impurities(trivalent) into the other
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side of a single crystal of an intrinsic semiconductor to form a PN junction diode with a junction called
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depletion region (this region is depleted off the charge carriers). This region gives rise to a potential barrier
called cut-in Voltage. This is the voltage across the diode at which it starts conducting. The PN junction can
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anode (P-side) and negative terminal of the input supply is connected the cathode Then diode is said to be
forward biased.
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If negative terminal of the input supply is connected to anode (p-side) and positive terminal of the input
supply is connected to cathode (n-side) then the diode is said to be reverse biased.
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On forward biasing, initially no current flows due to barrier potential. As the applied potential exceeds the
barrier potential the charge carriers gain sufficient energy to cross the potential barrier and hence enter the
other region.
On reverse biasing, the majority charge carriers are attracted towards the terminals due to the applied
potential resulting in the widening of the depletion region. Since the charge carriers are pushed towards the
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terminals no current flows through the device due to majority charge carriers. There will be some current in
the device due to minority carriers. The generation of such carriers is independent of the applied potential
and hence the current is constant for all increasing reverse potential. This current is referred to as reverse
saturation current (IO) and it increases with temperature.
PN junction diode:
Symbol:
.in
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Circuit Diagram:
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Forward Bias: g ine
En
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Reverse Bias:
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w.
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Precautions:
1. Check all the measuring meters for zero errors and correct if if any.
3. Vary the power supply voltage step by step from zero volt.
4. Take the voltmeter and ammeter readings for every variation of power supply.
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5. Re-Connect the circuit for reverse bias condition as shown in figure.
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7. Draw the graph for forward bias and reverse bias for PN junction diode.
eri
8. Note down cut-in voltage for PN junction diode.
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9. Switch of the power supply.
Observation:
g
En
Forward Bias:
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Reverse bias:
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.in
Model graph:
ng
eri
g ine
En
Result:
Thus the forward and reverse characteristics of the given PN junction diode is determined.
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Outcomes:
Students are able to
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Applications:
It is the process of rectifier as one of the part of DC Power Supplies. In cut-out circuits utilized for
waveform era. PN junctions have been used as rectifiers in power supplies, detectors in RF,circuits, Zener
diodes which are voltage regulators, clippers, LED's, PIN diodes are RF switches.
Viva-voce
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6. List the applications of PN junction diode.
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7. Define – Barrier potential
8. What is peak inverse voltage of a diode?
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9. What is avalanche breakdown?
10. What is leakage current?
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11. What is meant by forward bias?
12. What is meant by reverse bias?
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13. What is an ideal diode? How does it differ from a real diode?
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20. What is the need for connecting Resistance Rs in series with PN diode?
21. Write the diode current equation.
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10
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3 Voltmeter 1
4 Zener diode 1
5 Resistor 1
ng
6 Bread board --- 1
7 Connecting Wires --- Few
eri
Theory:
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Zener diode is a heavily doped Silicon diode. An ideal P-N junction diode does not conduct in reverse biased
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condition. A Zener diode conducts excellently even in reverse biased condition. These diodes operate at a
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precise value of voltage called break down voltage. A Zener diode when forward biased behaves like an
ordinary P-N junction diode. A Zener diode when reverse biased undergoes avalanche break down or zener
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break down.
Avalanche Break down:
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If both p-side and n-side of the diode are lightly doped, depletion region at the junction widens. Application of a
very large electric field at the junction increases the kinetic energy of the charge carriers which collides with the
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adjacent atoms and generates charge carriers by breaking the bond, they in-turn collides with other atoms by
creating new charge carriers, this process is cumulative which results in the generation of large current resulting
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in Avalanche Breakdown.
11
If both p-side and n-side of the diode are heavily doped, depletion region at the junction reduces, it leads to the
development of strong electric field and application of even a small voltage at the junction may rupture covalent
bond and generate large number of charge carriers. Such sudden increase in the number of charge carriers
results in Zener break down.
Zener Diode:
Symbol:
.in
ng
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Circuit Diagram:
Forward Bias:
g ine
En
arn
Le
Reverse Bias:
w.
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12
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Precaution:
1. While doing the experiment don’t exceed the ratings of diode. This may damage the diode.
2. Connect voltmeter and ammeter in correct polarities as shown in the circuit diagram.
3. Do not switch ON the power supply unless you have checked the circuit connections as per
the circuit diagram.
Procedure:
1. Connect the circuit as per the diagram.
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2. Switch on the power supply.
3. Vary the power supply voltage step by step from zero volt.
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4. Take the voltmeter and ammeter readings for every variation of power supply.
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5. Re-Connect the circuit for reverse bias condition as shown in figure and repeat steps
3 and 4 for reverse bias.
6. Draw the graph for forward bias and reverse bias for Zener diode.
ine
7. Note down cut-in voltage and breakdown voltage for Zener diode.
8. Switch of the power supply.
g
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Observation:
Forward Bias:
arn
Reverse Bias:
Reverse Voltage Vr Reverse Current Ir Reverse Resistance Rr=Vr/Ir
Sl. No. (V) (mA) (Ω)
13
Calculation:
∆Rf = ∆Vf / ∆If (∆Rf = Dynamic forward resistance)
∆Rr = ∆Vr / ∆Ir (∆Rr = Dynamic reverse resistance)
∆V= V2 - V1
∆I = I2 - I1
Model Graph:
.in
If(mA)
ng
eri
Vr(V)
Vf(V)
g ine
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Ir(mA)
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Result:
Thus the forward and reverse characteristics of the given zener diode are determined.
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Outcomes:
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2. Calculate static and dynamic resistance in both forward and reverse bias condition.
3. Analyze the working of zener diode as a voltage regulator for line regulation and load regulation.
Applications:
zener diode is used to provide a 3V reference to the Bluetooth device. Another application involves use of
Zener diode as a voltage regulator. This filtered DC voltage is regulated by the diode to provide a constant
reference voltage of 15V.
14
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Viva-voce
.in
7. What is break down voltage?
8. What are the applications of Zener diode?
ng
9. What is voltage regulator?
10. What is the doping concentration in Zener diodes?
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11. Can we use Zener diode as a switch? ine
12. List the other Zener diodes with different breakdown voltages.
13. What is the cause of reverse breakdown?
14. What is Zener voltage?
g
En
15
Apparatus required:
Sl. No. Description Range Quantity
1 Regulated Power Supply 1
.in
2 Ammeter 1
4 Voltmeter 1
5 Voltmeter 1
ng
6 NPN Transistor 1
7 Resistor 1
eri
8 Connecting Wires Few
ine
Theory:
A NPN function transistor consist of a silicon (or germanium) crystal in which a layer of p – type silicon is
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sandwiched between two layers of N – type silicon. The arrow on emitter lead specifies the direction of the current
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flow when the emitter – base function is forward biased. As the conductivity of the BJT depends on both the
majority and minority carriers it is called bipolar device. In CE configuration, Emitter is common to both the Emitter
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and Base.
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A transistor can be in any of the three configurations viz, Common base, Common emitter and Common
Collector .The transistor consists of three terminal emitter, collector and base. The emitter layer is the source
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of the charge carriers and it is heavily doped with a moderate cross sectional area. The collector collects the
charge carries and hence has moderate doping and large cross sectional area. The base region acts a path
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for the movement of the charge carriers. In order to reduce the recombination of holes and electrons the
base region is lightly doped and is of hollow cross sectional area. Normally the transistor operates with the
emitter base junction forward biased. In transistor, the current is same in both junctions, which indicates that
there is a transfer of resistance between the two junctions which is known as transfer resistance of transistor.
16
Circuit Diagram:
.in
ng
Precautions:
1. While performing the experiment do not exceed the ratings of the transistor. This may lead to
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the transistor damage.
2. Connect voltmeter and ammeter in correct polarities as shown in the circuit diagram.
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3. Do not switch ON the power supply unless you have checked the circuit connections as per the
circuit diagram.
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4. Make sure while selecting the emitter, base and collector terminals of the transistor.
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Procedure:
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Input Characteristics:
1. Connect the circuit as per the circuit diagram.
2. Set VCE, vary VBE in regular interval of steps and note down the corresponding IB reading.
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Output Characteristics:
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17
Model graph:
.in
ng
eri
Observation:
Input Characteristics:
ine
VCE = VCE =
VBE (V) IB (μA) VBE (V) IB (μA)
g
En
arn
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Output characteristics:
w.
IB = IB =
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18
Result:
The transistor characteristics of a Common Emitter (CE) configuration were plotted.
Outcomes:
Students are able to
1. Analyze the characteristics of BJT in common emitter configuration.
2. Calculate h-parameters from the characteristics obtained.
Applications:
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CE Amplifier. The common emitter circuit is popular because it's well-suited for voltage amplification, especially at
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low frequencies. Common-emitter amplifiers are also used in radio frequency transceiver circuits. Common
emitter configuration commonly used in low-noise amplifiers.
eri
g ine
En
arn
Le
w.
ww
19
Viva-voce
.in
6. Which transistor configuration provides a phase reversal between the input and output signals?
7. What is the range β of a BJT?
ng
8. What is Early Effect?
eri
9. Why the doping of collector is less compared to emitter?
10. What are the input and output impedances of CE configuration?
ine
11. Identify various regions in the output characteristics?
12. What is the relation between α, β and γ?
g
13. What is current gain in CE configuration?
En
20. At what region of the output characteristics, a transistor can act as an amplifier?
ww
20
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.in
2 Ammeter 1
3 Voltmeter 1
4 Voltmeter 1
ng
5 NPN Transistor 1
6 Resistor 1
eri
7 Bread board --- 1
8 Connecting Wires --- Few
ine
Theory:
g
In this configuration the base is made common to both the input and out. The emitter is given the input and
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the output is taken across the collector. The current gain of this configuration is less than unity. The voltage
gain of common base configuration is high. Due to the high voltage gain, the power gain is also high. In
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common base configuration, Base is common to both input and output. In this configuration the input
characteristics relate IE and VEB for a constant VCB. Initially let VCB = 0 then the input junction is equivalent to
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a forward biased diode and the characteristics resembles that of a diode. Where V CB = +VI (volts) due to
early effect IE increases and so the characteristics shifts to the left. The output characteristics relate IC and
w.
20
Circuit diagram:
.in
Precautions:
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1. While performing the experiment do not exceed the ratings of the transistor. This may lead
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to damage the transistor.
2. Connect voltmeter and ammeter in correct polarities as shown in the circuit diagram.
ine
3. Do not switch ON the power supply unless you have checked the circuit connections as per
the circuit diagram.
Make sure while selecting the emitter, base and collector terminals of the transistor.
g
4.
En
Procedure:
Input Characteristics:
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1. Connect the circuit as shown in fig. adjust all the knobs of the power supply to their minimum positions
before switching the supply on.
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V from 0.5 to 0.7 V. In each step note the value of base current IB.
4. Repeat step-3 for each different values of VCE such as 1V, 2V.
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5. Plot a graph between VBE and IB for different values of VCE. These curves are called input
characteristics.
Output Characteristics:
1. Connect the circuit as shown in fig adjust all the knobs of the power supply,It must be at the minimum
position before the supply is switched on.
2. Adjust the base current IB to 20 µA by adjusting the supply VBB.
21
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3. Vary the supply voltage VCC so that the voltage VCE varies in steps of 0.2 V from 0 to 2 V and then in
steps of 1 V from 2 to 10 V. In each step the base current should be adjusted to the present value and the
collector current IC should be recorded.
4. Adjust the base current at 40, 60 µA and repeat step-3 for each value of IB. Plot a graph between the
output voltage VCE and output current IC for different values of the input current IB. These curves are
called the output characteristics
Observation:
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Input Characteristics:
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S.No. VCB = VCB = VCB =
v V V
Output Characteristics:
arn
S.No. IE = IE = IE =
mA mA mA
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22
Model graph:
Input characteristics:
IC(mA)
VCB1
VCB2
.in
ng
VEB(V)
eri
V 1
EB VEB2
Output characteristics:
ine
g
En
arn
Le
w.
ww
23
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Result:
The transistor characteristics of a common base configuration were plotted.
Outcomes:
Students are able to
1. analyze the characteristics of BJT in common base configuration.
.in
2. calculate h-parameters from the characteristics obtained.
Applications:
ng
This type of bipolar transistor configuration has a greater input impedance, current and power gain than
that of the common base configuration but its voltage gain is much lower. The common emitter configuration is an
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inverting amplifier circuit. g ine
En
arn
Le
w.
ww
24
Viva-voce
.in
5. Which configuration is good as a constant current source? Why?
6. What is the range of ?
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7. Why is less than unity?
8. Input and output impedance equations for CB configuration?
eri
9. What is carrier lifetime?
10. What is the importance of Fermi level?
g ine
En
arn
Le
w.
ww
25
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.in
2 Ammeter 1
3 Ammeter 1
4 Voltmeter 1
ng
5 Voltmeter 1
6 NPN Transistor 1
eri
7 Resistor 1
8 Connecting Wires ine --- Few
Theory:
A BJT is a three terminal two junction semiconductor device in which the conduction is due to both the
g
charge carrier. Hence it is a bipolar device and it amplifies the sine waveform. BJT is classified into two types
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– NPN or PNP. A NPN transistor consists of two N types in between which a layer of P is sandwiched. The
transistor consists of three terminal emitter, collector and base. The emitter layer is the source of the charge
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carriers and it is heavily doped with a moderate cross sectional area. The collector collects the charge carries
and hence it has moderate doping and large cross sectional area. The base region acts a path for the
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movement of the charge carriers. In order to reduce the recombination of holes and electrons the base
region is lightly doped and is of hollow cross sectional area. Normally the transistor operates with the EB
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junction forward biased. In transistor, the current is same in both junctions, which indicates that there is a
transfer of resistance between the two junctions which is known as transfer resistance of transistor.
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26
Circuit diagram:
.in
ng
eri
Precautions:
1. While doing the experiment do not exceed the ratings of the transistor. This may damage the
ine
transistor.
2. Connect voltmeter and Ammeter in correct polarities as shown in the circuit diagram.
g
3. Do not switch ON the power supply unless you have checked the circuit connections as per the
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circuit diagram.
4. Make sure while selecting the emitter, base and collector terminals of the transistor.
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Procedure:
Input characteristics:
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Output characteristics:
1. Connect the circuit as per the circuit diagram.
2. Set IB, Vary VCE in regular interval of steps and note down the corresponding IC reading.
Repeat the above procedure for different values of IB.
3. Plot the graph: VCE vs. IC for a constant IB.
27
Model characteristics:
Input characteristics:
Output characteristics:
.in
ng
eri
Observation:
ine
Input characteristics:
g
En
arn
Le
Output characteristics:
w.
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Result:
The transistor characteristics of a Common Collector (CC) configuration were plotted.
27
Outcomes:
Students are able to
1. Analyze the characteristics of BJT in common base configuration.
2. Calculate h-parameters from the characteristics obtained.
Applications:
In Common Collector transistor configuration, we use collector terminal as common for both input and
output signals. ... The emitter follower configuration is mostly used as a voltage buffer. These configurations are
widely used in impedance matching applications because of their high input impedance.
.in
ng
Viva-voce
eri
1. What are the various configurations of NPN transistor?
2. What are the regions of operation of a transistor?
ine
3. Why collector of a transistor is the largest region?
4. What is meant by early effect?
g
5. What is meant by thermal run away?
En
28
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.in
4 Voltmeter 2
5 Resistor 2
6 Bread board --- 1
ng
7 Connecting Wires --- Few
eri
Theory:
FET is a unipolar voltage operated device. It has got 3 terminals. They are source, drain and gate. When
ine
the gate is biased negative with respect to the source, the PN junctions are reverse biased & depletion
regions are formed. The channel is more lightly doped than the p type gate, so the depletion region penetrate
g
deeply in to the channel. The result is that the channel is narrowed, its resistance is increased and I D is
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reduced. When the negative bias voltage is further increased, the depletion regions meet at the center and I D
is cutoff completely. The depletion regions produces a potential gradient which is of varying thickness around
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the PN junction and restrict the current flow through the channel by reducing its effective width and thus
increasing the overall resistance of the channel itself. Then we can see that the most-depleted portion of the
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depletion region is in between the gate and the drain, while the least depleted conducts with zero bias
voltage applied (i.e, the depletion region has near zero width). With no external Gate voltage (V G = 0), and a
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small voltage ( VDS ) applied between the drain and the source, maximum saturation current ( I DSS ) will flow
through the channel from the drain to the source restricted only by the small depletion region around the
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junctions. If a small negative voltage ( -VGS ) is now applied to the gate the size of the depletion region
begins to increase reducing the overall effective area of the channel and thus reducing the current flowing
reverse bias voltage increases the width of the depletion region which in turn reduces the conduction of the
channel.
28
Pin Diagram:
Bottom view of BFW10:
Specification:
.in
Voltage: 30V, IDSS > 8mA
Circuit Diagram: 1kΩ
ng
D
A
G
eri
BFW10
68kΩ ine
S
VDD
V
VGS V
g
En
arn
Precautions:
1. While doing the experiment do not exceed the ratings of the FET. This may lead to damage
the FET.
2. Connect voltmeter and ammeter in correct polarities as shown in the circuit diagram.
29
3. Do not switch ON the power supply unless you have checked the circuit connections as per
the circuit diagram.
4. Make sure while selecting the source, drain and gate terminals of the FET.
Procedure:
Drain Characteristics:
1. Connect the circuit as per the circuit diagram.
2. Set the gate voltage VGS = 0V.
.in
3. Vary VDS in steps of 1 V & note down the corresponding ID.
4. Repeat the same procedure for VGS = -1V.
ng
5. Plot the graph VDS vs. ID for constant VGS.
Transfer Characteristics:
eri
1. Connect the circuit as per the circuit diagram.
2. Set the drain voltage VDS = 5 V.
ine
3. Vary the gate voltage VGS in steps of 1V & note down the corresponding ID.
4. Repeat the same procedure for VDS = 10V.
g
V
Drain Resistancd rd = DS
V
w.
I GS
D
I
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Transconductance gm = D V
V DS
GS
Amplification factor μ = rd . gm
30
Observation:
Drain characteristics:
VGS = VGS =
.in
Transfer characteristics:
ng
VDS = VDS =
eri
ine
Model graph:
Drain characteristics:
g
ID(mA)
En
arn
VGS = 0V
Le
VGS = -1V
w.
VGS = -2V
VGS = -3V
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VDS(V)
31
VDS
VGS(V)
.in
Result:
Thus the drain and transfer characteristics of a JFET is plotted.
ng
Outcomes:
eri
Students are able to
1. analyze the Drain and transfer characteristics of FET in common source configuration.
ine
2. calculate the parameters trans-conductance (gm), drain resistance (rd) and amplification
factor(µ).
g
En
Applications:
The junction field effect transistor (JFET) is used as a constant current source. The JFET is used as a buffer
arn
amplifier. ... The JFET is used as high impedance wide band amplifier. The JFET is used as a voltage variable
resistor (VVR) or voltage development resistor (VDR)
Viva-voce
Le
.in
2 Ammeter 1
3 Voltmeter 1
ng
4 Voltmeter 1
eri
5 UJT 1
6 Resistor 1
ine
7 Bread board --- 1
8 Connecting Wires --- Few
g
En
Theory:
UJT (double base diode) consists of a bar of lightly doped n-type silicon with a small piece of heavily
arn
doped P type material joined to one side. It has got three terminals. They are Emitter (E), Base1 (B1),
Base2 (B2). Since the silicon bar is lightly doped, it has a high resistance and can be represented as two
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resistors, rB1and rB2. When VB1B2 = 0, a small increase in VE forward biases the emitter junction. The
resultant plot of VE and I E is simply the characteristics of forward biased diode with resistance. Increasing
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VEB1 reduces the emitter junction reverse bias. When VEB1 = VrB1 there is no forward or reverse bias and IE
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= 0. Increasing VEB1 beyond this point begins to forward bias the emitter junction. At the peak point, a small
forward emitter current is flowing. This current is termed as peak current (I P ). Until this point UJT is said to
be operating in cutoff region. When IE increases beyond peak current the device enters the negative
resistance region. In which the resistance rB1 falls rapidly and VE falls to the valley voltage Vv. At this point
IE = Iv. A further increase of IE causes the device to enter the saturation region.
33
.in
Circuit Diagram:
ng
B1 1kΩ
1kΩ E
eri
A
VEE
B2
ine VBB
V V
g
En
Model graph:
arn
VEB1
Le
VP
w.
IP
ww
VB1B2=1
VB1B2=0
IV
IE(mA)
34
Precautions:
1. While performing the experiment do not exceed the ratings of the UJT. This may lead to damage
of the UJT.
2. Connect voltmeter and ammeter in correct polarities as shown in the circuit diagram.
3. Do not switch ON the power supply unless you have checked the circuit connections as per
the circuit diagram.
4. Make sure while selecting the emitter, base-1, base-2 terminals of UJT.
Procedure:
.in
1. Connect the circuit as per the circuit diagram.
ng
2. Set VB1B2 = 0V, vary VEB1 , & note down the readings of IE& VEB1.
3. Set VB1B2 = 10V , vary VEB1 , & note down the readings of IE& VEB1.
eri
4. Plot the graph : IE Versus VEB1 for constant VB1B2.
5. Find the intrinsic standoff ratio.
ine
Calculation:
Formula for Intrinsic Standoff Ratio:
g
η = VP - VD / VB1B2,
En
where,
η -Intrinsic Standoff Ratio
arn
Observation:
w.
VB1B2 = VB1B2 =
ww
Result:
Thus the characteristics of UJT are studied.
Intrinsic standoff ratio ______________
35
Outcomes:
Students are able to obtain the characteristics of UJT.
Applications:
The most common application of a unijunction transistor is as a triggering device for SCR's and Triacs
but other UJT applications include sawtoothed generators, simple oscillators, phase control, and timing
circuits. The simplest of all UJT circuits is the Relaxation Oscillator producing non-sinusoidal waveforms.
Viva-voce
.in
1. Write the features of UJT.
What are the applications of UJT?
ng
2.
eri
4. Why does negative resistance region appears in UJT?
5. What is the doping profile of UJT?
ine
6. What is the importance of intrinsic stand-off ratio?
7. Is there any break down region in UJT?
g
8. Write the features of UJT.
En
36
.in
1 Regulated Power Supply 1
2 UJT 1
3 CRO 1
ng
4 Capacitor 1
5 Resistor 1
eri
6 Bread board --- 1
7 Connecting Wires ine --- Few
Theory:
UJT saw tooth generator (relaxation oscillator) is a type of RC (Resistor - Capacitor) oscillator where the
g
active element is a UJT (Uni-Junction Transistor). UJT is an excellent switch with switching times in the
En
order of nano seconds. It has a negative resistance region in the characteristics and can be easily
employed in relaxation oscillators. The UJT relaxation oscillator is called so because the timing interval is
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set up by the charging of a capacitor and the timing interval is ceased by the rapid discharge of the same
capacitor.
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Re1
10kΩ Rb1
100Ω
2N2646
C1 Rb2
20Ω
0.2µF
37
Precautions:
1. While performing the experiment do not exceed the ratings of the UJT. This may lead to
damage of the UJT.
2. Connect voltmeter and ammeter in correct polarities as shown in the circuit diagram.
3. Do not switch ON the power supply unless you have checked the circuit connections as per
the circuit diagram.
4. Make sure while selecting the emitter, base - 1, base - 2 terminals of UJT.
Procedure:
.in
Generation of saw tooth wave form:
ng
1. Connections are made as per the circuit diagram.
2. The dc input voltage is set to 20 V in RPS.
eri
3. The output Vo is noted, time period is also noted.
4. The theoretical time period should be calculated.
ine
5. T = RT CT ln (1 / 1- n).
6. The output at base 1 and base 2 should note.
g
7. Graph should be plotted and waveforms are drawn for V0, VB1, VB2.
En
Calculation:
arn
Observation:
Le
Measurement of time
Frequency
period
w.
38
Model graph:
IE (mA)
.in
VB1E (V)
ng
Result:
Thus the saw tooth waveform is generated using UJT relaxation oscillator.
eri
Outcomes: ine
Students are able to obtain saw tooth waveform is generated using UJT relaxation oscillator.
Applications:
g
The most common application of a unijunction transistor is as a triggering device for SCR's and Triacs
En
but other UJT applications include sawtoothed generators, simple oscillators, phase control, and timing
circuits. The simplest of all UJT circuits is the Relaxation Oscillator producing non-sinusoidal waveforms.
arn
Viva-voce
Le
2.
39
Apparatus required:
.in
Sl. No. Description Range Quantity
1 Regulated Power Supply 1
ng
2 FG ---- 1
3 CRO ---- 1
4 Capacitor 1
eri
5 Resistor 1
6 Bread board --- 1
7 Connecting Wires --- Few
ine
Theory: Common Emitter (CE)
g
En
Amplifier is an electronic circuit that is used to raise the strength of a weak signal. The process of raising
the strength of a weak signal is known as amplification. One importance requirement during amplification is
arn
that only the magnitude of the signal should increase and there should be no change in signal shape. The
transistor is used for amplification. From the voltage waveforms for the CE circuit shown below, it is seen that
there is a 180o phase shift between the input and output waveforms. This can be understood by considering
Le
the effect of a positive going input signal. When VS increases in a positive direction, it increases the transistor
w.
VBE. The increase in VBE raises the level of IC, thereby increasing the drop across Rc, and thus reducing the
level of the VC. The changing level of VC is capacitor-coupled to the circuit output to produce the ac output
ww
voltage, VO. As VS increases in a positive direction, VO goes in a negative direction. Similarly, When VS
changes in a negative direction, the resultant decrease in V BE reduces the IC level, thereby reducing VRC,
and producing a positive going output.
40
.in
Emitter bypass capacitor, CE: An emitter bypass capacitor, CE is used parallel with RE to provide
low reactance path to the amplified ac signal. If it is not used, then ac amplified ac signal following
ng
through RE will cause a voltage drop across it, thereby reducing the output voltage.
Coupling capacitor, C2: The coupling capacitor, C2 couples one stage of amplification to the next
eri
stage. If it is not used, the bias conditions of the next stage will be drastically changed due to the
shunting effect of RC. This is because RC will come in parallel with the upper resistance R1 of the
ine
biasing network of the next stage, thereby altering the biasing conditions of the latter. In short, the
coupling capacitor C2 isolates the dc of one stage from the next stage, but allows the passage of ac
g
signal.
En
The circuit has input impedance (Zi) and output impedance (ZO). These can cause voltage division
of the circuit input and output voltages.The circuit voltage amplification (AV), or voltage gain,
arn
+ VCC
w.
R R C
ww
C
C
E R
Vs R R
41
Precautions:
1. While performing the experiment do not exceed the ratings of the transistor. This
may lead to damage the transistor.
2. Connect voltmeter and ammeter in correct polarities as shown in the circuit diagram.
3. Do not switch ON the power supply unless you have checked the circuit connections
as per the circuit diagram.
4. Make sure while selecting the emitter, base and collector terminals of the transistor.
.in
Procedure:
Frequency response curve measurements:
ng
1. Connections are made as per the circuit diagram.
eri
2. In the above assembled circuit, keep the magnitude of the source same, ie. 100 mV
and decrease the frequency from 1 KHz and measure voltage gain of the amplifier at
ine
each frequency. Now increase the frequency from 1 KHz to 1 MHz and measure the
voltage gain of the amplifier at each frequency. Take at least 5 readings on either side
g
of the 1 KHz frequency. Tabulate the reading in the table.
En
3. Plot on a semi-log graph sheet the frequency response (voltage gain vs. frequency)
curve using the above measurements.
arn
4. From the plot, determine the values of (a) Mid band voltage gain, AV(mid),
(b) Lower cut-off frequency, (c) Upper cut-off frequency and (d) Bandwidth.
Le
42
.in
Result:
ng
Thus the CE amplifier is designed and frequency response curve is plotted.
Outcomes:
eri
Students are able to calculate the bandwidth of BJT common emitter amplifier.
ine
Application:
The common emitter circuit is popular because it's well-suited for voltage amplification, especially at
low frequencies. Common-emitter amplifiers are also used in radio frequency transceiver circuits.
g
Common emitter configuration commonly used in low-noise amplifiers
En
arn
Viva-voce
Le
1. What is an amplifier?
2. What is small signal amplifier?
w.
Aim:
To study the V-I characteristics of a photo-diode
Apparatus required:
.in
2 Photo-Diode 1
3 Voltmeter 1
ng
4 Ammeter 1
5 Resistor 1
eri
7 Bread board ----- 1
8 Incandescent Lamp ine 1
Theory:
A silicon photodiode is a solid state light detector that consists of a shallow diffused P-N junction with
g
connections provided to the outside world. When the top surface is illuminated, photons of light penetrate into
En
the silicon to a depth determined by the photon energy and are absorbed by the silicon generating electron-
hole pairs.
arn
The electron-hole pairs are free to diffuse (or wander) throughout the bulk of the photodiode until they
recombine. The average time before recombination is the “minority carrier lifetime”. At the P-N junction is a
Le
region of strong electric field called the depletion region. It is formed by the voltage potential that exists at the
P-N junction. Those light generated carriers that wander into contact with this field are swept across the
w.
junction.
ww
If an external connection is made to both sides of the junction a photo induced current will flow as long as
light falls upon the photodiode. In addition to the photocurrent, a voltage is produced across the diode. In
44
effect, the photodiode functions exactly like a solar cell by generating a current and voltage when exposed to
light.
Circuit diagram:
.in
ng
eri
Precaution:
3. Vary the power supply voltage in steps of 1V and note down the corresponding
voltage and current.
4. Allow light to fall on the device and repeat the above step 3 for various distance between the bulb
Le
5. Plot the graph: IR against VR by taking inverse voltage along X-axis and diode current along
Y-axis.
ww
Observation:
Distance= cm
45
Model graph:
Ir(mA)
Under illumination
Under Darkness
.in
ng
Vr(V)
eri
Result:
Thus the V-I characteristics of the given photo-diode is determined.
ine
Outcome:
g
On completion of the experiment, student will be able to:
En
Application:
Medical devices
Le
Safety equipment
Optical communication devices
w.
Position sensors
Bar code scanners
ww
Automotive devices
Viva-voce
.in
ng
eri
g ine
En
arn
Le
w.
ww
Apparatus required:
Sl. No. Description Range Quantity
1 Regulated Power Supply 1
2 Photo-transistor 1
.in
3 Voltmeter 1
4 Ammeter 1
ng
5 Resistor 1
eri
6 Incandescent Lamp ----- 1
7 Bread board ----- 1
ine
8 Connecting Wires ----- as required
g
Theory:
En
The photo transistor is a 3 terminal device which gives an electrical current as output if an input light
excitation is provided. It works in reverse bias. When reverse biased along with the reverse bias current I CO,
arn
the light current IL is also added to the total output current. The amount of current flow depends on the input
light intensity given as excitation. Phototransistor is basically a photodiode with amplification and operates by
Le
exposing its base region to the light source. Phototransistor light sensors operate the same as photodiodes
except that they can provide current gain and are much more sensitive than the photodiode with currents are
w.
50 - 100 times greater than that of the standard photodiode. Phototransistors consist mainly of a bipolar NPN
transistor with the collector-base PN-junction reverse-biased. The phototransistor’s large base region is left
ww
electrically unconnected and uses photons of light to generate a base current which in turn causes a collector
to emitter current to flow.
47
Circuit diagram:
.in
ng
Precaution:
eri
Procedure: ine
1. Connect the circuit as per the circuit diagram.
2. Keep the input light excitation fixed. Then vary the Vce in steps of 1V till the maximum voltage rating
g
of the transistor is reached and then note down the corresponding values of I c.
En
3. Tabulate the readings. For various values of input excitation, record the values of V ce and Ic and plot
the characteristics of the photo transistor.
arn
Observation:
Without Light With Light
Le
Distance= cm
ww
Distance= cm
Distance= cm
48
Model graph:
Ic(mA)
Under illumination
Under Darkness
.in
ng
VCE(V)
eri
Result: ine
Thus the V-I characteristics of a photo-transistor was determined.
Outcome:
g
On completion of the experiment, student will be able to:
En
Application:
Opto-isolators
Le
Viva-voce
w.
1. In what sense does the photo transistor differs from a rectifier diode?
ww
.in
ng
eri
g ine
En
arn
Le
w.
ww
Aim:
To study the working of light activated relay circuit
Apparatus required:
.in
1 Regulated Power Supply 1
2 Photo-Diode 1
ng
3 Transistor 1
4 Relay 1
5 Variable Resistor 1
eri
6 Resistor 1
7 LED 1
ine
8 Incandescent Lamp ----- 1
9 Bread board ----- 1
10 Connecting Wires ----- as required
g
En
Theory:
1. Relay is a protective device used in the circuit to isolate the circuit from damage to occur due to short circuit,
arn
operation.
3. Photodiode in the circuit is used as photoconductive device.
w.
4. When no light is incident on photodiode, the base current is supplied by the potentiometer and the transistor
is forward biased.
ww
50
7. The drop across base and emitter of transistor is not sufficient to forward bias the base-emitter junction of
transistor.
Thus the relay is de-energized when the incident light on the photodiode is raised to a particular
level, thereby turns off the LED.
Circuit diagram:
.in
ng
eri
g ine
Result:
En
Thus the working of light activated relay circuit was studied successfully.
Outcome:
arn
Application:
This light sensitive circuit can operate a relay to switch on lamps or any AC loads when it senses
ww
darkness. It is ideal to use as switch less night lamps driver. LDR is used as the light sensor. ... When the
intensity of light reduces, LDR offers more resistance and more current passes to the base of T1 and it
conducts.
Viva-voce
1. What is a light activated relay?
2. How will the light level be measured?
3. How will the relay be released back when there is a need?
4. Which type of transistor configuration is used in relay circuit?
5. How can the sensitivity of circuit increased?
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.in
ng
eri
g ine
En
arn
Le
w.
ww
Aim:
To design and construct a RC phase shift oscillator for the given frequency (f0).
Apparatus required:
Sl. No. Description Range Quantity
.in
1 Regulated Power Supply
2 Transistor
ng
3 Resistor
4 Capacitor
5 Variable Resistor
eri
6 Function Generator
7 CRO
ine
8 Bread board -----
9 Connecting Wires ----- as required
g
En
Theory:
In the RC phase shift oscillator, the required phase shift of 180˚ in the feedback loop from the output
to input is obtained by using R and C components, instead of tank circuit. Here a common emitter amplifier is
arn
used in forward path followed by three sections of RC phase network in the reverse path with the output of the
last section being returned to the input of the amplifier. The phase shift Ф is given by each RC section Ф=tanˉ1
Le
(1/ωRC). In practice R-value is adjusted such that Ф becomes 60˚. If the value of R and C are chosen such that
the given frequency for the phase shift of each RC section is 60˚. Therefore at a specific frequency the total phase
w.
shift from base to transistor’s around circuit and back to base is exactly 360˚ or 0˚. Thus the Barkhausen criterion
for oscillation is satisfied.
ww
Design:
Vcc=12v, Ic=1mA, β=100,RE = 560 Ω
Vce=Vcc/2=6V, Vre=0.1Vcc=1.2V
Vb=Vre+0.7=1.9V,
R1=Vcc/10Ib – R2
=12/(10*20μA) – 10 K =47 K Ω
52
Rc=Vcc-Vce-(IeRe/Ic)
=2.4 K Ω =2.2 KΩ
Circuit diagram:
.in
ng
eri
g ine
En
Precautions:
1. All the connections should be correct.
arn
2. Parallax error should be avoided while taking readings from analog meters.
Procedure:
Le
53
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Observation:
Theoretical Practical
Frequency (Hz)
f =1/2 πRC√ (6+4RC/R)
.in
Model graph:
ng
eri
g ine
Result:
En
Outcome:
On completion of the experiment, student will be able to:
Le
Application:
Local oscillator for synchronous receivers, study purposes, musical instruments.
ww
54
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Viva-voce
1. What is an Oscillator circuit?
2. What are the classifications of Oscillators?
3. State the frequency for RC phase shift oscillator.
4. What are the types of feedback oscillators?
5. What is the minimum value of hfe for the oscillations in transistorized RC Phase shift oscillator?
.in
6. What is the frequency of oscillation of Wein bridge?
7. What do phase shift oscillator, twin- T oscillator and Wein bridge oscillator have in common?
ng
8. When will the stability of frequency of oscillation be high?
9. What is the primary advantage of RC phase shift oscillator?
eri
10. What type of stability does an oscillator circuit using quartz crystal offer?
11. State the condition to get constant amplitude oscillation in a feedback oscillator circuit.
ine
12. What type of crystal does a crystal oscillator have?
13. State the condition for sustained oscillation in a RC phase shift oscillator using FET.
g
14. What is the value of angular frequency of oscillation in a RC phase shift oscillator using FET?
En
arn
Le
w.
ww
54
.in
4 Capacitor 2,2,1
5 Decade Inductance Box (DIB) one each
6 Decade Resistance Box (DRB) 1
ng
7 Cathode Ray Oscilloscope (CRO) ----- 1
8 Bread board ----- 1
eri
9 Connecting Wires ----- as required
Theory:
ine
The tank circuit is made up of L1,C4 and C5 .The resistance R2 and R3 provides the necessary biasing.
The capacitance C2 blocks the DC component. The frequency of oscillations is determined by the values of
g
En
The energy supplied to the tank circuit is of correct phase. The tank circuit provides 180 0 out of phase.
Also the transistor provides another 1800 out of phase. In this way, energy feedback to the tank circuit is in
Le
55
Precaution:
1. All the connections should be correct.
2. Parallax error should be avoided while taking readings from analog meters.
Procedure:
1. Connections are made as per circuit diagram.
.in
2. Connect CRO output terminals and observe the waveform.
3. Calculate practically the frequency of oscillations by using the expression f = 1 / T where ( T= Time
ng
period of the waveform).
4. Repeat the above steps 2,3 for different values of L, and note down the practical values of
eri
oscillations of Colpitt‟s Oscillator.
5. Compare the values of oscillations both theoritically and practically.
ine
Observation:
g
Inductance Theoretical Frequency Practical Frequency
( mH ) ( Hz ) ( Hz )
En
arn
Model graph:
Le
w.
ww
Result:
Thus the frequency of oscillations of Colpitt‟s oscillator was calculated and tested successfully.
56
Outcome:
On completion of the experiment, student will be able to:
1. analyze tank circuit.
Application:
Local oscillator for synchronous receivers, study purposes, musical instruments.
.in
Viva-voce
ng
1. What is LC oscillator?
2. How does an oscillator differ from an amplifier?
eri
3. Name two low frequency oscillators?
4. What are the classifications of Oscillators?
ine
5. State the frequency for LC phase shift oscillator?
6. Who invented Colpitt‟s Oscillator?
g
15. What is the total phase shift that occurs in Colpitt‟s oscillator?
57
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Apparatus required:
Sl. No. Description Range Quantity
1 Diode 1
.in
2 Capacitor 1
3 Resistor 1
ng
4 Transformer 1
5 CRO ----- 1
6 Bread board ----- 1
eri
7 Connecting Wire ----- as required
Theory:
ine
During positive half-cycle of the input voltage, the diode D1 is in forward bias and conducts through
the load resistor R1. Hence the current produces an output voltage across the load resistor R1, which
g
has the same shape as the positive half cycle of the input voltage.
En
During the negative half cycle of the input voltage, the diode is reverse biased and there is no current
through the circuit. i.e, the voltage across R1 is zero. The net result is that only the positive half cycle of
arn
the input voltage appears across the load. The average value of the half wave rectified output voltage
is the value measured on DC voltmeter. For practical circuits, transformer coupling is usually provided
Le
1.
2. The AC source is electrically isolated from the rectifier. Thus, preventing shock hazards in
ww
58
Circuit diagram:
Precaution:
.in
1. All the connections should be correct.
2. Parallax error should be avoided while taking readings from analog meters.
ng
Procedure:
eri
1. Connections are made as per the circuit diagram.
2. Connect the primary side of the transformer to ac mains and the secondary side to the
ine
rectifier input.
3. Using multimeter, measure the AC input voltage of the rectifier and DC voltage at the output
g
of the rectifier.
En
2. By increasing the value of the rheostat, the voltage across the load and current flowing
through the load are measured.
3. The reading is tabulated
4. Draw a graph between load voltage (VL and load current ( IL ) taking VL on X-axis and IL on y-
axis.
5. From the value of no-load voltages, the percentage regulation can be calculated using the
formula.
59
Observation:
Without Filter
With Filter
.in
USING DMM Vac(v) Vdc(v) r= Vac/ Vdc
ng
eri
Without filter
ine
Vdc=Vm / π, Vrms=Vm / 2,
Vac=√ ( Vrms2- Vdc 2)
g
USING CRO
arn
Le
With filter
w.
60
Calculation:
Vac =
Vdc =
Ripple factor without Filter =
Ripple factor with Filter =
Model graph:
.in
ng
eri
With filter:
g ine
En
arn
Le
w.
Result:
1. The Ripple factor for the Half-Wave Rectifier with and without filters was measured.
ww
Outcome:
On completion of the experiment, student will be able to:
1. understand the concepts of rectification.
2. differentiate the output waveforms with and without filters.
61
Application:
Local oscillator for synchronous receivers, study purposes, musical instruments.
Viva-voce
1. What are the advantages of bridge rectifier over centre-taped full wave rectifier?
2. Define - Transformer Utilization Factor. What is the TUF for half wave rectifier?
3. Give the expression for ripple factor of half wave rectifier?
4. What are the different types of filter circuits?
.in
5. What is the PIV of half wave rectifier?
6. What is the mean value of half wave rectified sine wave?
ng
7. What is the form factor for half wave rectified sine wave?
eri
8. A half-wave rectifier circuit with a capacitive filter is connected to 200 Volts, 50 Hz ac line. What
will be the output voltage across the capacitor?
ine
9. What is a thyratron?
10. What is the thyristor equivalent of a thyratron tube?
What is a Silicon Controlled Rectifier?
g
11.
En
12. For a waveform peakier than a sine wave, the form factor will be _________.
13. State the necessary condition for triggerring Thyristors.
arn
62
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.in
2 Capacitor 1
3 Resistor 1
4 Transformer 1
ng
5 CRO ----- 1
6 Bread board ----- 1
7 Connecting Wire ----- as required
eri
Theory:
ine
The conversion of AC into DC is called Rectification. Electronic Devices can convert AC power into DC
power with high efficiency. The full-wave rectifier consists of a center-tap transformer, which results in equal
g
voltages above and below the center-tap. During the positive half cycle, a positive voltage appears at the
En
anode of D1 while a negative voltage appears at the anode of D2. Due to this diode D1 is forward biased it
results in a current ID1 through the load R.
arn
During the negative half cycle, a positive voltage appears at the anode of D 2 and hence it is forward
biased, resulting in a current ID2 through the load at the same instant a negative voltage appears at the
anode of D1 thus reverse biasing it and hence it doesn‟t conduct.
Le
Ripple Factor:
w.
Ripple factor is defined as the ratio of the effective value of AC components to the average DC value. It is
denoted by the symbol „r‟.
ww
63
Rectification Factor:
The ratio of output DC power to input Ac power is defined as efficiency.
Ƞ = (Vdc)2 / (Vac)2
= 81%(if R >> Rf, then Rf can be neglected)
Percentage of Regulation:
.in
It is a measure of the variation of AC output voltage as a function of DC output voltage.
Percentage of regulation = {( VNL – VFL ) / VFL} * 100 %
ng
where, VNL = Voltage across load resistance, when minimum current flows through it
VFL= Voltage across load resistance, when maximum current flows through.
eri
For an ideal Full-wave rectifier, the percentage regulation is 0 percent. The percentage of regulation is
very small for a practical full wave rectifier.
ine
Peak Inverse Voltage (PIV):
g
It is the maximum voltage that has to be withstood by a diode when it is reverse biased.
En
PIV = 2Vm
Circuit diagram:
arn
Le
w.
ww
64
Precaution:
1. All the connections should be correct.
2. Parallax error should be avoided while taking readings from analog meters.
Procedure:
1. Connect the circuit as shown in the circuit diagram.
2. Connect the primary side of the transformer to AC mains and the secondary side to rectifier input.
3. Using a CRO, measure the AC input voltage of the rectifier, AC and DC voltage at the output of the
.in
rectifier.
4. Observe the waveforms at the secondary windings of transformer and across load resistance.
ng
Observation:
eri
Sl. No. Input Voltage (V) Output Voltage (V)
ine
g
Calculations:
En
2. Efficiency: Ƞ = 1 / (2√3fCR)
arn
Model graph:
w.
ww
65
Result:
Outcome:
.in
Application:
Power supplies and as detectors of radio signals
ng
Viva-voce
7. What is the form factor for full wave rectified sine wave?
8. What is the rms value of full wave rectified sine wave?
Le
9. What will be the the ripple factor of a full-wave rectifier circuit compared to that of a half
wave rectifier circuit without filter?
w.
10. The RMS value of a half wave rectifier current is 10 A. Its value for full wave rectification would be__.
For single phase supply frequency of 50 Hz, ripple frequency in full wave rectifier is________.
ww
11.
66
.in
ng
eri
ine
g
En
arn
Le
w.
ww
Aim:
To construct and study the operation of astable multivibrator using 555 timer
Apparatus required:
Sl. No. Description Range Quantity
1 IC 1
2 Resistor 1
.in
3 Capacitor 1
4 Bread board 1
5 Connecting wires as required
ng
6 Cathode ray oscilloscope 1
eri
Theory:
The 555 timer can be used with supply voltage in the range of + 5 V to + 18 V and can drive up to 200
ine
mA. It is compatible with both TTL and CMOS logic circuits because of the wide range of supply voltage
the 555 timer is versatile and easy to use in the astable multivibrator. The timer is oscillated between two
g
threshold levels 1/3 Vcc and 2/3 Vcc in order to generate a square wave form. No external signal source is
En
required for such generation and hence this is called as a free running multivibrator.
arn
Circuit diagram:
Le
w.
ww
67
Precaution:
1. All the connections should be correct.
2. IC pin connections should be checked properly.
Procedure:
1. Connections are made as per the circuit diagram.
2. Pins 4 and 8 are shorted and connected to power supply V cc (+5 V)
3. Between pins 8 and 7 resistor R1 of 10 kΩ is connected and between 7 and 6 resistor R2 of 4.7 kΩ
.in
is connected. Pins 2 and 6 are short circuited.
4. In between pins 1 and 5 a Capacitor of 0.01µF is connected.
ng
5. The output is connected across the pin 3 and GND.
6. In between pins 6 and GND, a Capacitor of 0.1µF is connected.
eri
7. Theoretically, charging time Tc is given byTc=0.69(R1+R2) C1, Discharging time Td is given by Td=
ine
0.69R2C1. The frequency f is given by f= 1.45/(R1+2R2)C1 . The percentage of duty cycle is
(Tc/(Tc+Td))*100 .
8. Practically Td and Tc are measured and wave forms are noted and theoretical values are verified
g
10. Theoretically with diode connected charging time is given by Tc=0.69R1C1. Discharging time is
given by Td=0.69R2C1.
11. Practically Td and Tc are noted and verified with theoretical values.
Le
Observation:
w.
Calculation:
1. tON=0.69(R1+R2)C
2. tOFF = 0.69 R2C
3. T = tON +tOFF
68
Model graph:
.in
ng
Result:
Outcome:
Application:
ww
Morse code generators, timers, and systems that require a square wave, including television broadcasts
and analog circuits.
69
.in
ng
eri
ine
g
En
arn
Le
w.
ww
Viva-voce
.in
6. Give the free running frequency of astable multivibrator.
7. How to obtain symmetrical waveform in astable multivibrator?
ng
8. What is the function of the comparators in the 555 timer circuit?
9. What happens when the capacitor charges?
eri
10. Define –Duty Cycle
11. A 22 kΩ resistor and a 0.02-μF capacitor are connected in series to a 5-V source. How long will
ine
it take the capacitor to charge to 3.4 V?
12. What does the discharge transistor do in the 555 timer circuit?
g
14. The internal circuitry of the 555 timer consists of ________, an R-S flip-flop, a transistor switch,
an output buffer amplifier, and a voltage divider.
arn
17. What is the difference between an astable multivibrator and a monostable multivibrator?
18. Define - tHI and tLO
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19. The output of astable multivibrator constantly switches between two states – Justify
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Aim:
To construct and study the operation of monostable multivibrator using 555 timer
Apparatus required:
Sl. No. Description Range Quantity
1 IC 555 1
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2 Resistor 10 kΩ 1
3 Capacitor 0.1µF,0.01µF 1
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4 Bread board ----- 1
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5 Connecting wires ----- as required
6 Cathode ray oscilloscope ine (0-20)MHz 1
Theory:
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Monostable multivibrator is also known as triangular wave generator. It has one stable and one quasi
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stable state. The circuit is useful for generating single output pulse of time duration in response to a
triggering signal. The width of the output pulse depends only on external components connected to the
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op-amp. The diode gives a negative triggering pulse. When the output is +Vsat, a diode clamps the
capacitor voltage to 0.7 V. Then, a negative going triggering impulse magnitude V i passes through R, C
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and the negative triggering pulse is applied to the positive terminal. Let us assume that the circuit is in
stable state. The output V0 is at +Vsat. The diode D1 conducts and Vc the voltage across the capacitor
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„C‟ gets clamped to 0.7 V. The voltage at the positive input terminal through R 1R2 potentiometer divider
is +ßVsat. Now, if a negative trigger of magnitude Vi is applied to the positive terminal so that the
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effective signal is less than 0.7 V. The output of the Op-Amp will switch from +Vsat to –Vsat. The diode
will now get reverse biased and the capacitor starts charging exponentially to –Vsat. When the capacitor
charge Vc becomes slightly more negative than –ßVsat, the output of the op-amp switches back to +Vsat.
The capacitor „C‟ now starts charging to +Vsat through R until Vc is 0.7 V.
Circuit diagram:
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Precaution:
1. All the connections should be correct.
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2. Do not switch on the power supply unless you have checked the circuit connections as
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Procedure:
1. Connections are made as per the circuit diagram.
2. Negative triggering is applied at the terminal 2.
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Observation:
Sl. No. Charging Time (Tc) Discharging Time (Td)
Theoritical Practical Theoritical Practical
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Model graph:
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Result:
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The output Waveforms of monostable multivibrator were observed and time constant was
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calculated and the practical value was found to be equal to the theoretical value.
Outcome:
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Application:
Monostable vibrators are used in analog systems to control an output signal frequency.
Synchronize the line and frame rate of television broadcasts.
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Viva-voce
1. What is a multivibrator?
2. Why is monostable multivibrator called so?
3. What is the principle of monostable multivibrator?
4. How does a monostable multivibrator work in terms of astable multivibrator?
5. Mention the applications of multivibrator.
6. How many number of stable states a monostable 555 timer has?
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7. In a typical IC monostable multivibrator circuit, at the falling edge of the trigger input, the output
switches HIGH for a period of time determined by the ________.
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8. What is the difference between a retriggerable one shot and a nonretriggerable one shot?
9. Triggering a retriggerable one shot during pulse generation will:
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10. The monostable multivibrator circuit is not an oscillator – Justify
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11. A retriggerable one shot has a pulse of 10 ms. 3 ms after being triggered, another trigger pulse is
applied. The resulting output pulse will be ________ ms.
12. State the characteristics of a retriggerable monostable multivibrator.
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15. A monostable multivibrator has R = 120 kΩ and time delay T = 1000 ms, calculate the value of C?
16. A 555 timer in monostable application mode can be used for___________.
17. How can a monostable multivibrator be modified into a linear ramp generator?
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21. In a monostable multivibrator, a single narrow pulse produces a single _____ pulse.
22. What are the applications of Schmitt trigger circuit?
23. Compare astable multivibrator with monostable multivibrator.
24. What are the applications of monostable multivibrator?
25. With most monostable multivibrators, what is the Q output when no input trigger has occurred?
74
Aim:
To design a differential amplifier using JFET and also, determine the CMRR of the amplifier
Apparatus required:
.in
2 Function Generator - 1
3 CRO - 1
ng
4 Dual RPS - 1
5 Resistor - 1, 2
eri
6 Bread Board -
ine - 1
Theory:
1. A differential amplifier is a voltage amplifier that amplifies the difference between the two
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input signals.
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2. It is widely used in analog integrated circuits, because of its good bias stability, high
voltage gain and high input impedance.
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3. The basic characteristic of differential amplifier is that, it is DC-coupled and avoids the use
of large bypass capacitors.
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4. FET differential amplifier has higher input impedance than BJT differential amplifier.
5. The differential amplifier is said to operate in common-mode configuration when same
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6.
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Circuit diagram:
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Fig. 1 Differential Mode Gain
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Precaution:
1. All the connections should be correct.
2. Do not switch on the power supply unless you have checked the circuit connections as per the
circuit diagram.
Procedure:
1. Connections are made as per the circuit diagram.
2. The input sine wave signal with appropriate amplitude from the function generator is fed to the
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circuit.
3. The output is viewed in the CRO and the corresponding differential gain is calculated.
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4. The frequency of the input signal is varied and the output signal gain is tabulated for different
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frequencies.
5. A frequency Vs Gain (dB) plot using semilog sheet is plotted and the bandwidth of the given
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amplifier is calculated from the plot.
6. Connect the circuit as shown in fig.2.
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7. Apply input signal and observe the output using CRO.
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Observation:
Differential Mode Gain
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Input voltage, Vs = mV
Ad = 20 log (Gain)
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Calculation:
Result:
Thus the differential amplifier using JFET was designed and also CMRR of the amplifier was determined.
The CMRR value of the amplifier is _____.
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Outcome:
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On completion of the experiment, student will be able to:
handle JFET with ease.
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1.
Viva-voce
4. State the different configurations of differential amplifier. Which one is commonly used?
5. Give the main advantage of constant current bias over emitter bias.
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6. A Differential Amplifier should have collector resistor‟s value (RC1 & RC2) as :
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Aim:
To determine experimentally the frequency response of low pass and high pass filters and note
down the cut off frequency
Apparatus requirement:
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1. Function Generator - 1
2. CRO - 1
3. Resistor 1
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4. Capacitor 1
5. Inductor 1
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6. Breadboard - 1
7. Connecting wires ine - As required
Theory:
High pass filter:
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This filter allows only high frequency of AC voltage and rejects the low frequency components at
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the output. We know that Xc < 1/f (Reactance is inversely proportional to the frequency). At low frequency,
reactance is very high so it does not allow any signal at the output. At high frequency, reactance is very
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the output. We know that Xc < f (Reactance is directly proportional to the frequency). At low frequency,
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reactance is very low so it does not allow the entire signal at the output. At high frequency, reactance is
very high so it does not allow any signal at the output.
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Circuit diagram:
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Fig..1 High Pass Filter
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Precaution:
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Procedure:
1. The circuit connections are made as per circuit diagram.
2. Switch on the power supply and increase the input frequency in steps of 100 Hz and note down
the corresponding output voltage in the voltmeter.
3. Calculate the gain value.
4. Draw the graph between frequency Vs gain.
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Observation:
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High Pass Filter
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Low Pass Filter
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S.No Input Voltage Frequency Output Voltage Gain = 20log(V0/Vin)
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Model graph:
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Simulation circuit :
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Fig. 5 Multisim Circuit High Pass filter Fig. 6 Low Pass filter
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Fig.7 Miltisim High Pass filter output
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Result:
Thus the low pass and high pass filter was designed successfully.
Outcome:
Application:
Amplifiers, oscillators and power supply circuits
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Viva-voce
1. What is an ideal low pass filter?
2. What is the difference between an ideal and a practical low pass filter?
3. What is high-pass filter?
4. What are passive filters?
5. What is a band pass filter?
6. In a certain parallel resonant band-pass filter, the resonant frequency is 14 kHz. If the bandwidth is
.in
4 kHz, the lower frequency is _____________.
7. In a series resonant band-pass filter, a lower value of Q results in_________.
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8. The maximum output voltage of a certain low-pass filter is 15 V. The output voltage at the critical
frequency is_______.
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9. In a certain low-pass filter, fc = 3.5 kHz. If the input voltage is a 6 V sine wave with a DC level of 10
V, what is the output voltage magnitude?
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10. At a certain frequency, the output voltage of a filter is 6 V and the input is 12 V, the filter‟s
bandwidth is__________.
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11. In a certain low-pass filter, fc = 3.5 kHz. Its pass band is____________.
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12. At a certain frequency, the output voltage of a filter is 6 V and the input is 12 V. The voltage ratio in
decibels is_____________.
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13. An RL low-pass filter consists of a 5.6 mH coil and a 3.3 kΩ resistor. The output voltage is taken
across the resistor. The circuit's critical frequency is___________.
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14. An RL high-pass filter consists of a 470 Ω resistor and a 600 mH coil. The output is taken across
the coil. The circuit's critical frequency is________________.
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15. An RC low-pass filter consists of a 120 Ω resistor and a 0.002 μF capacitor. The output is taken
across the capacitor. The circuit's critical frequency is____________.
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16. In a certain low-pass filter, fc = 3.5 kHz. Its pass band is________________.
17. An RC high-pass filter consists of an 820 Ω resistor. What is the value of C so that Xc is ten times
less than R at an input frequency of 12 kHz?
18. Define – Quality Factor
19. What is the range of quality factor for band pass filter?
20. What do you mean by order of filter?
21. What is the importance of higher order filter?
83
PHASE MEASUREMENT
Aim:
To measure the phase difference & frequency using CRO
Apparatus required:
Sl. No. Component name Quantity
.in
1. CRO 1
2. Signal Generator 1
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3. Patch Cords 3
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Theory: ine
1.1 Measurement of Voltage Using CRO :
A voltage can be measured by noting the Y deflection produced by the voltage; using this deflection in
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conjunction with the Y-gain setting, the voltage can be calculated as follows :
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Using the general method, a correctly calibrated CRO can be used in conjunction with a known value
of resistance R to determine the current „I‟ flowing through the resistor.
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on the screen of a CRO. However, this method has limited accuracy and should only be used where
other methods are not available. To calculate the frequency of the observed signal, one has to measure
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the period, i.e. the time taken for 1 complete cycle, using the calibrated sweep scale. The period could
be calculated by,
T = ( no. of squares in cm) * ( selected time/cm scale )
Once the period „T‟ is known, the frequency is given
by, f (Hz) = 1/T(sec)
84
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θ
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Referring to fig.1, the phase shift can be calculated by the using the formula,
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The frequency relationship between the horizontal and vertical inputs is given by,
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Precaution:
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1. Set the signal generator to a frequency of 1000 cycles per second
2. Connect the output from the generator to the vertical input of the oscilloscope
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3. The AC voltmeter and the leads to the vertical input of the oscilloscope are connected across
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the generator's output
4. By adjusting the Horizontal Sweep time/cm and trigger, a steady trace of the sine wave may
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be displayed on the screen
5. The trace represents a plot of voltage vs. time, where the vertical deflection of the trace about the
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line of symmetry CD is proportional to the magnitude of the voltage at any instant of time.
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6. The relationship between the magnitude of the peak voltage displayed on the scope and
the effective or RMS voltage (VRMS) read on the AC voltmeter is
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Thus the measurement of phase difference & frequency using CRO was studied.
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Outcome:
On completion of the experiment, student will be able to:
1. perform horizontal and vertical adjustments to get a clear trace of waveform.
2. measure the voltage and phase difference of the captured waveform
Application:
Radio,
TV receivers,
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Viva-voce
.in
7. Principally CRO is a Voltmeter. Justify
8. The sweep generator of a CRO is used to produce___________.
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9. Which part is called as heart of CRO?
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10. The light emitted by the zinc silicate coated fluorescent screen of CRT is of ______colour.
11. In terms of the division on screen, the voltage of the waveform in CRO is_________.
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12. What is meant by Lissjous Pattern?
13. The Lissajous patterns help in the measurement of__________.
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14. Input impedance of CRO is:
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21. In CRT, the brightness of the trace on the screen is controlled by______________.
22. When an electron of charge e and mass m is accelerated by a voltage V,the square of
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87
Aim:
To observe the action of a Transistor as an electronic switch and to measure the voltage across
the transistor when it is ON and when it is OFF
Apparatus required:
.in
2 Transistor
3 Resistors
4 LED
ng
5 Bread Board -
6 connecting wires
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Theory: ine
A BJT is a three terminal two junction semiconductor device in which the conduction is due to both the
charge carrier. Hence it is a bipolar device and it amplifier the sine waveform as they are transferred from
input to output. BJT is classified into two types NPN or PNP. A NPN transistor consists of two N types in
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between which a layer of P is sandwiched. The transistor consists of three terminal emitter, collector and
base. The emitter layer is the source of the charge carriers and it is heartily doped with a moderate cross
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sectional area. The collector collects the charge carries and hence moderate doping and large cross
sectional area. The base region acts a path for the movement of the charge carriers. In order to reduce the
recombination of holes and electrons the base region is lightly doped and is of hollow cross sectional area.
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Normally the transistor operates with the EB junction forward biased. In transistor, the current is same in
both junctions, which indicates that there is a transfer of resistance between the two junctions. Hence
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Circuit diagram:
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Precaution:
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Result:
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Thus the behavior of transistor has been observed successfully.
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Outcome: ine
On completion of the experiment, the student will be able
to 1. Switching characteristics of transistor
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Application:
Amplifiers
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Micro phone
Viva-voce
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4. Which transistor configuration provides a phase reversal between the input and output signals?
5. What is the range β of a BJT?
6. List the current components of BJT.
7. What is Early Effect?
8. Why the doping of collector is less compared to emitter?
9. What do you mean by “reverse active”?
10. Identify various regions in the output characteristics?
11. What is the relation between α, β and γ?
12. What is the phase relation between input and output?
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13. Define and give the expression for its relation with .
14. Express Ic in terms ICE0 and ICB0.
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