32 PFL 3606 D 40 Chassisl 11 M 11 L

Colour Television Chassis
L11M1.1L
LA
Licenciado para - sergio - 14712468840 - Protegido por Eduzz.com

19130_000_110421.eps
110421
Contents Page
1. Revision List 2
2. Technical Specifications and Connections 2
3. Precautions, Notes, and Abbreviation List 4
4. Mechanical Instructions 8
5. Service Modes, Error Codes, and Fault Finding 12
6. Alignments 18
7. Circuit Descriptions 20
8. IC Data Sheets 26
9. Block Diagrams
Wiring Diagram 32" (Thriller) 35
Wiring Diagram 40" (Thriller) 36
Block Diagram Video 37
Block Diagram Audio 38
Block Diagram Control & Clock Signals 39
Block Diagram I2C 40
Supply Lines Overview 41
10. Circuit Diagrams and PWB Layouts
B01 393912365052 42
B02 393912365052 43
B03 393912365052 45
B04 393912365052 46
B05 393912365052 50
B06 393912365052 52
B07 393912365052 56
313912365052 SSB Layout 57
T01 393912365071 59
313912365071 TCON Layout 65
11. Styling Sheets
Styling Sheet Thriller 32" 66
Styling Sheet Thriller 40" 67
©
Copyright 2011 Koninklijke Philips Electronics N.V.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic, mechanical,
photocopying, or otherwise without the prior permission of Philips.
Published by ER/JY 1164 BU TV Consumer Care Printed in the Netherlands Subject to modification EN 3122 785 19130
2011-Apr-29
EN 2 1. L11M1.1L LA Revision List
1. Revision List
Manual xxxx xxx xxxx.0
• First release.
2. Technical Specifications and Connections

Index of this chapter: Table 2-1 Described Model numbers
2.1 Technical Specifications

2.2 Directions for Use CTN Styling Published in:
2.3 Connections
32PFL3606D/78 Thriller 3122 785 19130
40PFL3606D/78
Notes:
• Figures can deviate due to the different set executions.
• Specifications are indicative (subject to change).
2.2 Directions for Use
2.1 Technical Specifications You can download this information from the following websites:
http://www.philips.com/support
For on-line product support please use the links in Table 2-1. http://www.p4c.philips.com
Here is product information available, as well as getting started,
user manuals, frequently asked questions and software &
drivers.
2.3 Connections
REAR CONNECTORS SIDE CONNECTORS

DIGITAL AUDIO IN
CVI 1 AUDIO OUT SERV.U DVI/VGA
R L Pr Pb Y
4 5 6 7
BOTTOM REAR CONNECTORS 2
8 9 10 11
3
R L Pr Pb Y HDMI 1 VGA
(ARC)
CVI 2 ANTENNA
19130_001_110421.eps
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Figure 2-1 Connection overview
Note: The following connector colour abbreviations are used 2.3.1 Side Connections
(according to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green,
Gy= Grey, Rd= Red, Wh= White, Ye= Yellow. 1 - USB2.0
1 2 3 4
10000_022_090121.eps
090121
Figure 2-2 USB (type A)
2011-Apr-29
Technical Specifications and Connections L11M1.1L LA 2. EN 3
1 - +5V k 9 - HDMI1: Digital Video, Digital Audio - In

2 - Data (-) jk
19 1
3 - Data (+) jk 18 2
4 - Ground Gnd H 10000_017_090121.eps
090428
2 - AV IN: Cinch: Video CVBS - In, Audio - In
Ye - Video CVBS 1 VPP / 75 ohm jq Figure 2-4 HDMI (type A) connector
Wh - Audio L 0.5 VRMS / 10 kohm jq
Rd - Audio R 0.5 VRMS / 10 kohm jq 1 - D2+ Data channel j
2 - Shield Gnd H
3 - HDMI: Digital Video, Digital Audio - In 3 - D2- Data channel j
4 - D1+ Data channel j
19 1

5 - Shield Gnd H
18 2
6 - D1- Data channel j
10000_017_090121.eps 7 - D0+ Data channel j
090428
8 - Shield Gnd H
Figure 2-3 HDMI (type A) connector 9 - D0- Data channel j
10 - CLK+ Data channel j
11 - Shield Gnd H
2 - Shield Gnd H 12 - CLK- Data channel j
13 - Easylink Control channel/CEC jk
14 - ARC Audio Return Channel j
5 - Shield Gnd H 15 - DDC_SCL DDC clock j
16 - DDC_SDA DDC data jk
17 - Ground Gnd H
8 - Shield Gnd H 18 - +5V j
19 - HPD Hot Plug Detect j
20 - Ground Gnd H
10 - CLK+ Data channel j
11 - Shield Gnd H
12 - CLK- Data channel j 10 - Aerial - In
13 - Easylink Control channel/CEC jk - - F-type Coax, 75 Ω D
14 - n.c.
15 - DDC_SCL DDC clock j 11 - VGA: Video RGB - In
16 - DDC_SDA DDC data jk 1 5
10
17 - Ground Gnd H 6
11 15
18 - +5V j
19 - HPD Hot Plug Detect j 10000_002_090121.eps
090127
20 - Ground Gnd H
Figure 2-5 VGA Connector
2.3.2 Rear Connections
1 - Video Red 0.7 VPP / 75 Ω j
4 - CVI-1: Cinch: Video YPbPr - In, Audio - In 2 - Video Green 0.7 VPP / 75 Ω j
Wh - Audio - L 0.5 VRMS / 10 kΩ jq 3 - Video Blue 0.7 VPP / 75 Ω j
Rd - Audio - R 0.5 VRMS / 10 kΩ jq 4 - n.c.
Rd - Video Pr 0.7 VPP / 75 Ω jq 5 - Ground Gnd H
Bu - Video Pb 0.7 VPP / 75 Ω jq 6 - Ground Red Gnd H
Gn - Video Y 1 VPP / 75 Ω jq 7 - Ground Green Gnd H
8 - Ground Blue Gnd H
5 - Cinch: Digital Audio - Out 9 - +5VDC +5 V j
Bk - Coaxial 0.4 - 0.6VPP / 75 ohm kq 10 - Ground Sync Gnd H
11 - n.c.
6 - Service Connector (UART) 12 - DDC_SDA DDC data j
1 - Ground Gnd H 13 - H-sync 0-5V j
2 - UART_TX Transmit k 14 - V-sync 0-5V j
3 - UART_RX Receive j 15 - DDC_SCL DDC clock j
7 - Mini Jack: Audio - In DVI/VGA

Bk - Audio 0.5 VRMS / 10 kΩ jo
2.3.3 Bottom Connections
8 - CVI-2: Cinch: Video YPbPr - In, Audio - In

Wh - Audio - L 0.5 VRMS / 10 kΩ jq
Rd - Audio - R 0.5 VRMS / 10 kΩ jq
Rd - Video Pr 0.7 VPP / 75 Ω jq
Bu - Video Pb 0.7 VPP / 75 Ω jq
Gn - Video Y 1 VPP / 75 Ω jq
2011-Apr-29
EN 4 3. L11M1.1L LA Precautions, Notes, and Abbreviation List
3. Precautions, Notes, and Abbreviation List

Index of this chapter: • Where necessary, measure the waveforms and voltages
3.1 Safety Instructions with (D) and without (E) aerial signal. Measure the
3.2 Warnings voltages in the power supply section both in normal
3.3 Notes operation (G) and in stand-by (F). These values are
3.4 Abbreviation List indicated by means of the appropriate symbols.
3.3.2 Schematic Notes

3.1 Safety Instructions
• All resistor values are in ohms, and the value multiplier is

Safety regulations require the following during a repair:
often used to indicate the decimal point location (e.g. 2K2
• Connect the set to the Mains/AC Power via an isolation
indicates 2.2 kΩ).
transformer (> 800 VA).
• Resistor values with no multiplier may be indicated with
• Replace safety components, indicated by the symbol h,
either an “E” or an “R” (e.g. 220E or 220R indicates 220 Ω).
only by components identical to the original ones. Any
• All capacitor values are given in micro-farads (μ = × 10-6),
other component substitution (other than original type) may
nano-farads (n = × 10-9), or pico-farads (p = × 10-12).
increase risk of fire or electrical shock hazard.
• Capacitor values may also use the value multiplier as the
decimal point indication (e.g. 2p2 indicates 2.2 pF).
Safety regulations require that after a repair, the set must be
• An “asterisk” (*) indicates component usage varies. Refer
returned in its original condition. Pay in particular attention to
to the diversity tables for the correct values.
the following points:
• The correct component values are listed on the Philips
• Route the wire trees correctly and fix them with the
Spare Parts Web Portal.
mounted cable clamps.
• Check the insulation of the Mains/AC Power lead for
external damage. 3.3.3 Spare Parts
• Check the strain relief of the Mains/AC Power cord for
proper function. For the latest spare part overview, consult your Philips Spare
• Check the electrical DC resistance between the Mains/AC Part web portal.
Power plug and the secondary side (only for sets that have
a Mains/AC Power isolated power supply): 3.3.4 BGA (Ball Grid Array) ICs
1. Unplug the Mains/AC Power cord and connect a wire
between the two pins of the Mains/AC Power plug. Introduction
2. Set the Mains/AC Power switch to the “on” position For more information on how to handle BGA devices, visit this
(keep the Mains/AC Power cord unplugged!). URL: http://www.atyourservice-magazine.com. Select
3. Measure the resistance value between the pins of the “Magazine”, then go to “Repair downloads”. Here you will find
Mains/AC Power plug and the metal shielding of the Information on how to deal with BGA-ICs.
tuner or the aerial connection on the set. The reading
should be between 4.5 MΩ and 12 MΩ.
BGA Temperature Profiles
4. Switch “off” the set, and remove the wire between the
For BGA-ICs, you must use the correct temperature-profile.
two pins of the Mains/AC Power plug.
Where applicable and available, this profile is added to the IC
• Check the cabinet for defects, to prevent touching of any
Data Sheet information section in this manual.
inner parts by the customer.
3.3.5 Lead-free Soldering

3.2 Warnings
Due to lead-free technology some rules have to be respected
• All ICs and many other semiconductors are susceptible to by the workshop during a repair:
electrostatic discharges (ESD w). Careless handling • Use only lead-free soldering tin. If lead-free solder paste is
during repair can reduce life drastically. Make sure that, required, please contact the manufacturer of your soldering
during repair, you are connected with the same potential as equipment. In general, use of solder paste within
the mass of the set by a wristband with resistance. Keep workshops should be avoided because paste is not easy to
components and tools also at this same potential. store and to handle.
• Be careful during measurements in the high voltage • Use only adequate solder tools applicable for lead-free
section. soldering tin. The solder tool must be able:
• Never replace modules or other components while the unit – To reach a solder-tip temperature of at least 400°C.
is switched “on”. – To stabilize the adjusted temperature at the solder-tip.
• When you align the set, use plastic rather than metal tools. – To exchange solder-tips for different applications.
This will prevent any short circuits and the danger of a • Adjust your solder tool so that a temperature of around
circuit becoming unstable. 360°C - 380°C is reached and stabilized at the solder joint.
Heating time of the solder-joint should not exceed ~ 4 sec.
Avoid temperatures above 400°C, otherwise wear-out of
3.3 Notes tips will increase drastically and flux-fluid will be destroyed.
To avoid wear-out of tips, switch “off” unused equipment or
3.3.1 General reduce heat.
• Mix of lead-free soldering tin/parts with leaded soldering
• Measure the voltages and waveforms with regard to the tin/parts is possible but PHILIPS recommends strongly to
chassis (= tuner) ground (H), or hot ground (I), depending avoid mixed regimes. If this cannot be avoided, carefully
on the tested area of circuitry. The voltages and waveforms clear the solder-joint from old tin and re-solder with new tin.
shown in the diagrams are indicative. Measure them in the
Service Default Mode with a colour bar signal and stereo 3.3.6 Alternative BOM identification
sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and
picture carrier at 475.25 MHz for PAL, or 61.25 MHz for It should be noted that on the European Service website,
NTSC (channel 3). “Alternative BOM” is referred to as “Design variant”.
2011-Apr-29
Precautions, Notes, and Abbreviation List L11M1.1L LA 3. EN 5
The third digit in the serial number (example: powered TV set, it is best to test the high voltage insulation.
AG2B0335000001) indicates the number of the alternative It is easy to do, and is a good service precaution.
B.O.M. (Bill Of Materials) that has been used for producing the
specific TV set. In general, it is possible that the same TV
model on the market is produced with e.g. two different types 3.4 Abbreviation List
of displays, coming from two different suppliers. This will then
result in sets which have the same CTN (Commercial Type 0/6/12 SCART switch control signal on A/V
Number; e.g. 28PW9515/12) but which have a different B.O.M. board. 0 = loop through (AUX to TV),
number. 6 = play 16 : 9 format, 12 = play 4 : 3
By looking at the third digit of the serial number, one can format
identify which B.O.M. is used for the TV set he is working with. AARA Automatic Aspect Ratio Adaptation:
If the third digit of the serial number contains the number “1” algorithm that adapts aspect ratio to
remove horizontal black bars; keeps

(example: AG1B033500001), then the TV set has been
manufactured according to B.O.M. number 1. If the third digit is the original aspect ratio
a “2” (example: AG2B0335000001), then the set has been ACI Automatic Channel Installation:
produced according to B.O.M. no. 2. This is important for algorithm that installs TV channels
ordering the correct spare parts! directly from a cable network by
For the third digit, the numbers 1...9 and the characters A...Z means of a predefined TXT page
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be ADC Analogue to Digital Converter
indicated by the third digit of the serial number. AFC Automatic Frequency Control: control
signal used to tune to the correct
Identification: The bottom line of a type plate gives a 14-digit frequency
serial number. Digits 1 and 2 refer to the production centre (e.g. AGC Automatic Gain Control: algorithm that
SN is Lysomice, RJ is Kobierzyce), digit 3 refers to the B.O.M. controls the video input of the feature
code, digit 4 refers to the Service version change code, digits 5 box
and 6 refer to the production year, and digits 7 and 8 refer to AM Amplitude Modulation
production week (in example below it is 2010 week 10 / 2010 AP Asia Pacific
week 17). The 6 last digits contain the serial number. AR Aspect Ratio: 4 by 3 or 16 by 9
ASF Auto Screen Fit: algorithm that adapts
aspect ratio to remove horizontal black
bars without discarding video
information
ATSC Advanced Television Systems
Committee, the digital TV standard in
the USA
ATV See Auto TV
Auto TV A hardware and software control
system that measures picture content,
and adapts image parameters in a
dynamic way
AV External Audio Video
AVC Audio Video Controller
AVIP Audio Video Input Processor
B/G Monochrome TV system. Sound
carrier distance is 5.5 MHz
BDS Business Display Solutions (iTV)
BLR Board-Level Repair
BTSC Broadcast Television Standard
Committee. Multiplex FM stereo sound
10000_053_110228.eps
system, originating from the USA and
110228 used e.g. in LATAM and AP-NTSC
countries
Figure 3-1 Serial number (example) B-TXT Blue TeleteXT
C Centre channel (audio)
3.3.7 Board Level Repair (BLR) or Component Level Repair CEC Consumer Electronics Control bus:
(CLR) remote control bus on HDMI
connections
CL Constant Level: audio output to
If a board is defective, consult your repair procedure to decide
connect with an external amplifier
if the board has to be exchanged or if it should be repaired on
CLR Component Level Repair
component level.
ComPair Computer aided rePair
If your repair procedure says the board should be exchanged
CP Connected Planet / Copy Protection
completely, do not solder on the defective board. Otherwise, it
CSM Customer Service Mode
cannot be returned to the O.E.M. supplier for back charging!
CTI Color Transient Improvement:
manipulates steepness of chroma
3.3.8 Practical Service Precautions transients
CVBS Composite Video Blanking and
• It makes sense to avoid exposure to electrical shock. Synchronization
While some sources are expected to have a possible DAC Digital to Analogue Converter
dangerous impact, others of quite high potential are of DBE Dynamic Bass Enhancement: extra
limited current and are sometimes held in less regard. low frequency amplification
• Always respect voltages. While some may not be DCM Data Communication Module. Also
dangerous in themselves, they can cause unexpected referred to as System Card or
reactions that are best avoided. Before reaching into a Smartcard (for iTV).
DDC See “E-DDC”
2011-Apr-29
EN 6 3. L11M1.1L LA Precautions, Notes, and Abbreviation List
D/K Monochrome TV system. Sound subcommittee of the International

carrier distance is 6.5 MHz Telecommunication Union relating to
DFI Dynamic Frame Insertion radio communication. ITU-656 (a.k.a.
DFU Directions For Use: owner's manual SDI), is a digitized video format used
DMR Digital Media Reader: card reader for broadcast grade video.
DMSD Digital Multi Standard Decoding Uncompressed digital component or
DNM Digital Natural Motion digital composite signals can be used.
DNR Digital Noise Reduction: noise The SDI signal is self-synchronizing,
reduction feature of the set uses 8 bit or 10 bit data words, and has
DRAM Dynamic RAM a maximum data rate of 270 Mbit/s,
DRM Digital Rights Management with a minimum bandwidth of 135
DSP Digital Signal Processing MHz.

DST Dealer Service Tool: special remote iTV Institutional TeleVision; TV sets for
control designed for service hotels, hospitals etc.
technicians LS Last Status; The settings last chosen
DTCP Digital Transmission Content by the customer and read and stored
Protection; A protocol for protecting in RAM or in the NVM. They are called
digital audio/video content that is at start-up of the set to configure it
traversing a high speed serial bus, according to the customer's
such as IEEE-1394 preferences
DVB-C Digital Video Broadcast - Cable LATAM Latin America
DVB-T Digital Video Broadcast - Terrestrial LCD Liquid Crystal Display
DVD Digital Versatile Disc LED Light Emitting Diode
DVI(-d) Digital Visual Interface (d= digital only) L/L' Monochrome TV system. Sound
E-DDC Enhanced Display Data Channel carrier distance is 6.5 MHz. L' is Band
(VESA standard for communication I, L is all bands except for Band I
channel and display). Using E-DDC, LPL LG.Philips LCD (supplier)
the video source can read the EDID LS Loudspeaker
information form the display. LVDS Low Voltage Differential Signalling
EDID Extended Display Identification Data Mbps Mega bits per second
(VESA standard) M/N Monochrome TV system. Sound
EEPROM Electrically Erasable and carrier distance is 4.5 MHz
Programmable Read Only Memory MHEG Part of a set of international standards
EMI Electro Magnetic Interference related to the presentation of
EPG Electronic Program Guide multimedia information, standardised
EPLD Erasable Programmable Logic Device by the Multimedia and Hypermedia
EU Europe Experts Group. It is commonly used as
EXT EXTernal (source), entering the set by a language to describe interactive
SCART or by cinches (jacks) television services
FDS Full Dual Screen (same as FDW) MIPS Microprocessor without Interlocked
FDW Full Dual Window (same as FDS) Pipeline-Stages; A RISC-based
FLASH FLASH memory microprocessor
FM Field Memory or Frequency MOP Matrix Output Processor
Modulation MOSFET Metal Oxide Silicon Field Effect
FPGA Field-Programmable Gate Array Transistor, switching device
FTV Flat TeleVision MPEG Motion Pictures Experts Group
Gb/s Giga bits per second MPIF Multi Platform InterFace
G-TXT Green TeleteXT MUTE MUTE Line
H H_sync to the module MTV Mainstream TV: TV-mode with
HD High Definition Consumer TV features enabled (iTV)
HDD Hard Disk Drive NC Not Connected
HDCP High-bandwidth Digital Content NICAM Near Instantaneous Compounded
Protection: A “key” encoded into the Audio Multiplexing. This is a digital
HDMI/DVI signal that prevents video sound system, mainly used in Europe.
data piracy. If a source is HDCP coded NTC Negative Temperature Coefficient,
and connected via HDMI/DVI without non-linear resistor
the proper HDCP decoding, the NTSC National Television Standard
picture is put into a “snow vision” mode Committee. Color system mainly used
or changed to a low resolution. For in North America and Japan. Color
normal content distribution the source carrier NTSC M/N= 3.579545 MHz,
and the display device must be NTSC 4.43= 4.433619 MHz (this is a
enabled for HDCP “software key” VCR norm, it is not transmitted off-air)
decoding. NVM Non-Volatile Memory: IC containing
HDMI High Definition Multimedia Interface TV related data such as alignments
HP HeadPhone O/C Open Circuit
I Monochrome TV system. Sound OSD On Screen Display
carrier distance is 6.0 MHz OAD Over the Air Download. Method of
I2 C Inter IC bus software upgrade via RF transmission.
I2 D Inter IC Data bus Upgrade software is broadcasted in
I2 S Inter IC Sound bus TS with TV channels.
IF Intermediate Frequency OTC On screen display Teletext and
IR Infra Red Control; also called Artistic (SAA5800)
IRQ Interrupt Request P50 Project 50: communication protocol
ITU-656 The ITU Radio communication Sector between TV and peripherals
(ITU-R) is a standards body
2011-Apr-29
Precautions, Notes, and Abbreviation List L11M1.1L LA 3. EN 7
PAL Phase Alternating Line. Color system SSC Spread Spectrum Clocking, used to
mainly used in West Europe (colour reduce the effects of EMI
carrier = 4.433619 MHz) and South STB Set Top Box
America (colour carrier STBY STand-BY
PAL M = 3.575612 MHz and SVGA 800 × 600 (4:3)
PAL N = 3.582056 MHz) SVHS Super Video Home System
PCB Printed Circuit Board (same as “PWB”) SW Software
PCM Pulse Code Modulation SWAN Spatial temporal Weighted Averaging
PDP Plasma Display Panel Noise reduction
PFC Power Factor Corrector (or Pre- SXGA 1280 × 1024
conditioner) TFT Thin Film Transistor
PIP Picture In Picture THD Total Harmonic Distortion

PLL Phase Locked Loop. Used for e.g. TMDS Transmission Minimized Differential
FST tuning systems. The customer Signalling
can give directly the desired frequency TS Transport Stream
POD Point Of Deployment: a removable TXT TeleteXT
CAM module, implementing the CA TXT-DW Dual Window with TeleteXT
system for a host (e.g. a TV-set) UI User Interface
POR Power On Reset, signal to reset the uP uP Microprocessor
PSDL Power Supply for Direct view LED UXGA 1600 × 1200 (4:3)
backlight with 2D-dimming V V-sync to the module
PSL Power Supply with integrated LED VESA Video Electronics Standards
drivers Association
PSLS Power Supply with integrated LED VGA 640 × 480 (4:3)
drivers with added Scanning VL Variable Level out: processed audio
functionality output toward external amplifier
PTC Positive Temperature Coefficient, VSB Vestigial Side Band; modulation
non-linear resistor method
PWB Printed Wiring Board (same as “PCB”) WYSIWYR What You See Is What You Record:
PWM Pulse Width Modulation record selection that follows main
QRC Quasi Resonant Converter picture and sound
QTNR Quality Temporal Noise Reduction WXGA 1280 × 768 (15:9)
QVCP Quality Video Composition Processor XTAL Quartz crystal
RAM Random Access Memory XGA 1024 × 768 (4:3)
RGB Red, Green, and Blue. The primary Y Luminance signal
color signals for TV. By mixing levels Y/C Luminance (Y) and Chrominance (C)
of R, G, and B, all colors (Y/C) are signal
reproduced. YPbPr Component video. Luminance and
RC Remote Control scaled color difference signals (B-Y
RC5 / RC6 Signal protocol from the remote and R-Y)
control receiver YUV Component video
RESET RESET signal
ROM Read Only Memory
RSDS Reduced Swing Differential Signalling
data interface
R-TXT Red TeleteXT
SAM Service Alignment Mode
S/C Short Circuit
SCART Syndicat des Constructeurs
d'Appareils Radiorécepteurs et
Téléviseurs
SCL Serial Clock I2C
SCL-F CLock Signal on Fast I2C bus
SD Standard Definition
SDA Serial Data I2C
SDA-F DAta Signal on Fast I2C bus
SDI Serial Digital Interface, see “ITU-656”
SDRAM Synchronous DRAM
SECAM SEequence Couleur Avec Mémoire.
Colour system mainly used in France
and East Europe. Colour
carriers = 4.406250 MHz and
4.250000 MHz
SIF Sound Intermediate Frequency
SMPS Switched Mode Power Supply
SoC System on Chip
SOG Sync On Green
SOPS Self Oscillating Power Supply
SPI Serial Peripheral Interface bus; a 4-
wire synchronous serial data link
standard
S/PDIF Sony Philips Digital InterFace
SRAM Static RAM
SRP Service Reference Protocol
SSB Small Signal Board
2011-Apr-29
EN 8 4. L11M1.1L LA Mechanical Instructions
4. Mechanical Instructions
Index of this chapter:
4.1 Cable Dressing Notes:
4.2 Service Positions • Figures below can deviate slightly from the actual situation,
4.3 Assy/Panel Removal due to the different set executions.
4.4 Set Re-assembly
4.1 Cable Dressing

19130_002_110421.eps
110421
Figure 4-1 Cable dressing 32"
2011-Apr-29
Mechanical Instructions L11M1.1L LA 4. EN 9

11 mm saddle × 1
150 mm tape × 3
70 mm tape × 4
Foam × 2
19130_003_110426.eps
110426
Figure 4-2 Cable dressing 40"
2011-Apr-29
EN 10 4. L11M1.1L LA Mechanical Instructions
4.2 Service Positions measurements and alignments. When using foam bars take
care that these always support the cabinet and never only the
For easy servicing of a TV set, the set should be put face down display. Caution: Failure to follow these guidelines can
seriously damage the display!
on a soft flat surface, foam buffers or other specific workshop
Ensure that ESD safe measures are taken.
tools. Ensure that a stable situation is created to perform
4.3 Assy/Panel Removal
Instructions below apply to the 40PFL3606D/78, but will be

similar for other models.

4.3.1 Rear Cover
2
3 2
2 2
3 3
3
2
3 2
3 3
1
3 1 1 3 2
2
3
1 1
19130_004_110426.eps
110426
Figure 4-3 Rear cover removal (40")
Warning: Disconnect the mains power cord before removing

the rear cover.
See Figure 4-3.
1. Remove fixation screws [2] and [3] that secure the rear
cover. It is not necessary to remove the stand first [1].
2. Lift the rear cover from the TV. Make sure that wires and
flat foils are not damaged while lifting the rear cover from
the set.
2011-Apr-29
Mechanical Instructions L11M1.1L LA 4. EN 11
4.3.2 LCD Panel 4. Remove the IR/LED board [F].

5. Remove the Local Control board [G].
Refer to Figure 4-4 for details. 6. Remove the clamps [1].
1. Remove the Stand [A]. 7. Remove all metal subframes [2] that do not belong to the
2. Remove the Speakers/Subwoofer [B]. LCD display.
3. Remove the PSU [C], SSB [D] and TCON (E).
1 1 1 1

2
1 2
1
C
1
2
1
B
1
2
1 D
F
1 1
A
1
19130_006_110426.eps
110426
Figure 4-4 LCD Panel removal (based on 40" model)
4.4 Set Re-assembly

Panel
To re-assemble the whole set, execute all processes in reverse
order.
Thinner blue FFC supporting Proper FFC insertion: Silver line is not
Notes: tape belong to Panel side visible when connector lock is closed
• While re-assembling, make sure that all cables are placed
and connected in their original position. See Figure 4-5 TCON
• Pay special attention not to damage the EMC foams in the
set. Ensure that EMC foams are mounted correctly.
Thicker blue FFC supporting Improper FFC insertion: Silver line is

tape belong to SSB side visible when connector lock is closed
19130_007_110426.eps
110426
Figure 4-5 Flat Foil Cable (FFC) precautions
2011-Apr-29
EN 12 5. L11M1.1L LA Service Modes, Error Codes, and Fault Finding
5. Service Modes, Error Codes, and Fault Finding

Index of this chapter: 5.2.1 General
5.1 Test Points
5.2 Service Modes Next items are applicable to all Service Modes or are general.
5.3 Service Tools
5.4 Error Codes
Life Timer
5.5 The Blinking LED Procedure
During the life time cycle of the TV set, a timer is kept (called
5.6 Fault Finding and Repair Tips
“Op. Hour”). It counts the normal operation hours (not the
5.7 Software Upgrading
Stand-by hours). The actual value of the timer is displayed in
SDM and SAM in a decimal value. Every two soft-resets

5.1 Test Points increase the hour by +1. Stand-by hours are not counted.
In the chassis schematics and layout overviews, the test points Software Identification, Version, and Cluster
are mentioned. In the schematics and layouts, test points are The software ID, version, and cluster will be shown in the main
indicated with “Fxxx” or “Ixxx”. menu display of SDM, SAM, and CSM.
As most signals are digital, it will be difficult to measure The screen will show: “AAAAAAB-XX.YY”, where:
waveforms with a standard oscilloscope. Several key ICs are • AAAAAA is the chassis name: L11M11.
capable of generating test patterns, which can be controlled via • B is the region indication: E= Europe, A= AP/China, U=
ComPair. In this way it is possible to determine which part is NAFTA, L= LATAM.
defective. • XX is the main version number: this is updated with a major
change of specification (incompatible with the previous
Perform measurements under the following conditions: software version). Numbering will go from 01 - 99 and AA -
• Service Default Mode. ZZ.
• Video: Colour bar signal. – If the main version number changes, the new version
• Audio: 3 kHz left, 1 kHz right. number is written in the NVM.
– If the main version number changes, the default
settings are loaded.
5.2 Service Modes • YY is the sub version number: this is updated with a minor
change (backwards compatible with the previous versions)
The Service Mode feature is split into four parts: Numbering will go from 00 - 99.
• Service Default Mode (SDM). – If the sub version number changes, the new version
• Service Alignment Mode (SAM). number is written in the NVM.
• Customer Service Mode (CSM). – If the NVM is fresh, the software identification, version,
• Computer Aided Repair Mode (ComPair). and cluster will be written to NVM.
SDM and SAM offer features, which can be used by the Service Display Option Code Selection
engineer to repair/align a TV set. Some features are: When after an SSB or display exchange, the display option
• A pre-defined situation to ensure measurements can be code is not set properly, it will result in a TV with “no display”.
made under uniform conditions (SDM). Therefore, it is required to set this display option code after
• Activates the blinking LED procedure for error identification such a repair.
when no picture is available (SDM). To do so, press the following key sequence on a standard RC
• The possibility to overrule software protections when SDM transmitter: “062598” directly followed by MENU/HOME and
is entered via the Service pins. “xxx”, where “xxx” is a 3 digit decimal value of the panel type,
• Make alignments (e.g. White Tone), (de)select options, see sticker on the side/bottom of the cabinet. When the value
enter options codes, reset the error buffer (SAM). is accepted and stored in NVM, the set will switch to Stand-by,
• Display information (“SDM” or “SAM” indication in upper to indicate that the process has been completed.
right corner of screen, error buffer, software version,
operating hours, options and option codes, sub menus).
The CSM is a Service Mode that can be enabled by the

consumer. The CSM displays diagnosis information, which the Display Option
Code
customer can forward to the dealer or call centre. In CSM
mode, “CSM”, is displayed in the top right corner of the screen.
The information provided in CSM and the purpose of CSM is to:
39mm
• Increase the home repair hit rate.
PHILIPS 040
• Decrease the number of nuisance calls. MODEL:

32PF9968/10
27mm
• Solved customers' problem without home visit. PROD.SERIAL NO:

AG 1A0620 000001
(CTN Sticker)
ComPair Mode is used for communication between a computer
and a TV on I2C /UART level and can be used by a Service 10000_038_090121.eps
engineer to quickly diagnose the TV set by reading out error 090819
codes, read and write in NVMs, communicate with ICs and the
uP (PWM, registers, etc.), and by making use of a fault finding Figure 5-1 Location of Display Option Code sticker
database. It will also be possible to up and download the
software of the TV set via I2C with help of ComPair. To do this, During this algorithm, the NVM-content must be filtered,
ComPair has to be connected to the TV set via the ComPair because several items in the NVM are TV-related and not SSB-
connector, which will be accessible through the rear of the set related (e.g. Model and Prod. S/N). Therefore, “Model” and
(without removing the rear cover). “Prod. S/N” data is changed into “See Type Plate”.
In case a call centre or consumer reads “See Type Plate” in
CSM mode, he needs to look to the side/bottom sticker to
identify the set, for further actions.
2011-Apr-29
Service Modes, Error Codes, and Fault Finding L11M1.1L LA 5. EN 13
5.2.2 Service Default Mode (SDM) • ERR: Shows all errors detected since the last time the
buffer was erased in format <xxx> <xxx> <xxx> <xxx>
Purpose <xxx> (five errors possible).
Set the TV in SDM mode in order to be able to create a pre- • OP: Used to read-out the option bytes. Ten codes (in two
defined setting for measurements to be made. In this platform, rows) are possible.
a simplified SDM is introduced (without protection override and
without tuning to a predefined frequency). How to Navigate
As this mode is read only, there is not much to navigate. To
Specifications switch to other modes, use one of the following methods:
• Set linear video and audio settings to 50%, but volume to • Command MENU from the user remote will enter the
25%. Stored user settings are not affected. normal user menu (brightness, contrast, color, etc...) with
• Set Smart Picture to “Game”. “SDM” OSD remaining, and pressing MENU key again will

• Set Smart Sound to “Standard”. return to the last status of SDM again.
• Tune channel to: • To prevent the OSD from interfering with measurements in
- for analogue SDM: channel 3 (61.25 MHz) SDM, command “OSD” or “i+” (“STATUS” or “INFO” for
- for digital SDM: channel 26 (545.143 MHz). NAFTA and LATAM) from the user remote will toggle the
• For digital SDM: set PID default from the stream. OSD “on/off” with “SDM” OSD remaining always “on”.
• All service-unfriendly modes (if present) are disabled, since • Press the following key sequence on the remote control
they interfere with diagnosing/repairing a set. These transmitter: “062596” directly followed by the INFO[i+]/OK
service unfriendly modes are: button to switch to SAM (do not allow the display to time out
– (Sleep) timer. between entries while keying the sequence).
– Blue mute/Wall paper.
– Auto switch “off” (when there is no “ident” signal). How to Exit
– Hotel or hospital mode. Switch the set to Stand-by by
– Child lock or parental lock (manual or via V-chip). • pressing the standby button on the remote control
– Skipping, blanking of “Not favourite”, “Skipped” or transmitter or on the television set, or
“Locked” presets/channels. • via a standard RC-transmitter by keying the “00” sequence.
– Automatic storing of Personal Preset or Last Status If you switch the television set “off” by removing the mains (i.e.,
settings. unplugging the television), the television set will remain in SDM
– Automatic user menu time-out (menu switches back/ when mains is re-applied, and the error buffer is not cleared.
OFF automatically. The error buffer will only be cleared when the “clear” command
– Auto Volume levelling (AVL). is used in the SAM menu.
How to Activate Note:

To activate analogue SDM, use one of the following methods: • If the TV is switched “off” by a power interrupt while in SDM,
• Press the following key sequence on the RC transmitter: the TV will show up in the last status of SDM menu as soon
“062596” directly followed by the MENU button. as the power is supplied again. The error buffer will not be
• Short one of the “Service” pads on the TV board during cold cleared.
start (see Figure 5-2). Then press the mains button • In case the set is accidentally in Factory mode (with an “F”
(remove the short after start-up). displayed on the screen), pressing and holding “VOL-“
Caution: When doing this, the service-technician must button for 5 seconds and then followed by pressing and
know exactly what he is doing, as it could damage the holding the “CH-” button for another 5 seconds should exit
television set. the Factory mode.
To activate digital SDM:
• Press the following sequence on the RC transmitter: 5.2.3 Service Alignment Mode (SAM)
“062593” directly followed by the MENU button.
Purpose
• To change option settings.
• To display / clear the error code buffer.
• To perform alignments.
Specifications
• Operation hours counter (maximum five digits displayed).
SDM
• Software version, error codes, and option settings display.
• Error buffer clearing.
• Option settings.
• Software alignments (White Tone).
• NVM Editor.
• Set screen mode to full screen (all content is visible).
• Set Smart Picture to “Game”.
19130_008_110426.eps
110426
How to Activate
To activate SAM, use one of the following methods:
Figure 5-2 Service pads (SSB component side)
• Press the following key sequence on the remote control
transmitter: “062596” directly followed by the INFO[i+] /OK
On Screen Menu button. Do not allow the display to time out between entries
After activating SDM, the following items are displayed, with while keying the sequence.
“SDM” in the upper right corner of the screen to indicate that the • Or via ComPair.
television is in Service Default Mode.
Menu items and explanation: After entering SAM, the following items are displayed, with
• xxxxx: Operating hours (in decimal). “SAM” in the upper right corner of the screen to indicate that the
• AAAAAAB-XX.YY: See paragraph Software television is in Service Alignment Mode.
Identification, Version, and Cluster for the SW name
definition.
2011-Apr-29
Menu items and explanation: soon as the power is supplied again. The error buffer will
1. System Information. not be cleared.
• Op Hour: This represents the life timer. The timer • In case the set is in Factory mode by accident (with “F”
counts normal operation hours, but does not count displayed on screen), pressing and holding “VOL-“ button
Stand-by hours. for 5 seconds and then followed by pressing and holding
• MAIN SW ID: See paragraph Software Identification, the “CH-” button for another 5 seconds should exit the
Version, and Cluster for the SW name definition. Factory mode.
• ERR: Shows all errors detected since the last time the
buffer was erased. Five errors possible. 5.2.4 Customer Service Mode (CSM)
• OP1/OP2: Used to read-out the option bytes. See
paragraph 6.6 Option Settings in the Alignments
Purpose
section for a detailed description. Ten codes are
The Customer Service Mode shows error codes and

possible.
information on the TV’s operation settings. A call centre can
2. Tuner.
instruct the customer (by telephone) to enter CSM in order to
• AGC Adjustment: See paragraph 6.3.1 for
identify the status of the set. This helps them to diagnose
instructions.
problems and failures in the TV before making a service call.
• Store: To store the data.
The CSM is a read-only mode; therefore, modifications are not
3. Clear. Erases the contents of the error buffer. Select this
possible in this mode.
menu item and press the MENU RIGHT key on the remote
control. The content of the error buffer is cleared.
4. Options. To set the option bits. See paragraph 6.6 Option Specifications
Settings in the “Alignments” chapter for a detailed • Ignore “Service unfriendly modes”.
description. • Set volume to 25%.
5. RGB Align. To align the White Tone. See White Tone • Set Smart Picture to “Game”.
Alignment: for a detailed description. • Set Smart Sound to “Standard”.
6. NVM Editor. To change the NVM data in the television set. • Line number for every line (to make CSM language
See also paragraph 5.6 Fault Finding and Repair Tips. independent).
7. Upload to USB. • Set the screen mode to full screen (all contents on screen
8. Download from USB. is visible).
9. Initialise NVM. To initialize a (corrupted) NVM. Be careful, • After leaving the Customer Service Mode, the original
this will erase all settings! settings are restored.
10. Auto ADC. Refer to chapter 6. Alignments for detailed • Possibility to use “CH+” or “CH-” for channel surfing, or
information. enter the specific channel number on the RC.
11. EDID Write Enable. Enables EDID writing (not applicable
to Berlinale sets). How to Activate
12. Service Data. Virtual Key board for character input entry. To activate CSM, press the following key sequence on a
standard remote control transmitter: “123654” (do not allow the
How to Navigate display to time out between entries while keying the sequence).
• In the SAM menu, select menu items with the UP/DOWN
keys on the remote control transmitter. The selected item After entering the Customer Service Mode, the following items
will be indicated. When not all menu items fit on the screen, are displayed:
use the UP/DOWN keys to display the next / previous
menu items. Menu Explanation CSM1
• With the LEFT/RIGHT keys, it is possible to: 1. Set Type. Type number, e.g. 32PFL3605/78. (*)
– Activate the selected menu item. 2. Production code. Product serial no., e.g.
– Change the value of the selected menu item. BZ1A1008123456 (*). BZ= Production centre, 1= BOM
– Activate the selected sub menu. code, A= Service version change code, 10= Production
• When you press the MENU button twice while in top level year, 08= Production week, 123456= Serial number.
SAM, the set will switch to the normal user menu (with the 3. Installation date. Indicates the date of the first initialization
SAM mode still active in the background). To return to the of the TV. This date is acquired via time extraction.
SAM menu press the MENU button. 4. a - Option Code 1. Option code information (group 1).
• The “INFO[i+]/OK” key from the user remote will toggle the b - Option Code 2. Option code information (group 2).
OSD “on/off” with “SAM” OSD remaining always “on”. 5. SSB. Indication of the SSB factory ID (= 12nc). (*)
• Press the following key sequence on the remote control 6. Display. Indication of the display ID (=12 nc). (*)
transmitter: “062596” directly followed by the MENU button 7. PSU. Indication of the PSU factory ID (= 12nc).
to switch to SDM (do not allow the display to time out
between entries while keying the sequence). (*) If an NVM IC is replaced or initialized, these items must be
re-written to it. ComPair will foresee in a possibility to do this.
How to Store SAM Settings Also the NVM editor in the SAM menu can be used.
To store the settings changed in SAM mode (except the
OPTIONS and RGB ALIGN settings), leave the top level SAM Menu Explanation CSM2
menu by using the POWER button on the remote control 1. Current Main SW. Shows the main software version.
transmitter or the television set. The mentioned exceptions 2. Standby SW. Shows the Stand-by software version.
must be stored separately via the STORE button. 3. Panel Code. Shows the current display code.
4. Bootloader ID. Shows the Bootloader software ID.
How to Exit 5. NVM Version. The NVM software version no.
Switch the set to STANDBY by pressing the mains button on 6. Flash ID. Shows the flash ID.
the remote control transmitter or the television set, or by
keying-in the “00” sequence on a standard RC-transmitter. Menu Explanation CSM3
1. Signal Quality. Shows the signal quality (No Tuned/Poor/
Note: Average/Good).
• When the TV is switched “off” by a power interrupt while in 2. Child lock. This is a combined item for locks. If any lock
SAM, the TV will show up in “normal operation mode” as (Preset lock, child lock, lock after, or Parental lock) is
active, this item indicates “active”.
2011-Apr-29
3. HDCP Keys. Indicates if the HDMI keys (or HDCP keys)

are valid or not. Not applicable to Berlinale series. TO TV
4. not used TO TO TO
UART SERVICE I2C SERVICE UART SERVICE
5. not used CONNECTOR CONNECTOR CONNECTOR
6. not used
7. not used.
ComPair II
Multi
RC in function
RC out
Create a CSM dump on an USB stick

There will be CSM dump to a plugged in USB-stick upon Optional Power Link/ Mode
Switch Activity I2C RS232 /UART
entering CSM-mode. An extended CSM dumpwill be created
when the “OK” button on RC is pressed in CSM while a USB
stick is plugged in. A direct CSM flash dump will be created
PC

when the buttons “red + 2679” on the remote control are
pressed in CSM while a USB stick is plugged in.
How to Exit
To exit CSM, use one of the following methods:
ComPair II Developed by Philips Brugge
• Press the MENU/HOME button on the remote control
Optional power
transmitter. HDMI 5V DC
I2C only
• Press the POWER button on the remote control
transmitter.
• Press the POWER button on the television set. 10000_036_090121.eps
091118
5.3 Service Tools Figure 5-3 ComPair II interface connection
5.3.1 ComPair Caution: It is compulsory to connect the TV to the PC as

shown in the picture above (with the ComPair interface in
between), as the ComPair interface acts as a level shifter. If
Introduction
one connects the TV directly to the PC (via UART), ICs will be
ComPair (Computer Aided Repair) is a Service tool for Philips
blown!
Consumer Electronics products. and offers the following:
1. ComPair helps you to quickly get an understanding on how
to repair the chassis in a short and effective way. How to Order
2. ComPair allows very detailed diagnostics and is therefore ComPair II order codes:
capable of accurately indicating problem areas. You do not • ComPair II interface: 3122 785 91020.
have to know anything about I2C or UART commands • ComPair UART interface cable: 3138 188 75051.
yourself, because ComPair takes care of this. • Program software can be downloaded from the Philips
3. ComPair speeds up the repair time since it can Service web portal.
automatically communicate with the chassis (when the uP
is working) and all repair information is directly available. Note: For this chassis, “Pgammar” and “T-con NVM”
4. ComPair features TV software up possibilities. programming (VCOM alignment) are added to ComPair.
Specifications Additional cables for VCOM Alignment

ComPair consists of a Windows based fault finding program • ComPair/I2C interface cable: 3122 785 90004.
and an interface box between PC and the (defective) product. • ComPair/VGA adapter cable: 9965 100 09269.
The (new) ComPair II interface box is connected to the PC via
an USB cable. For the TV chassis, the ComPair interface box
5.4 Error Codes
and the TV communicate via a bi-directional cable via the
service connector(s).
5.4.1 Introduction
How to Connect
This is described in the ComPair chassis fault finding database. Error codes are required to indicate failures in the TV set. In
principle a unique error code is available for every:
• Activated (SW) protection.
• Failing I2C device.
• General I2C error.
The last five errors, stored in the NVM, are shown in the
Service menu’s. This is called the error buffer.
The error code buffer contains all errors detected since the last
time the buffer was erased. The buffer is written from left to
right. When an error occurs that is not yet in the error code
buffer, it is displayed at the left side and all other errors shift one
position to the right.
An error will be added to the buffer if this error differs from any
error in the buffer. The last found error is displayed on the left.
An error with a designated error code never leads to a
deadlock situation. It must always be diagnosable (e.g. error
buffer via OSD or blinking LED or via ComPair).
In case a failure identified by an error code automatically
results in other error codes (cause and effect), only the error
code of the MAIN failure is displayed.
2011-Apr-29
5.4.2 How to Read the Error Buffer

Example (2): the content of the error buffer is “12 9 6 0 0”
You can read the error buffer in three ways: After entering SDM, the following occurs:
• On screen via the SAM/SDM/CSM (if you have a picture). • 1 long blink of 5 seconds to start the sequence,
Example: • 12 short blinks followed by a pause of 1.5 seconds,
– ERROR: 0 0 0 0 0 : No errors detected • 9 short blinks followed by a pause of 1.5 seconds,
– ERROR: 6 0 0 0 0 : Error code 6 is the last and only • 6 short blinks followed by a pause of 1.5 seconds,
detected error • 1 long blink of 1.5 seconds to finish the sequence,
– ERROR: 9 6 0 0 0 : Error code 6 was detected first and • The sequence starts again with 12 short blinks.
error code 9 is the last detected (newest) error
• Via the blinking LED procedure (when you have no 5.5.2 Displaying the Entire Error Buffer
picture). See paragraph 5.5 The Blinking LED Procedure.

• Via ComPair. Additionally, the entire error buffer is displayed when Service
Mode “SDM” is entered.
5.4.3 Error codes
5.6 Fault Finding and Repair Tips

The “layer 1” error codes are pointing to the defective board.
They are triggered by LED blinking when CSM is activated. In
the LC10 platform, only two boards are present: the SSB and Notes:
the PSU/IPB, meaning only the following layer 1 errors are • It is assumed that the components are mounted correctly
defined: with correct values and no bad solder joints.
• 2: SSB • Before any fault finding actions, check if the correct
• 3: IPB/PSU options are set.
• 4: Display
5.6.1 NVM Editor
Table 5-1 Error code table
In some cases, it can be convenient if one directly can change
Layer-1 Defective Layer-2 the NVM contents. This can be done with the “NVM Editor” in
error code board error code Defective device SAM mode. With this option, single bytes can be changed.
2 SSB 11 Speaker DC protection active on SSB
3 IPB/PSU 16 +12 missing/low, PSU defective Caution:
3 IPB/PSU 17 POK line defective • Do not change these, without understanding the
2 SSB 35 EEPROM I2C error on SSB, M24C16 function of each setting, because incorrect NVM
2 SSB 34 Tuner I2C error on SSB settings may seriously hamper the correct functioning
2 SSB 23 HDMI Mux IC I2C error on SSB - Berninale of the TV set!
models with Mux only • Always write down the existing NVM settings, before
2 SSB 27 Channel decoder on SSB changing the settings. This will enable you to return to the
4 Display 18 LCD Panel inverter error. INV_STATUS original settings, if the new settings turn out to be incorrect.
(Inverter) (for 32” sets only)
5.6.2 Load Default NVM Values

5.4.4 How to Clear the Error Buffer
It is possible to download default values automatically into the
The error code buffer is cleared in the following cases: NVM in case a blank NVM is placed or when the NVM first 20
• By using the CLEAR command in the SAM menu: address contents are “FF”. After the default values are
• By using the following key sequence on the remote control downloaded, it is possible to start-up and to start aligning the
transmitter: “062599” directly followed by the OK button. TV set. To initiate a forced default download the following
• If the contents of the error buffer have not changed for 50 action has to be performed:
hours, the error buffer resets automatically. 1. Switch “off” the TV set with the mains cord disconnected
from the wall outlet (it does not matter if this is from “Stand-
Note: If you exit SAM by disconnecting the mains from the by” or “Off” situation).
television set, the error buffer is not reset. 2. Short-circuit the SDM pads on the SSB (keep short
circuited, see Figure 5-2).
3. Press “P+” or “CH+” on the local keyboard (and keep it
5.5 The Blinking LED Procedure pressed).
4. Reconnect the mains supply to the wall outlet.
5.5.1 Introduction 5. Release the “P+” or “CH+” when the set is started up and
has entered SDM.
The software is capable of identifying different kinds of errors. When the downloading has completed successfully, the set will
Because it is possible that more than one error can occur over perform a restart. After this, put the set to Stand-by and remove
time, an error buffer is available, which is capable of storing the the short-circuit on the SDM pads.
last five errors that occurred. This is useful if the OSD is not
working properly.
Alternative method:
Errors can also be displayed by the blinking LED procedure. It is also possible to upload the default values to the NVM with
The method is to repeatedly let the front LED pulse with as ComPair in case the SW is changed, the NVM is replaced with
many pulses as the error code number, followed by a period of a new (empty) one, or when the NVM content is corrupted.
1.5 seconds in which the LED is “off”. Then this sequence is After replacing an EEPROM (or with a defective/no EEPROM),
repeated. default settings should be used to enable the set to start-up and
allow the Service Default Mode and Service Alignment Mode to
Example (1): error code 4 will result in four times the sequence be accessed.
LED “on” for 0.25 seconds / LED “off” for 0.25 seconds. After
this sequence, the LED will be “off” for 1.5 seconds. Any RC
command terminates the sequence. Error code LED blinking is
in red color.
2011-Apr-29
5.6.3 No Picture 3. Execute the command "NVM Copy" > "NVM Copy from
USB" to copy the USB data to NVM (this takes about a
When you have no picture, first make sure you have entered minute to complete).
the correct display code. To write an NVM mask to the TV, ensure that the mask has the
See Display Option Code Selection for the instructions. correct format: "L11M11L_NVM_U2T.MAK" (0x00 to write
protect, 0xFF to overwrite).
5.6.4 Unstable Picture via HDMI input Important: The file must be located in the "/Repair" directory
of the USB stick.
Check (via ComPair) if HDMI EDID data is properly

programmed. 5.7.4 How to Copy EDID Data to/from USB
5.6.5 No Picture via HDMI input Write EDID Data to USB

1. Insert the USB stick into the USB slot while in SAM mode.
2. Execute the command "NVM Copy" > "EDID Copy to
Check if HDCP key is valid. This can be done in CSM.
USB", to copy the EDID data to the USB stick. The
filename on the USB stick will be named
5.6.6 HDMI CEC Not Functioning "L11M11L_EDID_T2U.BIN" (this takes a couple of
seconds).
Go to Home/Menu ->Setup -> Installation -> Preference and
set the Easylink option to “on”. Also check if the connected Write EDID Data to TV
device is CEC enabled. 1. First, ensure (via a PC) that the filename on the USB stick
has the correct format: "L11M11L_EDID_U2T.BIN".
5.6.7 TV Will Not Start-up from Stand-by. 2. Insert the USB stick into the USB slot while in SAM mode.
3. Execute the command "NVM Copy" > "EDID Copy from
Possible Stand-by Controller failure. Reflash the SW. USB" to copy the USB data to EDID (this takes about a
minute to complete).
5.7 Software Upgrading Important: The file must be located in the "/Repair" directory
of the USB stick.
5.7.1 Introduction
5.7.5 How to Copy the Channel List to/from USB
It is possible for the user to upgrade the main software via the
USB port. This allows replacement of a software image in a Write Channel List Data to USB
stand alone set. A description on how to upgrade the main 1. Insert the USB stick into the USB slot while in SAM mode.
software can be found in the DFU or on the Philips website. 2. Execute the command "Channel list Copy to USB", to copy
the channel list data to the USB stick. The filename on the
5.7.2 Main Software Upgrade USB stick will be named "L11M11L_CHTB_T2U.BIN" (this
takes a couple of seconds).
Automatic Software Upgrade
In “normal” conditions, so when there is no major problem with Write Channel List Data to TV
the TV, the main software and the default software upgrade 1. First, ensure (via a PC) that the filename on the USB stick
application can be upgraded with the “autorun.upg” (FUS part has the correct format: "L11M11L_CHTB_U2T.BIN".
in the one-zip file). This can also be done by the consumers 2. Insert the USB stick into the USB slot while in SAM mode.
themselves, but they will have to get their software from the 3. Execute the command "Chanel list Copy from USB" to
commercial Philips website or via the Software Update copy the USB data to the TV (this takes about a minute to
Assistant in the user menu (see DFU). The “autorun.upg” file complete).
must be placed in the root of your USB stick.
Important: The file must be located in the "/Repair" directory
How to upgrade: of the USB stick.
1. Copy the “autorun.upg” file to the root of an USB stick.
2. Insert the USB stick in the side I/O while the set is “on”.
The TV will prompt an upgrade message. Press “Update”
to continue, after which the upgrading process will start. As
soon as the programming is finished, the set must be
restarted.
In the “Setup” menu you can check if the latest software is
running.
5.7.3 How to Copy NVM Data to/from USB
Write NVM Data to USB

2. Execute the command "NVM Copy" > "NVM Copy to USB",
to copy the NVM data to the USB stick. The NVM filename
on the USB stick will be named
"L11M11L_NVM_T2U.BIN" (this takes a couple of
seconds).
Write NVM Data to TV

1. First, ensure (via a PC) that the filename on the USB stick
has the correct format: "L11M11L_NVM_U2T.BIN".
2011-Apr-29
EN 18 6. L11M1.1L LA Alignments
6. Alignments
Index of this chapter: 6.3 Software Alignments
6.1 General Alignment Conditions
6.2 Hardware Alignments
With the software alignments of the Service Alignment Mode
6.3 Software Alignments
(SAM) the Tuner and RGB settings can be aligned.
6.4 ADC gain adjustment
6.6 Option Settings
6.3.1 Tuner Adjustment (RF AGC Take Over Point)

Note: Figures below can deviate slightly from the actual
situation, due to the different set executions.
Purpose: To keep the tuner output signal constant as the input

signal amplitude varies.
General: The Service Default Mode (SDM) and Service
Alignment Mode (SAM) are described in chapter 5. Menu
navigation is done with the CURSOR UP, DOWN, LEFT or No alignment is necessary, as the AGC alignment is done
RIGHT keys of the remote control transmitter. automatically.
6.3.2 RGB Alignment

6.1 General Alignment Conditions
Before alignment, set the picture as follows:
Perform all electrical adjustments under the following
Picture Setting
conditions:
Dynamic backlight Off
• Power supply voltage (depends on region):
Dynamic Contrast Off
– AP-NTSC: 120 VAC or 230 VAC / 50 Hz (± 10%).
Colour Enhancement Off
– AP-PAL-multi: 120 - 230 VAC / 50 Hz (± 10%).
Picture Format Unscaled
– EU: 230 VAC / 50 Hz (± 10%).
Light Sensor Off
– LATAM-NTSC: 120 - 230 VAC / 50 Hz (± 10%).
Brightness 50
– US: 120 VAC / 60 Hz (± 10%).
Colour 0
• Connect the set to the mains via an isolation transformer
Contrast 100
with low internal resistance.
• Allow the set to warm up for approximately 15 minutes.
White Tone Alignment:
• Measure voltages and waveforms in relation to correct
• Activate SAM.
ground (e.g. measure audio signals in relation to
• Select “RGB Align.“ and choose a color temperature.
AUDIO_GND).
• Use a 100% white screen as input signal and set the
Caution: It is not allowed to use heatsinks as ground.
following values:
• Test probe: Ri > 10 Mohm, Ci < 20 pF.
– “Red BL Offset” and “Green BL Offset” to “7” (if
• Use an isolated trimmer/screwdriver to perform
present).
alignments.
– All “White point” values initial to “127”.
6.2 Hardware Alignments In case you have a color analyzer:

• Measure with a calibrated (phosphor- independent) color
There are no hardware alignments foreseen for this chassis, analyzer (e.g. Minolta CA-210) in the centre of the screen.
but below find an overview of the most important DC voltages Consequently, the measurement needs to be done in a
on the SSB. These can be used for checking proper functioning dark environment.
of the DC/DC converters. • Adjust the correct x,y coordinates (while holding one of the
White point registers R, G or B on max. value) by means of
Test Specifications (V)
decreasing the value of one or two other white points to the
Description Point Min. Typ. Max. Diagram
correct x,y coordinates (see Table 6-1 White D alignment
+12VS F118 11.7 12.3 12.91 B01_DC-DC
values). Tolerance: dx: ± 0.002, dy: ± 0.002.
+3V3_STBY F113 3.2 3.3 3.4 B01_DC-DC
• Repeat this step for the other color Temperatures that need
+3V3_SW F133 3.17 3.34 3.5 B01_DC-DC
to be aligned.
+1V25_SW F131 1.18 1.25 1.31 B01_DC-DC
• When finished return to the SAM root menu and press
+5V_SW F132 4.98 5.25 5.51 B01_DC-DC
STANDBY on the RC to store the aligned values to the
+1V8_SW F125 1.74 1.83 1.92 B01_DC-DC
NVM.
+1V1_SW F101 0.94 1.1 1.15 B01_DC-DC
+5VS F235 4.94 5.2 5.46 B02A_Tuner_IF
+2V5_SW F136 2.38 2.5 2.62 B01_DC-DC
Table 6-1 White D alignment values
+5VTUN_DI F236 4.75 5 5.25 B02_Tuner_IF
GITAL Value Cool (11000 K) Normal (9000 K) Warm (6500 K)
VLS_15V6 FJ01 14.82 15.6 16.38 B08C_TCON DC/DC
x 0.276 0.287 0.313
VGH_35V FM02 34.0 35.0 36.0 B08F_MINI LVDS
y 0.282 0.296 0.329
VGL_-6V FJ14 -7.0 -6.0 -5.0 B08C_TCON DC/DC
VCC_3V3 FJ13 3.14 3.3 3.47 B08C_TCON DC/DC
VCC1V8 FJ05 1.71 1.8 1.89 B08C_TCON DC/DC If you do not have a color analyzer, you can use the default
values. This is the next best solution. The default values are
average values coming from production (statistics).
• Set the RED, GREEN and BLUE default values per
temperature according to the values in the “Tint settings”
table.
• When finished return to the SAM root menu and press
STANDBY on the RC to store the aligned values to the
NVM.
2011-Apr-29
Alignments L11M1.1L LA 6. EN 19
Table 6-2 Tint settings 32" 6.5 TCON Alignment (= VCOM alignment)
Colour Temp. R G B New requirement for “TCON on SSB” project:

Cool t.b.d. t.b.d. t.b.d. • The purpose of VCOM alignment is to obtain an equal
Normal t.b.d. t.b.d. t.b.d. voltages for both Positive and Negative LC polarity. This is
Warm t.b.d. t.b.d. t.b.d. important to avoid “Flicker” and “Image Sticking”.
• The P-Gamma + VCOM calibrator IC, ISL24837 is used for
Table 6-3 Tint settings 40" VCOM adjustment.
• The adjusted VCOM data will be stored inside on-chip
Colour Temp. R G B
memory and will be automatically recalled during each
Cool t.b.d. t.b.d. t.b.d.
power-up.
Normal t.b.d. t.b.d. t.b.d.

Warm t.b.d. t.b.d. t.b.d. ComPair (see 5.3.1 ComPair) will foresee in a possibility to do
this alignment.
6.4 ADC gain adjustment

6.6 Option Settings
Use a Quantum Data Patters Generator 802BT and apply a
“PgcWrgb” image (“dot, cross and color bar mix pattern”) 6.6.1 Introduction
according to Figure 6-1.
The microprocessor communicates with a large number of I2C
ICs in the set. To ensure good communication and to make
digital diagnosis possible, the microprocessor has to know
which ICs to address. The presence/absence of these specific
ICs (or functions) is made known by the option codes.
Notes:
• After changing the option(s), save them with the STORE
command.
• The new option setting becomes active after the TV is
switched “off” and “on” again with the mains switch (the
EAROM is then read again).
6.6.2 How To Set Option Codes

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When the NVM is replaced, all options will require resetting. To
be certain that the factory settings are reproduced exactly, you
Figure 6-1 “PgcWrgb” pattern
must set all option numbers. You can find the correct option
numbers see sticker on the inside the cabinet.
6.4.1 YPbPr
How to Change Options Codes
Following instructions result in correct alignment of ADC gain, An option code (or “option byte”) represents eight different
offset and phase, related to YPbPr input signal. Apply a signal options (bits). All options are controlled via ten option bytes
of format “1080i25”. (OP#1... OP#10).
• Apply following signals to the YPbPr input connectors: Activate SAM and select “Options”. Now you can select the
– Pr signal of 0.7 Vp-p1 / 75 ohm to the red cinch option byte (OP#1... OP#10) with the CURSOR UP/ DOWN
connector. keys, and enter the new 3 digit (decimal) value. For the correct
– Y signal of 0.7 Vb-p2 / 75 ohm with a sync pulse of 0.3 factory default settings, see the sticker inside the set.
Vp-p1 to the green cinch connector.
– Pb signal of 0.7 Vb-p1 / 75 ohm to the blue cinch
connector.
• Select the input source to YPbPr input.
• In SAM, initiate the “Auto ADC” calibration command.
Upon appearance of the “Auto ADC Completed” message, the
alignment is completed.
Notes:
1. Peak-to-Peak
2. Black-to-Peak.
6.4.2 PC VGA
Following instructions result in correct alignment of ADC gain,

offset and phase, related to PC VGA input signal. Apply a
signal of format “DMT1060”.
• Apply following signals to the PC VGA input connector:
– Red signal of 0.7 Vp-p1 / 75 ohm.
– Green signal of 0.7 Vp-p1 / 75 ohm.
– Blue signal of 0.7 Vp-p1 / 75 ohm.
• Select the input source to PC VGA input.
• In SAM, initiate the “Auto ADC” calibration command.
Upon appearance of the “Auto ADC Completed” message, the
alignment is completed.
2011-Apr-29
EN 20 7. L11M1.1L LA Circuit Descriptions
7. Circuit Descriptions
Index of this chapter: 7.1 Introduction
7.1 Introduction
7.2 Power Supply
The LC11M1.1L LA chassis is a digital chassis using a
7.3 Video
Mediatek chipset. It covers screen sizes of 32" to 40".
7.3.1 Video: Front-End
7.4 Audio
The xxPFL3x06D/xx sets come with the “Thriller” styling, and
7.5 Inputs
the xxPFL5x06D/xx come with the “Berlinale” styling.
7.5.1 Inputs: HDMI
7.5.2 Inputs: USB
Main key components are the Mediatek MT5363 integrated

“System On Chip” (SoC) that supports multimedia video/audio
Notes:
input, and the integrated TCON (Timing Controller) part for the
• Only new circuits (circuits that are not published recently)
are described. LCD panel.
• Figures can deviate slightly from the actual situation, due
to different set executions. System SoC is based on MT5363:
• For a good understanding of the following circuit • NAND Flash – 128 Mbyte, NumOnyx/Hynix.
descriptions, please use chapter 9. Block Diagrams and • DDR – 128 Mbyte (32 × 16M, 2 pcs), Hynix.
10. Circuit Diagrams and PWB Layouts. Where necessary, • Use internal MT5363 Stand-by micro-controller.
you will find a separate drawing for clarification.
Tuner/Frontend configuration:
• Half NIM tuner (VA1E1BF2403) from Sharp.
• Toshiba Channel Decoder (TC90517).
Interfaces for debug and SW upgrade:

• UART (3.5 mm jack).
• USB port.
• JTAG.
Refer to Figure 7-1 for details.
19130_009_110426.eps
110429
Figure 7-1 L11M1.1L LA Architecture
2011-Apr-29
Circuit Descriptions L11M1.1L LA 7. EN 21

19130_010_110426.eps
110426
Figure 7-2 SSB cell layout
19130_047_110429.eps
110429
Figure 7-3 SSB key component overview
2011-Apr-29

19130_048_110429.eps
110429
Figure 7-4 TCON key component overview
7.2 Power Supply

1.1 V ±0.05 V
+12 VS DCDC
The Power Supply Unit (PSU) in this chassis is a buy-in and is
1.8 V ±0.09 V
a black-box for Service. When defective, a new panel must be DCDC DDR2 × 2
ordered and the defective panel must be returned for repair, 3.3 V ±0.16 V 1.25 V ±0.06 V
DCDC Regulator
unless the main fuse of the unit is broken. Always replace the
fuse with one with the correct specifications! This part is 5.25 V ±0.26 V 2.5 V
DCDC ±0.12 V Dig Demod MT5363
commonly available in the regular market. Regulator
Regulator USB NVM

Refer to Figure 7-5 and Figure 7-6 for details
5.25 V ±0.25 V
EEPROM
The power supply system consists of stand-by, switched and Tuner
regulated voltages. The stand-by voltage, +3V3STBY, will be
Flash
available once AC supply is provided to the system. As for the
other voltages, namely switched and regulated voltages, these +3.3 VSTBY
are available once the STANDBY signal is pulled “low” to allow 19130_012_110426.eps
other supplies from the IPB to turn “on”. The switched supplies 110426
are generated from the main +12VS supply, while the regulated
supplies are derived from the switched supplies. There are a Figure 7-5 Power distribution overview
number of detection circuits to detect the following supplies:
+12VS, +12Vdisp and +3V3_SW. The +12VS is the main
supply voltage from the IPB that enables the switched voltages
to be generated. The +12Vdisp is the supply to the display
timing controller, while the +3V3_SW is powering the
microprocessor and its flash memory.
The mains power supply unit distribute the following voltages to

the TV system: +3V3STBY, 12VS, +24Vaudio, and +24Vpanel
for panel with inverter (or) high voltage (HV) for inverterless
panel. Requirement of the High Voltage depend on the
specification of the LCD panel.
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Figure 7-6 Power timing overview
2011-Apr-29
7.3 Video • Toshiba channel decoder TC90517 (external ISDB-T

channel decoder).
7.3.1 Video: Front-End • Analog demodulator (using internal MT5363 analog
demodulator - pin AH35 VIP, AH37 VIN).
Key components for the tuner section are:

Refer to Figure 7-7 for details.
• Sharp Half NIM tuner VA1E1BF2403,

19130_013_110426.eps
110426
Figure 7-7 Front-end functional block diagram
2011-Apr-29
7.4 Audio Table 7-2 Microprocessor control lines - 2 -
In this chassis, audio processing is done by the following key A_STBY

From uP to class D Class D outputs
components:
SW_MUTE LOW - MUTE
• MT5363 micro-processor for input selection and audio
HIGH - Operating (unmute)
processing,
RESET_AUDIO LOW HIGH Operating (unmute)
• TPA3123D2 class-D power amplifier for 2 x 10 W
HIGH LOW Class D shutdown (mute)
amplification.
MUTE LOW - Operating (unmute)
HIGH - MUTE
The audio profile (optimal setting per screen size and styling) is
DC_PROT LOW - DC detected -> set going to protection
stored at Option 10 (bit 0 to bit 4). Profile 1 for 32-inch Dali and
HIGH - No DC -> normal operating
profile 2 for 40-inch Dali.

Table 7-1 Microprocessor control lines - 1 -
From uP At class D Usage

SW_MUTE SW_MUTE Will pull audio signals to LOW upon DC drops, help
to eliminate plop sound.
RESET_AUDIO A_STBY Control SHUTDOWN pin of class D amplifier:
ON/OFF the amplifier
MUTE MUTE Corresponding to the MUTE button on Remote
Control, to mute/unmute speakers
DC_PROT DC_PROT Detecting present of DC at speakers output and
feedback to uP. This will trigger TV into protection
mode. This is important to protect speakers
19130_014_110426.eps
110426
Figure 7-8 Audio signal flow
7.5 Inputs
7.5.1 Inputs: HDMI
In this chassis, the main Mediatek MT5363 SoC has an on-chip

HDMI multiplexer.
Refer to Figure 7-9 for the implementation.
2011-Apr-29
RX2 TMDS
OPWR2_5V PWR5V
HDMI_HPD2 SIDE_HDMI_HPD1
HDMI_SCL2 SIDE_HDMI_SCL1
HDMI_SDA2 SIDE_HDMI_SDA1
ARC eHDMI+
HDMI_CEC CEC
MT5363
GPIO_7
GPIO 7 EDID_WC
EDID WC EDID
RX1 TMDS

OPWR1_5V PWR5V
HDMI_HPD1 HDMI_HPD2
HDMI_SDA1 HDMI_SDA2
HDMI_SDA1 HDMI_SCL2
ASPDIF_OUT EDID
ARC_SW
Buffer & Selection

circuit
19130_015_110426.eps
110426
Figure 7-9 HDMI implementation
Signal description:
• TMDS: Signals that contain audio and video information.
• PWR5V: Signal to detect the presence of any HDMI source
connected to the TV’s HDMI input port.
• SIDE_HDMI_HPD1 and HDMI_HPD2: Signal to initiate
reading of the TV EDID data by the source device.
• I2C: The EDID data reading and the HDCP authentication
process runs via I2C.
• CEC: Signal direct connected between inputs and uP.
• EDID_WC: Signal used to disable the write protect pin of
the EEPROM. When updating, the program will temporarily
pull this pin “LOW” before writing new data.
7.5.2 Inputs: USB
In this chassis, the main Mediatek MT5363 SoC has an on-chip

USB processor.
Refer to Figure 7-10 for the implementation.
18980_207_100402.eps
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Figure 7-10 USB implementation
2011-Apr-29
EN 26 8. L11M1.1L LA IC Data Sheets
8. IC Data Sheets
This section shows the internal block diagrams and pin layouts
of ICs that are drawn as "black boxes" in the electrical diagrams
(with the exception of "memory" and "logic" ICs).
8.1 Diagram B01, Type TPS54386 (IC7116 and 7117)

BLOCK DIAGRAM
2 BOOT1
BP
CLK1 Level
1 PVDD1
Shift
Current
f(IDRAIN1) + DC(ofst) Comparator
S Q
+
GND 4 R
R Q
+
f(IDRAIN1)
FB1 7 Overcurrent Comp
0.8 VREF + 3 SW1
RCOMP BP
f(ISLOPE1) f(IMAX1)
Soft Start Weak

SD1 CLK1 Pull-Down
1 CCOMP Anti-Cross
Conduction MOSFET
VDD2 f(ISLOPE1)
Ramp
Gen 1
TSD 1.2 MHz Divide CLK1
6 A 6 A Oscilator by 2/4 f(ISLOPE2)
EN1 5 SD1 Ramp
Gen 2
Internal
EN2 6 SD2 CLK2
Control
UVLO
150 k
SEQ 10 BP
FB1 Output
150 k Undervoltage 13 BOOT2
FB2 Detect
BP
CLK2 Level
14 PVDD2
Shift
Current
Comparator FET
f(IDRAIN2) + DC(ofst)
S Q Switch
+
GND 4 R
R Q
+
f(IDRAIN2)
FB2 8
Overcurrent Comp
0.8 VREF + 12 SW2
RCOMP BP
f(ISLOPE2) f(IMAX2)
Soft Start Weak

SD2 CLK2 Pull-Down
2 CCOMP Anti-Cross
Conduction MOSFET
5.25-V
BP 11 PVDD2
Regulator
150 k
BP
Level
ILIM2 9
Select
150 k 0.8 VREF

References
IMAX2 (Set to one of three limits)
UDG-07124
PIN CONNECTIONS
HTSSOP (PWP)
(Top View)
PVDD1 1 14 PVDD2
BOOT1 2 13 BOOT2
SW1 3 12 SW2
GND 4 Thermal Pad 11 BP

(bottom side)
EN1 5 10 SEQ
EN2 6 9 ILIM2
FB1 7 8 FB2
18980_300_100402.eps
100402
Figure 8-1 Internal block diagram and pin configuration
2011-Apr-29
IC Data Sheets L11M1.1L LA 8. EN 27
8.2 Diagram B01A DC-DC, Type LD1117D (IC7119)
Block diagram
LD1117DT

Pinning information
DPAK
F_15710_166.eps
100402
2011-Apr-29
8.3 Diagram B03 Class-D & muting, Type TPA3123 (IC7400)
Block diagram 1 F
0.22 F
LIN BSR
22 H 470 F
RIN ROUT
1 F 0.68 F
PGNDR
PGNDL 0.68 F
1 F

BYPASS LOUT
22 H 470 F
AGND BSL
0.22 F
PVCCL
AVCC
PVCCR
VCLAMP
Shutdown
SD 1 F
Control
MUTE
GAIN0
} Control
GAIN1
Pinning information
PVCCL 1 24 PGNDL
SD 2 23 PGNDL
PVCCL 3 22 LOUT
MUTE 4 21 BSL
LIN 5 20 AVCC
RIN 6 19 AVCC
BYPASS 7 18 GAIN0
AGND 8 17 GAIN1
AGND 9 16 BSR
PVCCR 10 15 ROUT
VCLAMP 11 14 PGNDR
PVCCR 12 13 PGNDR
TERMINAL
24-PIN I/O/P DESCRIPTION
NAME
(PWP)
Shutdown signal for IC (low = disabled, high = operational). TTL logic levels with compliance to
SD 2 I
AVCC
RIN 6 I Audio input for right channel
LIN 5 I Audio input for left channel
GAIN0 18 I Gain select least-significant bit. TTL logic levels with compliance to AVCC
GAIN1 17 I Gain select most-significant bit. TTL logic levels with compliance to AVCC
Mute signal for quick disable/enable of outputs (high = outputs switch at 50% duty cycle, low =
MUTE 4 I
outputs enabled). TTL logic levels with compliance to AVCC
BSL 21 I/O Bootstrap I/O for left channel
PVCCL 1, 3 P Power supply for left-channel H-bridge, not internally connected to PVCCR or AVCC
LOUT 22 O Class-D 1/2-H-bridge positive output for left channel
PGNDL 23, 24 P Power ground for left-channel H-bridge
VCLAMP 11 P Internally generated voltage supply for bootstrap capacitors
BSR 16 I/O Bootstrap I/O for right channel
ROUT 15 O Class-D 1/2-H-bridge negative output for right channel
PGNDR 13, 14 P Power ground for right-channel H-bridge.
PVCCR 10, 12 P Power supply for right-channel H-bridge, not connected to PVCCL or AVCC
AGND 9 P Analog ground for digital/analog cells in core
AGND 8 P Analog ground for analog cells in core
Reference for preamplifier inputs. Nominally equal to AVCC/8. Also controls start-up time via
BYPASS 7 O
external capacitor sizing.
AVCC 19, 20 P High-voltage analog power supply. Not internally connected to PVCCR or PVCCL
Connect to ground. Thermal pad should be soldered down on all applications to properly
Thermal pad Die pad P
secure device to printed wiring board.
18440_302_090303.eps
090318
2011-Apr-29
8.4 Diagram B04 MT5363 Power, Type MT5363 (IC7700)
Block diagram
CVBS/ HDMI Audio
YC Input Rx Input Panel CVBS
HDMI In Audio Audio LVDS VDAC DDR

VADCx4
DVB-T ATD I/F Demod ADC TVE DRAM
TV

Controller
Decoder
Audio In Mix andPost
VDO-In Processing
TS
ARM Demux JPEG,MPEG
PreProc H.264 Vplane
OSD
BIM scaler/PIP
2-D Graphic scaler
MDDi
IO Bus Standby uP CKGEN

Audio DSP
Audio I/F JTAG IrDA SIF USB2.0 Watchdog Serial Flash Servo ADC
Audio DAC BScan PVR RTC UART MS,SD PWM NAND Flash
SPDIF, I2S
18850_300_100107.eps
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Figure 8-4 Internal block diagram
2011-Apr-29
Pinning information
LT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
A RCLK0_ RDQ10 RDQ15 RDQS0_ RDQ14 RDQ12 AO1N AOCKN
B VCC2IO RCLK0 RDQ8 RDQS1 RDQS0 RDQ11 VCC2IO AO0N AO2N AO3N
C VCC2IO RDQ13 RDQS1_ DVSS RDQM1 VCC2IO AO1P AOCKP
D RA9 VCC2IO RDQ5 RDQ0 DVSS RDQ9 VCC2IO AO0P AO2P AO3P
E RA12 VCC2IO RDQ2 DVSS RDQM0 VCC2IO VCC2IO AE0N AE2N

F RA5 AVDD33_L
RA7 VCC2IO RDQ7 DVSS RDQ6 VCC2IO AE1N AECKN
VDS
G RA10 RA3 VCC2IO DVSS DVSS RDQ3 VCC2IO AE0P AE2P
AVDD33_L
H RBA2 RBA0 RA1 VCC2IO RDQ1 RDQ4 AE1P AECKP
VDS
J AVSS33_L
RBA1 DVSS DVSS VCC2IO
VDS
K RCKE RWE_ MEMTN MEMTP
L RCAS_ DVSS DVSS
M RA13 RA2 RA4 RA6 TP_VPLL
DVSS AVDD12_L AVDD12_V

N RA11 RA0 RODT RVREF
VDS PLL
P RA8 AVDD12_M AVSS12_L AVSS12_V

RCS_ RRAS_ RVREF DVSS
EMPLL VDS PLL
R VCC2IO VCC2IO VCC2IO DVSS VCCK DVSS
AVSS12_M
T RDQ19 RDQ20 RDQ30 RDQ25 DVSS DVSS DVSS
EMPLL
U RDQ22 RDQ17 RDQM3 VCCK DVSS DVSS
V RDQM2 RDQS2 RDQ28 RDQ27 VCCK DVSS DVSS DVSS
W RDQS2_ DVSS DVSS DVSS DVSS DVSS
Y RDQS3 DVSS RDQ24 RDQ31 VCCK VCCK DVSS DVSS
AA RDQS3_ RDQ29 RDQ26 VCCK DVSS DVSS
AB RDQ16 RDQ23 REXTDN DVSS DVSS DVSS DVSS
AC RDQ21 RDQ18 VCC2IO DVSS DVSS DVSS
AD RCLK1 RCLK1_ VCC2IO VCC2IO DVSS VCCK VCCK VCCK
AE VCC2IO VCC2IO GPIO39 DVSS VCCK VCCK VCCK
AF VCC2IO VCC2IO GPIO37 GPIO40 DVSS VCCIO33-1 VCCIO33-1
AG GPIO38 GPIO41 GPIO42 VCCK
AH GPIO44 GPIO43 JTDO VCCK
AJ JTDI JTMS VCCK VCCK
AK JTRST_ JTCK VCCK VCCK
AVDD12_U HDMI_SCL HDMI_SDA HDMI_HPD

AL VCCK VCCK VCCK VCCK PWR5V_1
SB 2 2 1
AVSS12_U AVDD33_U AVDD33_H HDMI_SCL

AM VCCK VCCK VCCK VCCK PWR5V_2 OPCTRL1
SB SB DMI 1
AVSS33_H HDMI_SDA
AN HDMI_HPD
VCCK VCCK POCE1_ USB_VRT HDMI_CEC
DMI 2 1
AVSS33_U AVDD12_H
AP OSDA0 OSCL0 PDD1 PDD4 RX2_0 RX2_2 RX1_0 RX1_2
SB DMI
AR PDD0 PAALE PDD2 PDD6 USB_DM RX2_C RX2_1 RX1_C RX1_1
AVSS33_U AVSS33_U
AT POCE0_ POWE_ PARB_ PDD5 RX2_0B RX2_2B RX1_0B RX1_2B
SB SB
AU POOE_ PACLE PDD3 PDD7 USB_DP RX2_CB RX2_1B RX1_CB RX1_1B
AV 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
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2011-Apr-29
Pinning information
20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 RT
AO4N GPI O35 GPI O21 GPI O3 ETTXD0 ETRXD2 ETRXD0 A
DVSS GPIO32 GPIO26 GPIO17 GPIO9 ETTXD3 ETRXCLK ETRXD1 ETRXDV B
AO4P GPIO36 GPIO28 GPIO22 GPIO11 GPIO4 ETTXD1 ETRXD3 ETCRS C
DVSS GPIO34 GPIO27 GPIO18 GPIO10 ETTXEN ETTXCLK ETRXER ETMDIO D

AE3N DVSS GPIO30 GPIO20 GPIO12 GPIO6 ETTXD2 ETTXER ETMDC E
CI_MOSTR
AE4N GPIO33 GPIO24 GPIO16 GPIO8 ETPHYCLK CI_MCLKO CI_MCLKI F
T
AE3P DVSS GPIO29 GPIO19 GPIO14 GPIO5 ETCOL CI_MIVAL CI_MOVAL G
CI_MISTR CI_MDO0 H
AE4P VCCIO33 GPIO25 GPIO15 GPIO7 VCCIO33 CI_MDI0
T
GPIO31 GPIO23 GPIO13 VCCIO33 GPIO2 OPWM0 OPWM1 J
AOSDATA3 ASPDIF GPIO0 GPIO1 K
FSRC_WR ALIN AOBCK AOSDATA0 L
IF_AGC RF_AGC AOMCLK AOLRCK M
TUNER_DA TUNER_CL
DVSS VCCK VCCK AOSDATA4 N
TA K
DVSS DVSS DVSS OSCL2 OSDA2 AOSDATA1 AOSDATA2 P
DVSS DVSS DVSS OSDA1 OSCL1 U1RX R
AVDD33_A VCXO T
DVSS DVSS VCCK OPWM2 U1TX
DAC1
AVSS33_A U
DVSS DVSS DVSS AL1 AR2 AR3
DAC1
DVSS DVSS VCCK VCCIO33 AR1 AL2 AL3 V
DVSS DVSS VCCK AVDD33_R VCCIO33 VCCIO33 VCCIO33 W

EF_AADC
AVSS33_R AVDD33_A AVSS33_A AIN5_R_A AIN6_R_A

DVSS DVSS VCCK
EF_AADC ADC ADC ADC Y
ADC
VMID_AAD AIN4_L_AA AIN5_L_AA AIN6_L_AA
DVSS DVSS VCCK AA
C DC DC DC
AIN1_L_AA AIN4_R_A AIN2_R_A AIN3_R_A
DVSS DVSS VCCK AB
DC ADC ADC
ADC
AIN1_R_A AIN0_R_A AIN3_L_AA
DVSS DVSS DVSS AC
ADC ADC DC
AIN0_L_AA AIN2_L_AA
DVSS DVSS DVSS AD
DC DC
AVSS33_A
VCCK VCCK DVSS AR0 AE
DAC0
AVDD12_T AVDD33_
AVICM AL0 AF
VDPLL ADAC0
AVDD12_A AVDD12_S AVDD33_ AVSS33_D

PLL YSPLL DEMOD1 EMOD1 AG
AVSS12_P AVSS12_P AVDD12_A ADCINN_D ADCINP_D
LL LL DCPLL EMOD AH
EMOD
AVSS33_D
XTALO XTALI AJ
IG
AVSS33_SI AVDD33_D ADIN1_SR AVDD33_X AVSS33_X
AK
F IG V TAL_STB TAL
AVSS33_V AVDD33_S ADIN0_SR ADIN3_SR ADIN5_SR
OPWRSB ORESET_ AL
GA_STB IF V V V
AVDD10_L AVDD12_R ADIN2_SR ADIN4_SR
OPCTRL0 FS_VDAC BYPASS0 AF
V V AM
DO GB
AVDD33_V AVSS12_R AVDD33_V AVDD33_C
OPCTRL2 OIRI MPXP MPXN AN
GA_STB GB DAC VBS
VDAC_OUT TUNER_BY
U0TX SOG SOY1 PR1P PB0P SY0 CVBS2P
1 AP
PASS
AVSS33_V AVSS33_C
OPCTRL3 HSYNC COM COM1 Y0P SY1 CVBS0N AR
DAC VBS
VDAC_OUT
U0RX BP RP PB1P COM0 SC0 CVBS3P CVBS0P AT
2
OPCTRL4 VSYNC GP Y1P SOY0 PR0P SC1 CVBS1P AU
20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 RB
18850_302_100107.eps
100222
2011-Apr-29
8.5 Diagram B06B Analog I/O - Audio, Type LM833 (IC7B01)
Pinning information
Output 1 1 8 VCC

2 1 7 Output 2
Inputs 1
3 6
2 Inputs 2
VEE 4 5
(Top View)
18520_306_090325.eps
100402
Figure 8-7 Pin configuration
2011-Apr-29
8.6 Diagram T01C TCON DC/DC, Type ISL97653 (IC7J00)
Block diagram RSET HVS VREF PROT
HVS SAWTOOTH
CM1
LOGIC GENERATOR
GM AMPLIFIER
FBB - SLOPE LX1
+ COMPENSATION LX2
VREF BUFFER
CONTROL
(
UVLO COMPARATOR LOGIC
-
+
RSENSE
CURRENT PGND1
PGND2

0.75 VREF AMPLIFIER
680kHz
FREQ
OSCILLATOR
VL
PVIN1,2 CURRENT LIMIT

REGULATOR
COMPARATOR
REFERENCE BIAS
CDEL AND
CURRENT LIMIT
EN SEQUENCE CONTROLLER THRESHOLD
VL
PVIN1,2 CB
SUPN
LXL1
LXL2
NOUT CONTROL
LOGIC
CURRENT
BUFFER CM2
LIMIT GM AMPLIFIER
COMPARATOR CURRENT AMPLIFIER
FBN - - FBL
+ - ( +
+
0.2V VREF
CURRENT LIMIT SLOPE
THRESHOLD COMPENSATION
UVLO COMPARATOR
- SAWTOOTH
+ GENERATOR
0.4V
LDO-CTL
0.75 VREF LDO
- CONTROL
+ LOGIC2 LDO-FB
SUPP TEMP TEMP

FBP - SENSOR
+
VREF
POUT
SUPP
C1- C1+ POUT C2+ C2- DRN CTL COM
Pinning information
LDO-CTL
LDO-FB
PVIN1
AGND
PROT
LX2
LX1
PGND2
PGND1
TEMP
40 39 38 37 36 35 34 33 32 31
PVIN2 1 30 COMP
CB 2 29 FBB
LXL1 3 28 RSET
LXL2 4 27 HVS
PGND3 5 ISL97653A 26 EN
40 LD 6X6 QFN
PGND4 6 TOP VIEW 25 CDEL
CM2 7 24 CTL
FBL 8 23 DRN
VL 9 22 COM
VREF 10 21 POUT
11 12 13 14 15 16 17 18 19 20
C1P
C2P
C1N
C2N
FBP
FBN
SUPP
SUPN
NOUT
PGND5
18770_307_100217.eps
100217
2011-Apr-29
Personal Notes:
10000_012_090121.eps
090121
2011-Apr-29
Block Diagrams L11M1.1L LA 9. EN 35
9. Block Diagrams
Wiring Diagram 32" (Thriller)
WIRING DIAGRAM 32" THRILLER
Board Level Repair
Component Level Repair

Only For Authorized Workshop
LCD DISPLAY
(1004) TO DISPLAY
8G51

8319
14P
1M99
MAIN POWER SUPPLY LOUDSPEAKER
TO BACKLIGHT
32 PSLC-P002A (5213)
(1005)
9P
1G51
1M99
51P
8M99
9P
11P
1M95
1M99
USB
SSB
8M95
B 3139 123 6505.x
11P
1M95
(1150)
4P
8P
1M20 1735
TUNER
HDMI
KEYBOARD CONTROL
(1114)
HDMI VGA
8M20
2P3
1308
J1
3P
N L
8308
INLET
J2 J1 IR/LED BOARD
3P 8P (1112)
1M95 (B01) 1M99 (B01) 1M20 (B04c) 1735 (B03) 1G51 (B04D)
8191
1. +3V3STDBY 1. +12VDISP 1. LIGHT-SENSOR 1. LEFT_SPEAKER 1. +VDISP-INT

MAINS CORD
2. STANDBY 2. +12VDISP 2. GND 2. GND-AUDIO 2. +VDISP-INT

3. GND 3. GND 3. RC 3. GND-AUDIO 3. +VDISP-INT
4. GND 4. GND 4. LED-2 4. RIGHT_SPEAKER 4. +VDISP-INT
5. GND 5. LAMP-ON 5. +3V3STBY |
6. +12VS 6. BACKLIGHT-PWM 6. LED-1 51. GND
7. +12VS 7. BACKLIGHT-BOOST 7. KEYBOARD
8. +12VS 8. INV_STATUS 8. +5V_SW
9. +24VAUDIO 9. POWER-OK
10. GND-AUDIO
19130_044_110428.eps
11. ...
110429
2011-Apr-29
Wiring Diagram 40" (Thriller)

WIRING DIAGRAM 40" THRILLER
TO DISPLAY LCD DISPLAY TO DISPLAY

Board Level Repair (1004)
Component Level Repair

8KA1
Only For Authorized Workshop 8KA2
8319
TO BACKLIGHT
TO BACKLIGHT
8316
1KA2 1KA1
80P 80P
TCON
T (1157)
1N01
LOUDSPEAKER 51P
1319 1316
(5213)
1P3 1P3
HIGH VOLTAGE

8G51
MAIN POWER SUPPLY
9P
1M99
IPB 40 PLHE-P986A
(1005)
1G51
51P
SSB
11P
B 3139 123 6505.x
1M95
(1150)
8M99 9P
1M99
8M95
11P
1M95
TUNER
4P
8P
1M20 1735
USB
HDMI
HDMI HDMI VGA

PHONE
SPDIF
8M20
2P3
1308
N L
KEYBOARD CONTROL
(1114)
1M95 (B01) 1M99 (B01) 1M20 (B04c) 1KA1 (T01F) 1KA2 (T01F)
1. +3V3STDBY 1. +12VDISP 1. LIGHT-SENSOR 1. GND 1. GND
8308 2. STANDBY 2. +12VDISP 2. GND | |
J1
3P
INLET 3. GND 3. GND 3. RC 11. VLS_15V6 11. VLS_15V6
4. GND 4. GND 4. LED-2 12. VLS_15V6 12. VLS_15V6
5. GND 5. LAMP-ON 5. +3V3STBY | |
6. +12VS 6. BACKLIGHT-PWM 6. LED-1 33. VCC_3V3 33. VCC_3V3
7. +12VS 7. BACKLIGHT-BOOST 7. KEYBOARD 34. VCC_3V3 34. VCC_3V3
8. +12VS 8. INV_STATUS 8. +5V_SW | |
9. +24VAUDIO 9. POWER-OK 78. VGH_35V 78. VGH_35V
IR/LED BOARD 10. GND-AUDIO 79. VGL_-6V 79. VGL_-6V
J2 J1 11. ...
1735 (B03) 80. GND 80. GND
(1112) 1G51 (B04D) 1. LEFT_SPEAKER
3P 8P
8191
1. +VDISP-INT 2. GND-AUDIO
2. +VDISP-INT 3. GND-AUDIO 1N01 (T01A)
MAINS CORD
3. +VDISP-INT 4. RIGHT_SPEAKER 1. GND

4. +VDISP-INT |
| 47. +VDISP-INT
51. GND 48. +VDISP-INT
49. +VDISP-INT
50. +VDISP-INT
|
51. GND
19130_043_110428.eps
110429
2011-Apr-29
Block Diagram Video

VIDEO
B02A TUNER +5VTUN_DIGITAL B02A DIGITAL DEMOD B04 MT5363: B04D LVDS DISPLAY T01A LVDS T01B TCON CONTROL T01E MPD T01F MINI LVDS
1201 7302 7700 DISLAY 7H01
VA1E1BF2403 TC90517FG MT5363BIMG VPP1501BFG
5208
8 1KA1
B04C MAC-CI B08A
+B RESET_DEMOD 42 1KA1 1N01 81
B04C DIGITAL 58 TSO_VALID G34 B05 HDMI-LVDS INTERFACE
CI_MIVAL 60 1 79
TUNER DEMODULATOR VGL_-6V
59 TSO_SYNC H33 7L00 78
CI_MISTRT VGH_35V
10 ISL24016IRTZ 72
IF_OUT+ 61 TSO_CLK F35
CI_MCLKI LEVEL CS(1-12)
11 DIF_P 30 RXO ASIC_CS 61
IF_OUT- 60 TSO_DATA0 H35 AO PX1 PX1 SHIFTER
6 CI_MDIO VH
SCL AGCCNTI 9
7 (I2C) 50
SDA B04C CONTROL TO DISPLAY
9 IF_AGC M31 LLV(0-7)
IF_AGC AGC_IF 13
3 7218 RF_AGC M33 AE PX2 PX2 RXE 34
RF_AGC AGC_RF
47 33
VCC_3V3
4 48 12
3 49 11
7217 VLS_15V6
RF_AGC_SW 2 50 10
B04C RF_AGC_SW +VDISP-INT
1 60 VL
+VDISP-INT T01D P GAMMA & 2
B06B AUDIO-VIDEO
B06C ANALOG I/O - VIDEO B06B ANALOG I/O VCOM & NVM 1
AUDIO
7K00 1KA2
3B08 ISL24837IRZ
SOY0-AV1 Y0N AT29 81
1C01 SOY0 REF 79
3C24 3B07 VOLTAGE VL/VH VGL_-6V
12 SC1_G 5C05 SY0P Y0P AR28
MT5363 78
Y Y0P GEN VGH_35V
SC1_B 5C04 3C23 SPB0P 3B09 PB0P AP29 72
9 PB0P
CVI-1 PB 3B11
SC1_CVBS_OUT 5C03 3C21 SPR0P PR0P AU30 61
PR0P VH
7 50
PR TO DISPLAY
AK22 RLV(0-7)
PBR0N 13

SOY1-AV2 3B00 AP25 34
1C02 SOY1
33
3C25 3B01 VCC_3V3
12 SY1P_SC2 5C02 SY1P AU26 12
Y Y1P
3C22 3B03 11
PB1P_SC2 5C01 SPB1P AT27 VLS_15V6
9 PB1P 10
CVI-2 PB
PR1P_SC2 5C00 3C20 SPR1P 3B05 VL
AP27
PR1P 2
7
PR 3B02 1
2C06
SY1N AR26
Y1N
1C03
B04C CONTROL B05B USB

AVIN 2 CVBS_AV3 AP35
CVBS CVBS_2P 1D01
1
1
USB 2.0
2C07
GND_CVBS AR36 AR10 USB_DM 2
CVBS_0N CONNECTOR SIDE
USB_DM
3 2
AU10 USB_DP 3 SW UPLOAD

USB_DP
4
4 JPEG
B06D VGA MP3
1E01
1 VGA_R VGA_Rp RP AT25 RP
2
10
VGA_G VGA_Gp GP AU24
15
5
GP B04C CONTROLLER
3 VGA_B VGA_Bp BP AT23
BP 7708
13 H-SYNC HSYNC AR22
1
6
HSYNC H27U1G8F2BTR
11
14 V-SYNC VSYNC AU22
VSYNC
VGA AP23
2E08
2E03
SOG FLASH
CONNECTOR SOG PDD NAND_PDD(0-7)
AR24
1Gb
GN
COM
B05A HDMI & MUX B05 HDMI-LVDS

1902
1 M_RX2_2 AP19 B04B DRAM
B04B DDR
3 M_RX2_2B AT19
1
2
4 M_RX2_1 AR18
RDQ RDQ(0-31)
6 M_RX2_1B AU18
7 M_RX2_0 AP17 RX1 7600 7601
9 M_RX2_0B AT17 H5PS5162FFR H5PS5162FFR
18
19
10 M_RX2_C AR16
RDQ(0-15)
RDQ(16-31)
12 M_RX2_CB AU16 SDRAM SDRAM

HDMI 2
CONNECTOR 512Mb 512Mb
1901
1 M_RX1_2 AP15
3 M_RX1_2B AT15
VDD
VDD
1
2
4 M_RX1_1 AR14 A1 A1
6 M_RX1_1B AU14
RA RA(0-13)
7 M_RX1_0 AP13 RX2
9 M_RX1_0B AT13 +1V8_SW
18
19
10 M_RX1_C AR12
HDMI 1 (SIDE) 12 M_RX1_CB AU12
CONNECTOR 19130_020_110427.eps
110427
2011-Apr-29
Block Diagram Audio

AUDIO
B02A TUNER B02B DIGITAL DEMOD B04 MT5363: B06B ANALOG I/O - AUDIO B03 CLASS-D & MUTING
+5VTUN_DIG
1201 7700
VA1E1BF2403 7302 MT5363BHMG
5207
8 TC90517FG
B04C MAC-CI
+B B06B ALI_ADAC
DIGITAL 58 TSO_VALID G34
RESET_DEMOD 42 CI_MIVAL
TUNER B04C DEMODULATOR
59 TSO_SYNC H33
CI_MISTRT
10 DIF_N 29
IF_OUT+ 61 TSO_CLK F35 7400
CI_MCLKI 7B01 1735
DIF_P TPA3123D2PWP
11 30
IF_OUT- 60 TSO_DATA0 H35 V37 PREAMPL 2 1 AOUTL 5 22 LEFT_SPEAKER 1
6 CI_MDIO AL_L
SCL AGCCNTI 9 SPEAKER
7 (I2C)
SDA B04C CONTROL u36 PREAMPR 6 7 AOUTR 6 2 LEFT
9 IF_AGC M31 AR_R
IF_AGC AGC_IF CLASS D
POWER GND-AUDIO
3
3 7218 RF_AGC M33
RF_AGC AGC_RF AMPLIFIER SPEAKER
15 RIGHT_SPEAKER 4 RIGHT
MUTE 4
B04C
7217 RESET_AUDIO
RF_AGC_SW B04C A_STBY 2
B04C RF_AGC_SW STANDBY
SW_MUTE
B04C 7408
DC_PROT
B06C ANALOG I/O - VIDEO B06B ALI_DAC B04C DC-DETECTION
1C01
5 AIN0_L-AV1 AD33
AV IN AIN_AADC_0_L
CVI-1 AUDIO
MT5363
L/R 3 AIN0_R-AV1 AC34
AIN_AADC_0_R
1C02
5 AIN1_L-AV2 AB31
AV IN AIN_AADC_1_L

CVI-2 AUDIO B04C CONTROL B05B USB
L/R 3 AIN1_R-AV2 AC32
AIN_AADC_1_R 1D01
1
1
USB 2.0
1C03 AR10 USB_DM 2 CONNECTOR SIDE
USB_DM
3 2
AU10 USB_DP 3 SW UPLOAD

5 SAV_L_IN AA36 USB_DP
4
AIN_AADC_6_L 4 JPEG
AV IN MP3
AVIN AUDIO
8 SAV_R_IN Y37
L/R AIN_AADC_6_R
B04C CONTROLLER
7708
B06B ANALOG I/O - AUDIO H27U1G8F2BTR
1B01
2 DVI_AUL_IN AC36
AIN_AADC_3_L
AV IN FLASH
3 DVI_AUR_IN AB37 PDD NAND_PDD(0-7)
AUDIO AIN_AADC_3_R 1Gb
L/R
1
+3V3
7S09
1B02 74LVC00
2
SPDIF 2 SPDIF_OUT 3 &
OUT 1 ASPDIF_OUT K33
ASPDIF B04B DRAM
4 B04B DDR
eHDMI+ 8 B05 GPIO
5 ARC_SW E28 GPIO_12
ASPDIF
RDQ RDQ(0-31)
B05A HDMI & MUX
1901 B05 HDMI 7600 7601
1 M_RX1_2 AP15 H5PS5162FFR H5PS5162FFR
3 M_RX1_2B AT15
RDQ(0-15)
RDQ(16-31)
1
2
4 M_RX1_1 AR14 SDRAM SDRAM
6 M_RX1_1B AU14 512Mb 512Mb
7 M_RX1_0 AP13 RX1
9 M_RX1_0B AT13
18
19
10 M_RX1_C AR12
VDD
VDD
HDMI 1 (SIDE) 12 M_RX1_CB AU12 A1 A1

CONNECTOR 14
RA RA(0-13)
+1V8_SW
1902
1 M_RX2_2 AP19
3 M_RX2_2B AT19
1
2
4 M_RX2_1 AR18
6 M_RX2_1B AU18
7 M_RX2_0 AP17 RX0
9 M_RX2_0B AT17
18
19
10 M_RX2_C AR16
12 M_RX2_CB AU16
HDMI 2
19130_038_110427.eps
CONNECTOR
110427
2011-Apr-29
Block Diagram Control & Clock Signals

CONTROL + CLOCK SIGNALS
B04 MT5363 7700 B04B DDR T01B TCON CONTROL
MT5363BIMG 7H01
VPP1501BFG
B04B DRAM 7H00
RDQ RDQ(0-31) H5PS5162FFR TCON
CONTROL LLV(0-7) T01F
7600 7601 SDRAM TDQ(0-15)
H5PS5162FFR H5PS5162FFR
512Mb TA(0-12)
RDQ(0-15)
RDQ(16-31)
SDRAM SDRAM TCK L2
RLV(0-7) T01F
512Mb 512Mb TCK# L1
MT5363 A1
OSC_IN SLOPE
T16 GSLOP
T01C
1H00 T01E MPD

J8 K8 J8 K8 27M
B1
OSC_OUT 7L00
RA RA(0-13)
AD1 RCLK1 SL24016IRTZ
CLK
AD3 RCLK1# RESET T9 LEVEL
CLK T01D RST CS(1-12) T01F
50Hz_60Hz U9 CS ASIC_CS SHIFTER
B3 RCLK0 T01D RTC50_60
CLK
A2 RCLK0#
CLK
CONTROLLER B04C GPIO FLASH & EJTAG & DISPLAY INTERFACE P GAMMA & VCOM & NVM
B04C B04C T01D
BYPASS_MODE B23
B08C GPIO_32 EDID_WC
H29 7K00
RF_AGC_SW B29 GPIO_7 B06 B07E
B02A GPIO_9 ISL24837IRZ
A22 LCD-PWR-ONn
DC_PROT AG6 GPIO_35 B04C
B03 GPIO_42
USB_PWR_EN G30 AH3 LAMP-ON VH T01F
B06D GPIO_5 GPIO_43 B01A
USB_OCP E30 AG4 POWER-OK

B06D GPIO_6 GPIO_41 B01A VL T01F
RESET_DEMOD A30 E28 ARC_SW
GPIO_3 GPIO_12 B06B
B02B P
2701 B25
GAMMA
GPIO_26
SDM
2700 7708 25 OUTCOM
A26 OUTCOM
GPIO_21 H27U1G8F2BTR VCOM VCOM
26 INCOM T01F
PANEL BUFER
OUT12
B04C CONTROL
FLASH
PDD NAND_PDD(0-7)
1Gb
24 CS_L
OUT12 T01E
AJ36 1701
XTAL1
U0_RX AT21 3
1700 UART
54M AP21 2 SERVICE
AJ34 U0_TX
XTALO CONNECTOR
1
7710
AL20 STANDBY
OPWRSB B01
1M20
3 RC AN22
OIRI
2 AN14 HDMI_CEC
HDMI_CEC B05A
5 AM21 POWER_DOWN
TO IR/LED PANEL +3V3STBY OPCTRL_0 B04C
AND AU20 MUTE
OPCTRL_4 B03
KEYBOARD CONTROL
4 LED-2 AM37 AR20 SW_MUTE
ADIN_SRV_4 OPCTRL_3 B03
7 KEYBOARD AM35
ADIN_SRV_2 B06D USB
1 LIGHT-SENSOR AL36
ADIN_SRV_5 7D00
TPS2041BD
USB_PWR_EN
EN B04C
OUT USB_OCP
OC B04C
+3V3STBY
7701
BD45292G 1D01
5 1
1
VDD
4 ORESET AL22 AJ5 USB_DM0 2 USB 2.0
VOUT ORESET USB_DM0
3 CONNECTOR
3 2
AK5 USB_DP0
USB_DP0 SIDE
4
4
3
19130_045_110428.eps
110429
2011-Apr-29
Block Diagram I2C

I²C
B04C CONTROLLER B06D VGA B04C CONTROLLER
DC_5V
7700 +3V3_SW
MT5363BIMG
1E01
10
15
3E21
3E22
5
12 4E03 SDA_VGA 4818
B04C CONTROL
3718
3719
AP1 SDA-MAIN 4E02 4817
15 SCL_VGA
1
6
OSDA_0
11
AP3 SCL-MAIN
OSCL_0
VGA
CONNECTOR 5 6 7 8
3717
3716
5 6
7703 7E00 7801
AH1 SYS_EEPROM_WE 7 M24C02 PCA9540BDP
GPIO_44 7702 1G51
M24C64 4816 50
7708 EEPROM I2C SDA_VCOM
H27U1G8F2BTR 7E01 SWITCH TO
EEPROM 4814 49
EDID_WC 7 SCL_VCOM TCON
MT5363 (NVM) B04C
FLASH ERR EDID

PDD NAND 15 SW
1Gb
MAIN NVM +3V3STBY
SW
1701
3746
3747
AT21 3727 3749
U0_RX 3
UART
3728 3748 SERVICE
AP21 2
U0_TX CONNECTOR
1

B2B DIGITAL DEMOD B02A TUNER
+3V3STBY T01A LVDS DISPLAY T01D P GAMMA & VCOM & NVM
VCC_3V3
3746
3747
N34 TUNER_SDA
TUNER_DATA
N36 TUNER_SCL 1N01 1KQB
TUNER_CLK
3K40
3K41
2 SDA-TCON 1
TO
3352
3351
B04B DRAM SSB 3 SCL-TCON 2
B4B DDR 46 45
BYPASS_MODE 4
RDQ RDQ(0-31) 7302 14 FE_SDA B04C
7600 7601 TC90517FG 12 13
H5PS5162FFR H5PS5162FFR 12 FE_SCL RES
DIGITAL 7K00
SDRAM SDRAM DEMODULATOR ISL24837IRZ
3228
3230
512Mb 512Mb 7 6
VOLTAGE
GENERATOR
1201
VA1E1BF2403
RA RA(0-13) MAIN
TUNER
ERR
B05A HDMI & MUX HDMI_PLUGPWR2 16
T01B TCON CONTROL VCC
1901
3907
3908
16 1KQA
AL14 SIDE_HDMI_SDA1
3K54
3K53
HDMI_SDA2 ROM_SDA 2
HDMI 1 (SIDE)
AL12 SIDE_HDMI_SCL1 15 CONNECTOR
HDMI_SCL2 1
ROM_SCL
HDMI_PLUGPWR2
3K56
3K55
1902 U8 T8 5 6
3915
3916
AN18 HDMI_SDA2 16
HDMI_SDA1 7 WP_TCON 3
HDMI 2 7H01 7K04
AM17 HDMI_SCL2 15 CONNECTOR VPP1501BFG M24C64
HDMI_SCL1 RESET 4
5 6 5 6 B08A
TCON EEPROM SW Programmable via USB
7900 7901 CONTROL RES SW Programmable via ComPair
M24C02 M24C02
EEPROM EEPROM
EDID EDID
SW SW
DEBUG ONLY 19130_011_110426.eps
110426
2011-Apr-29
Supply Lines Overview

SUPPLY LINES OVERVIEW
DC - DC HDMI & MUX T01A LVDS DISPLAY
B01 B05A
1N01
1M99 1M99 B02B DIGITAL Demod +3V3STBY +3V3STBY
+12VDISP B01 47 +VDISP-INT
1 1 +2V5_SW +2V5_SW
B04d +5V_SW +5V_SW 48 T01c
B01 B01 TO 1G51
6900 B04D 49
2 2 +1V25_SW +1V25_SW HDMI_PLUGPWR1 SSB 50
B01 6901
3 3 HDMI_PLUGPWR2
+3V3_SW +3V3_SW
4 4 B01
1902 T01B TCON CONTROL
HDMI 2 18 PWR5V_2
5 5 LAMP-ON
B04C CONNECTOR VCC_3V3 VCC_3V3
CONTROL T01c
6 6 BACKLIGHT-PWM 1901 5H02 VDD3V3LVRS
B04C PWR5V_1
B03 CLASS-D & MUTING HDMI 1 SIDE 18
CONTROL CONNECTOR
7 7 BACKLIGHT-BOOST 5H03 VDD3V3IO
+3V3STBY +3V3STBY
B01 VCC_1V8 VCC_1V8
8 8 INV_STATUS +5V_SW +5V_SW T01c
B04C B01 5H00 VDD1V8
CONTROL +12VS +12VS B05B USB
9 9 POWER-OK B01
B06D 5H01 VDD1V8PLL
MAIN CONTROL B01
+24VAUDIO +24VAUDIO
B01
+5V_SW +5V_SW
5H05 DDR2VDD
POWER 1M99 1M95
+3V3STBY 5H06
1 1 B03,B04a,c,d,
SUPPLY 2 2 STANDBY B05a
MTK POWER B06A ANOLOG I/O - HEADPHONE 5H04
B04A B04A
3 3 CONTROL +3V3_SW +3V3_SW
+1V25_SW +1V25_SW B01 VGH_35V VGH_35V
4 4 B01 T01c
+1V1_SW +1V1_SW
5 5 B01
SENCE+1V1_MT5363 B01
6 6 +12VS ANALOG I/O - AUDIO
B03,B04c,B06b +3V3STBY +3V3STBY B06B T01C TCON DC/DC
7 7 7122 B01
RT8283AHGSP B01 +3V3_SW +3V3_SW
5121 +1V8_SW +1V8_SW
8 8 5117 2
Synchronous 3 +3V3_SW B02b,B04a,c,d, B01 +3V3-ARC +VDISP-INT +VDISP-INT
Step-down 7120 B06a,B06b SENCE_1V8
Converter +1V25_SW B01 T01a
IN OUT +12VS +12VS
COM B02b,B04a +3V3_SW +3V3_SW B01 4J04 +VDISP
7123 B01 T01d,e
7J01 5J06 VLS_15V6_B

RT8283AHGSP
5120 2 Synchronous 3 5104 +5V5_TUN
B02a VGA 4J01 VLS_15V6
Step-down B06D
Converter 6122 +5V_SW DDR 7J00 T01f,d
B02a,B03.B04c,
B04B
B01 +5V_SW +5V_SW ISL97653
B06d,B05a,b +1V8_SW +1V8_SW 3J10 3J26 VGL_-6V
1E01 10
7120 B01 VGA 9 3E13 6E05 5E03 DC_5V
6J02 4J02 T01f
+2V5_SW LCD 21 VGH_35V
IN OUT CONNECTOR
COM B02b SUPPLY T01b,f
7124 CONTROLLER 3,4 5J00 VCC_3V3
RT8283AHGSP
B04C T01b,d,f
3J12 VCC_1V8
5115 2 5123 +1V8_SW 39
Synchronous 3 +3V3_SW +3V3_SW T01b
B04a,b
Step-down B01
Converter
7125
RT8283AHGSP +3V3STBY +3V3STBY
5105 2 5106 +1V1_SW B01 T01D P GAMMA & VCOM & NVM
Synchronous 3 +5V_SW +5V_SW
Step-down B04a
B01 1M20
Converter
6102 3130 EN_1 5 VCC_3V3 VCC_3V3
TO
IR/LED T01c
5706 8 VLS_15V6 VLS_15V6
9 9 +24VAUDIO PANEL
T01c
B03 +12VS +12VS 7K00
B01 ISL24837IRZ
10 10 32 VREF_15V2
VOLTAGE T01e
GND-AUDIO GENERA-
11 11 TOR
N.C. B04D LVDS DISPLAY +VDISP +VDISP
T01c
+12VDISP +12VDISP
1G51
B01
7800 5800 +VDISP-INT 1
2 TO 1N01
5801 MPD
SENSE+1V0_MT5363 SENSE+1V1_MT5363 3 T01A T01E
B04a 7802 5802 4 TCON
LCD-PWR-ONn
SENSE_1V8 SENSE_1V8 VREF_15V2 VREF_15V2
B04a T01d
+3V3STBY +3V3STBY +VDISP +VDISP
B01 T01c
+3V3_SW +3V3_SW
B01
B02A TUNER
T01F MINI LVDS
+5V5_TUN +5V5_TUN
B01
7216 VCC_3V3 VCC_3V3
IN OUT 5225 +5VTUN_DIGITAL T01c
COM VGL_-6V VGL_-6V
B08c
+5V_SW +5V_SW VGH_35V VGH_35V
B01
T01c
5222 VLS_15V6 VLS_15V6
+5VS
T01c
19130_005_110426.eps
110426
2011-Apr-29
Circuit Diagrams and PWB Layouts L11M1.1L LA 10. EN 42
10. Circuit Diagrams and PWB Layouts

10-1 B01 393912365052
DC-DC
DC-DC
7122
B01A 12V/3V3 CONVERSION RT8283AHGSP B01A
1M99
5117 I105 3149 2170
2 1 1 F102
VIN BOOT +12VDISP
1M99 2 F103
33R 3100 1R0 100n 5121 F133
7 3 PIN ON STBY 3 F104
EN_1 EN SW +3V3_SW
2158 100K I117 1 12V 0V 4
I137 10u
10u
10u
RES
2154
LAMP-ON
2163
2100
8 5 5 3V 0V 5 F105 3126 68R
10u 16V
SS FB
6 >1.5V 0V 6 F106 3127 68R BACKLIGHT-PWM
22n
22u
22u
BACKLIGHT-BOOST
RES
3140
2101
10 6 F107 3128 68R
2152
7 1.5V 0V 7
2162
4K7 1%
VIA COMP
F108 INV_STATUS
100u 6.3V
GND 9 3V 0V 8
I136 POWER-OK
2179
100n
GND HS 9 F109
SS1_GND
4
9
3n3
10R
3138
RES
2160
2041145-9
10n
SS1_GND
3146
3107
2198
1K5 1%
I106
I118
100K 5%
10n
100p
100p
100p
100p
100p
100p
SS1_GND
12K
SS1_GND
RES
2150
470p
RES
3135
4100
2126
100n
2125
100n
SS1_GND
2127
2128
2131
2132
2133
2134
2135
SS1_GND
12V/5V CONVERSION F135
7123 +5V5_TUN +3V3STBY
RT8283AHGSP
5120 I123 3150 2123
1n0
+12VS
2136
+12VS 2 1
VIN BOOT 3129 STANDBY
33R 3101 1R0 100n I138 5104 6122 F132
EN_1 7 3 +5V_SW 1M95 1M95 68R
EN SW
10u PIN ON STBY 1 F113
100K I120 SS36
10u
10u
10u
RES
2168
2102
2171
2153
2157 22n 8 5 1 3V3 3V3 2 F114
SS FB
10u 16V
1n0
10u
10u
1n0
2u2
RES
2137
2169
2199
2180
2146
RES
I122 2 0V 3V 3 F115
10u
22u
22u
3115
2164
2159
2161
3153
3154
10 6 6 12V 0V
470R
470R
470R
2155
4 F116
27K 1%
VIA COMP
100u 6.3V
GND 7 12V 0V 5 F117
100n
RES 3155
GND HS 8 12V 0V 6 F118 +12VS
4
9
SS2_GND 9 25V 0V 7 F119
3n3
10R
RES
3136
2185
8 F120
2177
9 F121 +24VAUDIO
10 F122 GND-AUDIO
I107
I119
I140
SS2_GND 11 F123
1-2041145-1
SS2_GND

10K
RES
2186
470p
3122
1n0
1n0
1n0
3125
RES
3105
2141
2142
100n
2143
100n
2144
2145
2149
100n
2148
100n
2147
100n
5K1 1%
100K 1%
SS2_GND
SS2_GND SS2_GND
GND-AUDIO GND-AUDIO
GND-AUDIO
12V/1V8 CONVERSION
7124
RT8283AHGSP
5115 I104 3151 2187
2 1
VIN BOOT
33R 3102 1R0 100n I131
5123 F125
EN_1 7 3
EN SW +1V8_SW
100K 3u6
10u
10u
2188
2172
2189
2190 22n 8 5
10u 16V
SS FB
I132 I127 3V3/1V2 CONVERSION
22u
22u
22u
22u
3112
2191
10 6
2138
2183
15K 1%
VIA COMP
100n
6102
100u 6.3V
GND RES 7119
RES 2104
RES 2105
GND HS LD1117DT
BZX384-C6V8
4
9
SS3_GND
5124 5125
2178
I144 I143 F131
4n7
10R
3108
RES
2112
+3V3_SW 3 2
IN OUT +1V25_SW
I141 3116 33R 33R
SS3_GND COM
SENSE_1V8
1K0
I135
I134
3130
15K
22u
10n
22u
22u
10n
2165
2139
100n
2140
2197
2166
2193
2122
RES
1
22u 6.3V
EN_1 SS3_GND
12K
I139
RES
2192
470p
3114
3113
3118
12K 1%
68K 1%
RES
4K7
SS3_GND SS3_GND
3131
SS3_GND
5V/2V5 CONVERSION
7120
LD1117DT25
12V/1V0 CONVERSION 5127 I125 I126 5128 F136
7125 3 2
+5V_SW IN OUT +2V5_SW
RT8283AHGSP
33R 33R
COM
5105 I108 3152 2124
2 1
VIN BOOT
2107
2108
100n
2109
2110
100n
2111
100n
1R0 5106 F101

22u 6.3V
33R 100n
47u 16V
3103 7 3 I110
EN SW +1V1_SW
2195 100K I109 3u6
10u
10u
2176
2175
2181
8 5
10u 16V
SS FB
22n I111 DGND DGND DGND DGND DGND DGND
22u
22u
22u
3106
2151
2106
10 6 2129
2130
12K 1%
VIA COMP
100u 6.3V
GND
GND HS
4
9
SS4_GND
4n7
10R
3111
2167
RES
I142 3117
SENSE+1V1_MT5363
I112
I113
47K
SS4_GND
3K6
RES
2113
470p
3145
3109
3148
ROUND 4.02mm SCREW HOLE ROUND 4.50mm SCREW HOLE SLOT SCREW HOLE
27K 1%
470K 5%
1X02 1X03 1X05 1X04 1X01

REF EMC HOLE REF EMC HOLE REF EMC HOLE EMC HOLE REF EMC HOLE
SS4_GND SS4_GND SS4_GND
2 2011-01-31
1 2011-01-13
PCB SB SSB
3139 123 6505
THRILLER BRZ DIG
19130_016_110426.eps
110426
2011-Apr-29
10-2 B02 393912365052

Tuner
Tuner
B02A B02A
7216
LD29150DT50R
I255 5225 F236

+5V5_TUN 1 3 +5VTUN_DIGITAL
IN OUT
0R
COM
22u
1u0
10n
10u
22u
RES
RES
RES
RES
RES
2277
2278
2280
2279
2281
2282
4209
4210
100n
RES
2
F242 AGND AGND AGND AGND AGND
RF_AGC_SW
7
6
5
7
6
5
+5VS
8
8
10R
10R
10R
10R
10R
10R
10R
10R
RES
RES
RES
RES
10K
3264
1
2
3
4
1
2
3
4
I221 3269 I222

3272-1
3272-2
3272-3
3272-4
3271-1
3271-2
3271-3
3271-4
3265 I220 1K0

7217
BC847BW
1K0 AGND
I254 5222 F235

+5V_SW +5VS
10u
F213 AGND 3270 F247
RF_AGC_EX RF_AGC
1201 10K
22u
10n
2283
2284
VA1E1BF2403
AGND
15
16
MT
2295
47n
22u
RES
2293
2213
1 F201 AGND 7218
ANT_PWR
2 F202 KTK5132E
NC1 100p AGND AGND
3 F203
RF_AGC
4 F204
NC2 AGND AGND
5 F205 AGND 3230
AS
6 F206 FE_SCL
SCL
7 F207
SDA 10R
8 F208 RES 5207 30R
TUNER
+B +5VTUN_DIGITAL
15p
2226
9 F209 5208 4u7 +5VTUN_DIGITAL
IF_AGC
10 A212 2258 100n
IF_OUT+ 2285
11 A213
IF_OUT-
2286
180p
12 A214 3228
IF_OUT_ANALOG AGND AGND 27p
FE_SDA
5226 5227 2287
MT
DIF_N 3262
22u
47u
RES
2296
2294
VIP_ATV
14
13
10R
75R 220n 220n 10n
15p
2225
1n0
RES
2297
AGND
A225 3261 F246
AGND
33p
IF_AGC
5228
330n
2288
AGND
10K
AGND DIF_P 3263 5229 5230 2289
47n
RES
2262
100p
2263
VIN_ATV
75R 220n 220n 10n
2290
AGND AGND
DIF_N
2291
180p
27p
DIF_P
Near Tuner Near MTK5363
2 2011-01-31
1 2011-01-13
PCB SB SSB
3139 123 6505
THRILLER BRZ DIG
19130_017_110426.eps
110426
2011-Apr-29
Digital demodulator
Digital demodulator
B02B B02B
+2V5_SW +1V25_SW
5307 I300 I301 5302
30R 30R
1u0
10n
1u0
2320
2321
100n
2322
2306
100n
2307
100n
2308
100n
2309
100n
2310
+3V3_SW
5306 AGND AGND AGND I302 I303 DGND DGND DGND DGND DGND 5301
30R 30R
1u0
1u0
2318
2323
100n
2301
100n
2302
100n
2303
100n
2304
100n
2305
+1V25_SW
5304 AGND AGND I304 I305 DGND DGND DGND DGND DGND 5303
30R 30R
1u0
1u0
2314
2324
100n
2311
100n
2312
100n
2313
+2V5_SW
DGND DGND I306 DGND DGND DGND 5305
30R
1301 FOR DEVELOPMENT USE
1 3
DEB
1u0
DEB DEB
2317
100n
2316
7301 6301
25.4M 3355
4
2
BC847BW +3V3_SW
18p
18p
DEB
2333
2334
3356 SML-310 1K0
7302 DGND DGND
32
22
20
16
36
56
63
13
35
49
64
34
48
43
TC90517FG
1K0
AGND AGND I307 VDDC ) VDDS
19 21 2335 1n5
I FIL
AGND
PLLVDD
I308 X
DR2VDD
I320 TSO_VALID
DR1VDD
18 58 3354 33R
AD_AVDD
AD_DVDD
O PBVAL DGND

3 53
0 RERR
DIF_P 2 XSEL
1
DGND 54
RLOCK
2339 1u0 30
P
1n2
RES
RES
5308
2341
100n
2340 1u0 29 ADI_AI 55 3353 33R
N RSEORF
DIF_N
2377 100n 28 59 3357 33R TSO_SYNC
P SBYTE
2378 100n 27 ADQ_AI
N
52
AGND SLOCK
2K7
2K7
3331
3332
2336 100n 24
P TSO_CLK
2337 100n 25 AD_VREF 61 3358 33R
N SRCK
AGND TSO_DATA0
2338 100n 26 60 3359 33R
AD_VREF SRDT
AGND
AGND AGND
39 38
DTCLK STSFLG1
DGND
40 9 I325 3339 20K IF_AGC
+3V3_SW DTMB AGCCNTI
8 10
S_INFO AGCCNTR
3349 10K 1 51
DGND 0 STSFLG0
41 TSMD
1
2332
100n
42
SYRSTN
3337 10K 7
AGCI
6
0
I316 11 SLADRS 5
CKI 1 AGND
TUNER_SCL F300 3351 100R I317 45 12
SCL SCL
TUNER_SDA F301 3352 100R I318 46 TN 14 +3V3_SW
SDA SDA
VSS
AD_AVSS
AD_DVSS
PLLVSS
4
23
31
17
15
33
37
44
47
50
57
62
RES
39p
39p
4K7
RES
RES
2379
2380
3350
AGND AGND F306

RESET_DEMOD
5309
DGND DGND DGND DGND
33R
4K7
3360
4306
4312
DGND
4307
DGND
10K
10K
3335
3336
4313
4308 4309 4314
+3V3_SW 4310 4311

AGND
5310 5311
I338
33R 33R
2K7
2K7
3344
3343
F302 FE_SCL
AGND DGND
F303 FE_SDA
2 2011-01-31
1 2011-01-13
PCB SB SSB
3139 123 6505
THRILLER BRZ DIG
19130_018_110426.eps
110426
2011-Apr-29
10-3 B03 393912365052

Class-D & muting
Class-D & muting

B03 +24VAUDIO B03
5400
5401
220R
220R
3400 F400
+24VAUDIO
I411 I412 LEFT_SPEAKER
4R7 GND-AUDIO
22K
22K
22K
22K
2401
2400
220n
2403
2402
220n
5
6
7
8
10n
1K0
1K0
2405
2404
220n
3452
3451
1402
2419
220u 35V
220u 35V
V_NOM
10u 35V
1735
2413
220n
2414
220n
F404 1 LEFT +
F405 2
4
3
2
1
GND-AUDIO GND-AUDIO GND SND
3
GND SND
F406 4
GND-AUDIO RIGHT -
3405-4
3405-3
3405-2
3405-1
7400-1 2041145-4
F401 2406 I401
10n
10n
1K0
1K0
19
20
1
3
10
12
TPA3123D2PWP
3454
3453
2420
2421
AOUTR
47n AVCC L R
PVCC I413 2411
16 RIGHT_SPEAKER
) BSR I415 5402 2415
6 I417 RIGHT_SPEAKER
R CLASS-D 220n
15 35V 220u
F402 2407 I403 IN R 22u
AOUTL 5 AUDIO AMP
L OUT
1403
22 5403 2416
V_NOM
47n L I416 I418

18 LEFT_SPEAKER
0 I414 2412
17 GAIN 21 35V 220u
1 BSL 22u
220n
2408 1u0 I405 11
GND-AUDIO VCLAMP
2409 1u0 I406 7
BYPASS
4
MUTE
2
F411 SD
MUTE I434
PGND 3422-4 F410 3422-3
22K
22K
22K
22K
F412 AGND L R
A_STBY GND_HS
100K 100K
5
6
7
8
8
9
1u0
2433
23
24
13
14
25
3422-2

DC_PROT
2417
220n
2418
220n
GND-AUDIO 100K
40
39
38
4
3
2
1
7400-2
TPA3123D2PWP 3422-1 2426 10u 7408
BC847BW
VIA GND-AUDIO 100K
26 37
3406-4
3406-3
3406-2
3406-1
27 36
VIA GND-AUDIO
1u0
2427
28 VIA VIA 35
29 34
GND-AUDIO GND-AUDIO GND-AUDIO
VIA
GND-AUDIO GND-AUDIO
+12VS
30
31
32
33
DC-DETECTION
GND-AUDIO
F415
1K0
3418
+12VS I424
F408 3412 F416
+5V_SW RES RESERVED
1 6 1K0 3431
4n7
47K
I440
RES
RES
2430
3430
7402-1
BC857BS(COL) 7403 47K
I435
BC847BW 3 2
2 RES
F409 7411 RES
I425 I433 4401 1 1 I436
3411 3413 BC857BW 3432 RES
RES
6400
7412
BAS316
10K
RES
3433
3 2SD2653K
4K7 1K8 2 1K0
4K7
RES
3410
2422
I423 4 7402-2 HP_LOUT
3409 3426
4n7
47K
RES
2424
3420
470u 16V
BC857BS(COL)
I422
5 6402 HP_ROUT
56K 47K
I430
BAT54C 2
I442
3 I429
1 I431
3428
4n7
47K
47K
RES
RES
3408
2431
3434
RES
7406
7404
10K
3419
6401 3 2SD2653K
BC857BW 1K0
F413
+3V3STBY AOUTL
BAS316 RES 3435 I437 RES
7413
AOUTR
3416
RES 2SD2653K
100K
RES
7405
3415 BSS84 1K0
RES
3414
100K
I441
2 3
1R0 4n7
47K
2425
3421
RES
F414 1
SW_MUTE
3427 I432
+3V3STBY 7407
10K
3417
2SD2653K
2423
100n
1K0
RESET_AUDIO I445 3437 I443
10K
3439
F417 3K0
A_STBY
1u0
22K
3438
2432
7414
BC847BW
6403
BAT54C
2 2011-01-31
1 2011-01-13
PCB SB SSB
3139 123 6505
THRILLER BRZ DIG
19130_019_110427.eps
110427
2011-Apr-29
10-4 B04 393912365052

MT5363 Power
MT5363 Power
B04A B04A
+3V3_SW
7700-8
30R
5506
MT5363BIMG
F503
H23 POWER-MAIN C8
F502 5500
H31 D9
+1V25_SW
30R J30 E8
V31 F9
VCCIO33
100n
100n
100n
100n
100n
100n
100n
+3V3_SW
100n
W32 G8
DVSS
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
4u7
2514
W34 G10
4u7
2567
W36 J4
2515
2516
2517
2518
2519
2520
2521
2522
J6
2552
2553
2558
2559
2560
2561
2562
2563
2564
2565
2566
AF13 L4
AF15 VCCIO33-1 L6
DVSS
30R
5501
N14
B1 P15
F500 3500 4u7
B13 R14
+1V8_SW
C2 R18
1R0 2598 VCC2IO
7700-7 C12 T15
DVSS
MT5363BIMG D3 T17
I504
100n
100n
100n
100n
100n
SENSE_1V8 D13 T19
4u7
2588
POWER-MISC E4 U16
E12 U18
2571 1u0
2573 100n
2568
2577
2576
2575
2574
VCC2IO
AM23 E14 V15
AVDD10_LDO DVSS
4u7
100n
100n
100n
100n
100n
100n
F5 V17
22u
2507
AVDD12 AVSS12 F13 V19
AH33 P17 G6 W4
2500
2501
2502
2503
2504
2505
2506
ADCPLL LVDS
AG30 T13 G14 W6
APLL MEMPLL VCC2IO

AP11 AH29 H7 W14
HDMI PLL_1 DVSS
100n
100n
100n
100n
N16 AH31 J14 W16
LVDS PLL_2
P13 AN26 R2 W18
MEMPLL RGB
AM25 AM9 R4 Y3
2582
2581
2580
2584
RGB USB
AG32 P19 R6 Y17
SYSPLL VPLL VCC2IO
AF29 AC6 Y19
TVDPLL DVSS
AL10 AD5 AA16
USB
N18 AD7 AA18
VPLL
AE2 AB13
100n
100n
100n
100n
100n
AVDD33 AVSS33 AE4 AB15
VCC2IO
Y31 Y33 AF1 AB17
AADC AADC DVSS
5502 30R I505 AF33 AE34 AF3 AB19
2508
2509
2510
2512
2513
ADAC0 ADAC0
5503 30R I506 T31 U30 AC14
ADAC1 ADAC1
AN32 AR32 R16 AC16
CVBS CVBS
AG34 AG36 U14 AC18
DEMOD1 DEMOD1
AK31 AJ30 V13 AD13
5504 30R DIG DIG DVSS
AM13 AN12 Y13 AE8
+3V3STBY HDMI HDMI
1u0
1u0
2592 1u0
2597
2599
F15 J18 Y15 AF9
LVDS_1 LVDS VCCK
I502
2593 100n H15 Y29 AA14 B21
2569 100n
2570 100n
LVDS_2 REF_AADC
W30 AK29 AD15 D21
5505 30R REF_AADC SIF
AL30 AP9 AD17 E22
+3V3STBY SIF USB_1 DVSS
2595 10u AM11 AT9 AD19 G22
USB USB_2
2596 100n AN30 AT11 AE14 N20
VDAC USB_3 VCCK
AN24 AR30 AE16 P21
I507 VGA_STB VDAC
AK35 AL24 AE18 P23
XTAL_STB VGA_STB
AK37 AG12 P25
XTAL DVSS
AH7 R20
AJ6 R22
VCCK
AJ8 R24
4u7
2579
AK5 T21
AK7 T23
DVSS
AL2 U20
AL4 U22
SENSE+1V1_MT5363 VCCK
AL6 U24
F501 AL8 V21
+1V1_SW AM1 V23
DVSS
AM3 W20
AM5 W22
VCCK
4u7
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
AM7 Y21
2551
AN2 Y23
100u 6.3V
AN4 AA20
2550
2549
2545
2544
2543
2542
2541
2540
2538
2537
2536
2535
2534
2533
2532
2531
2530
2529
2528
2527
2526
2525
2524
2523
DVSS
N22 AA22
N24 AB21
VCCK
T25 AB23
V25 AC20
W24 AC22
DVSS
Y25 AC24
AA24 AD21
VCCK
AB25 AD23
AE20 AD25
AE22 AE24
2 2011-01-31
1 2011-01-13
PCB SB SSB
3139 123 6505
THRILLER BRZ DIG
19130_021_110427.eps
110427
2011-Apr-29
DDR
DDR
B04B B04B
+1V8_SW
+1V8_SW
3622 F602
1K0 1% 7700-3
MT5363BIMG
100n
100n
100n
100n
100n
100n
100n
100n
DRAM D7 RDQ(0)
0
2630
100n
3623
2608
H11 RDQ(1)
1
47u 16V
1K0 1%
E6 RDQ(2)
2
2600
2601
2602
2603
2604
2605
2606
2607
G12 RDQ(3)
3
H13 RDQ(4)
4
N8 D5 RDQ(5)
1 5
P7 RVREF F11 RDQ(6)
2 6
F7 RDQ(7) 7600
7
A1
E1
J9
M9
R1
J1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
RA(0) N4 B5 RDQ(8) H5PS5162FFR-G7C
0 8
RA(1) H5 D11 RDQ(9)
1 9 VDD VDDQ
RA(2) M3 A4 RDQ(10) RODT 3605-2 56R K9
VDDL
2 10 ODT
RA(3) G4 B11 RDQ(11) RCKE 3603-2 56R K2 A2
3 11 CKE )
RA(4) M5 A12 RDQ(12) RWE# 3603-1 56R K3 E2
4 12 WE 3604-1
RA(5) F1
5 13
C4 RDQ(13) RCS# 3605-4 56R L8
CS
SDRAM L1 RBA(2)
RA(6) M7 A10 RDQ(14) RRAS# 3605-3 56R K7 NC R3
6 14 RAS 56R
RA(7) F3 RA A6 RDQ(15) RCAS# 3600-1 56R L7 R7
7 RDQ 15 CAS 3600-3
RA(8) P1 AB1 RDQ(16) R8 RA(13)
8 16
RA(9) D1 U4 RDQ(17) RBA(0) 3603-4 56R L2
9 17 0 56R
RA(10) G2 AC4 RDQ(18) RBA(1) 3603-3 56R L3 BA G8 RDQ(0)
10 18 1 0
RA(11) N2 T1 RDQ(19) G2 RDQ(1)
11 19 1
RA(12) E2 T3 RDQ(20) RA(0) 3600-2 56R M8 H7 RDQ(2)
12 20 0 2
RA(13) M1 AC2 RDQ(21) RA(1) 3604-2 56R M3 H3 RDQ(3)
13 21 1 3
U2 RDQ(22) RA(2) 3602-4 56R M7 H1 RDQ(4)
22 2 4
RBA(0) H3 AB3 RDQ(23) RA(3) 3604-4 56R N2 H9 RDQ(5)
0 23 3 5
RBA(1) J2 Y5 RDQ(24) RA(4) 3602-2 56R N8 F1 RDQ(6)
1 RBA 24 4 6
RBA(2) H1 T7 RDQ(25) RA(5) 3601-4 56R N3 F9 RDQ(7)
2 25 5 7
AA6 RDQ(26) RA(6) 3602-3 56R N7 DQ C8 RDQ(8)
26 6 A 8
RCLK0 B3 V7 RDQ(27) RA(7) 3601-3 56R P2 C2 RDQ(9)
27 7 9
RCLK0# A2 RCLK0 V5 RDQ(28) RA(8) 3600-4 56R P8 D7 RDQ(10)
28 8 10
RCLK1 AD1 AA4 RDQ(29) RA(9) 3601-1 56R P3 D3 RDQ(11)
29 9 11
RCLK1# AD3 RCLK1 T5 RDQ(30) RA(10) 3604-3 56R M2 D1 RDQ(12)
30 10 12
RCKE K1 Y7 RDQ(31) RA(11) 3602-1 56R P7 D9 RDQ(13)
RCKE 31 11 13
RA(12) 3601-2 56R R2 B1 RDQ(14)
12 14
AB5 E10 RDQM(0) 3605-1 56R B9 RDQ(15)
REXTDN 0 3612 15
RODT N6 C10 RDQM(1) RCLK0 J8
RODT 1
RCS# P3 RDQM V1 RDQM(2) K8 CK B3 RDQM(1)
RCS 2 22R 1% UDM
RWE# K3 U6 RDQM(3) F3 RDQM(0)
RWE 3 LDM

RCAS# L2 F7
RCAS F600 3615
3614
100R
RRAS# P5 B9 RDQS(0) E8 LDQS J2 +1V8_SW
RRAS VREF
RDQS0 A8 RDQS(0)#
3613 1K0 1%
B7 RDQS(1) RCLK0# B7
RDQS1 C6 RDQS(1)# A8 UDQS
22R 1%
3616
2609
3624
100R
V3 RDQS(2)
100n
1K0 1%
VSS VSSQ
VSSDL
RDQS2 W2 RDQS(2)#
Y1 RDQS(3) RDQS(0)
J3
J7
F2
F8
A3
E3
P9
A7
B2
B8
E7
N1
D2
D8
H2
H8
RDQS3 AA2 RDQS(3)# RDQS(0)#
RDQS(1)
RDQS(1)#
+1V8_SW
100n
100n
100n
100n
100n
100n
100n
100n
2628
47u 16V
2620
2621
2622
2623
2624
2625
2626
2627
7601
A1
E1
J9
M9
R1
J1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
H5PS5162FFR-G7C
VDD VDDQ
RODT 3611-3 56R K9
VDDL
ODT
RCKE 3610-3 56R K2 A2
CKE )
RWE# 3610-4 56R K3 E2
WE SDRAM 3609-4
RCS# 3611-1 56R L8 L1 RBA(2)
CS
RRAS# 3611-2 56R K7 NC R3
RAS 56R
RCAS# 3606-1 56R L7 R7
CAS 3606-3
R8 RA(13)
RBA(0) 3610-1 56R L2
0 56R
RBA(1) 3610-2 56R L3 BA G8 RDQ(16)
1 0
G2 RDQ(17)
1
RA(0) 3606-2 56R M8 H7 RDQ(18)
0 2
RA(1) 3609-3 56R M3 H3 RDQ(19)
1 3
RA(2) 3608-1 56R M7 H1 RDQ(20)
2 4
RA(3) 3609-1 56R N2 H9 RDQ(21)
3 5
RA(4) 3608-3 56R N8 F1 RDQ(22)
4 6
RA(5) 3607-1 56R N3 F9 RDQ(23)
5 7
RA(6) 3608-2 56R N7 DQ C8 RDQ(24)
6 A 8
RA(7) 3607-2 56R P2 C2 RDQ(25)
7 9
RA(8) 3606-4 56R P8 D7 RDQ(26)
8 10
RA(9) 3607-4 56R P3 D3 RDQ(27)
9 11
RA(10) 3609-2 56R M2 D1 RDQ(28)
10 12
RA(11) 3608-4 56R P7 D9 RDQ(29)
11 13
RA(12) 3607-3 56R R2 B1 RDQ(30)
12 14
3611-4 56R B9 RDQ(31)
3617 15
RCLK1 J8
K8 CK B3 RDQM(3)
22R 1% UDM
F3 RDQM(2)
LDM
F7
F601 3620
3619
E8 LDQS J2
100R
VREF +1V8_SW
RCLK1# 3618 B7 1K0 1%
A8 UDQS
22R 1%
3621
2629
100n
1K0 1%
VSS VSSQ
VSSDL
RDQS(2)
RDQS(2)#
J3
J7
2 2011-01-31
F2
F8
A3
E3
P9
A7
B2
B8
E7
N1
D2
D8
H2
H8
RDQS(3) 1 2011-01-13
RDQS(3)# PCB SB SSB
3139 123 6505
THRILLER BRZ DIG
19130_022_110427.eps
110427
2011-Apr-29
Controller
Controller
B04C 7700-6
B04C
+3V3_SW +3V3_SW MT5363BIMG
F37 H33 TSO_SYNC

MOSTRT MISTRT
G36 G34 TSO_VALID
MOVAL MIVAL
10K
10K
10K
RES
3700
3701
37A9
7700-4 RES H37 CI CI H35 TSO_DATA0
MT5363BIMG 3726 MDO0 MDI0
F33 F35 TSO_CLK
4K7 MCLKO MCLKI
USB_PWR_EN 3704 100R I700 K35 GPIO J26
3705 I701
0 23 +3V3_SW
USB_OCP 100R K37 F25
1 24 D37 C36
EDID_WC J32 H25
2 25 +3V3_SW ETMDIO ETCRS
RESET_DEMOD A30 B25
3 26 F737
10p
RES
E36 G32
2729
C30 D25 4700 RES BYPASS_MODE
4 27 ETMDC ETCOL
30R
5700
RF_AGC_SW G30 C24 LCD-PWR-ONn
10K
10K
5 28 F31
ARC_SW E30 G24
6 29 ETPHYCLK
5701 H29 E24 F704 2702 100n
7 30
10K
3732
3713
INV_STATUS 100R I758 F29 J24 D33 B33
8 31 3709 F760 3711 CLK CLK
30R B29 B23 LAMP-ON I741
9 32 +3V3_SW F705 3712
D29 F23 7702 D31 D35
100R 4K7
3715
3714
10 33 EN ER
8
C28 D23 +3V3_SW M24C64-WDW6
+3V3_SW 11 GPIO GPIO 34 F706 33R
E34 B37
2730
100n
E28 A22 7703
12 35 ) ER DV
4K7
3710
J28 C22 BC847BW
13 36 ETTX ETRX
G28 AF5 7 (8K × 8) B31 C34
+3V3_SW 14 37 F707 WC D3 D3
10K
10K
3703
3786
H27 AG2 EEPROM
E32 A34
15 38 D2 D2
4K7
F708 I708 C32 B35
37AA
F27 AE6 SCL-MAIN 3716 22R 6 1
16 39 F759 SCL 0 D1 D1
4K7
3707
B27 AF7 VCOM_SW 2 A32 A36
17 40 ADR 1 D0 D0
D27 AG4 F738 3796 100R POWER-OK SDA-MAIN F736 3717 22R 5 3 MAC-CI
18 41 SDA 2
F702 +3V3_SW G26 AG6 F739 DC_PROT
19 42
4K7
3706
E26 AH3 F740
20 43 F761
F701 A26 AH1 SYS_EEPROM_WE
21 44
10p
10p
2703
2704
C26
22
10n
RES
100n
RES 2705
100n
+3V3_SW
PANEL
RES 2701
+3V3_SW
2700
FOR DEBUGGING
RES
+3V3_SW +3V3_SW +3V3_SW
SDM
ONLY
+3V3_SW
10K
10K
10K
10K
10K
4K7
I731
4K7
10K
7708
1K0
12
37
DEB
3762
H27U1G8F2B 5705
10K
3740
RES
3776
3777
3778
+3V3_SW 1702
VCC
220R 1
BACKLIGHT-BOOST 3741
DEB 3780
DEB 3763-1
DEB 3763-2
DEB 3763-3
DEB 3763-4
NAND_PDD(0) 29 1 2
I711 0
NAND_PDD(1) 30 2 JTRST F745 3
1K0 1
2713
100n
2712
100n
NAND_PDD(2) 31 3 JTDI F746 4
2
1700 NAND_PDD(3) 32 4 JTMS F747 5
3
1u0
2706
NAND_PDD(4) 41 IO 5 JTCK F748 6
4
NAND_PDD(5) 42 10 F749 7
54M 5 F751 DEB 3765
NAND_PDD(6) 43 11 JTDO F750 8
3739 6
10p
10p
I713 BOOST_CONTROL
2716
2717
NAND_PDD(7) 44 14

33R 9
7
15 10
1R0
NAND_PCLE I742 16 20 11
CLE
10K
RES
3782
NAND_PALE I743 17 21 F763 13 12
ALE
NAND_POCE I727 9 22
CE_
NAND_POOE 8 23 502382-1170
RE
10K
10K
DEB
DEB
3760
3759
NAND_POWE 18 24 DEB
WE
19 NC 25
WP
6 26
SE
NAND_PARB I726 7 27
R
28
+3V3STBY B
7700-1 33
4K7
4K7
I732
MT5363BIMG 34
35
AJ36 CONTROL AR2 NAND_PDD(0) 38
XTALI 0
4K7
RES
3779
AP5 NAND_PDD(1) 39
1
AJ34 AR6 NAND_PDD(2) 40
XTALO 2
4u7
4u7
1K0
2710
2709
6706
3768
7701 AU6 NAND_PDD(3) 45
BAS316
BD45292G 3
5
T37 PDD AP7 NAND_PDD(4) 46
RES 3774
RES 3775
VCXO 4
VDD AT7 NAND_PDD(5) 47
5
AR8 NAND_PDD(6) 48
I725 1 Φ F721 6
4 ORESET AL22 AU8 NAND_PDD(7)
ER VOUT ORESET 7
I759 L30
FSRC_WR VSS
I756 K5 AT1
MEMTN 0
RES
6707
3769
2711
100n
100K
SUB GND I757 K7 POCE AN6 NAND_POCE
13
36
BAS316
MEMTP 1
2
3
4K7
37A5
M19
+3V3_SW TP_VPLL
AT5 NAND_PARB
PARB +3V3STBY
JTCK AK3 AR4 NAND_PALE
JTCK PAALE
JTDO AH5 AU4 NAND_PCLE
JTDO PACLE
4K7
4K7
4K7
JTRST AK1 AT3 NAND_POWE
JTRST POWE
JTDI AJ2 AU2 NAND_POOE
JTDI POOE
4K7
4K7
RES
RES 4K7
3746
3747
JTMS AJ4
JTMS
3761 AT21 I744 3727 100R
RX 1701
10K U0 AP21 I745 3728 100R 3748 33R F717 2
3718
3719
3720
3721
TX
SCL-MAIN AP3 R36 3
0 RX
SCL-DISP F741 R34 U1 T35 3749 33R F718 1
1 OSCL TX
P31 MSJ-035-29D PPO
2
J34
0 UART (SERVICE) +3V3_SW
F719
SDA-MAIN AP1 J36 I760 3783 4K7

0 OPWM 1
SDA-DISP F742 R32 T33
1 OSDA 2
P33
2 6700 +3V3_SW
6701
1705
1706
3722 10K AN22 I749

OIRI
3758 10K 3723 10K
BZX384-C6V8
BZX384-C6V8
+3V3STBY
4K7
RES FOR ITV

3736
AL32 AM21 I746 3734 100R

0 0
LED-1 RES 3788 100R I754 AK33 AM19 4707 RES +3V3STBY +3V3STBY
1 1 +3V3_SW +3V3_SW
KEYBOARD 3787 100R I753 AM35 AN20 4708 RES
2 OPCTRL 2
RESET_AUDIO
3790
RES
I734
100K
AL34 ADIN_SRV AR20 3738 100R

3 3 BACKLIGHT_CONTROL
4K7
3702
LED-2 3735 100R I733 AM37 AU20 I739 3744 100R
4 4 3791
I714
10K
3729
LIGHT-SENSOR 3737 100R I747 AL36 7710 LIGHT-SENSOR
5 BC847BW STANDBY
10K
10K
10K
AL20 I750 3751 100R
OPWRSB 100R
3730 I755 I761 +3V3_SW
4K7
4K7
1n0
1R0
3753
3754
3724
USB_DP
2722
AU10 AN14 PWM DIMMING

DP CEC
USB_DM AR10 AN18
DM USB SDA1 10K
AN10 AM17
3733
RES 3731 VRT HDMI SCL1 3792
I735
AL14 RC RC
+3V3STBY SDA2
3742
680R
AL12 7705
RES 37A6
RES 37A7
10K SCL2 100R
POWER_DOWN BC847BW
1n0
2723
AL16 SDA-LCD I716 3745 1M20
10K
RES
PWR5V AM15 SCL-LCD F753 1
37AB
SW_MUTE 2
4K7
10K
RES
3757
3789
N36 MUTE F754 3
5K1 1%
CLK 3793
N34 LED-2 F755 4
TUNER DATA F766
1K0
3743
RES
AP37 HDMI_CEC I715 +3V3STBY F756 5

BYPASS F716 3781 100R F757
+3V3STBY HDMI_SDA2 BACKLIGHT-PWM 6
1n0
F758
2724
AM31 HDMI_SCL2 7
BYPASS0 100R
AH37 SIDE_HDMI_SDA1 +5V_SW 5706 F765 8
ADCINP 30R
DEMOD AH35 SIDE_HDMI_SCL1
ADCINN 3794
TRAP0 AOLRCK AOBCK ASPDIF F743 PWR5V_2 LED-1 2041145-8
M31 F744 +3V3STBY
IF PWR5V_1
RES100R
2727
100n
2728
100n
ICE mode + Serial Boot 0 0 0 AGC M33 TUNER_SCL

RF F725 3764 3798
1n0
2725
RES
ICE mode +ROM mode 0 0 1 TUNER_SDA POWER_DOWN

+3V3STBY
1K0 6K8
6 3767
15K 3795
VIP_ATV 7709-2 KEYBOARD
I737
VIN_ATV 2 3 BC847BS(COL)
TRAP1 OPCTRL3(0) 10R
6708
RES
3784 10K IF_AGC

PDWNC Normal 0 I738 3770 F724 6709
2726
100n
3785 10K RF_AGC 1 5

BZX384-C3V3
7709-1 +12VS
BC847BS(COL) 1K0 BZX384-C8V2
4
TRAP2 AOSDATA0 OPWM1
47n
47n
2K2
2721
3771
1K0
1
220n
2719
XTAL 54MHZ 0 2720
37A8
4K7
3756
+5V_SW 2 2011-01-31
1 2011-01-13
PCB SB SSB
3139 123 6505
THRILLER BRZ DIG
19130_023_110427.eps
110427
2011-Apr-29
LVDS Display
LVDS Display
B04D B04D
+3V3_SW
SDA-DISP
RES 4812
SCL-DISP
RES
4811
4810
PCA5940 PCA9515 - (RES) 2802
4810 Y - 100n LVDS#1

7801
4814 Y - PCA9540B 3 1G51
RES 4813 F801
VDD SC0 5 60 61
4816 Y -
RES 4823
RES 4815
58 59
4817 Y - SC1 8 4814 56 57
SCL-VCOM 54 55
4818 Y - 4817 RES 4824
SCL_VGA 1 SCL SD0 4 52 53
4819 Y - I2 C SDA-VCOM 51
INP
4818 -BUS F833
SDA_VGA 2 SDA FIL SD1 7 4816 50
4820 - Y CTRL
F832 49
4812 - Y 4820 VSS 48
RES
47
4822
RES 6
4815 - Y 46
BYPASS_MODE
4813 - Y 4819 RES 4821 45
44
4821 - Y 43
4822 - Y VCOM_SW 42
- 41
4811 Y
PX1A- F805 40
PX1A+ F806 39
F807 38
PX1B- F808 37
PX1B+ F809 36
F810 35

PX1C- 34
+5V_SW +12VDISP F811 33
PX1C+
F812 32
PX1CLK- 31
PX1CLK+ F813 30
F814 29
PX1D- F815 28
PX1D+ F816 27
4803
4804
4805
26
RES
RES 4800
RES 4801
RES 4802
PX1E- 2803 10n F831 25
4806 RES PX1E+ F817 24
4807 RES F818 23
4808 RES F819 22
8 5800 21
PX2A- F820
3 7 33R PX2A+ F821 20
2 6 I801 5801
F822 19
I800 1 5 33R PX2B- 18
5802 +VDISP-INT 17
PX2B+ F823
33R F824 16
7800 PX2C- 15
SI4835DDY PX2C+ F825 14
4
3802
F826 13
PX2CLK- F827 12
47K
PX2CLK+ F828 11
6800
F834 10
PX2D- 9
BZX384-C6V8 8
PX2D+
7
3803 I802 2806
PX2E- 6
PX2E+ F829 5
47R 1u0 +VDISP-INT
4
47K
3
3805
+3V3STBY 2
1
2804
2805
100n
FI-RNE51SZ-HF-R1500
100u 16V
I806 3807 I807
15K
3806
7803 6
BC857BW I808
10K
7802-1 2 3
3808 BC847BS(COL) I809 F800
1 5 3809 LCD-PWR-ONn
10K 7802-2
BC847BS(COL)
1K0
4
1K0
2807
220n
3810
2 2011-01-31
1 2011-01-13
PCB SB SSB
3139 123 6505
THRILLER BRZ DIG
19130_024_110427.eps
110427
2011-Apr-29
10-5 B05 393912365052

HDMI & Multiplexer
HDMI & Multiplexer

B05A B05A
RES
6913
IP4281CZ10
M_RX1_1B 1 2 M_RX1_1
3
8 HDMI_PLUGPWR1
M_RX1_2 5 4 M_RX1_2B
HDMI PORT 1
+3V3STBY
6 7 9 10
M_RX1_2 M_RX1_1B I906 1901
6902
M_RX1_2B M_RX1_1 M_RX1_2 1
+3V3STBY 2 7900
RB521S-30 M24C02-WMN6
8
M_RX1_2B 3
10K
3900
M_RX1_1 4
27K
)
3906
2900
100n
5
RES HDMI_PLUGPWR1 F901
6914 7908 M_RX1_1B 6 (256 × 8) 7
WC
IP4281CZ10 BSH111 M_RX1_0 7 EEPROM
RES F902 SIDE_HDMI_SCL1
M_RX1_CB 1 2 M_RX1_C 8 1 6
0 SCL
3 M_RX1_0B 9 2
1 ADR F903 SIDE_HDMI_SDA1
M_RX1_C 10 3 5
2 SDA
8 11
4
3K3
3K3
3908
3907
M_RX1_0 5 4 M_RX1_0B M_RX1_CB 12
HDMI_CEC_A F914
HDMI_CEC 4904 13
F915 F904
6 7 9 10 eHDMI+ 5900 30R ARC_eHDMI+ 14
M_RX1_0 M_RX1_CB SIDE_HDMI_SCL1 15
M_RX1_0B M_RX1_C SIDE_HDMI_SDA1 16
17 3901 I915
18 EDID_WC F905 7902
PWR5V_1
19 L : WP MMBT3904
10K
20 21
1K0
H : WRITE
3912
22 23
RES
68K
4K7
3924
3902
DEB
6915 I902
10p
5.6V
2902
6903
IP4281CZ10 4900 47266-9002
HDMI_PLUGPWR1
M_RX2_1B 1 2 M_RX2_1
3 RES RES
CDS2C05HDMI2
F900 +5V_SW
SIDE_HDMI_HPD1 4901 7905
8 MMBT3904
1
M_RX2_2 5 4 M_RX2_2B
3913
100K

HDMI_PLUGPWR1
4K7
RES
3914
6 7 9 10
M_RX2_2 M_RX2_1B
F913
BAT54C
M_RX2_2B M_RX2_1 3
6900
RES
2
6916
IP4281CZ10
M_RX2_CB 1 2 M_RX2_C PWR5V_1
3
8 HDMI_PLUGPWR2
M_RX2_0 5 4 M_RX2_0B
HDMI PORT 2 (SIDE)
6 7 9 10
M_RX2_0 M_RX2_CB
M_RX2_0B M_RX2_C 1902
M_RX2_2 1
2 7901
M24C02-WMN6
8
M_RX2_2B 3
HDMI_CEC_A
10K
M_RX2_1
3903
4
)
2901
100n
5
HDMI_PLUGPWR2 M_RX2_1B (256 × 8) F906
6 7
WC
M_RX2_0 7 EEPROM F907 HDMI_SCL2
8 1 6
0 SCL
5.6V
RES
M_RX2_0B
6917
9 2
1 ADR F908 HDMI_SDA2
M_RX2_C 10 3 5
7700-5 2 SDA
11
CDS2C05HDMI2
MT5363BIMG
4
3K3
3K3
M_RX2_CB
3916
3915
12
HDMI_CEC_A 13
HDMI-LVDS G16 PX2A+ F909
0P 14
M_RX2_0 AP17 E16 PX2A-
0 0N HDMI_SCL2 15
M_RX2_0B AT17 H17 PX2B+
0B 1P HDMI_SDA2 16
M_RX2_1 AR18 F17 PX2B-
1 1N 17
M_RX2_1B AU18 G18 PX2C+ 3904 I916
1B 2P 18 EDID_WC 7903
M_RX2_2 AP19 RX1 E18 PX2C- PWR5V_2
2 2N 19 MMBT3904
M_RX2_2B AT19 AE G20 PX2D+ 10K
2B 3P 20 21
M_RX2_C AR16 E20 PX2D-
1K0
C 3N
3919
M_RX2_CB AU16 H21 PX2E+ 22 23
68K
4K7
CB 4P
3923
3905
DEB
F21 PX2E-
4N 4902 I905 47266-9002
HDMI_HPD2 AL18 H19 PX2CLK+ HDMI_PLUGPWR2
HDMI_HPD1 CKP PX2CLK-
F19
CKN RES
F912 RES
PX1A+ HDMI_HPD2 4903 7907
M_RX1_0 AP13 D15
0 0P MMBT3904
M_RX1_0B AT13 B15 PX1A-
0B 0N PX1B+
M_RX1_1 AR14 C16
1 1P
3920
100K
M_RX1_1B AU14 A16 PX1B-

+5V_SW
4K7
RES
1B 1N
3921
M_RX1_2 AP15 RX2 D17 PX1C+
2 2P
M_RX1_2B AT15 B17 PX1C-
1
2B 2N PX1D+
M_RX1_C AR12 AO D19
C 3P
M_RX1_CB AU12 B19 PX1D-
CB 3N HDMI_PLUGPWR2
C20 PX1E+
4P
SIDE_HDMI_HPD1 AN16 A20 PX1E- F911
BAT54C
HDMI_HPD2 4N 3
C18 PX1CLK+
CKP
6901
A18 PX1CLK-
CKN
2
PWR5V_2
2 2011-01-31
1 2011-01-13
PCB SB SSB
3139 123 6505
THRILLER BRZ DIG
19130_025_110427.eps
110427
2011-Apr-29
USB
USB
B05B B05B
7D00
TPS2041BD
FD04
6 4 USB_PWR_EN
1 EN_
USB 7 2
2 OUT 1 +5V_SW

1D01
FD01 5D00 FD07 IN
1 5V 8 3
FD02
3 2
2
USB_DM 33R
3
USB_DP FD03 5
OC_ 2D14
4 FD00 2D12
100n 100u
GND
6 5 16V
USB-01-PBT-B-30-CU2
10u
1D03
1D04
1D05
6D00
2D11
FD06
BZX384-C6V8
FD05 USB_OCP
USB_DM
USB_DP
2 2011-01-31
1 2011-01-13
PCB SB SSB
3139 123 6505
THRILLER BRZ DIG
19130_026_110427.eps
110427
2011-Apr-29
10-6 B06 393912365052

Analog I/O - Headphone
Analog I/O - Headphone

B06A B06A
RESERVED
RES
3A04
HP_LOUT LEFT FA03
1R0
1n0
RES
2A02
6A01
RES
HEADPHONE
RES 1A03
PESD5V0S1BA
1A01
2 RES
3
1
MSJ-035-12D-B-AG-PBT-BRF
FA04

RES
HP_ROUT 3A03
RIGHT FA02
1R0
1n0
RES
2A01
RES
6A00
RES 1A02
PESD5V0S1BA
RES
3A10
22K
+3V3_SW
RES
7A00 RES
TPA6111A2DGN 3A11
1u0
PBS_HPL
8
RES
2A10
4A02
47n
RES
2A05
RES VDD
RES ) RES 33R
RES RES
HPOUTL FA06 2A07 IA02 3A15 AMPLIFIER 2A06 IA00 RES 3A12 FA08 HP_LOUT
3A18 10K 10K 2 1 IA09
1 1
FA07 RES RES 33R
HPOUTR 1u0 RES 2A08 IA03 3A16 10K IN- 100u 4V
3A19 10K 6
2 VO RES RES
1u0 RES 3A17 IA04 IA08 2A09 IA01 3A13 FA09
RESET_AUDIO 5 7 HP_ROUT
SHUTDOWN 2
10K RES 2A11 IA10 100u 4V 33R
PBS_HPR 4A03 3 10
BYPASS RES 3A14
RES VIA 11
1u0
GND GND_HS 33R
4
9
1n0
1n0
RES
RES
2A12
2A13
47n
RES
2A04
RES
3A09
22K
2 2011-01-31
1 2011-01-13
PCB SB SSB
3139 123 6505
THRILLER BRZ DIG
19130_027_110427.eps
110427
2011-Apr-29
Analog I/O - Audio
Analog I/O - Audio

B06B 7700-2
B06B
MT5363BIMG
AUDIO-VIDEO AM33
AF
AN34
P
MPX AN36
N
AD33 IB10 AIN0_L-AV1
IB66 0_L
HSYNC AR22 AC34 FB02 AIN0_R-AV1
IB67 HSYNC 0_R
VSYNC AU22 AB31 IB12 AIN1_L-AV2
VSYNC 1_L IB13
AC32 AIN1_R-AV2
IB23 1_R
SOG AP23 AD35 IB02 IB01 2B34 IB00
SOG 2_L 3B31 3B32 FB00
RP IB24 AT25 AB35
RP 2_R
AC36 DVI_AUL_IN
AUDIO IN
3_L 30K 10u 1R0
GP IB25 AU24 AIN_AADC AB37 DVI_AUR_IN
GP 3_R 1B01
BP IB26 AT23 AA32 2
BP 4_L 3
6B00
RES
AB33
4_R
1n0
1n0
RES
RES
IB27 1
2B35
2B36
1B03
GN AR24 AA34
COM 5_L
PESD5V0S1BA
Y35 MSJ-035-29D PPO

IB39 5_R
SPR0P 3B11 68R 2B11 10n PR0PAU30 AA36 SAV_L_IN
IB29 0P 6_L FB06
SPR1P 3B05 68R 2B05 10n AP27 PR Y37 SAV_R_IN
IB41 1P 6_R
SPB0P 3B09 68R 2B09 10n PB0PAP29
3B03 IB31 0P
SPB1P 68R 2B03 10n AT27 PB AA30 IB03 2B37
IB43 1P VMID_AADC 3B34 IB09 IB08 3B33
SY0P 3B07 68R 2B07 10n Y0PAR28
IB33 0P
SY1P 3B01 68R 2B01 10n AU26 Y 10u FB01
1P 30K 1R0
1u0
IB45
100n
2B41
2B40
SY0N 3B08 100R 2B08 10n Y0NAT29 NEAR CONNECTOR
IB35 0
3B02 2B02 10n 3B35 4K7
6B01
RES
SY1N 100R AR26 COM L34 IB14

1 AOBCK
1n0
1n0
RES
RES
IB15 3B36 4K7
2B38
2B39
1B04
M37
AOLRCK
PESD5V0S1BA
3B06 1R0 2B06 1n5 IB47 SOY0AU28 M35

3B00 1R0 2B00 1n5 IB37 0 AOMCLK
SOY1-AV2 AP25 SOY
1 IB16 3B37
AP33 L36 +3V3_SW
0 0
SOY0-AV1 AR34 SY P35
1 1 4K7
AT33 P37
0 AOSDATA 2 3B38
AU34 SC K31 +3V3_SW
1 3 SPDIF
N32
FB08 2B15 4 4K7
GND_CVBS IB61 AR36 1B02
0N FB03 ASPDIF_OUT FB04
AT37 K33 IB17 2B42 SPDIF_OUT 3B15 240R 2
1u0 0P ASPDIF
3B14 2B14 AU36
1P CVBS 100n FB07
CVBS_AV3 IB63 AP35 L32 3B16 100R 1
2P ALIN RES 3B39
AT35 MTJ-032-21B-43-NI
100R 47n 3P 2B20 33p
1B05
AF37
0 4K7
33p
2B19
AP31 U32
OUT1 1
AT31 VDAC AL V35 RES 2B16 10u HPOUTL
OUT2 2 IB18 IB19
DEB V37 2B17 10u PREAMPL
3

AM29
FS_VDAC
AE36
0
V33
1
AR U34 RES 2B24 10u HPOUTR
2
DEB
75R
IB20 IB21
3B58
3B47
U36 2B25 10u
560R
PREAMPR
3
AF35 IB22
AVICM
47K
47K
47K
47K
RES
RES
3B17
3B18
3B48
3B49
1u0
100n
2B43
2B44
+3V3_SW
+3V3-ARC
3B40
3B54 IB70
22K
1R0
220p
2B50
4
2B51 IB48 3B41 3B50 100n
2B60
PREAMPL
2B58
2 AOUTL
10u 10K IB49 5K1
1
+12VS 10u
820p
2B52
3
8
LM833 7B05-1
14
7B01-1 74LVC00APW
+12VS IB71
47K
ASPDIF_OUT
3B51
1 & IB72
2B61 SPDIF_OUT
3
2
100n
30R
3B42
IB50 +3V3_SW
7
47K
+3V3_SW
3B43
IB51
1u0
+3V3-ARC
2B53
7B05-2 +3V3-ARC
10u
47K
10K
14
2B54
3B44
3B55
74LVC00APW 7B05-3
14
4 & 74LVC00APW
6 9 & 3B56 IB74
FB09 2B62 2B63
7B01-2 ARC_SW 5 8 eHDMI+
LM833 10
+3V3_SW
8
100n 180R 100n
7
5
2B59
7
7 AOUTR
2B55 IB53 3B45 IB52 3B52
PREAMPR 6
10u
68R
3B57
4
10u 10K 5K1
47K
820p
2B56
3B53
+3V3-ARC
220p
2B57
7B05-4
14
74LVC00APW
12 &
3B46
11
13
22K +3V3_SW
7
2 2011-01-31
1 2011-01-13
PCB SB SSB
3139 123 6505
THRILLER BRZ DIG
19130_028_110427.eps
110427
2011-Apr-29
Analog I/O - Video
Analog I/O - Video

B06C B06C
NEAR CONNECTOR
NEAR CONNECTOR 2C24 IC09
3C28 3C12
AIN0_R-AV1
3C26 2C22 IC01 3C00 30K 10u 1R0
AIN1_R-AV2
30K 10u 1R0
1n0
1n0
RES
RES
2C20
2C21
1C14
6C19
1n0
1n0
RES
RES
1202
0001
2C00
2C01
RES
6C00
PESD5V0S1BA
RES
PESD5V0S1BA
3C29 2C25 3C13 FC15
AIN0_L-AV1 IC10
3C27 2C23 IC02 3C01 30K 10u 1R0

AIN1_L-AV2
30K 10u 1R0
1n0
1n0
RES
RES
2C18
2C19
1C15
CVI 2 CVI 1
1n0
1n0
RES
RES
RES
2C02
2C03
6C01
1C16
RES 6C20
PESD5V0S1BA
PESD5V0S1BA
1C02 1C01
FC09 FC10
MSP-636V1-01 1 MSP-636H1-01-NI
1 2
FC08 3
2
IC03 3 IC11 FC11
3C20 5C00 3C21 5C03
SPR1P SPR0P 4
4 60R
18R 60R FC07 18R
5
5
15p
15p
56R
56R
6
2C04
3C02
1C17
2C17
3C14
1C10
6
FC12
RES
PR_CVI2 PR_CVI1 7
RES 6C08
6C02
PESD5V0S1BA
7
FC04
PESD5V0S1BA
8

8
FC05 FC13
PB_CVI2 PB_CVI1 9
9
10
10 11
FC06 FC14
15p
15p
56R
56R
RES
RES
SY_CVI2 SY_CVI1 12
2C05
3C04
6C03
1C18
2C16
3C16
6C09
1C09
11
IC15 12
3C22 5C01 IC13 3C23 5C04
PESD5V0S1BA
PESD5V0S1BA
SPB1P SPB0P
18R 60R IC21 18R 60R
IC16 SOY0-AV1
SOY1-AV2 IC14 3C24 5C05
IC17 SY0P
SY1P 3C25 5C02
60R
18R
60R
18R
1C08
15p
56R
RES
1C19
2C15
3C17
6C10
15p
56R
RES
2C06
3C05
6C04
IC22 3C18
PESD5V0S1BA
IC18 SY0N
3C06
PESD5V0S1BA
SY1N
1R0
1R0
SIDE AV
CVBS
1C03-1
YELLOW2 FC03 3C07 IC04
RIGHT CVBS_AV3
(YELLOW) 1R0 IC19
1 SAV_L_IN
MTJ-032-37BAA-432 NI
IC20
15p
47p
75R
RES
SAV_R_IN
1C05
6C05
3C08
2C08
2C07
RES
PESD5V0S1BA
GND_CVBS
LEFT1C03-2
FC02 IC05 2C09
WHITE 3C09 3C10
(WHITE) 5 1R0 10u 30K

4
6
1n0
1n0
RES
RES
RES
6C06
2C11
2C10
1C06
PESD5V0S1BA
NEAR CONNECTOR
1C03-3
FC01 3C11 IC07 2C14 3C19
RED
8 10u
(RED) 1R0 30K
7
9
1n0
1n0
RES
RES
RES
1C07
6C07
2C12
2C13
FC00
2 2011-01-31
PESD5V0S1BA
1 2011-01-13
PCB SB SSB
3139 123 6505
THRILLER BRZ DIG
19130_029_110427.eps
110427
2011-Apr-29
VGA
VGA
B06D B06D
6E06
+5V_SW
IE00 3E26 BAS316
10K
3E25 FE16
EDID_WC 7E01
BC847BW
10K
68K
RES
3E27
DC_5V
2E00 3E00 5E00

RP VGA_Rp VGA_R FE01
10n 68R 60R
5p6
75R
RES
2E07
3E16
6E00
1E00
PESD5V0S1BA
2E03 3E03
SOG
1n5 1R0
2E02 3E02 5E01
GP VGA_Gp VGA_G FE02
10n 68R 60R

5p6
75R
RES
0001
2E08
3E15
6E01
1E05
2E04 3E04 3E10 FE11 DC_5V
PESD5V0S1BA
GN VGA_Gn
10n 100R 1R0

RES
3E24
DC_5V
2E05 3E05 5E02 6K2 1%
BP VGA_Bp VGA_B
2E16
4E04 FE15
10n 68R 60R
100n
5p6
75R
RES
0001
2E09
3E14
6E02
1E02
7E00
M24C02-WMN6 8
PESD5V0S1BA
10K
10K
33R
3E21
3E22
3E23
)
FE10
1E01 7 (256 × 8)
WC
1 EEPROM
5E03 6E05 3E13 FE13 FE08
2 4E02 SCL_VGA 6 1
DC_5V SCL 0
FE03 3 2
60R BAS316 150R FE09 ADR 1
4 4E03 SDA_VGA 5 3
SDA 2
5
1n0
100n
4
2E10
2E11
6
1%
1%
7
FE12
330p
330p
2E14
2E15
8
FE04 9
6K2
6K2
RES 3E19
RES 3E20
5E04
10
HSYNC H_SYNC
11
12
30R
FE05 13 FE14
FE06 14
5p6
2K2
2E12
6E03
1E03
RES
15
FE07
16 17
RES 3E17
PESD5V0S1BA
5E05 VSYNC 1216-02D-15L-2EC
VSYNC
30R
5p6
2K2
RES
2E13
6E04
1E04
PESD5V0S1BA
RES 3E18
2 2011-01-31
1 2011-01-13
PCB SB SSB
3139 123 6505
THRILLER BRZ DIG
19130_030_110427.eps
110427
2011-Apr-29
10-7 B07 393912365052

Hospitality
Hospitality
B07 B07
DMMC1 DMMC3

RES RES
1F00 1F01
FF12
1 FF00 RES 5F00 33R +3V3STBY 1 PBS_HPL
2 SDA_CLOCK FF01 RES 3F00 100R SDA-LCD 2 FF11 FF13
3 SCL_CLOCK FF02 RES 3F01 100R SCL-LCD 3 PBS_HPR
4 4 5
5 FF03 RES 5F01 33R +5V_SW
6 7 FF04 502382-0370
1n0
1n0
RES
2F00
2F01
RES
502382-0570
2 2011-01-31
1 2011-01-13
PCB SB SSB
3139 123 6505
THRILLER BRZ DIG
19130_031_110427.eps
110427
2011-Apr-29
10-8 313912365052 SSB Layout

Overview top side
4817
4820
4814
4822
U4
4815
1X05 4816
U5
U2
4818 7801 4821
4823
4819
2104
1702 4812
4810
1G51
7123
4824
4813
4811 2155
7122
3765
3780
3760
3759
2802
3763
2183 2152 2803
7124
2805 2161
2138 3762
2162
2140
5120 2168
5117 2154
2191
1X04
2171
2153
5115 2188
2163
2100
2105
2189
2172
3615 2609
2804 5104
6122
2135
5121
2608 2101
2126 5123 2701
2125
3707
3706
2164
2700
37A9
2127
7600
5506
7120 2159
37AA
2134
3126
2514
4700
3726
2128
1D05
U23
3605 3600 3602 3614
2133
3127 3612 2729
2131 3613
1M99
2132
3128
1D04
2130 3607
1D01
7125
3B37
4100
2129
3609
3784 2720
2109 2D14
3611 3606 3608 3610
2198 3785 2719
37A8 3754
5105 2176
2151
3B18
2146 3753 2B24
2175
2181
2106
2136
2B16
3B17
2169 2B25
2B17
2199
1F01
2B40
2B41
2137
5106
2180
3129
7601
2551 2628
2B43
2B44
2290
7700
2291
2289 5230 5229 6C07
2148
2288
5228
2C12
1C07
3619 3617
2287 5227 5226
2C13
2286
2285 3C11
2147 3618
5700
2717
3737 3757
3711 2702
2145
2C14
3735 3731 7216 3C19

3758
1700
1M95
3788
2716 3787
2143
2149
3796 3C10
7703
2141 2144
2142
2403 3715
2C09
3713
3709
3712
3C09
2C10
3719 2C11
7702
3718
6C06
1402
2E05
2E02
2E04
2E00
2B00
2B01
2B02
2B03
2B05
2B06
2B07
2B08
2B11
2B09
1C06
2419
2402 2704 2703 1C03
3E05
3E02
3E04
3E00
3B00
3B01
3B02
3B03
3B05
3B06
3B07
3B08
3B11
3B09
3717 3716
5401
7A00
2411
2421
2420
1403
2B56
3B49 2B55 3B45
3B52
3B46
2297
2B57
4306
2412
7400
2405 5402
5400
2400 3C07
3791 3790
2C08
2722
1C20
3C08
2723 2C07
2A06
2A09
3792
6C05
2724
3A13
3A14
3A12
3A11
1C05
3793 5311
2727
7B01
6A01
3B34
2416 2415 2422

3B31
5207
2725
3794
2401 1X03
2A02
3A04
2258
2B50
2B37
2B34
2294 5208
2726
1M20 1735
5403
1A03
3B32 3B33
3B40
3B50
3B48
3795 3798
2B38
2B35
2A01 3A03
2B36 2B39
2728 3748
3749
2B52
2296
5706
2B20
3B16
2B19
6B00 6B01
3B15
6701 6700 6A00
1B05
1706 1A01
1A02
1C14 1C08
1B03
1705 1B04
1C09
1C15 1C10
1C01 1701 1B01
1B02
1201 5309
3C13
2C19
2C21
3C12
6916 6915
3C21
3C14
2C17
5C03
3C24
3C17
2C15
3C18
5C05
3C29
3C28
2C16
3C16
2C20 2C25
6C08
2295
2C24
6C20
6C10
6C19
2E09
2C18
3E15
3E14
1902
3C23
5C04
5E02
2E08
6C09
2B61
2C00 2C22
3C25
2C06
3C05
3C06
5E01
6E02
3C22 3E10
7B05 6E01
3B54
3C20
3C02
2C04
3C27
2C05
3C04
2C23
3B55
6917
2C01
3C00
3C26
6C00
5C00
6C02
2C02
3C01
2C03
1X02
6C04
5C01
6C01
6C03
5C02 5E03
3E16
2E07
5F01
3F01
3F00
5F00
6E00 5E00
1202 6914 6913
3E18
3E17
2E12
2E13
6E05
2B60 3E13
5E04
1C19 5E05
6E03
2E11 2E10
6E04
1C16 1C17
2B62
3B56
3B57
2B63
1E02 1E05 1E00
1C18 1F00
1E03
1E04
1901 1X01
1C02 1E01
2 2011-01-31
SSB Layout Top

3139 123 6505
19130_040_110428.eps
110428
2011-Apr-29
Overview bottom side
3122 I107 2185 3101

3125 I122 3135 I106 2160 2179
2177 3114 I135 2112 2178
I144
2157
F750 F748 F746 3100
3105 F763
I136 3113 3102
I140 I120 F801 F832 3107 2158
2190
F132 3115 2139 I127
F815
F813
F811 F809 F807 F805 3146 I137 I132
F831 3118
F749
F747
3140
I141
F834 F816 F814 F833 2165 3116
F812
F810
F808
F806
7119 3112
F135
I138
5124
F751
I117
I105
I143 F133
F829 I131
2123 3150 I123
2170 3149
3136
2197
5125
2166
2193
2186 2187 3151
2122
3138
2150
3108
I119 2192
F131
I118
I104
I134
5801
5802
5800
3153 I801
3154
F125
FD00 F824 F823
3155
F818
F817
2602 F600 F102
3616 2607
F502
2706 2601 F103
3779
3778
3775
3774
2712
5705
3776
3777
4803
4804
4805
I800 5500
F702
2600
F819
3741
3782
I743 I727
FD05 FD04 F822 F821

2567
3740 F828 F827 F826 F825
F820 2566 I732 I742 I731 I726
U1
F701 2604
4800 4806
4802 4808
F104
3700
3701
7800
3705 3145 I112 2167
F800 2603 2605 2606 F105
I109
3704 I111
3109
5127 4801 4807

3809
3103
2195
2D12
3601 3148
I711 I713 I142 F106
FD03
7D00 I125
3802
7803 I806
3739
3603
3604
3117
3808
3B38 3106
FD06
F107
2108
3B39
3721
3720
FD02 6800 2B42
IB17
2107
FB03
I807
3805
FD07
F716
2806
3803 IB16 F108
F503 F737
I802
I809
3732 5701
2730
I808
7802 I715
3781
2807 3807
3810
F109
5D00
I701
I758 2502
1D03
FD01
I126 3806 2506 2124 3152
3742
2501
F742
3111
7705
2113 I110
2D11
I700
2521
F101 I113
6D00
2505
I108
7708
2110
2581
F741 2504
IB14
5128
I716
3736
3745 2522 2515 2503 I756
5503
I759
3743
F136 3B35 F113
2111 I757
2565
2523
2564
I506
I760 2584 F601
2524
IB15 37A5
3B36
3783
4311 4314 IB18 IB20 2536 3623 F602
F114
2623
2624
2627
I714
2599 2570
3621
2629
3620
2525 3622 2622
F501
F117
2513 2630
2512
2526 2552 F409
2516
2553
4307
2518
FF11 2621
F116
4309
I254
2537 F416
3131
3416
4401
2517 2626
2F00
2277 5502 2620 2625
2577 6402
2569
2527 I139
2533
FF13 FF12 F115
2F01 IB22 2538
3130
2597 2535 3624

6401
3412
2278
2532
F414
FC01
2531
2713
I424
2423
3417
F120
F500 I505 2534 2508 2509 I429

3415 6102
2558
2562
2563
F236
2510
2545 2500 F413 3414
2580
7405
2529
F119
2560
2528
2507
3B47
2282
5222
2561 2102
2582
2579 I436
2530
2519
2520
3722 2574 F704
CXXX I423 I425
3432
3723
2559
2541
7402 F118
5225
IC07 I747 I442
6400
3411
3413
4209 I507 F759

I255 I735
2543
7411
F415
2573 I422 F408
2596
4210 2544 7412 3409 3410
5505
2540
2542
F121
IC20
I733 I435
2595
2284
3431
2549
3789 3408
3435
2430
3430
3B58
U3 F745
2575
2576
3761
2550
3418
I754 7403 I433

37AB I437 F122

I753
IC19
I440
4313
2280
F738
7404
3433
3426
2705 3786 I741
2283
2281
2279
2568
IB63 I502 I504 F706
IB61
7413
2571
2588
3B14 2B14 F705 F123
IC05 3419 I430
3714 I708
2431
3434
3A18 2593 5504 3703 F761

4A02 3272 3271 2B15 F760
IA02 4312 2592 3710
5501 F739
3A15
FA06
2A07 F740 F707
IB37 F721
IB27 IB26 I744
2A12
3A10
2A05
F708
3405
I750
FC02 4707
FC00
I739 I412
IA10 F736
IA09 IB47 IB31 IB33
IB41 IB24 IB25 3452 F404
2598 3500
I734
4708
2414 3451
37A7
IB39 IB45 37A6
3744
IB43 IB29 IB35
2E03 IB23
2A11
F417 2711 I405 I415 I417
I746
3E03 2413
3738
3A17 IA04 3756
3422
IB21
F410 F405
2426
2408
2A10
F411 I745 I761
3734
3751
3729
3702
6706
I413
4A03
I749 F766
C400 F406
IB53
F400 I434
FA07 I906
3A16
6707
3724
2A04 3768 I406 I414
IC04 A214 2427 3453
7710
I725
3727
3728
3730
2A08
3A09 IA03 3769 6902 I403
IB52 3400 3454
I755
IA08 3A19
I302
I401
2409
5307
7408
2A13
2404
4904 3906
3746
3747
3764
5306 2320 F402
2407
A213 3262 7908
2378
2337
7701
FB08 2340 F753
2318 2321
2333
2710
3B53
2B59
F401
2424
5308
2341
2425
3421
2406
2339
2334
1301 6708
2335
2323 2322
2377
2338
2336
3263 F725
3420
IB50
3332 3331
FC03
3733 2709
I300 I307 I308 I738
IA00 IA01 I737 3B42

F246 7709
A212 7407 F754
2B53
3771
3770
4308
2721
2306 3767 6709 I411
F724
5304 2262
2324 2263
2314 3261
I304 I432
FA04
3B43
F303
3344
F755
IB02 2311
I338 2301 IB51
3427
IB03 F209
2303
3B44
3343 IB19 F412 I416 2418

I301 F756
2309 IB48 I431 3428
7406
F302
2B54
I418
3360
IB01
3350 2B51 2417
3B41
IB49 I441
2433 3439 F757
I306 F213
3339
2332
IB09 F306
I325
IB08
3337
F208
FA08 IB00
5305
F758
3406
6403
2B58
F300 3335
7414
I317
3B51
FB00
3336 I445 F765
FA09
F207
F301
I318
7302 3349 3437 I443
2432
3438
FA02
5303
2313 3352 3351 2316
2312 2379 2380 2317
I305
F717
I303
F206
I320
FA03 FB01 I316
F718 FB04
2304 3353 2308
2226 2225
3230 3228
3354
3359
2307
F205 2305 3356 2310
5301 5302
3357
3358
2302
4310
7301
3355
I220
6301
F204 F719
3265
F235
7217
F242 FB07
5310
I221
3264
F908
3915
3269
F907 F203 I222
IB72
FE16 F904
FE12
3916
F911
7901 3270 F247 3E25 FE11
FC14
IC14 IC11
6901
I916 IC22 FC12 FC11 FC15 FC10
F202 IC09
F909 3E27 FE09 IC10 IB10
FB06 FB09
3E21
3E19
2E14
2213 7218
FC13 IC13
2293
I905 7903 IC21 FC06 IC18 IC01 FC08
3904
3905
7E01
IC17
FB02
FE08
F743
A225
F905
3E22
3E20
2E15
F906
IC03 IB13
3919
3923
IB70
IC15
IC02 IB12
F201
7907
7902
3903
FE10
7E00 IB71
3921
4903
IE00 3E23 IC16 FC05 FC04 FC07
2901 3901 I915
F912
7900
4902 FE05 FE01 FE03
IB66 FE15 3924 3902

3920 FE07 F903 F901
FE02 FE04
IB67 2900
3E26 4E04 2E16
FE06 F902
3900
3E24
6E06 F900
I902
F913
3908
3907
7905
FE14 F744
FF00 FF01 FF02 FF03
4901
4E03 6900 F914 3912 4900

IB74
3913
3914
FF04
6903
FE13 4E02 F915 FC09

5900
2902
2 2011-01-31
SSB Layout Bottom

3139 123 6505
19130_041_110428.eps
110428
2011-Apr-29
10-9 T01 393912365071

LVDS Display
LVDS Display
T01A T01A
LVDS#1
1N01
FI-RE51S-HF
FN32
SDA-TCON 1
SCL-TCON 2
BYPASS_MODE 3
4
NC
5
6
7
8
9
10
PX1A- FN05 11
PX1A+ FN06 12
FN07 13
PX1B- FN08 14
PX1B+ FN09 15
FN10 16
PX1C- 17
PX1C+ FN11 18
FN12 19
PX1CLK- 20
PX1CLK+ FN13 21
FN14 22
PX1D- FN15 23
PX1D+ FN16 24

RES 25
PX1E- 2N03 10n FN31 26
PX1E+ FN17 27
FN18 28
FN19 29
PX2A- FN20 30
PX2A+ FN21 31
FN22 32
PX2B- 33
PX2B+ FN23 34
FN24 35
PX2C- 36
PX2C+ FN25 37
FN26 38
PX2CLK- FN27 39
PX2CLK+ FN28 40
41
PX2D- 42
PX2D+ 43
44
PX2E- 45
PX2E+ +VDISP-INT FN29 46
47
48
49
50 FN01
51
100n
2N01
2N02
52 53 FN33
100u 16V
54 55
56 57
58 59
60 61
1X01 1X02
REF EMC HOLE REF EMC HOLE
1 2010-06-29
PCB SB
3139 123 6507
THRILLER BRZ TCON
19130_032_110427.eps
110427
2011-Apr-29
TCON Control
TCON Control
T01B T01B
VDD1V8
VDD3V3LVRS VDD3V3IO VDD1V8PLL DDR2VDD
FH36 FH37 FH38 FH39 FH40
7H01-5
VPP1501BFG
VDD1V8
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
100n
2H01
2H02
2H03
2H04
2H05
2H06
2H07
2H08
2H09
2H10
2H13
2H25
2H26
2H27
2H28
2H29
2H30
2H31
2H32
2H33
2H34
2H35
2H36
2H37
2H38
2H39
POWER
C5 C3
C9 C4
D15 D5
E3 D6
E6 D7
E7 D8
VDD18 VSS
E10 D9
E11 D10
F5 D11
F8 D12 1H00
F9 D13 DSX321G 7H01-4
F12 D14 2 NC 4 VPP1501BFG
VDD18 VSS 3H01
F13 E2 1 3 OSCOUT
G5 E4 DRAM
560R
G8 E5 27M TA0 P4 H3 TDQ0
0 0
G9 E8 TA1 R2 H2 TDQ1
1 1
1M0
3H02
G12 E9 TA2 P3 K3 TDQ2
2 2
G13 E12 OSCIN TA3 T1 K2 TDQ3
VDD18 VSS 3 3
H6 E13 TA4 R4 K1 TDQ4
3H21 4 4
H7 E14 GSP1 TA5 T2 K4 TDQ5
5 5
10p
2H40
H10 F6 TA6 R3 H1 TDQ6
33R VCC_3V3 6 A 6
10p
2H41
H11 F7 TA7 U1 H4 TDQ7
RES 3H22 VCC_3V3 7 DQ 7
J3 F10 GSP2 TA8 T4 D3 TDQ8
8 8
J6 F11 TA9 U2 D2 TDQ9
VDD18 VSS 2K2 9 9
J7 G4 7H02-1 TA10 R1 F3 TDQ10
10 10
5
J10 G6 74LVC2G04 7H05 TA11 T3 F2 TDQ11
11 11
5
J11 G7 1 1 6 7H03 74LVC1G86GW TA12 U3 F1 TDQ12
12 12
8
K5 G10 74LVC1G74DC 2 F4 TDQ13
VGH_35V 13
2
K8 G11 7 4 4H05 REV TCS# N2 D1 TDQ14
S CS 14
K9 H5 1 5 1 TRAS# M3 D4 TDQ15
VDD18 VSS C1 Q RAS 15
K12 H8 2 TCAS# N1
1D CAS
3
K13 H9 RESET 6 3 TWE# M2 G2 TLDQS
R Q WE
L3 H12 LDQS G1 TLDQS#
VCC_3V3
4
L5 H13
150K
L2
3H03
TCK
L8 J1 4H04 RESET 7H02-2 TCK# L1 CK C2 TUDQS
5
L9 J2 74LVC2G04 UDQS C1 TUDQS#
VDD18 VSS U_D_INV 2H54
L12 J4 U_D 3 1 4 TCKE M1
VCC1V8 CKE
L13 J5
1u0
16K
100n
3H04
2H42
M6 J8 7H04 TODT M4
5H00 ODT
8
M7 J9 74LVC1G74DC
M10 J12 7 TBA0 P1
60R 3H23 S 0
M11 J13 GCK 1 5 TBA1 P2 BA
VDD18 VSS C1 Q 1
N3 J14 2
100R 1D 3H00
10u
2H43
N6 J16 6 3 E1
R Q RESIMP
N7 K6
1K0
4
N10 K7

N11 K10
P15 K11
VDD18 VSS
R5 L4
R8 L6
R11 L7
VCC1V8
10u
2H44
VDD1V8PLL L10
C7 L11
5H01 5H04
C10 M5
VSS
C12 VDD18PLL M8
60R 60R
G3 M9
VCC_3V3
100n
100n
2H52
M12
VDD3V3LVRS
C8 M13 7H01-3
5H02
RES 2H53
C11 N4 VPP1501BFG
C13 N5
60R VSS
E15 N8 LCD
VDD33LVML
10u
2H45
J15 N9 ASIC_CS1 M16 F16 LLV6+
1 0P
N15 N12 M17 F17 LLV6-
2 0N VCC1V8 DDR2VDD VCC1V8
R13 N13 ASIC_CS3 N16 G14 LLV5+
3 1P DDR2VDD
VDD3V3IO N14 N17 G15 LLV5-
4 1N
C6 P5 ASIC_CS5 P16 G16 LLV4+
VSS 5 2P 5H05 5H06
R6 P6 P17 G17 LLV4-
6 2N
10u
R9 VDD33IO P8 ASIC_CS7 R14 CS H16
2H46
5H03 LLV3+
7 3P 60R 60R
R12 P9 R15 H17 LLV3-
8 3N
P10 ASIC_CS9 R16 RLV K14 LLV2+
60R 9 4P
10u
10u
P11 R17 K15

2H50
2H51
LLV2-
10 4N
P12 ASIC_CS11 T14 K16 LLV1+
VSS 11 5P
P13 T15 K17 LLV1-
12 5N
P14 L14 LLV0+
3H05 6P
U4 FH00 J17 L15 LLV0-
RESPI 6N
L16 LLV7+
2K4 7P
LDIO1 U15 L17 LLV7-
F1 7N
LDIO2 U14 STH 7H00
F2
A1
E1
J9
M9
R1
J1
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
M14 LCK+ H5PS5162FFR-S6C

CKP
RDIO1 H15 RLV M15 LCK-
B1 CKN VDD VDDQ
RDIO2 H14 STH TODT K9
VDDL
B2 ODT
TCKE K2 A2
FH35 3H06 RES CKE )
REV T13 A14 RLV6+ TWE# K3 E2
POL 0P WE
1K0 0N
A15 RLV6- TCS# L8
CS
SDRAM L1
7H01-1 LS U13 A16 RLV5+ TRAS# K7 NC R3
TP 1P RAS
VPP1501BFG A17 RLV5- TCAS# L7 R7
1N CAS
GCK T11 B14 RLV4+ R8
CPV 2P
MISC B15 RLV4- TBA0 L2
FH06 2N 0
OSCIN A1 T8 ROM_SCL GOE U11 B16 RLV3+ TBA1 L3 BA G8 TDQ0
IN SCL OE 3P 1 0
EE U8 FH05 ROM_SDA B17 RLV3- G2 TDQ1
OSC SDA 3N 1
OSCOUT B1 RES 3H27 1R0 SCL-TCON GSP2 T12 LLV C14 RLV2+ TA0 M8 H7 TDQ2
OUT STVU 4P 0 2
R10 RES 3H28 1R0 SDA-TCON GSP1 U12 C15 RLV2- TA1 M3 H3 TDQ3
FH01 TESTAGN STVD 4N 1 3
RESET T9 C16 RLV1+ TA2 M7 H1 TDQ4
RST 5P 2 4
U5 GSLOP T16 C17 RLV1- TA3 N2 H9 TDQ5
3H25 FH02 0 SLOPE 5N 3 5
SCL-TCON RES 1R0 P7 T5 D16 RLV0+ TA4 N8 F1 TDQ6
SCL 1 6P 4 6
SDA-TCON RES 1R0 3H26 FH03 R7 DB TESTMOD U6 U16 D17 RLV0- TA5 N3 F9 TDQ7
SDA 2 GP01 6N 5 7
T6 U17 E16 RLV7+ TA6 N7 DQ C8 TDQ8
FH04 3 GP02 7P 6 A 8
T7 E17 RLV7- TA7 P2 C2 TDQ9
ATTN 7N 7 9
U7 R_L T10 TA8 P8 D7 TDQ10
TESTSE L|R_ 8 10
50Hz_60Hz U9 U_D U10 F14 RCK+ TA9 P3 D3 TDQ11
RTC50_60 U|D_ CKP 9 11
LLV F15 RCK- TA10 M2 D1 TDQ12
CKN 10 12
SELLVDS T17 TA11 P7 D9 TDQ13
SELLVOS 11 13
TA12 R2 B1 TDQ14
12 14
B9 TDQ15
15
TCK J8
TCK# K8 CK B3
UDM DDR2VDD
F3
LDM
TLDQS F7
TLDQS# FH34 3H20
E8 LDQS J2
VREF
100R
TUDQS B7
100n
100n
2H48
3H19
100R
TUDQS# A8 UDQS
VSS VSSQ
VSSDL
RES 2H47
J3
J7
F2
F8
100R
100R
100R
100R
100R
100R
100R
100R
100R
100R
100R
100R
7H01-2
A3
E3
P9
A7
B2
B8
E7
N1
D2
D8
H2
H8
VPP1501BFG
3H07
3H08
3H09
3H10
3H11
3H12
3H13
3H14
3H15
3H16
3H17
3H18
LVDS
PX2A+ B7 B13 PX1A+
0P 0P
PX2A- A7 A13 PX1A-
0N 0N
PX2B+ B6 B12 PX1B+
1P 1P
PX2B- A6 A12 PX1B-
1N 1N
PX2C+ B5 B11 PX1C+
2P 2P
PX2C- A5 RXE RXO A11 PX1C-
2N 2N
PX2D+ B3 B9 PX1D+
3P 3P
PX2D- A3 A9 PX1D-
3N 3N
PX2E+ B2 B8 PX1E+
4P 4P
PX2E- A2 A8 PX1E-
4N 4N
PX2CLK+ B4 B10 PX1CLK+

CLKP CLKP
PX2CLK- A4 RXE RXO A10 PX1CLK-
CLKN CLKN
1 2010-06-29
PCB SB
3139 123 6507
THRILLER BRZ TCON
19130_033_110427.eps
110427
2011-Apr-29
TCON DC/DC
TCON DC/DC
T01C RES
RES
1
2
4J00-1
4J00-2
8
7
1
2
4J01-1
4J01-2
8
7
T01C
+VDISP RES 3 4J00-3 6 3 4J01-3 6
VLS_15V6_B
RES 4 4J00-4 5 4 4J01-4 5
+VDISP
7J01 RES 7J02
FDS9435A FDS9435A
8 8
5J06 6J06 FJ00 FJ01
3 7 3 7
VLS_15V6
2u2
10u
2 6 2 6
2J44
2J49
6u8 SS34
47u 25V
1 5 1 5
10u
10u
2u2
RES
2J08
2J07
2J09
RES 2J47
47u 25V
2u2
10u
2u2
10u
10u
10n
2K2
39K
RES
RES
RES 2J10
2J00
2J01
2J02
3J00
2J03
2J04
2J05
3J02
2J06
100n
RES 4 4
FJ59
FJ57 3J01
10K FJ58
RES
3J05
100K
1n0
39K
RES
3J03
2J11
VCC_3V3 VLS_15V6
FJ02
VGL_-6V
2u2
4u7
1n0
3K3
RES
2J14
2J13
3J04
2J12
SGND1 SGND1
7J00-1
38
1
ISL97653AIRZ
SUPP
) PVIN
34
1
LX 35
2J15 3J07 2
30 29
COMP FBB
FJ56 4n7 10K 1% RES 3J06
27 28
HVS RSET SGND1
RES
SGND1 2K2 FJ03 3J09
26 21 VLS_15V6
EN POUT
36 20
PROT FBP 2K2
RES 2J16 100n
FJ60 15 23 SGND1
P DRN
2J17 100n 16 C1 22
N COM
2J18 100n 17 10 2J32 220n SGND1
P VREF
18 C2 11
N FBN
13 3J10 39K 2J40 1u0 6J01
FJ04 3J08 2K2 RES NOUT
GSLOP 24 RB550EA
CTL
2J19 220n 25 2 RES 2J33 820p 3J26 240K 1 5
CDEL CB
3 2
1
2J20 4u7 9 LXL 4 2J34 220n 3 4

VL 2
8
FBL 2J35 5J00 FJ13
2J21 4n7 7
CM2 VCC_3V3
40 3J11 10K 4u5
LDO-CTL VCC_3V3 1u0 FJ14
39 3J12 13K
SGND1 LDO-FB FJ11 VGL_-6V
0.5%
31
PGND TEMP
SUPN
AGND
GND_HS
5
6
47u
47u
1n0
22u
2u2
RES
RES
20K
2K2
2K2
RES
2J51
2J52
6J05
3J24
2J36
2J38
2J39
2J41
3J27
RES
100n
SS24
12
37
32
33
14
41
7J03
16V 22u
KTB1124-C 3
10n
SGND1 SGND1
2J23
RES 3J29
RES 2J50
1 FJ10
FJ05
2u2
2K2
4J03
2J22
SGND1 2 VCC1V8
cK00
0.5%
24K
RES 3J13
1n0
12K
3J25
2J37
RES
2u2
2J24
2J25
RES
SGND1
22u 16V
3J14
+VDISP
SGND1 SGND1
DISPLAY INTERFACING - VDISP
VLS_15V6_B
SGND1
7J00-2 RES 1J00
57
56
55
54
ISL97653AIRZ
VIA T 3.0A 32V
42 53
RES RES
2K2
3J15
2J26
120p
43 52
44 VIA
VIA VIA 51
45 50 RES 5J07 RES 1J01 FJ55
VIA +VDISP-INT +VDISP
30R T 3.0A 32V
FOR DEBUG ONLY
46
47
48
49
RES RES RES 5J08
2K2
3J16
2J27
120p
3J28 6J07
22u
10u
2J43
30R
2K2 LTST-C190KGKT
RES 2J42
1 4J04-1 8
SGND1 2 4J04-2 7
3 4J04-3 6
4 4J04-4 5
SGND1
27K
2K2
2K2
RES
RES
RES
3J17
2J28
3J19
3J20
100n
FJ06
3J18
2J29
100p
750K
1 4J02-1 8
2 4J02-2 7
6J02 3 4J02-3 6
RB550EA 4 4J02-4 5
1 5
2 RES 7J04
FJ07 2SB1767
3 4 2 3 VGH_35V
4u7
2K2
10K
RES
RES
2J30
2J31
3J21
6J00
3J22
100n
RES
1
PMEG1030EJ
RES FJ09
4J05
3K6
RES
3J23
SGND1 RES
7J05
2N7002
2 3
1
GSLOP
1 2010-06-29
PCB SB
3139 123 6507
THRILLER BRZ TCON
19130_034_110427.eps
110427
2011-Apr-29
P Gamma & Vcom & NVM
P Gamma & Vcom & NVM

T01D T01D
VREF_15V2 VLS_15V6 VCC_3V3 VLS_15V6 VLS_15V6 VLS_15V6
VCC_3V3
FK00
ASIC OPTIONS
1u0
1u0
10u
22K 5%
100n
100n
100n
2K00
2K01
3K00
100K 0.5%
3K03
2K02
2K03
2K04
3K05
2K05
2K2 5%
FK02
FK03
7K00
6K2 0.5%
5
21
3K01
ISL24837IRZ-T13
6K8
6K8
10K
10K
5K1 0.5%
10K
RES
RES
RES
RES
3K40
3K41
3K60
3K44
3K45
3K46
18K 5%
3K04
FK01 AVDD
29 2 FK10 VH255
VSD OUT1 SDA-TCON
SCL-TCON
3 FK40 VH191
OUT2
27
INPCOM|DVR_OUT
10K 0.5%
3K02
4 4K00 FK11 VH127
OUT3 FK38 50Hz_60Hz
RES 4K22 VH31
FK27 SELLVDS
1 7 RES 4K07 FK42 VH159
REFIN_INN OUT4 FK28 R_L
8 RES 4K08 FK29 U_D
VH127
5
6
7
8
OUT5
32 RES 4K09 VH63
REFIN
9 4K01 FK44 VH247
1n0
1n0
1n0
1n0
10K
1 0K
10K
10K
INN5
3K61
3K49
3K51
3K50
10R
10R
10R
10R
RES 4K10 VH95
3K11-4
3K11-3
3K11-2
3K11-1
3K06 28 10
4
3
2
1
SET OUT6
RES 2K30
RES 2K24
RES 2K25
RES 2K26
3K3 5%
11
INN6
SCL-TCON FK04 13
SCL
2K2
RES
100n
100n
100n
100n
3K07
2K06
2K07
2K08
2K09
SDA-TCON FK05 12 16
SDA OUT7
VCC_3V3 15
INN7
30
NC SET_COMP
18 RES 4K11 VH127
OUT8
RES 4K12 FK14 VH95
31 17 RES 4K13 FK15 VH31
NC V_THERM INN8
10K
SSB-TCON EEPROM
RES
3K08
4K02 FK16 VH63
19 FK46 VH0
OUT9
FK06 14 VCC_3V3 VCC
BANKSEL
22 FK47 VL0
OUT10
34 23
OUT11
10K
3K10
35
36 24 RES 4K14 VL127
OUT12
6K00
37 RES 4K15 FK18 VL95

MSS1P4
38 VIA RES 4K16 VL31
5
6
7
8
39 25 FK56 OUTCOM 4K03 VL63 2K28 FK35
OUTCOM
40

10R
10R
10R
10R
41 26 FK57 INNCOM 100n
3K12-4
3K12-3
3K12-2
3K12-1
INNCOM 7K04
4
3
2
1
M24C64-WDW6
8
GND
GND_HS
2K2
6K8
6K8
3K52
3K53
3K54
6
20
33
)
FK07 (8K × 8) 7 FK37 WP_TCON
100n
100n
100n
100n
2K10
2K11
2K12
2K13
FK36 WC
RES 4K17 VL127 EEPROM FK54
1 6 3K55 2K0 ROM_SCL
RES 4K18 FK19 VL63 0 SCL
4K04 2
FK20 VL247 1 ADR FK55
3 5 3K56 2K0 ROM_SDA
RES 4K19 VL95 2 SDA
+VDISP
4
VCOM BUFFER RES 4K20 FK22 VL31
8
7
6
5
RES 4K21 FK23 VL159 FK53
4K05 FK24 VL127
3K62
100R
FK51
cK01
VL191
4K06-1
4K06-2
4K06-3
4K06-4
1
2
3
4
FK52
INNCOM CS_L
5
8
6
7
68p
2K18
7K01
2K2
10R
10R
10R
10R
PBSS4540X
3K34
3K13-4
3K13-3
3K13-2
3K13-1
4
1
3
2
OUTCOM
10u
2K19
0.5%
5K1 0.5%
5R6
100n
100n
100n
100n
3K14
3K17
2K14
2K15
2K16
2K17
DEBUG ONLY
FK08 3K16 RES
VCOM
1KQA
560R 5%
1
0.5%
2
WP_TCON
5R6
100n
2K20
2K21
3K15
3
22u 16V
4 RESET
5
7K02 6 VCC
PBSS5330X 7 NC
VCC_3V3
8 NC
9 NC
10 11
10K
RES
3K35
502382-0970
RES
1KQB
1 SDA-TCON
2 SCL-TCON
3
4 FK33 BYPASS_MODE
5 6
ITEM NO. 32" 40"
502382-0470
3K45 5K1 -
10K
RES
3K36
3K51 - 10K
4K01 - JUMPER
4K02 - JUMPER
4K03 - JUMPER
4K04 - JUMPER
4K09 JUMPER -
4K13 JUMPER -
4K16 JUMPER -
4K18 JUMPER -
1 2010-06-29
PCB SB
3139 123 6507
THRILLER BRZ TCON
19130_035_110427.eps
110427
2011-Apr-29
MPD
MPD
T01E T01E
+VDISP
FL14
2
1 FL16 VREF_15V2
7L02
2SC5886A
3
3L14
2L16
100n
+VDISP
82K 0.5%
1R0
3L17
7L01 FL13
NJM2125F 5 1
FL15 3L16 3L15
4
3
33R 0.5% 33R 0.5%
2
2L14
100n
2L15
3L13
22u 16V
10K 0.5%
4 5
4L00-4 FL00 CS1
FL12
RES 7L00
28
ISL24016IRTZ
AVDD
3 6 ASIC_CS1
4L00-3 FL01 CS2 CS1 1 32
1
62K
3L12
2L13
100n
RES CS2 2 OUT1 31 ASIC_CS3

2
CS3 3 30 ASIC_CS5
3
CS4 4 OUT2 29 ASIC_CS7
2 7 IN 4
4L00-2 FL02 CS3 CS5 5 27 ASIC_CS9
5

RES CS6 6 OUT3 26 ASIC_CS11
6
CS7 7 25
7
CS8 8 OUT4
1 8
4L00-1 FL03 CS4 CS9 19 10
REFH CS_L
CS10 20 OUT5 11
REFL
RES CS11 21
CS12 22 OUT6 13
4 5 +
4L01-4 FL04 CS5 23 INA 14
NC -
1n0
2L12
24 OUT7 15
NC +
RES INB 16
-
18
3 6 OUTA
VCOM 4L01-3 FL05 CS6 34
17 35
OUTB
RES 36
9 37
2 7 NC NC
4L01-2 FL06 CS7 38
VIA
39
RES 40
41
1 4L01-1 8 42
FL07 CS8
RES GND_HS GND

33
12
4 5
4L02-4 FL08 CS9
RES
3 6
4L02-3 FL09 CS10
RES
2 7
4L02-2 FL10 CS11 FOR 32" / 40"
RES
1 8 FL11
4L02-1 CS12
RES
8
7
5
8
8
7
6
5
6
10R
10R
10R
10R
10R
10R
10R
10R
10R
10R
10R
10R
ITEM NO. 32" 40"
3L00-1
3L00-2
3L00-4
3L01-1
3L01-2
3L01-3
3L01-4
3L02-1
3L02-3
1
2
3 3L00-3 6
4
1
2
3
4
1
2 3L02-2 7
3
4 3L02-4 5
3L12 47K 68K
3L13 2K2 2K
2L00
100n
2L01
100n
2L02
100n
2L03
100n
2L04
100n
2L05
100n
2L06
100n
2L07
100n
2L08
100n
2L09
100n
2L10
100n
2L11
100n
3L14 56K 82K
1 2010-06-29
PCB SB
3139 123 6507
THRILLER BRZ TCON
19130_036_110427.eps
110427
2011-Apr-29
Mini LVDS
Mini LVDS
T01F T01F
1KA1
FM98
81 82
1KA2
80
FM00 VGL_-6V
81 82 79
VGH_35V
FM01 80 GSP2 3M00 68R FM69 78
VGL_-6V
FM02 79 GSP1 3M01 68R FM70 77
VGH_35V
GSP2 3M02 68R FM03 78 GCK 3M03 68R FM71 76
GSP1 3M07 68R FM04 77 GOE 3M08 68R FM72 75
GCK 3M09 68R FM05 76 U_D 74
GOE 3M10 68R FM06 75 CS1 73
U_D_INV FM97 74 CS2 72
CS1 73 CS3 71
CS2 72 CS4 70
CS3 71 CS5 69
CS4 70 CS6 68
CS5 69 CS7 67
CS6 68 CS8 66
CS7 67 CS9 65
CS8 66 CS10 64
CS9 65 CS11 63
CS10 64 CS12 62
CS11 63 VCOM 61
CS12 62 VH255 60
VCOM 61 VH247 59
VH255 60 VH191 58
VH247 59 VH159 57
VH191 58 VH127 56
VH159 57 VH95 55
VH127 56 VH63 54
VH95 55 VH31 53
VH63 54 VH0 52
VH31 53 LLV5+ FM73 51
VH0 52 LLV5- FM74 50
51 LLV4+ FM75 49
50 LLV4- FM76 48
49 LLV3+ FM77 47
48 LLV3- FM78 46

47 45
46 LCK+ FM79 44
45 LCK- FM80 43
RLV7+ RES 1 4M00-1 8 FM30 44 42
RLV7- RES 2 4M00-2 7 FM31 43 LLV2+ FM81 41
RLV6+ RES 3 4M00-3 6 FM32 42 LLV2- FM82 40
RLV6- RES 4 4M00-4 5 FM33 41 LLV1+ FM83 39
4 4M04-4 5 40 LLV1- FM84 38
RDIO2 1 4M04-1 8 FM34 39 LLV0+ FM85 37
2 4M04-2 7 38 36 RES
R_L FM35 LLV0- FM86
37 35 2M01
RDIO1 3 4M04-3 6 FM36 VCC_3V3
36 RES RES 3M13 68R 34
2M02 GSP2 100n
35 GSP1 3M14 68R FM87 33
68R VCC_3V3
RES 3M15 34 32
GSP2 100n REV
GSP1 3M16 68R FM38 33 LS 1 4M08-1 8 FM89 31
REV 32 30
LS 4M11 FM40 31 LDIO2 2 4M08-2 7 FM90 29
30 R_L 3 4M08-3 6 FM91 28
RLV5+ FM41 29 LDIO1 4 4M08-4 5 FM92 27
RLV5- FM42 28 26
RLV4+ FM43 27 LLV6+ RES 1 4M13-1 8 FM93 25
RLV4- FM44 26 LLV6- RES 2 4M13-2 7 FM94 24
RLV3+ FM45 25 23
RLV3- FM46 24 LLV7+ RES 3 4M13-3 6 FM95 22
23 LLV7- RES 4 4M13-4 5 FM96 21
RCK+ FM47 22 20
RCK- FM48 21 19
20 18
RLV2+ FM49 19 17
RLV2- FM50 18 16
RLV1+ FM51 17 15
RLV1- FM52 16 14
RLV0+ FM53 15 13
VLS_15V6
RLV0- FM54 14 12
13 VL0 11
VLS_15V6
12 VL31 10
VL0 11 VL63 9
VL31 10 VL95 8
VL63 9 VL127 7
VL95 8 VL159 6
VL127 7 VL191 5
VL159 6 VL247 4
VL191 5 3
VL247 4 2
FM65 3 1
2
20R
1
3M17
501559-8093
501559-8093
20R
3M18
10u
FM67
10u
RES 2M03
FM68
RES 2M04
1 2010-06-29
PCB SB
3139 123 6507
THRILLER BRZ TCON
19130_037_110427.eps
110427
2011-Apr-29
10-10 313912365071 TCON Layout

Overview top/bottom side
FM83 FM81 FM79 FM77 FM75 FM51 FM49 FM47 FM45 FM43 FM36
FM95 FM93 FM85 FM53 FM41 FM35

FM73 FM32 FM30
FM68 FM05
FM34
FM04
FM96 FM94 FM86 FM54 FM42
FM74
3M18
FM33 FM31
FM76 FM00 FM65 FM52 FM50 FM48 FM46 FM44 FM03
FM84 FM82 FM80 FM78
3M02
3M07
3M09
FK44
FM98 FK15
FM67
FK16
FK40
3M17
FK14
1KA2 1KA1
FK11
FK42
FK46 FM06
FM92 FM90
3M10
FM91
FM89
FL07
4M00 4M04 FL06
FK10
3M14
3M13
4M08 4M13 2M03 FL03 2M04
FL02
2M01
FM87 FL09 FL10 FL01
FL00
FL05
FL04
FL08
2M02
FL11
2K26
3K50
3K46
FM97
FJ14
FH05
3H25
3H27
3H26
3H28
FK38
3K61
2K30
3K60
FH35
2K15 FH06
3K15 3K14 FH03 FH02
FM02
FM38
3M16
3M15
FM01
2K16
7K02 7H04
4H05
7H02
FM69 3M00 4M11
7H05

2K17 FK29 FM40
2K14
FM70 3M01
FK07
FK28
3H23
FK52
3H22
3H21
2K21 3K16 FK08 FK19 FK56
3M03
3K51
2K25
3K45
FM71 FK51
2K19
FJ13
2H54
3M08
FM72
7H03
4K20
2K04
3K13
7K01
4K14 FK22
4K03
4K06
4K18
3K55 2H42 3H03
4K16
FK24
FK37 FH00
FH04
4K15
3K34
2K20
1KQA
4K19 FH01 4H04 3H04 FK47
3K53
3K54 3K56 FK54
3K17 FK18 FK57
2L13
3L12
2K18
2L12
FK23
cK01 3H06
3K52
4K17
3K03 FK27
2H34 3K44
2L07
4K05 4K04 2K24 FK02
FH40
3K04 3K08 FL12
FK55 FK20
3K49
2H29
2H28
4K21 2L06
2H27 2L05
3K06 3K10
2H04
2H52
2H53
FK01
2H50
2H47
2L08
2K02 FK35
2L04
6K00
7K00 2L03
2H05
2H06
3L01
2K10 2H09 2H03

FK06
2L09
2H48
4L01
2K00 2K11 2L02
3K07
2K12
3K12
2L01
2H02
FK53 2H07 2H25
2K28
4L02
FH34 2L00
7L00
3L00
3K01
3K02
FK36
2H10
3L02
3H19
3H20
2H36
4L00
2K13
7K04
2H13 2H01
3K62
2H08
2H37
FL16
3K00
2H39
3H05
2K01
2H32
2K03
4K01
4K08
4K10
4K09
4K02
4K11
4K13
4K12
1X01 7H01 1X02
3K05
3K11 FL15
FL14
FK04 2H30
2L10
2L11
3K40 3H00 3L15 FK03

2H31
3K41
2H38
FK05 2H33
7L01
4K00
4K22
2K05 6J07 2H35
FH38 FH36 FL13 3L16
3K35 3L13
6J05
4K07
7H00
3J28
2K07
2K06
2H26
2K09
2K08
FK00
5H01
2H44
2H45
FH37
5H03
2H46
2H43
5H00
FK33 2H51
3K36
2J39
3L17
FJ56
7L02
5H02
FH39
2L15
5H05
5H04
5H06
2L16 3L14
2L14
3J22 2J38 FJ05
4J04
FJ10
2J50
2J24
FJ55
3J25 2J36
2J25
3H14 3H18 3H17 3H11 3H07 3H08
5J00 FN29
4J02
3J27 5J08
FJ11
2J52
3H01
2H41
3J29 3H13 3H15 3H16 3H12 3H10 3H09 5J07
2J41
1J01
2J20 2J37 3J24

1H00
2J51
2J40
3H02
1KQB
2J32
2J21
2J44
2J35 2J00 2H40
2J01
7J03 1J00 2J43
2J33
7J04 3J26 3J10 2J08
3J11
2J07
6J01 3J12
7J05 3J14
2J09
FJ01
2J22
6J06
5J06
3J13 4J03
2N03
2N02
3J23 6J00
2J42
CK00 2J13 2J10 FN31
FJ59
6J02 2J34 FJ58 FJ09
2N01 2J49
3J21
7J01 FN24 FN23
FJ60
4J05
2J02
2J17 7J00 7J02 FN33
FN19 FN13
FN09 FJ06
FJ00
2J05
2J04
FN25
3J01 3J00
2J30 2J18 FN21 FN17 FN15 FN11 FN07 FJ57
2J03 FN27
FN05
4J00
2J06 2J47 FJ03
4J01
2J31 2J14 3J05 3J02 FN01
FJ02
FN28 FN32
FN06
3J18 FN20 FN14 FN10 FJ04

2J12 2J11 3J07 FN26
FN22 FN18 FN16 FN12 FN08 FJ07
3J19
3J09
3J08
2J19
3J06
3J04 3J03 2J15
2J23
2J28
3J20
2J16
3J16 3J15
2J27 2J26
3J17 2J29
1N01
1 2011-04-28
TCON THRILLER
3139 123 6506
19130_042_110428.eps
110428
2011-Apr-29
Styling Sheets L11M1.1L LA 11. EN 66
11. Styling Sheets

Styling Sheet Thriller 32"
THRILLER 32"
1150
0021 5213
0024

0154
0012
1005
0260
Pos No. Description Remarks

0004 Front Cabinet
1114 0012 Back Cover
0021 Side IO Bracket
0024 Bottom IO Bracket
0154 Speaker Bracket
1112 0260 Stand
1004 Display panel
1005 Power Supply Unit
1112 IR/LED
1004 1114 Keyboard +
1150 Board SSB
5213 Loudspeaker box
0004 8191 Mainscord 1.8m Not Displayed
8G51 Cable LVDS FFC Not Displayed
1085 Remote Control Not Displayed
19130_039_110428.eps
110428
2011-Apr-29
Styling Sheets L11M1.1L LA 11. EN 67
Styling Sheet Thriller 40"
THRILLER 40"
1157
5213
1150
0021

0024
0012
0154
1005
0260
Pos No. Description Remarks

0004 Front Cabinet
1114 0012 Back Cover
0021 Side IO Bracket
0024 Bottom IO Bracket
0154 Speaker Bracket
1112 0260 Stand
1004 Display panel
1005 Power Supply Unit
1004 1112 IR/LED
1114 Keyboard +
1150 Board SSB
1157 TCON module
5213 Loudspeaker box
8191 Mainscord 1.8m Not Displayed
0004 8G50 Cable LVDS FFC Not Displayed
8KA1 Cable LVDS FFC Not Displayed
8KA2 Cable LVDS FFC Not Displayed
1085 Remote Control Not Displayed
19130_046_110429.eps
110429
2011-Apr-29

32 PFL 3606 D 40 Chassisl 11 M 11 L

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32 PFL 3606 D 40 Chassisl 11 M 11 L

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Colour Television Chassis

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2. Technical Specifications and Connections

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REAR CONNECTORS SIDE CONNECTORS

BOTTOM REAR CONNECTORS 2

Figure 2-1 Connection overview

Figure 2-2 USB (type A)

1 - +5V k 9 - HDMI1: Digital Video, Digital Audio - In

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7 - Mini Jack: Audio - In DVI/VGA

2.3.3 Bottom Connections

8 - CVI-2: Cinch: Video YPbPr - In, Audio - In

3. Precautions, Notes, and Abbreviation List

3.3.2 Schematic Notes

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3.3.5 Lead-free Soldering

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D/K Monochrome TV system. Sound subcommittee of the International

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4.1 Cable Dressing

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Figure 4-1 Cable dressing 32"

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Figure 4-2 Cable dressing 40"

4.3 Assy/Panel Removal

Instructions below apply to the 40PFL3606D/78, but will be

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Figure 4-3 Rear cover removal (40")

Warning: Disconnect the mains power cord before removing

4.3.2 LCD Panel 4. Remove the IR/LED board [F].

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Figure 4-4 LCD Panel removal (based on 40" model)

4.4 Set Re-assembly

Thicker blue FFC supporting Improper FFC insertion: Silver line is

Figure 4-5 Flat Foil Cable (FFC) precautions

5. Service Modes, Error Codes, and Fault Finding

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The CSM is a Service Mode that can be enabled by the

• Decrease the number of nuisance calls. MODEL:

• Solved customers' problem without home visit. PROD.SERIAL NO:

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How to Activate Note:

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3. HDCP Keys. Indicates if the HDMI keys (or HDCP keys)

Create a CSM dump on an USB stick

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5.3 Service Tools Figure 5-3 ComPair II interface connection

5.3.1 ComPair Caution: It is compulsory to connect the TV to the PC as

Specifications Additional cables for VCOM Alignment

5.4.2 How to Read the Error Buffer

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5.6 Fault Finding and Repair Tips

5.6.2 Load Default NVM Values

Check (via ComPair) if HDMI EDID data is properly

5.6.5 No Picture via HDMI input Write EDID Data to USB

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5.7.3 How to Copy NVM Data to/from USB

Write NVM Data to USB

Write NVM Data to TV

6.3.1 Tuner Adjustment (RF AGC Take Over Point)

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