RF Engineering & mmWave Design

(AEE 4940)
Lecture 6 – Passive Element Realization
‫ ﻣﻌﺎذ اﻟﻌذﺑﮫ‬.‫د‬
malathbah@ksu.edu.sa
 2

Course Learning Outcomes

´ Introduce the fundamentals of high frequency electromagnetics (including RF and
Microwave)
´ RF: Radio Frequency and EM: Electromagnetics
´ Transmission lines theory (TX) and wave propagation
´ Smith chart as a TX analysis tool
´ Impedance matching for maximum power transfer
´ Scattering parameters (S-parameters) for 2-port network
´ Introduction to Monolithic Microwave Integrated Circuits (MMIC)
´ MMIC process flows
´ Passive element realization and characteristics (such as planar TXs, MIM capacitor,
resistors, inductors, filters and couplers)
´ Active element realization and characteristics (transistors and diodes)
´ Amplifier stability analysis and maximum gain design using conjugate match
3 Monolithic Microwave
Integrated Circuits - MMICs
Monolithic Microwave Integrated Circuits - MMICs
Passive and active elements
combined on the same chip

1.8 GHz
Basestation
Power Amplifier
(Raytheon - USA)

77 GHz
FMCW Radar
(Fraunhofer – Germany)
200 GHz
Low Noise Amplifier
(Glasgow - UK)
4 Monolithic Microwave
Monolithic Microwave Integrated Circuits - MMICs

Integrated Circuits - MMICs

Varactor bank
Thin-film (Schottky diodes)
resistor Lange Metal-Insulator- Wilkinson
Negative Interdigitated coupler Metal capacitor power
Resistance capacitor combiner
Circuit
(GaAs
pHEMTs)

Semi-
conductor
resistor
Coplanar
Thin-film waveguide
Metal-Insulator- Spiral resistor InP HEMT transmission
Metal capacitor inductor switch line
 5

Why MMIC? Why MMICs ?

! Small
! Lightweight
! Manufacturablily
! Reliable
94 GHz Amplifier
! Cheap per unit volume (Fraunhofer)
! Less Packaging Requirement
! High Frequencies Parasitics
(above 20GHz)

94 GHz FMCW
Frequency Modulated Continuous-wave radar
Radar (Fraunhofer)

The lever to opening large volume, consumer markets

 6

MMIC Materials
Layers (electronic material) used for MMIC applications

Electronic Material Comments

Si Integration, Cheap, Meduim frequency
GaAs High speed, Low Noise, Expensive
InP High speed, Low Noise, Expensive, Fragile
SiGe Low phase noise
InSb High speed, low power, expensive,
GaN High Power, fabrication issues
SiC High Power, fabrication issues
Diamond High Power, good thermal dissipation, fabrication issues, new
technology
 7
Impact of Substrate
Impact of Substrate
! Until recently, III-V materials such as GaAs and InP were only
viable choice for MMIC realisation
! III-V substrates are semi-insulating
" low parasitic capacitance
" high Q, low loss passives
! No longer the case due to advances in Si bipolar technology
(and more recently Si CMOS)
! Si substrates have advantages of
" large wafer diameter – 12 inch diameter size
Note: (4 inch for GaAs and 2.5 inch for InP)
" robust, very high yielding processes
! Si substrates tend to be low resistivity
" parasitic capacitance, low Q, high loss
8 Contemporary MMIC
Contemporary MMIC Technologies
Technologies
! Interconnect technology
" Microstrip
" Coplanar waveguide (CPW)

! Active device technology

" Si bipolar transistor
" Si CMOS
" SiGe heterojunction bipolar transistor (HBT)
" GaAs heterojunction bipolar transistor (HBT)
" InP heterojunction bipolar transistor (HBT)
" GaAs high electron mobility transistor (HEMT)
" GaAs pseudomorphic high electron mobility transistor (pHEMT)
" GaAs metamorphic high electron mobility transistor (pHEMT)
" InP high electron mobility transistor (HEMT)
9
Various forms of
Transmission Lines
Various forms of Transmission Lines

Two wire Microstripe

cable Coaxial
line
cable

Rectangular Circular Stripline

waveguide waveguide
10 Interconnect Technologies
(for MMICs)
Interconnect Technologies (for MMICs)

Signal

! Microstrip Substrate

Ground plane

Ground Signal Ground

! Coplanar waveguide
Substrate
 11

Microstrip TX

The exact fields of a microstrip line constitute a hybrid TM-TE

wave and require more advanced analysis
 12

Microstrip TX
Effective Dielectric Constant of
Microstrip Line
 13

Microstrip TX
Characteristic Impedance of Microstrip Line
 14

Microstrip TX
Width Design Equation of Microstrip Line

For A>1.52
OR
For A<1.52
 15

Microstrip TX
Attenuation in Microstrip Line

For most microstrip substrates, conductor loss is more significant than dielectric loss
 16

Microstrip TX Design Example

Example
 17

Microstrip TX Design Example

 18

Microstrip TX Design Example

µ! = 4𝜋 × 10"# 𝐻/𝑚
𝜎$% = 58 𝑀𝑆/𝑚
 19

Passive Components
Passive components
! Capacitance
! Inductance
! Short/Open stub
! Open stub
! Transformer
! Resonator
! Couplers
! Power dividers
! Etc..
20 Examples of Microstrip and Coplanar Waveguide MMICs

Example of CPW and MS

Microstrip Coplanar Waveguide

Groundplane on backside Groundplane on frontside

 21

MS more details
Microstrip - some details

! Impedance of transmission lines depends on

w
" track width and height
" substrate thickness t
" substrate permittivity h er
" operating Frequency

100 er = 12.9
Impedance (Ω)

200 µm substrate 54
track thickness = 2 µm

Impedance (Ω)
80
53 200 µm substrate
150 µm substrate
60
52
100 µm substrate
40
51
20 100 µm substrate
er = 12.9 50
track thickness = 2 µm
0 49
0 20 40 60 80 100 120 140 160 10 20 30 40 50 60 70 80

Track width (µm) Frequency (GHz)

 22

CPW more details

Coplanar Waveguide (CPW)- some details [2]

! Impedance of transmission line depends on

" track width : groundplane spacing
" substrate permittivity g w g
t
" substrate thickness (but not strongly)
" Operating Frequency h er

100 10 µm track width 56 εr = 12.9

55 track thickness = 2 µm
Impedance (Ω)

Impedance (Ω)
80 54
20 µm track width 53
60
52 10 µm track width
40 30 µm track width 51
30 µm track width
20 εr = 12.9 50
track thickness = 2 µm 49
0 48
0 20 40 60 80 100 10 20 30 40 50 60 70 80
gap width (µm)
Frequency (GHz)
 23

Substrate Comparison

# RF Circuits on LOW Resistivity Si Ground

Signal

R = 1 - 3 Ohm-cm CPW
W G t

S
hs
Substrate
0

-20
oss (dB)

-40
 Signal

R = 1 - 3 Ohm-cm CPW
W G t

24 S
hs
Substrate Comparison
Substrate
0

-20
Insertion Loss (dB)

-40

-60 DB(|S[2,1]|)
2mm CPW Line on GaAs
-80 DB(|S[2,1]|)
2mm CPW Line on Low Resistivity Si
-100
0.04 40.04 80.04 110
Frequency (GHz)
25
A few final notes about Microstrip and CPW
MS vs CPW
! Microstrip
" Relatively well behaved electromagnetic environment - couplers scale
" Via-holes to ground - series inductance
" Wafer thinning
" Dispersive at mm-wave frequencies

! Coplanar waveguide
" Airbridges to suppress slotline mode
" Complex electromagnetic environment
" No wafer thinning required (at least to around W band Frequencies
above 90GHz)
" low dispersion at mm-wave frequencies
26
Passive Element
Realization and
Passive Element models
Realisation and models

! Resistors
Thin metal film,
Current flow layer of semiconductor
or polysilicon

W
C
s

s
R = Rsh + 2 Rc
W
L R
Rsh - the sheet resistance of the metal film
or doped semiconductor region
s - the separation between contacts defining the
length of the resistor parallel to current flow
W - the width of the resistor in the direction perpendicular to current flow
Rc - the resistance of the contact at either end of the structure
27
Passive Element
Realization and
Passive Element models
Realisation and models
Capacitors
! Metal-insulator-metal capacitors
C

Second Metal
First Metal
L R

C
G

Substrate Insulator (Si3N4, polyimide)

top-plate area : A Plate areas : 10 - 150 µm2

A ε oε r Dielectric thickness :150 nm (SiNx)
C= dielectric permittivity : εr
d dielectric thickness : d 10 µm (polyimide)

Capacitor values : 0.1 - 50 pF

28
Passive Element
Realization
Passive Elementand models
Realisation and models
Si3N4 MIM Capacitors • Deposition 5nm – 150nm

• Highly Uniform

• Effective Perimtivity ~7.5

Length Width Width

Length

LAYOUT of SHUNT CAPACITANCE in CPW LAYOUT of SERIES CAPACITANCE in CPW

29
Passive Element
Realization
Passive Elementand models
Realisation and models
Capacitance Density
20 µm wide MIM capacitors with SiNx deposited at 22C
8

7
Capacitance (pF)
6

5
5 nm SiNx
4

1
120 nm SiNx
0
0 10 20 30 40 50 60

Capacitor Length (µm)

Density = 7 fF/µm2
κ = 7.5 5 nm SiNx ∼ 2.5 nm ΕΟΤ
30
Passive Element
Realization
Passive Elementand models
Realisation and models

Si3N4 MIM Capacitors

CAPACITANCE vs. AREA for 120nm THICK SI3N4 DEPOSITED at 25C (CAPACITANCE
WIDTH 20µm)

0.7

120nmSERIES
0.6 CAPACITNCE (pF)
120nmSHUNT CAPACITNCE
(pF)
0.5
CAPACITANCE (pF)

0.4

0.3

0.2 RES
ID=R1
R=210000 Ohm

TLINP TLINP
0.1 ID=TL1
Z0=50 Ohm
ID=TL2
Z0=50 Ohm
L=260 um L=260 um
PORT Eeff=6.9 CAP Eeff=6.9
P=1 Loss=700 ID=C1
Loss=700
C=0.11 pF
0 Z=50 Ohm F0=60 GHz F0=60 GHz

0 10 20 30 40 50 60 70
PORT
P=2
CAPACITNCE LENGTH (µm) CAP Z=50 Ohm
CAP ID=C3
ID=C2 C=0.0015 pF
C=0.0015 pF
31
Passive Element
Realization and
Passive Element models
Realisation
Capacitors II
and models [3]

! Interdigitated Capacitors 125

Measured
100
Calc ulated

Capacitance (fF)
s 75

50

25
w
0
0 50 100 150
l (µm)
R cap (kΩ)

l
εr +1 L p (pH) R series (Ω)
C ( pF ) = l[( N − 3) A1 + A2 ]
w
A1 (pF) = 8.85x10-12 w w in cm R d(k Ω)
C prime (pF) C p(pF)
A2 (pF) = 9.92x10-12 w
R d (k Ω)
Capacitor values : 10 - 100 fF C p (pF)
32
Passive Element
Realization and
Passive Element models
Realisation and models

Inductors
C

L R
Cpara Cpara

Inductor range 1 - 20 nH
Q up to 25
Self-resonant frequency 10 - 40 GHz
 With reference to Figure 7.21, the basic operation of the branch-line coupler is as
follows. With all ports matched, power entering port 1 is evenly divided between ports 2
and 3, with a 90◦ phase shift between these outputs. No power is coupled to port 4 (the
isolated port). The scattering matrix has the following form:

33
Passive Element 0
−1  j

j
0
1
0
0
1


[S] = √ 
Realization and models
. (7.61)
2 1 0 0 j
0 1 j 0

Observe that the branch-line hybrid has a high degree of symmetry, as any port can be used
as the input port. The output ports will always be on the opposite side of the junction from
the input port, and the isolated port will be the remaining port on the same side as the input
port. This symmetry is reflected in the scattering matrix, as each row can be obtained as a
transposition of the first row.

Z0 / 2
Z0 Z0
(Input) 1 2 (Output)
!
Z0 4 ! Z0
4

(Isolated) 4 3 (Output)
Z0 Z0
Z0 / 2

FIGURE 7.21 Geometry of a branch-line coupler.

34 Branch-Line Coupler
Design Exercise

Design a microstrip branch-line coupler to work at 12 GHz.

The coupler is to provide a 3 dB power split, and have port
impedances of 50 Ω. It is to be fabricated on a substrate that
has a relative permittivity of 9.8, and a thickness of 0.25
mm.