Vol. 37, No.

7 Journal of Semiconductors July 2016

Metal-to-metal antifuse with low programming voltage and low on-state resistance
Jiang Yang(江洋)Ž , Tian Min(田敏), Long Huang(龙煌), Zhao Jie(赵劼), Chen Shuai(陈率),
and Zhong Huicai(钟汇才)

Key Laboratory of Microelectronics Devices and Integrated Technology, Institute of Microelectronics of Chinese Academy of
Sciences, Beijing 100029, China

Abstract: This paper describes and analyses the impact of the Ti layer, which is embedded between the insulator
and top electrode, on the programming characteristic of the Al–HfO2 –Al antifuse. The programming voltage of
the antifuse with 120 Å HfO2 is properly reduced from 5.5 to 4.6 V with an embedded Ti layer. Low on-state
resistance (19 ) and low programming voltage (4.6 V) is demonstrated in the embedded Ti antifuse with 120 Å
HfO2 while keeping sufficient off-state reliability. The antifuse embedded with a Ti layer between the insulator and
top electrode has been developed and has potential in field programmable devices.

Key words: antifuse; embedded Ti layer; lower programming voltage; HfO2

DOI: 10.1088/1674-4926/37/7/074008 PACS: 85.30.-z EEACC: 2520; 2560

1. Introduction CMOS process with only 3 additional masks. Cross sectional

schematics of the antifuse with and without the Ti embedding
Metal-to-metal antifuses, which have the metal–insulator–
layer discussed in this work is shown in Figure 1. Antifuse sam-
metal (MIM) structure, have been extensively used in field pro-
ples were made on silicon substrates coated with 4000 Å Al,
grammable gate arrays (FPGA) as interconnect elementsŒ1; 2 .
which serves as the bottom electrode. Then, a 120 Å thick HfO2
To make a permanent connection between the two metal elec-
layer was deposited by the Atomic Layer Deposition (ALD)
trodes in a MIM antifuse, a programming voltage is applied to
processŒ3 . After these processes, a Ti layer of 100 Å was de-
break down the insulator, and create conductive filaments in it.
posited on the HfO2 layer by CVD. Then 200 Å TiN thin film
The programmed state can be achieved by applying a voltage
was deposited, which was used as the barrier layer to prevent
sufficiently high to electrically breakdown the dielectric and
top metal diffusing into the insulator layerŒ4 . Finally, 4000 Å
make it electrically conduct between the two electrodes. How-
of Al was deposited by CVD as the top electrode with a pat-
ever, to be able to implement the electrically programmable
terned shadow mask. The size of the antifuse studied here is
antifuses in an IC, the programming voltage for the antifuse
50  50 m2 . At the same time, control samples without the
must be contained within the maximum allowable voltage on
Ti layer were also fabricated, but changing the TiN layer to
the IC and, preferably, at its operating voltage. Therefore, a
300 Å to make the comparison more meaningful.
lower programming voltage is desirable. Previous research has
concentrated on reducing the thickness of insulators to achieve
lower breakdown voltage and lower on-state resistance. The
use of thin insulator film is advantageous to lower program-
ming voltage and on-state resistance because of the short dis-
tance between electrodes. However, it is difficult to obtain suf-
ficient off-state reliability of such an extremely thin insulator
film formed on the metallic electrode due to local electric field
intensification caused by the roughness of the metal surface,
especially by the sharp protrusions.
In this article, HfO2 -based antifuses embedded with a Ti
layer were fabricated. These antifuses can get lower program-
ming voltage, lower on-state resistance and sufficient off-state
reliability at the same time. The embedded Ti layer was de-
posited between the insulator and the top electrode. Besides,
the control samples with pure HfO2 layers were also fabricated.
All the electrical measurements were performed using an Agi-
lent 4156C semiconductor parameter analyzer.
Figure 1. (Color online) Cross-section of the metal-to-metal antifuses.
2. Fabrication of antifuses Both of the devices have 120 Å HfO2 as insulator grown by ALD.
(a) With embedded 100 Å Ti layer and 200 Å TiN. (b) Without em-
The antifuse process is incorporated into the existing bedded Ti layer, but with 300 Å TiN.

† Corresponding author. Email: jiangyang@ime.ac.cn

Received 15 December 2015, revised manuscript received 1 February 2016 © 2016 Chinese Institute of Electronics

074008-1
J. Semicond. 2016, 37(7)
Figure 2. Typical I –V characteristic of unprogrammed antifuses.
Figure 3. Breakdown voltage distribution for antifuse at temperature
of 25 ıC.
3. Antifuse characteristic
The typical programming I –V characteristics of antifuses
with embedded Ti layer and without embedded Ti layer are
shown in Figure 2. The antifuses were programmed with an
Agilent 4156C semiconductor parameter analyzer with the cur-
rent compliance setting to 100 A. Positive voltage was biased
on the top electrode. During programming, there was a 10 k
resistor on the probe tip to limit capacitor discharge currentŒ5 .
The thicknesses of HfO2 in both types of devices were the same
as 120 Å. As shown, when the voltage reaches near the thresh-
old voltage for breakdown (Vtb ) there is a sharp increase of cur-
rent indicating the conductivity of the insulator was enhanced
greatly by the field near the breakdownŒ6 . This figure also de-
picts that an antifuse with an embedded Ti layer has a larger
leakage current in low voltage.
Figure 3 depicts the breakdown voltage distribution for an-
tifuses with and without embedded Ti layer. The antifuses with
embedded Ti layer have a lower programming voltage in com-
parison with the ones without the embedded Ti layer. 50 cells
were measured for both conditions. The median breakdown
voltage with the embedded Ti layer is 0.9 V lower than that
without the embedded Ti layer.
Figure 4 demonstrates the distribution of on-state resis-
tances of programmed antifuses with and without embedded
074008-2
Jiang Yang et al.
Figure 4. Programmed antifuse resistance distribution.
Figure 5. Weibull distribution of the program time.
Ti layer. The resistances were read out by a 100 mV read volt-
age. 50 cells were measured for both conditions. Significantly
reduced on-state resistance and dispersion of the on-state resis-
tance are observed in the Ti layer embedded devices.
The programming characteristic of the antifuses using the
pulse voltage is shown in Figure 5. In order to compare the
characteristic of the two different structures, a programming
voltage of 7 V, which was higher than the breakdown voltage
of antifuses without embedded Ti layer, was used to rupture
and program the two different antifusesŒ7 . To limit the current
flowing through the programmed antifuses, a 10 k resistor
was attached to the probe tip. A significantly shorter and tight
distribution of the breakdown time is observed in the Ti layer
embedded devices.
The temperature effect on the leakage current of the Ti
layer embedded device is depicted in Figure 6. The leakage
specification defined how much the device can leak from room
temperature to 120 ıC with the top electrode at 1.8 V supply on
the deviceŒ8 . The leakage property for the antifuse with em-
bedded Ti layer shows good off reliability.
4. Discussion
The physical phenomena that focuses the specific condi-
tions associated to the antifuse cell is provided in the Refer-
ence [9]. This models the breakdown process during the pro-
J. Semicond. 2016, 37(7)
Figure 6. Leakage current per unprogrammed antifuse at 1.8 V as a
function of ambient temperature.
Figure 7. (Color online) The process of the soft breakdown. (a) Insula-
tor layer with intrinsic defect. (b) Defect generation under high field,
and finally form a percolation path.
gramming operation of an antifuse cell. The dielectric break-
down physical phenomenon can be divided into three phases.
The first stage of oxide breakdown is oxide wear or trap
charge generation. During initial programming, traps are gen-
erated in the oxide layer during electric field stress. These de-
fects lead to leakages of current across the gate. Three mecha-
nisms can lead to this leakage current: direct tunneling, Fowler-
Nordheim tunneling, and defect generationŒ10 . In this stage,
the leakage current is really small in the order of 10 8 A. How-
ever, when the electrical field is removed, they return to normal
operation and have limited to no change in permanent conduc-
tion.
The second stage is soft breakdown. During this stage,
leakage current is significantly increased. The significant in-
crease in current is due to the fact that the generated defects
begin to form conduction paths through the HfO2 layer. When
the high field is applied during programming, defects generate,
and finally form percolation paths through the oxideŒ11 . Soft
breakdown does not physically change the oxide for permanent
conduction. This process is illustrated by Figure 7.
The third stage is hard breakdown, which is an irreversible
catastrophic breakdown of an oxide. As the current flows
through the percolation path created in the second stage, it
generates large Joule heat to raise the temperature around the
percolation path above the temperature which is high enough
to melt the electrode metal and insulator layer, then diffuse
the electrode metal into the insulator layer to generate fila-
074008-3
Jiang Yang et al.
Œ5
ments . Then the conductive channel called the filament is
formed through the reaction between the metal and the anti-
fuse material.
In this article, lower programming voltage and signifi-
cantly improved on-state resistance uniformity were demon-
strated in HfO2 -based antifuse with embedded Ti layer. It
might be attributed to the embedded Ti layer extracting a large
amount of oxygen ions from the HfO2 film. This process could
be written as followsŒ12 :
HfO2 C Ti ! TiOx C HfO2 x: (1)
Then inducing a large amount of oxygen vacancies at the
metal–insulator interface, or modifying the oxygen distribu-
tion within the HfO2 film. This conforms with the I –V char-
acteristics of antifuses. During low stress voltage, the antifuse
with an embedded Ti layer has a higher leakage current than
the one without an embedded Ti layer, which depict that the
antifuse with the embedded Ti layer has a higher defect den-
sity in the beginning. As a result, the increased oxygen-related
defects presented in HfO2 films have a great influence on the
voltage needed to form the percolation path in the second stage.
The formation energy of the filament in the insulator in
the third stage is related to the melting temperature of the in-
sulator. It is known that the melting of titanium oxide is lower
than Hafnium oxide. So with the embedded Ti layer, the TiOx
generated in the metal–insulator interfaces has a lower melt-
ing pointŒ8 . This may contribute to a shorter time to achieve a
filament in the third stage.
The higher initial defect density may induce larger radius
filaments and a higher number of filaments in the programmed
antifuse, so the on-state resistance of the antifuse with the em-
bedded Ti layer is smaller than the ones with the Ti layer. Over-
all, all these mechanisms result in lower programming voltage,
shorter programming time and lower on-state resistance of the
HfO2 -based antifuse with embedded Ti layer.
5. Conclusion
In summary, Ti layer embedded HfO2 -based antifuses
were fabricated. The antifuse consists of Ti/HfO2 layers as in-
sulator and Al as electrodes. The devices have sufficiently low
off-state leakage current, low on-state resistance and high reli-
ability. A remarkably lower programming voltage, shorter pro-
gramming time and significantly improved on-state resistance
uniformity were demonstrated in the Ti layer embedded de-
vices. The reduction of programming voltage is a consequence
of the embedded Ti layer which induced higher intrinsic defects
in the HfO2 layer. Some doubts remain about the Ti thickness
effect of the property of the antifuse. Further work is required
to fully confirm the embedded Ti layer’s influence on the an-
tifuse. The new antifuse structure has a combination of low
programming voltage and uniform on-state resistance distribu-
tion that make it suitable for high-performance, high-density
FPGAs.
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