a. Describe the function of the following pins in microprocessor 8085?

i) READY
ii) ALE
iii) IO/M
iv) HOLD
v) SID and SOD

b. With an aid of a well labelled diagram, explain the Architecture of 8085?

a. Explain the instruction sets of 8085?

i) Data transfer instructions
ii) Arithmetic instructions
iii) Logical instructions
iv) Branching instructions
v) Machine control instructions

b. Write the Assembly language program to sort a set of numbers in Ascending order?

a) With suitable examples explain how I/O devices are connected using memory mapped
I/O and peripheral I/O.

b) With the aid of examples explain the following

(a) Segmentation
(b) Page Fault
(c) Virtual Memory

a) Design a microprocessor system to interface an 8K × 8 EPROM and 8K × 8 RAM.

b) Explain PUSH and POP in relation to the 8051 stack

a) Discuss the following registers

(i) Accumulator
(ii) Program Counter
(iii) H-L register pair
c) With an aid of a clearly labelled diagram explain the von Neumann architecture
of a microprocessor.

a) Draw a clearly and neatly labeled diagram of the von Neumann architecture of
computer systems. [10 marks]

b) Consider the following page reference string

1, 2, 3, 4, 2, 1, 5, 6, 1, 2, 2, 3, 7, 6, 3, 2, 1, 2, 3, 6
How many page faults would occur for the following replacement algorithm,

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 assuming one, two, three, four, six, or seven frames?
(a) LRU Replacement
(b) FIFO Replacement
(c) Optimal Replacement

a) Compare and contrast deadlock and starvation. Show how they differ from each other.

a) What are the four conditions necessary for a deadlock?

b) Describe four general strategies for dealing with deadlocks.

d) Consider five processes P0 through P4; and three resources A (10 instances), B (5
instances), and C (7 instances). Consider the following snapshot of a system:
Allocation Need Available
ABC ABC ABC
P0 010 743 230
P1 302 020
P2 302 600
P3 211 011
P4 002 431

Use the Bankers algorithm to check if the system is in a safe state and specify the safe
execution sequence that you discovered (if any).

e) Assuming the operating system detects the system is deadlocked, what can the operating
system do to recover from deadlock?

a) What must the banker’s algorithm know a priori in order to prevent deadlocks?

b) Consider the following set of jobs to be scheduled for execution on a single

CPU system.
Job Arrival Time Size (msec) Priority
J1 0 10 2 (Silver)
J2 2 8 1 (Gold)
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J3 3 3 3 (Bronze)
J4 10 4 2 (Silver)
J5 12 1 3 (Bronze)
J6 15 4 1 (Gold)

i) Draw a Gantt chart showing FCFS scheduling for these jobs.

ii) Draw a Gantt chart showing (non-preemptive) SJF scheduling.

iii) Draw a Gantt chart showing non-preemptive PRIORITY scheduling.

iv) Draw a Gantt chart showing preemptive PRIORITY scheduling.

v) Which of the foregoing scheduling policies provides the lowest waiting time for this set of
jobs? What is the waiting time with this policy? (Show your working)

a) Differentiate between program execution with interrupt and program execution

without interrupt with time use diagrams to illustrate your answer

b) Explain what happens at each of the following steps

LDA 4100H
MOV A, B
MOV A, M
CMP
RAL
RAR

c) Give 2 examples of each of the following different categories of instructions for the
Intel 8085

i. Data Transfer instruction.

ii. Arithmetic instruction.
iii. Logical instruction.
iv. Branch instruction.
v. Machine control instruction

a) Draw a diagram to show memory organisation in 8051 microcontroller

b) Explain the function of the following pins of 8085 microprocessor

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 c) i) ADO-AD7
d) ii) S0, S1
e) iii) RD
f) iv) INTR
g) v) INTA

a) What are the two types of memory fragmentation and why should fragmentation be
avoided?

b) One of the key design decisions in OS memory management is the choice between paging
and segmentation. Compare and contrast these two approaches to memory management,
making sure to identify the strengths and weaknesses of each. Define each of these terms, and
clarify their respective roles in OS memory management.

c) In pure on-demand paginga page replacement policy is used to manage system resources.
Suppose that a newly-created process has 3 page frames allocated to it, and then generates the
page references indicated below:
ABCBADABCDABACBD

i) How many page faults would occur with FIFO page replacement?

ii) How many page faults would occur with LRU page replacement?

iii) How many page faults would occur with OPT page replacement?

a) Describe a real-life operating system scenario in which the use of Peterson’s two
process mutual exclusion is of importance
b) From the above, in a language of your choice, solve the problem noted above using
semaphores
c) Assume you are operating a distributed system environment, illustrate how you would
use the Lamport’s algorithm for synchronization as a way of achieving mutual
exclusion.

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Consider the following set of jobs to be scheduled for execution on a single
CPU system.
Job Arrival Time Size (msec) Priority
J1 0 10 2 (Silver)
J2 2 8 1 (Gold)
J3 3 3 3 (Bronze)
J4 10 4 2 (Silver)
J5 12 1 3 (Bronze)
J6 15 4 1 (Gold)

i) Draw a Gantt chart showing FCFS scheduling for these jobs.

ii) Draw a Gantt chart showing (non-preemptive) SJF scheduling.

iii) Draw a Gantt chart showing non-preemptive PRIORITY scheduling.

iv) Draw a Gantt chart showing preemptive PRIORITY scheduling.

v) Which of the foregoing scheduling policies provides the lowest waiting time for this set of
jobs? What is the waiting time with this policy? (Show your working)
a) Explain the interrupt structure of 8085?

i) TRAP
ii) RST 7.5
iii) RST 6.5
iv) RST 5.5
v) INTR

b) An operating system contains three resource classes, namely R1, R2 and R3. The number
of resource units in these classes is 7, 7 and 10 respectively. The current resource allocation
state is as shown below:

PROCESS ALLOCATED RESOURCES MAXIMUM REQUIREMENT

R1 R2 R3 R1 R2 R3
P1 2 2 3 3 6 8
P2 2 0 3 4 3 3
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P3 1 2 4 3 9 4

(i) Is the current state allocation safe?

(ii) Would the following requests be granted in the current state?

(1) Process P1 requests (1, 1, 0)
(2) Process P3 requests (0, 1, 0)

a) List all the different categories of instructions for the Intel 8085 Microprocessor
giving an example for each category.

b) The following program is executed on the Intel 8085 microprocessor:

MVI A, 03H;
MVI B, 03H;
ADD B;
MOV C, B;
DCR B;
ADI 02H;
HLT;
After executing the program, what are the contents of
i) Register B
ii) Register C
iii) Accumulator
iv) The Zero Flag
v) The Parity Flag

c) Using the Intel 8085 instruction set, write an assembly program to find greatest between
two numbers.

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