Questions opt1 opt2

S.No According to DeMorgan’s theorems, the

complement of a product of variables is the complement of the the sum of the
1
equal to sum complements
The logical sum of two or more logical
2
product terms is called _________ SOP POS
The expression Y=AB+BC+AC shows the
3
_________ operation. EX-OR SOP
The expression Y=(A+B)(B+C)(C+A)
4
shows the _________ operation. AND POS
The canonical sum of product form of the AB + AB’ +
5
function y(A,B) = A + B is __________ AB + BB + A’A A’B
A variable on its own or in its complemented
6
form is known as a _________ Product Term Sum Term
Canonical form is a unique way of
7
representing ____________ SOP Minterm
There are _____________ Minterms for 3
8
variables (a, b, c). 0 2
Complement of the expression A’B + CD’ is (A + B’)(C’ +
9
_________ (A’ + B)(C’ + D) D)
The boolean function A + BC is a reduced
10
form of ____________ AB + BC (A + B)(A + C)
11
Which gate is known as the universal gate? NAND OR
Which of the following combinations cannot Corners in the
12
be combined
Karnaugh into
map K-map is
(K-map) groups ?
an abstract form Diagonal corners same row
of ____________ diagram organized as a
13
matrix of squares. Venn Diagram Cycle Diagram
There are ______ cells in a 4-variable K-
14
map.
Each product term of a group, w’.x.y’ and 12 16
w.y, represents the ____________ in that
15
group. Input POS
Product-of-Sums expressions
Each group of adjacent can (group
Minterms be 2-level OR-AND logic 2-level NOR
16
implemented
size in powersusing __________
of twos) corresponds to a circuits logic circuits
possible product term of the given
17
___________
Don’t care conditions can be used for Function Value
simplifying
There are manyBoolean expressions
situations in logicindesign in
18
___________
which simplification of logic expression is Registers Terms
possible in terms of XOR and
19
_________________ operations.
These logic gates are widely used in X-NOR XOR
_______________ design and therefore
When designing a circuit to emulate are
a truth
20
available
table, bothinProduct-of-Sums
IC form. (POS) Sampling Digital
expressions and Sum-of-Products (SOP)
21
expressions can be derived from? k-map NAND gate
22
Who has invented K-map? Maurice Karnaugh Edward Veitch
 Four adjacent ‘1’s in a Karnaugh map forms
23
a octet singlet
If n denotes the number of variable then the
24
number of cells are given as 2^n 2+n
25
A
In 4-variable Karnaugh
the Karnaugh mapcell
map, each hasrepresents 12 cells 16 cells
___________ minterm derived from the
26
Boolean expression 1 2
The sum or product of two minterms results Boolean
27
in
While forming groups in K-mapping the Maxterms expression
Don’t care states are combined along with
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terms of Minterms Maxterm
Product-of-Sums expressions can be 2-level OR-AND logic 2-level NOR
29
implemented using circuits logic circuits
In a Karnaugh map, a group of eight 1’s
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adjacent to each other is called Pairs Triad
AND followed by NOT followed
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NAND gate is NOT by AND
32
A NOT gate has a HIGH output when The input is low The input is high
An exclusive-OR gate has a HIGH output All inputs are
33
when All inputs are LOW HIGH
Which of the following gates are
34
interchangeable ? NAND and NOR NOR and OR
Negative-AND
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A 2-input NOR gate is equivalent to a Negative-OR gate gate
The Boolean expression for XNOR is given
36
as A+B A.B
A combinational circuit can be designed
37
using only AND gates OR gates
How many NOR gates are required to obtain
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AND operations ? 2 3
The NAND gate can function as a NOT gate all inputs are inputs are left
39
if connected together open
X-OR gate
An exclusive NOR gate is logically inverter followed by followed by an
40
equivalent to an X-OR gate inverter
The X-OR and X-NOR gates can have how
41
many inputs ? 2 1
NOT gates are to be added to the inputs of
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which gate to convert it to a NAND gate ? OR AND
Which logic function is produced by adding
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inverters to the inputs of an AND gate? OR NOR
A resistance and
44
An Inverter gates can be developed using two diodes capacitance
45
If an input A is given to an inverte, the outpu 1/A 1
 If it has even number
46
A Digital word has even parity of 1s If it has even num
47
The gate ideally suited for bit comparison is aTwo input exclusive N Two input exclus
48
Simplify Y=AB'+(A'+B) C AB'+C AB+AC
49
The sequential logic contains __________ Memory elements Memory is provid
50
The combination for which we don't have any Boolena algebra Cicuit switching
51
Sum of the product can be implemented with NOT gates OR gates
52
The output of AND gates in Sum of Product NOT gates OR gates
53
Karnaugh map is made up of circles squares
54
NAND gate is a combination of NOT+AND NOR+AND
55
The logical sum of two or more than two logicOR Operation POS
56
Sum of products can be done using de morgan's theorem algebraic theorem
57
Canonical form is unique way of representin SOP Minterm
58
How many bytes does 4 kilobytes represent? 512 1024
59
NAND function is represented by F=x F=(xy) '
60
Each square in a karnaugh map represents a Points Values
61
DeMorgan's Law states that (A+B)' = A'*B (AB)' = A' + B'
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Which one is universal gate AND NAND
63
Boolean algebra is defined as a set of three values two values
64
(A + B)(A’ * B’) = ? 1 0
65
According to the associative law of addition, A + B = B + A b) A = A + A
opt3 opt4 Answer
the product of
the complements All of the
above the sum of the complements
NAND
OR operation operation SOP

POS NOR SOP

SOP NAND POS

BA + BA’ + AB’ + A’B
A’B’ + A’B’ AB + AB’ + A’B

Literal Word Literal

Boolean
Expressions POS Boolean Expressions

8 1 8
(A’ + B)(C’ + (A + B’)(C
D) + D’) (A + B’)(C’ + D)

A’B + AB’C (A + C)B (A + B)(A + C)

AND None
Corners in NAND
Overlapping the same
combinations column Diagonal corners
Triangular
Block diagram Diagram Venn Diagram

18 8 16
Sum of Sum
Bothof2-
minterms maxterms
level OR- Sum of minterms
2-level XOR AND and Both 2-level OR-AND and NOR
logic circuits NOR logic logic circuits

Set Word Function

K-maps Latches K-maps

NOR NAND X-NOR

Analog Systems Digital

NOR gate X-NOR gate k-map

George Boole Adam Smith Maurice Karnaugh

pair quad quad

2–n 2n 2n

18 cells 20 cells 16 cells

3 4 1
None of the
Implicant above Implicant

SOP POS Minterms

Both None

Quads Octet
OR Octet
Two AND gates followed by
interconnected AND
Power AND followed by NOT
Power supply is supply is
ON OFF The input is low
The inputs have None of the
opposite logic above The inputs have opposite logic
NOR and
AND and OR bubbled OR NAND and NOR
Negative- None of the
NAND gate above Negative-AND gate

A⊕B AB A⊕B
OR andX-NOR
gates NOR gates NOR gates

4 5 3
one input is set one input is
to 0 set
NOT to gate
1 all inputs are connected together
complement of a followed by X-OR gate followed by an
NOR gate a NOR gate inverter

4 any number 2

NOT X-OR OR

NAND X-OR NOR

A translator An Inductance A translator

A A A
If the decimal va If the decima If it has even number of 1s

Two input NANDTwo input NO Two input exclusive NOR gate

A'B+ AC' AB+A AB'+C

Memory data Both A and B Both A and B

Don't care condit Karnaugh me Don't care conditions

AND gates XOR gates AND gates

AND gates XOR gates OR gates

rectangles triangles squares

OR+NOT All of the ab NOT+AND

SOP NAND operat SOP

de morgan's postualgebraic post de morgan's theorem

Boolean Expressi POS Boolean Expressions

4096 8192 4096

F=xy F=(x+y) ' F=(xy) '

Minterm Maxterm Minterm /Maxterm

(AB)' = A' + B none (AB)' = A' + B'

NOR Both b & c Both b & c

four values five values two values

AB AB' AB'

(A + B) + C = A A + 0 = A (A + B) + C = A + (B + C)