Digital Logic Design – CS220 Assignment # 2(Total Marks 100)

Due Date: 5-4-2018 Section V1 and V2

1. Simplify the following Boolean expressions to minimum literal by applying Boolean

algebra rules
a. xyz + x’y + xyz’
b. (A+B)’(A’+B’)’
c. xy +x(wz + wz’)
d. (BC’+ A’D)(AB’+CD’)

2. Given the Boolean function

a. Obtain the truth table of the function

b. Draw the logic diagram using the original Boolean expression
c. Simplify the function to minimum number of literal using Boolean algebra
d. Obtain the truth table of the function from the simplified expression and show that
it is the same as the one in part (a)
e. Draw the logic diagram from the simplified expression and compare the total
number of gates with the diagram of part (b)

3. Express the complement of the following function in sum of minterms:

a. F(A,B,C,D) =∑(0,2,6,11,13,14)
b. F(x,y,z) = ∏(0,3,6,7)
c.
4. Given the following truth table:

x y z F1 F2
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

a. Express F1 and F2 in product of maxterms.

 b. Obtain the simplified function in sum of products.
c. Obtain the simplified function in product of sum

5. A majority gate is a digital circuit whose output is equal to 1 if the majority of inputs are
1`s. The output is 0 otherwise.
a. By means of a truth table, find the Boolean function implemented by a 3-input
majority gate.
b. Express the 3-input majority gate as a sum of minterms and a product of
maxterms.

6. Simplify the following Boolean functions F using K-map

a. x y + x’ y’ z’ + x’ y z’
b. F(A,B,C,D) = ∑ (0,2,4,5,6,7,8,10,13,15)

7. Simplify the following Boolean function F together with the don’t care condition d [10]
F(A,B,C,D) = ∑ (1,3,5,7,9,15), d(A,B,C,D) = ∑(4,6,12,13)

8. Draw the NAND logic diagram for each of the following expression

W(X + Y +Z) + XYZ

9. Simplify each of the following expressions and implement them with NOR gates:

W’X’Y’Z’ + WXY’Z’ + W’X’YZ + WXYZ