820-01686 Schematic Diagram - LO

8 7 6 5 4 3 2 1
CK
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. APPD
REV ECN DESCRIPTION OF REVISION
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
J171 MLB_A
DATE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
4 0016802072 ENGINEERING RELEASED 2019-03-25
D D
LAST_MODIFICATION=Mon Mar 25 03:44:29 2019
PAGE CSA CONTENTS SYNC DATE

1 1 TABLE OF CONTENTS
2 2 BLOCK DIAGRAM: SYSTEM J171/MLB_B 10/24/2018
3 4 BOM TABLES J171/MLB_B 10/24/2018
4 5 SOC: MISC & ALIASES J171/MLB_B 10/24/2018
5 6 NAND J171/MLB_B 10/24/2018
6 7 SOC:JTAG,USB,XTAL J171/MLB_B 10/24/2018
7 8 SOC:PCIE J171/MLB_B 10/24/2018
8 9 SOC:MIPI AND ISP J171/MLB_B 10/24/2018
9 10 SOC:LPDP J171/MLB_B 10/24/2018
10 11 SOC:SERIAL J171/MLB_B 10/24/2018
11 12 SOC:GPIO & UART J171/MLB_B 10/24/2018
12 13 SOC:AOP J171/MLB_B 10/24/2018
13 14 SOC:POWER (1/3) J171/MLB_B 10/24/2018
C 14 15 SOC:POWER (2/3) J171/MLB_B 10/24/2018 C
15 16 SOC:POWER (3/3) J171/MLB_B 10/24/2018
16 17 IO: TRISTAR & ORION J171/MLB_B 11/14/2018
17 18 AUDIO: HP/DMIC FLEX CONNS J171/MLB_B 10/24/2018
18 19 AUDIO: CLIFDEN & BELFIELD J171/MLB_B 10/24/2018
19 20 AUDIO: SPEAKER AMPS LEFT J171/MLB_B 10/24/2018
20 21 AUDIO: SPEAKER AMPS RIGHT J171/MLB_B 10/24/2018
21 22 SENSOR: MESA SUPPORT J171/MLB_B 10/24/2018
22 23 SENSOR: MESA BOOST J71B_MLB_B1 07/23/2018
23 25 SENSOR: KOBOL, PHOS J171/MLB_B 10/24/2018
24 26 IO: BUTTON FLEX CONN / HES J171/MLB_B 10/24/2018
25 27 CAMERA: FF AND ALS CONN J171/MLB_B 10/24/2018
26 29 CAMERA: REAR CONN & FILTERS J171/MLB_B 10/24/2018
27 30 TOUCH: KONA #1 J71B_MLB_B1 07/23/2018
28 31 TOUCH: KONA #2 J171/MLB_B 10/24/2018
29 32 TOUCH: CONNS J71B_MLB_B1 07/23/2018
30 37 IO: FLEX HOTBAR & FILTERS J171/MLB_B 10/24/2018
31 38 BTN: HOME & MESA J171/MLB_B 10/24/2018
B B
32 41 DISPLAY: EDP CONN J171/MLB_B 10/24/2018
33 49 RADIOS: ALIASES J171/MLB_B 10/24/2018
34 70 VENUS J171/MLB_B 10/24/2018
35 75 WIFI/BT: MODULE J171/MLB_B 10/24/2018
36 77 WIFI/BT: J171 FRONT END J171/MLB_A 10/24/2018
37 81 POWER: ANGEL (1/5) J171/MLB_B 10/24/2018
42 86 POWER: EXTERNAL SWITCHES & LDOS J171/MLB_B 10/24/2018
43 87 POWER: BUCKS 4,5,8 J171/MLB_B 10/24/2018
44 88 BEACON2 J171/MLB_B 10/24/2018
45 89 POWER: BATTERY CONNECTOR J171/MLB_B 10/24/2018
46 93 TEST: TP/HOLES/FIDUCIALS J171/MLB_B 10/24/2018
47 94 TEST: EE TP/PP J171/MLB_B 10/24/2018
A
48 121 POWER: ALIASES J171/MLB_B 10/24/2018
SYNC_MASTER=J71S_MLB_B
TABLE OF CONTENTSSYNC_DATE=11/06/2016 A
DRAWING TITLE
SCHEM,MLB-A,YN,J171
DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
TABLE_5_HEAD
4.0.0
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
NOTICE OF PROPRIETARY PROPERTY: BRANCH
TABLE_5_ITEM
051-04464 1 SCHEM,MLB-A,YN,J171 SCH1 CRITICAL THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.
TABLE_5_ITEM
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
820-01686 1 PCBF,MLB-A,YN,J171 PCB1 CRITICAL I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
1 OF 121
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 1 OF 48
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SOC TABLE_ALT_HEAD
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:

TABLE_5_HEAD
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION PART NUMBER
TABLE_5_ITEM TABLE_ALT_ITEM
Page Notes 339S00485 1 POP,CAYMAN+2GB 20NM,B1,A12,BN1,M,CSP1407 U0700 CRITICAL 2GB MICRON BN1 B1A12 155S00007 155S0667
L2710,L2711,L2910,L2911,L2912,L2913,L2920
Power aliases required by this page: TABLE_ALT_HEAD TABLE_ALT_ITEM
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: 138S00049 138S0831 C0610,C0800,... 2.2UF 0201 RDAR #22885449
(NONE) PART NUMBER
TABLE_ALT_ITEM
Signal aliases required by this page: 339S00487 339S00485 U0700 2GB,HYNIX,BN1,B1A12

(NONE) TABLE_ALT_ITEM
339S00488 339S00485 U0700 2GB,MICRON,BNX,B1A12 TABLE_ALT_ITEM
138S00048 138S00003 C8160,C8161,... 15UF

BOM options provided by this page: TABLE_ALT_ITEM
339S00489 339S00485 U0700 2GB,HYNIX,BNX,B1A12
D 339S00612 339S00485 U0700 3GB,MICRON,BN1,B1DEV

TABLE_ALT_ITEM
138S0945 138S0739 C1760,... 1UF

TABLE_ALT_ITEM
D
TABLE_ALT_ITEM
TABLE_ALT_ITEM
138S0706 138S0739 C1760,... 1UF

339S00613 339S00485 U0700 3GB,HYNIX,BN1,B1DEV
TABLE_ALT_ITEM TABLE_ALT_ITEM
339S00614 339S00485 U0700 3GB,MICRON,BNX,B1DEV 376S00071 376S00070 Q8504

TABLE_ALT_ITEM
339S00615 339S00485 U0700 3GB,HYNIX,BNX,B1DEV TABLE_ALT_ITEM
TABLE_ALT_ITEM
376S00159 376S1211 Q8550
339S00367 339S00485 U0700 2GB,HYNIX,BN1,B1DEV TABLE_ALT_ITEM
TABLE_ALT_ITEM
376S0948 376S00076 Q8900

339S00365 339S00485 U0700 2GB,MICRON,BNX,B1DEV
TABLE_ALT_ITEM
339S00369 339S00485 U0700 2GB,HYNIX,BN1,B1DEV TABLE_ALT_ITEM
TABLE_ALT_ITEM
197S0369 197S0392 Y8300 32.768K XTAL RDAR #24177192
339S00364 339S00485 U0700 2GB,HYNIX,BNX,B1DEV TABLE_ALT_ITEM
155S00097 155S0664 FL2780,... FILTER_2P RDAR #23399925

TABLE_ALT_ITEM
155S00341 155S0755 FL4190 FERRITE BEAD RDAR #23169091

TABLE_ALT_ITEM
155S00016 155S0686 L1800,... FILTER_2P

TABLE_ALT_ITEM
155S00342 155S0453 FL2290-FL2292,FL2295,FL2296 FILTER_2P

TABLE_ALT_ITEM
155S00200 155S00400 FL2580,... FILTER_2P
TABLE_ALT_ITEM
138S0786 138S0847 C5905 10UF RDAR #24161406

TABLE_ALT_ITEM
138S0864 138S0709 C8547,... 4.7UF RDAR #23320528

TABLE_ALT_ITEM
138S0875 138S0678 C81A0,... 10UF
C C
TABLE_ALT_ITEM
335S00013 335S0894 U5403 EEPROM
TABLE_ALT_ITEM
335S00066 335S0946 U1103 EEPROM
TABLE_ALT_ITEM
131S00150 131S0890 C2285,C2302
TABLE_ALT_ITEM
132S00088 132S0639 C3023,C3032
TABLE_ALT_ITEM
138S00086 138S0884 C8204
TABLE_ALT_ITEM
C1404,07,11,16-17,21,26,32-33
138S00024 138S0986
TABLE_BOMGROUP_HEAD
C1437,40,60-61; C1503, C7502

BOM NUMBER BOM NAME BOM OPTIONS
TABLE_BOMGROUP_ITEM TABLE_ALT_ITEM
639-06887 PCBA,MLB-A,BETTER,YN,X1596 COMMON,ALTERNATE,MLB_A,EEEE_J171_BTR,ACC_PWR_MAX_1A,32GB 371S00118 371S00117 D3001

TABLE_BOMGROUP_ITEM
639-06888 PCBA,MLB-A,BEST,YN,X1596 COMMON,ALTERNATE,MLB_A,EEEE_J171_BEST,ACC_PWR_MAX_1A,64GB TABLE_ALT_ITEM
TABLE_BOMGROUP_ITEM
376S00030 376S1131 Q1770
639-06889 PCBA,MLB-A,ULTIMATE,YN,X1596 COMMON,ALTERNATE,MLB_A,EEEE_J171_ULT,ACC_PWR_MAX_1A,128GB TABLE_ALT_ITEM
377S0116 377S00132 DZ3700
TABLE_ALT_ITEM
128S00067 128S00094 C81C0,C81C1,C81C2
TABLE_ALT_ITEM
FLASH CONFIGURATIONS 132S00154 132S0683 C30001-05,08-10,19,28

TABLE_5_HEAD TABLE_ALT_ITEM
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION 155S00402 155S0511 L1900-05
TOSHIBA 335S00307 1 NAND,3DV3,32GBT,XXX,S3E,128G,T,SLGA70 U0601 CRITICAL 32GB BICS3 155S00232 155S0665 FL1850-51, L4180,85
TABLE_5_ITEM
WESTERN DIGITAL 335S00311 1 NAND,3DV3,64GBT,XXX,S3E,128G,SD,SLGA70 U0601 CRITICAL 64GB TABLE_ALT_ITEM
197S00120 197S0612 Y0700
B TOSHIBA 335S00314 1 NAND,3DV3,128GBT,XXX,S3E,256G,T,SLGA70 U0601 CRITICAL 128GB

TABLE_5_ITEM
197S00118 197S0612 Y0700

TABLE_ALT_ITEM
B
TABLE_5_ITEM
HYNIX 335S00156 1 NAND,3DV3,256GBT,S3E,256G,H,SLGA70 U0601 CRITICAL 256GB TABLE_ALT_ITEM
TABLE_5_ITEM
131S00172 131S00164 C8820,C8821 220PF
138S0867 5 CAP,X5R,10UF,20%,6.3V,0.65MM,HRZTL,0402 C0648,C0613,C0616,C0621,C0633 CRITICAL 32GB TABLE_ALT_ITEM
TABLE_5_ITEM
131S00173 131S00164 C8820,C8821 220PF
138S00003 5 CAP,X5R,15UF,20%,6.3V,0.65MM,HRZTL,0402 C0648,C0613,C0616,C0621,C0633 CRITICAL 64GB TABLE_ALT_ITEM
TABLE_5_ITEM
371S00173 371S0644 D8500

138S00003 5 CAP,X5R,15UF,20%,6.3V,0.65MM,HRZTL,0402 C0648,C0613,C0616,C0621,C0633 CRITICAL 128GB
138S00003 5 CAP,X5R,15UF,20%,6.3V,0.65MM,HRZTL,0402 C0648,C0613,C0616,C0621,C0633 CRITICAL 256GB 371S00172 371S0490 D8801,D8802
NEED NEW APNS FOR ALL BELOW PD PARTS 138S00117 138S00071 C1650
TABLE_ALT_ITEM
RADAR #38087795
TABLE_ALT_HEAD

TABLE_ALT_ITEM
PART NUMBER 376S00181 376S1211 Q8550 RADAR #38811594

TABLE_ALT_ITEM TABLE_ALT_ITEM
335S00309 335S00307 U0601 WD 32G 3D-TLC 2DP BICS3 376S00311 376S1211 RADAR #39803629
MECHANICAL PARTS TABLE_ALT_ITEM
Q8550
335S00346 335S00314 U0601 WD 128G 3DV3 RADAR #37810147

TABLE_5_HEAD TABLE_ALT_ITEM
ALTS ADDED FOR P1 OK2FAB

PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION 131S00172 131S00164 ALL
806-19792 1 FENCE,AP_BCUT,YN,J171 PD_FENCE_AP CRITICAL 131S00173 131S00164 ALL

806-13581 1 CAN,TINY,J71B PD_TINY_CAN CRITICAL 131S00366 131S00229 ALL
TABLE_ALT_ITEM
806-13579 806-19792 ALL
BARCODE LABEL/EEEE CODES

A TABLE_5_HEAD
SYNC_MASTER=J171/MLB_B SYNC_DATE=10/24/2018 A
ANGEL PAGE TITLE
825-7639 1 EEEE FOR BETTER L2K8 CRITICAL EEEE_J171_BTR

TABLE_5_ITEM

TABLE_5_HEAD
BOM TABLES
DRAWING NUMBER SIZE
TABLE_5_ITEM
825-7639 1 EEEE FOR BEST L2KM CRITICAL EEEE_J171_BEST TABLE_5_ITEM
343S00314 1 IC,PMU,ANGEL,D2365A0,OTP-DC,WLCSP361 U8100 CRITICAL 051-04464 D

825-7639 1 EEEE FOR ULTIMATE L2L0 CRITICAL EEEE_J171_ULT
TABLE_5_ITEM
Apple Inc. REVISION
4.0.0
SPEAKER AMPS NOTICE OF PROPRIETARY PROPERTY: BRANCH
RELEASED BY WWW.LAPTOP-SCHEMATICS.COM THE INFORMATION CONTAINED HEREIN IS THE

TABLE_5_HEAD
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION PROPRIETARY PROPERTY OF APPLE INC.
TABLE_5_ITEM
353S01608 1 IC,MAX98357B,PWR AMP,AUDIO,CLASS D,WLP9 U2020,U2040,U2120,U2140 CRITICAL I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
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BOOT CONFIG ID MAKE_BASE=TRUE

PP1V8_EXT_SW1 DEVICE 8-BIT 7-BIT I2C0_SCL_1V8 I2C0_SCL_1V8
48 39 10 8 7 4 I2C0 ------
ANGEL
-----
0X78
-----
0X3C
10 IN
I2C0_SCL_1V8
OUT
OUT
39
16
TRISTAR 0X34 0X1A
NOSTUFF NOSTUFF BEACON 0X4C 0X26 I2C0_SCL_1V8 OUT 44
1 1 1
R0502
1.00K
R0501
1.00K
R0500
1.00K
I2C0_SCL_1V8 OUT 18
5% 5% 5%
1/32W 1/32W 1/32W MAKE_BASE=TRUE
MF MF MF 10 BI I2C0_SDA_1V8 I2C0_SDA_1V8 BI 39
01005 01005 01005
2 2 2 I2C0_SDA_1V8 BI 16
I2C0_SDA_1V8 BI 44
11 OUT GPIO_BOOT_CFG2 I2C0_SDA_1V8 BI 18
D 11 OUT GPIO_BOOT_CFG1 D
11 OUT GPIO_BOOT_CFG0
MAKE_BASE=TRUE
DEVICE 8-BIT 7-BIT I2C1_SCL_1V8 I2C1_SCL_1V8
R0533 I2C1 ------
BELLATRIX2
-----
0X26
-----
0X13
10 IN OUT 16
1
240 2 JTAG_SOC_SEL OUT 6 46
BOOT_CFG[2:0] MODE S/W READ FLOW 1%

1/32W MAKE_BASE=TRUE
MF 10 BI I2C1_SDA_1V8 I2C1_SDA_1V8 BI 16
000 SPI0 1. SET GPIO AS INPUT 01005
001 SPI0 TEST MODE
2. DISABLE PU AND ENABLE PD
010 NVME0 X2 MODE
011 NVME0 X2 TEST MODE 3. READ
CURRENT SETTING ---> 100 NVME0 X1 MODE
R0534
240
101 NVME0 X1 TEST MODE 1 2 SOC_TESTMODE OUT 6 46 MAKE_BASE=TRUE
DEVICE 8-BIT 7-BIT I2C2_SCL_1V8
110
111
SLOW SPI0 TEST MODE
FAST SPI0 TEST MODE
1%
1/32W
I2C2 ------ -----
ALS (FRONT CAM) 0X72
-----
0X39
10 IN
MF
01005 I2C2_SCL_1V8 OUT 25
MAKE_BASE=TRUE
10 BI I2C2_SDA_1V8
BOARD ID PP1V8_EXT_SW1
I2C2_SDA_1V8 BI 25
48 39 10 8 7 4
CELL DEV
1 1 1 1 1 NC_PMU_SHUTDOWN NC_PMU_SHUTDOWN 39
R0514
1.00K
R0513
1.00K
R0512
1.00K
R0511
1.00K
R0510
1.00K
MAKE_BASE=TRUE
NO_TEST=1
OUT
5% 5% 5% 5% 5%
1/32W 1/32W 1/32W 1/32W 1/32W
MF MF MF MF MF
01005 01005 01005 01005 01005
2 2 2 2 2
GPIO_BRD_ID4
C 11
10
OUT
OUT GPIO_BRD_ID3 C
10 OUT GPIO_BRD_ID2 MAKE_BASE=TRUE GND 8
10 OUT GPIO_BRD_ID1 MAKE_BASE=TRUE GND 8
10 OUT GPIO_BRD_ID0
MAKE_BASE=TRUE GND 8
BRD_ID[4-0]
11100 J171 AP (WIFI)

11101 J171 DEV
11110 J172 AP (CELL)
11111 J172 DEV
RDAR//PROBLEM/43583487
B BOARD REVISION B
PP1V8_EXT_SW1
48 39 10 8 7 4
NOSTUFF NOSTUFF
1 1 1 1
R0523
1.00K
R0522
1.00K
R0521
1.00K
R0520
1.00K
5% 5% 5% 5%
1/32W 1/32W 1/32W 1/32W
MF MF MF MF
01005 01005 01005 01005
2 2 2 2
11 OUT GPIO_BRD_REV3
BRD_REV[3-0]
1111 PROTO 1
1110 PROTO 2 US
S/W READ FLOW
1101 PRE-EVT (PREVIOUSLY P2 CHINA)
---> 1100 EVT 1. SET GPIO AS INPUT
1011 DVT 2. ENABLE PD AND DISABLE PU
1010 PVT 3. READ
A SYNC_MASTER=J171/MLB_B SYNC_DATE=10/24/2018 A
PAGE TITLE
SOC: MISC & ALIASES

DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
PAGE
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315mA MAX
R0603
24.9
VOLTAGE=1.8V
48 12 5 PP1V8_EXT_SW1 1 2 PP1V8_NAND_AVDD
1%
1/32W
MF
01005 1 1
ROOM=NAND C0626
2.2UF
C0610
0.1UF
20% 20%
6.3V 6.3V
2 X5R-CERM 2 X5R-CERM
0201 01005
ROOM=NAND ROOM=NAND
5 NAND_AGND
D D
1 1 1 1
C0601
15UF
C0607
15UF
C0629
15UF
C0630
15UF
20% 20% 20% 20%
6.3V 6.3V 6.3V 6.3V
2 X5R 2 X5R 2 X5R 2 X5R
0402-1 0402-1 0402-1 0402-1
ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
1 C0639 1 C0641 1 C0643 1 C0645 1 C0647

1.0UF 1.0UF 1.0UF 1.0UF 1.0UF
20% 20% 20% 20% 20%
2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V
X5R X5R X5R X5R X5R
0201-1 0201-1 0201-1 0201-1 0201-1
ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
1 1 1 1
C0608 1 C0611 C0617 C0623 C0612
100PF
220PF 22PF 68PF 39PF 5%
5% 5% 5% 5% 16V
2 16V
C0G 2 16V
C0G 2 16V
NP0-C0G 2 16V
CER 2 NP0-C0G
01005 01005 01005 01005 01005-1
ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
48 PP0V9_NAND
1007mA MAX
1
C0604 1
C0602 1
C0605 1 C0622 1 C0627
15UF 15UF 15UF 15UF 15UF
20% 20% 20% 20% 20%
6.3V 6.3V 6.3V 6.3V 6.3V
2 X5R 2 X5R 2 X5R 2 X5R 2 X5R
C 0402-1
ROOM=NAND
0402-1
ROOM=NAND
0402-1
ROOM=NAND
0402-1
ROOM=NAND
0402-1
ROOM=NAND #24543147:10uF for 32GB
#26326159:10uF for C1719 1230mA MAX (1us peak power) C
PP3V3_EXT_SW 48
OMIT OMIT OMIT OMIT OMIT
1 C0637 1 C0638 1 C0640 1 C0642 1 C0644 1 C0646

1 C0648 1 C0613 1 C0616 1 C0619 1 C0621 1 C0633
15UF 15UF 15UF 10UF 15UF 15UF
1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 20% 20% 20% 20% 20% 20%
20% 20% 20% 20% 20% 20% 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
CERM-X5R 2 6.3V
X5R 2 6.3V
X5R
2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 0402-1 0402-1 0402-1 0402-9 0402-1 0402-1
X5R X5R X5R X5R X5R X5R
0201-1 0201-1 0201-1 0201-1 0201-1 0201-1 ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
1 C0603 1 C0606 1 C0609 1 C0614 1 C0620 1 C0628

1 C0649 1 C0650 1 C0651 1 C0652 1 C0653 1 C0654
1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 1.0UF
220PF 22PF 100PF 220PF 100PF 68PF 20% 20% 20% 20% 20% 20%
5% 5% 5% 5% 5% 5% 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V
2 16V
C0G 2 16V
C0G 2 16V 2 16V
C0G 2 16V 2 16V
NP0-C0G
X5R
0201-1
X5R
0201-1
X5R
0201-1
X5R
0201-1
X5R
0201-1
X5R
0201-1
01005 01005 NP0-C0G 01005 NP0-C0G 01005
01005-1 01005-1 ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
PP1V8_EXT_SW1
1 C0615 1 C0618 1 C0631 1 C0632 1 C0634 1 C0635 1 C0636
48 12 5
220PF 22PF 68PF 39PF 100PF 220PF 100PF
5% 5% 5% 5% 5% 5% 5%
1 2 16V 2 16V 2 16V 2 16V 2 16V 2 16V 2 16V
C0624
0.01UF
C0G
01005
C0G
01005
NP0-C0G
01005
CER
01005
NP0-C0G
01005-1
C0G
01005
NP0-C0G
01005-1
10% ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
6.3V
2 X5R NAND_VREF
OG10
01005
OD10
OB10
OA10
OF10
OG0
OD0
OB0
OA0
OF0
M4
C3
R3
R7
R5
K4
K6
E5
A3
A7
A5
F2
J5
J7
J1
J9
ROOM=NAND
PCI_AVDD_CLK1
PCI_AVDD_CLK2
PCI_AVDD_H
PCI_VDD1
PCI_VDD2
AVDD1
VREF
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VCC
VCC
VCC
VCC
VCC
VCC
1 C0625
B 0.01UF
10%
B
2 6.3V
X5R
01005
ROOM=NAND U0601
THGBX6T1T82LFXF
VLGA
47 10 CLK_SOC_TO_NAND_24MHZ D2 CLK_IN EXT_D0 G3 GPIO_PMU_TO_NAND_LOW_BATT_L 39
VER-1 J3
H8 EXT_D1 GPIO_SOC_TO_NAND_FW_STRAP 11
47 7 90_PCIE_AP_TO_NAND_REFCLK_P PCIE_REFCLK_P H2
H6 EXT_D2 NC
47 7 90_PCIE_AP_TO_NAND_REFCLK_N PCIE_REFCLK_M ROOM=NAND E3
EXT_D3 NC
G9 BOMOPTION=OMIT_TABLE E7
7 PCIE_NAND_BI_AP_CLKREQ_L PCIE_CLKREQ* EXT_D4 NC
CRITICAL F6
M6 EXT_D5 NC
PCIE_NAND_RESREF PCI_RESREF C7
EXT_D6 NC
1 90_PCIE_AP_TO_NAND_TXD_P M8 PCIE_RX0_P EXT_D7 B8 SYSTEM_ALIVE
R0604
3.01K
7
7 90_PCIE_AP_TO_NAND_TXD_N K8 PCIE_RX0_M
14 39
1% EXT_NCE G1 PCIE_AP_TO_NAND_RESET_L 7
1/32W N5
MF NC PCIE_RX1_P F4 ROOM=NAND 0.00 R0602
01005 N3 EXT_NRE SWD_AP_BI_NAND_SWDIO_R 1 2 SWD_AP_BI_NAND_SWDIO 12
2 ROOM=NAND NC PCIE_RX1_M 1/32W 0% 01005 MF
C5 ROOM=NAND 0.00 R0607
P8 EXT_NWE SWD_AP_NAND_SWCLK_R 1 2 SWD_NAND_SWCLK 12
7 90_PCIE_NAND_TO_AP_RXD_P PCIE_TX0_P 1/32W 0% 01005 MF
7 90_PCIE_NAND_TO_AP_RXD_N N7 PCIE_TX0_M EXT_RNB G5
NC
M2 PCIE_TX1_P EXT_CLE H4
NC NC
K2 PCIE_TX1_M
NC EXT_ALE D4
6 AP_TO_NAND_RESET_L F8 RESET*
A NC
D8 TRST*
SYNC_MASTER=J171/MLB_B SYNC_DATE=10/24/2018
A
NAND_ZQ D6 ZQ PAGE TITLE
NAND
VSSA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1
R0601
34.8
DRAWING NUMBER
051-04464
SIZE
D
B2
B4
B6
OE10
G7
L3
L5
L7
P2
P4
P6
OC0
OC10
0.5% OE0 Apple Inc.
1/32W REVISION
MF
01005
2 ROOM=NAND
5 NAND_AGND 4.0.0

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SOC - USB, JTAG, XTAL VDD18_USB: 1.71-1.89V @20mA MAX
PP1V8_EXT_SW1 48
1 C0700
0.1UF
20%
2 6.3V
X5R-CERM
01005
ROOM=SOC
D D
VDD11_XTAL:1.06-1.17V @TBD mA MAX
FL0700
VOLTAGE=1.1V
240-OHM-25%-0.20A-1.0DCR
46 PP1V1_XTAL 1 2 PP1V1_S1_EXT_SW 48
01005
1 C0704 ROOM=SOC
1 C0705
0.1UF 2.2UF
20% 20%
2 6.3V 2 6.3V
X5R-CERM X5R-CERM
01005 0201
ROOM=SOC ROOM=SOC
VDD18_AMUX: 1.62-1.98V @1mA MAX

PP3V3_USB 48
48 PP1V8_EXT_SW1 1 C0701 3.14-3.46V @20mA MAX

0.1UF
20%
6.3V
2 X5R-CERM
01005
ROOM=SOC
CKPLUS_WAIVE=PWRTERM2GND
PPVDD_S1_FIXED 48
VDD11_XTAL CG50
VDD33_USB CG26
VDD_FIXED_USB CC25
VDD18_USB CE25
tbd - tbd V @5mA MAX
VDD12_UH1_HSIC0 CL20
VDD18_AMUX AJ60
C C
U0700
CAYMAN-2GB-20NM-DDR-M
CSP
SYM 1 OF 16
NC_UH1_HSIC0_DATA CM22 UH1_HSIC0_DATA ANALOGMUX_OUT N64 ADC_SOC_TO_PMU_ANALOGMUX_OUT 39

NO_TEST=1
NC_UH1_HSIC0_STB CM20 UH1_HSIC0_STB
NO_TEST=1
USB_DP CM26 USB_SOC_P 16 46

48 45 39 16 PP1V8_S2 CL31 JTAG_SEL
46 4 JTAG_SOC_SEL USB_DM CL26 USB_SOC_N 16 46
1
R0750 AP_JTAG_TRST_L CL29 JTAG_TRST*
OMIT_TABLE
5%
100K 46
46 AP_JTAG_TDO CG37 JTAG_TDO

R0751
1/32W CJ35 30.1K
MF 46 AP_JTAG_TDI JTAG_TDI USB_VBUS CH26 USB_VBUS_DETECT_R 1 2 USB_VBUS_DETECT 41
2 01005 CK33 01005 1% 1/32W MF
46 16 JTAG_SOC_TMS JTAG_TMS
46 16 JTAG_SOC_TCK CH37 JTAG_TCK USB_ID CJ26 USB_ID 46
R0760
4.7K CM14 COLD_RESET*
46 39 12 RESET_PMU_TO_SYSTEM_L 1 2 RESET_PMU_TO_SYSTEM_R_L
5%
BJ3 CFSB USB_REXT CK26 AP_USB_REXT
1/32W 47 39 16 12 GPIO_PMU_TO_SYSTEM_ACTIVE_READY
MF 1
01005
PP0701 1 BJ2 TST_CLKOUT R0700
B P2MM-NSM
SM
PP AP_TO_PMU_TEST_CLKOUT
1%
200 B
1/32W
1 C0750 AP_TO_NAND_RESET_L BL65 S3E_RESET* MF
2 01005
1000PF 5
ROOM=SOC
10%
2 6.3V
X5R-CERM
01005
BJ4 HOLD_RESET WDOG CK35 GPIO_SOC_TO_PMU_WDOG_RESET 39
46 4 SOC_TESTMODE BL3 TESTMODE
XI0 CM42 XTAL_AP_24M_IN

XO0 CL42 XTAL_AP_24M_OUT 1
R0701 CRITICAL
ROOM=SOC
511K
1%
1/32W
Y0700
1.60X1.20MM-SM
MF
2 01005
R0702 24MHZ-30PPM-60OHM
ROOM=SOC 0.00
1 2 SOC_24M_O 1 3
0% CRITICAL 2 4 CRITICAL
1/32W 1
MF
01005
C0702
12PF
1 C0703
ROOM=SOC 5% 12PF
16V 5%
2 NP0-C0G 2 16V
01005-1 NP0-C0G
ROOM=SOC 01005-1
ROOM=SOC
A SYNC_MASTER=J171/MLB_B SYNC_DATE=10/24/2018
A
PAGE TITLE
SOC:JTAG,USB,XTAL
DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

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SOC - PCIE INTERFACES VDD12_PCIE_REFBUF:1.08-1.26V @40mA MAX

R0804 VOLTAGE=1.2V
0.00
1 2 PP1V2_SOC_PCIE_REFBUF
0%
1/32W
MF
1 C0802
01005 0.1UF
ROOM=SOC 20%
2 6.3V
X5R-CERM
01005 VDD_FIXED_PCIE_xxx:0.855-0.990V @225mA MAX
ROOM=SOC
PPVDD_S1_FIXED 48
D R0803 1 C0803 1 C0800 1 C0806 D

VOLTAGE=0.9V
0.00 0.1UF 1.0UF 2.2UF
PP0V9_SOC_FIXED_PCIE_REFBUF 1 2 20% 20% 20%
VDD12_PCIE: 1.14-1.26V @10mA MAX 2 6.3V 2 6.3V 2 6.3V
PP1V2_SOC 0% X5R-CERM X5R X5R-CERM
48
1 C0804 1/32W 01005 0201-1 0201
BW55
CC49
CC53
CC62
CC47
VDD12_PCIE CE58
CE49
CA55
CA60
CE55
CE60
MF ROOM=SOC ROOM=SOC ROOM=SOC
1 1 0.1UF 01005
C0805
2.2UF
C0801
0.1UF
20%
2 6.3V
ROOM=SOC
20% 20% X5R-CERM
6.3V 01005
VDD12_PCIE_REFBUF
VDD_FIXED_PCIE_CLK
VDD_FIXED_PCIE_ANA
VDD_FIXED_PCIE_REFBUF
6.3V
2 X5R-CERM 2 X5R-CERM ROOM=SOC
0201 01005
ROOM=SOC ROOM=SOC
PP1V8_EXT_SW1 4 7 8 10 39 48
1
PP1V8_EXT_SW1 4 7 8 10 39 48
R0850
100K
1
R0805 U0700 5%
1/32W
CAYMAN-2GB-20NM-DDR-M MF
100K CSP 2 01005
5% ROOM=SOC
1/32W
MF
2 01005 SYM 2 OF 16
ROOM=SOC BC64 BE66
5 PCIE_NAND_BI_AP_CLKREQ_L PCIE_CLKREQ0* PCIE_CLKREQ3* AP_PCIE_CLKREQ3_L 33 46
47 5 90_PCIE_AP_TO_NAND_REFCLK_P CJ48 PCIE_REF_CLK0_P PCIE_REF_CLK3_P CL64 90_AP_PCIE3_REFCLK_P 33 47

GND_VOID=TRUE GND_VOID=TRUE
47 5 90_PCIE_AP_TO_NAND_REFCLK_N CK48 PCIE_REF_CLK0_N PCIE_REF_CLK3_N CM64 90_AP_PCIE3_REFCLK_N 33 47

PCIE LINK 3
#24557655:replace with 20% caps. SI no negative impact
CRITICAL
C C0807 20%1 2 GND_VOID=TRUE

0.22UF C
ROOM=SOC 6.3V
X5R 01005-1 CM46 CM61
5 90_PCIE_NAND_TO_AP_RXD_P 90_PCIE_NAND_TO_AP_RXD_C_P PCIE_RX0_P PCIE_RX3_P 90_AP_PCIE3_RXD_C_P 33 46
1 2 GND_VOID=TRUE GND_VOID=TRUE GND_VOID=TRUE
5 90_PCIE_NAND_TO_AP_RXD_N C0808 0.22UF 90_PCIE_NAND_TO_AP_RXD_C_N CL46

GND_VOID=TRUE
PCIE_RX0_N PCIE_RX3_N CL61 90_AP_PCIE3_RXD_C_N
GND_VOID=TRUE
33 46
PCIE LINK 0
ROOM=SOC 20% 6.3V

X5R 01005-1
D10 NAND is now Gen3 (was Gen2). Caps intentionally 0.22uF
1 2 GND_VOID=TRUE
C0809
ROOM=SOC 20% 6.3V
0.22UF
X5R 01005-1 CK44 CK63
5 90_PCIE_AP_TO_NAND_TXD_P 90_PCIE_AP_TO_NAND_TXD_C_P PCIE_TX0_P PCIE_TX3_P 90_AP_PCIE3_TXD_C_P 33
1 2 GND_VOID=TRUE GND_VOID=TRUE GND_VOID=TRUE
5 90_PCIE_AP_TO_NAND_TXD_N C0810
ROOM=SOC 20% 6.3V
0.22UF 90_PCIE_AP_TO_NAND_TXD_C_N CJ44
GND_VOID=TRUE
PCIE_TX0_N PCIE_TX3_N CJ63 90_AP_PCIE3_TXD_C_N
GND_VOID=TRUE
33
X5R 01005-1 BJ65 BJ66

5 PCIE_AP_TO_NAND_RESET_L PCIE_PERST0* PCIE_PERST3* AP_PCIE_RESET3_L 33 46
1
1
R0802 R0806
LINK0 LINK3
100K
100K 5%
5% 1/32W
1/32W MF
MF 2 01005
2 01005 ROOM=SOC
ROOM=SOC BG66 BE65
NC_AP_PCIE_CLKREQ1_L PCIE_CLKREQ1* PCIE_CLKREQ2* NC_PCIE_AP_BI_BB_CLKREQ_L
NO_TEST=1
NC_AP_PCIE_REF_CLKP_1 CL54 PCIE_REF_CLK1_P PCIE_REF_CLK2_P CK59 NC_90_PCIE_AP_TO_BB_REFCLK_P

GND_VOID=TRUE
NO_TEST=1
NC_AP_PCIE_REF_CLKN_1 CM54 PCIE_REF_CLK1_N PCIE_REF_CLK2_N CJ59 NC_90_PCIE_AP_TO_BB_REFCLK_N
GND_VOID=TRUE
NO_TEST=1
PCIE LINK 2
NC_AP_PCIE_RXP_1 CK52 PCIE_RX1_P PCIE_RX2_P CK56 NC_90_PCIE_BB_TO_AP_TX_C_P
GND_VOID=TRUE
NO_TEST=1
NC_AP_PCIE_RXN_1 CJ52 PCIE_RX1_N PCIE_RX2_N CJ56 NC_90_PCIE_BB_TO_AP_TX_C_N
GND_VOID=TRUE
NO_TEST=1
B B
NC_AP_PCIE_TXP_1 CM50 PCIE_TX1_P PCIE_TX2_P CM57 NC_90_PCIE_AP_TO_BB_TX_C_P

GND_VOID=TRUE
NO_TEST=1
NC_AP_PCIE_TXN_1 CL50 PCIE_TX1_N PCIE_TX2_N CL57 NC_90_PCIE_AP_TO_BB_TX_C_N
GND_VOID=TRUE
NO_TEST=1
NC_AP_PCIE_PERST1_L BG64 PCIE_PERST1* PCIE_PERST2* BE64 NC_PCIE_AP_TO_BB_PERST_L

NO_TEST=1
LINK1 LINK2
CH57 PCIE_EXT_REF_CLK_P
CG57 PCIE_EXT_REF_CLK_N
PCIE_REXT CG63 AP_PCIE_RCAL

1
R0800
3.01K
1%
1/32W
MF
01005
2 ROOM=SOC
A
PAGE TITLE
SOC:PCIE
DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

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SOC - MIPI & ISP INTERFACES
D 0.825-0.94V @25mA MAX 1.62-1.98V @7mA MAX

D
48 PPVDD_S1_FIXED PP1V8_EXT_SW1 48
1 C0902 1 C0900 1 C0901 1 C0903

0.1UF 2.2UF 2.2UF 0.1UF
20% 20% 20% 20%
2 6.3V 2 6.3V 2 6.3V 2 6.3V
G13
G17
G10
G15
G19
G21
G6
X5R-CERM X5R-CERM X5R-CERM X5R-CERM
01005 0201 0201 01005
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
VDD_FIXED_MIPI
VDD18_MIPI
PP1V8_EXT_SW1 4 7 10 39 48
1 1 1 1
R0960 R0961 R0962 R0963
2.2K 2.2K 2.2K 2.2K
5% 5% 5% 5%
1/32W 1/32W 1/32W 1/32W
U0700 MF MF MF MF
CAYMAN-2GB-20NM-DDR-M 2 01005 2 01005 2 01005 2 01005
CSP
47 26 MIPI0C_CAM_REAR_DATA_P<0> A18 MIPI0C_DPDATA0 SYM 3 OF 16 ISP_I2C0_SCL N65 ISP0_CAM_REAR_SCL 26 46
47 26 MIPI0C_CAM_REAR_DATA_N<0> B18 MIPI0C_DNDATA0 ISP_I2C0_SDA N66 ISP0_CAM_REAR_SDA 26 46
47 26 MIPI0C_CAM_REAR_DATA_P<1> B20 MIPI0C_DPDATA1 ISP_I2C1_SCL U64 ISP1_CAM_FRONT_SCL 25
47 26 MIPI0C_CAM_REAR_DATA_N<1> C20 MIPI0C_DNDATA1 ISP_I2C1_SDA R65 ISP1_CAM_FRONT_SDA 25
47 26 MIPI0C_CAM_REAR_DATA_P<2> C24 MIPI0C_DPDATA2 ISP_I2C2_SCL U65 NO_TEST=1 NC_AP_ISP_I2C2_SCL

47 26 MIPI0C_CAM_REAR_DATA_N<2> B24 MIPI0C_DNDATA2 ISP_I2C2_SDA U66 NO_TEST=1 NC_AP_ISP_I2C2_SDA
C 47 26 MIPI0C_CAM_REAR_DATA_P<3> A26
B26
MIPI0C_DPDATA3 ISP_I2C3_SCL W64 NO_TEST=1 NC_AP_ISP_I2C3_SCL C
47 26 MIPI0C_CAM_REAR_DATA_N<3> MIPI0C_DNDATA3 ISP_I2C3_SDA W66 NO_TEST=1 NC_AP_ISP_I2C3_SDA
47 26 MIPI0C_CAM_REAR_CLK_P B22 MIPI0C_DPCLK R0906 R0907

MIPI0C_CAM_REAR_CLK_N A22 61.9 0
47 26 MIPI0C_DNCLK 1 2 ISP0_CAM_REAR_CLK_FL 1 2 ISP0_CAM_REAR_CLK 26 46
1% 5%
MIPI0C_REXT E24 MIPI0C_REXT SENSOR_INT AA64 NO_TEST=1 NC_AP_SENSOR_INT 1/32W 1/20W
MF MF
01005 0201
R0900 1 ROOM=SOC ROOM=SOC
4.02K
1%
1/32W 4 GND B4 MIPID_DPDATA0 SENSOR0_CLK B50 ISP0_CAM_REAR_CLK_R R0908 R0909
MF A4 33 0
01005 2 4 GND MIPID_DNDATA0 SENSOR1_CLK A48 ISP1_CAM_FRONT_CLK_R 1 2 ISP1_CAM_FRONT_CLK_FL 1 2 ISP1_CAM_FRONT_CLK 25
ROOM=SOC
SENSOR2_CLK C48 NO_TEST=1 NC_AP_SENSOR2_CLK 5% 5%
1/32W 1/20W
4 GND B5 MIPID_DPDATA1 MF MF
01005 0201
4 GND C5 MIPID_DNDATA1 ROOM=SOC ROOM=SOC
4 GND C9 MIPID_DPDATA2 SENSOR0_RST A50 ISP0_CAM_REAR_SHUTDOWN_L 26 46
4 GND B9 MIPID_DNDATA2 SENSOR1_RST E50 ISP1_CAM_FRONT_SHUTDOWN_L 25
SENSOR2_RST AA65 NO_TEST=1 NC_AP_SENSOR2_RST

RADAR 20511449 (D11)
4 GND A11 MIPID_DPDATA3 SENSOR3_RST AE64 TP_SENSOR3_RST 1
PP SM PP0902
P2MM-NSM <--- Needed for Cayman debug; this pin cannot be input
4 GND B11 MIPID_DNDATA3 SENSOR4_RST AC65 NO_TEST=1 NC_AP_SENSOR4_RST ROOM=SOC
NOTE: CAN PP0902 BE REMOVED ON J71B?
4 GND B7 MIPID_DPCLK SENSOR0_ISTRB E52 NC_AP_SENSOR0_ISTRB

NO_TEST=1
4 GND A7 MIPID_DNCLK SENSOR1_ISTRB D50 NC_AP_SENSOR1_ISTRB
NO_TEST=1
BN4 SENSOR0_XSHUTDOWN C50

B 28 27 AP_DISP_TOUCH_BSYNC0
BR2
DISP_TOUCH_BSYNC0
SENSOR1_XSHUTDOWN B48
NO_TEST=1
NC_AP_SENSOR0_XSHUTDOWN
B
TO BE REVIEWED 28 27
28 27
AP_DISP_TOUCH_BSYNC1
AP_DISP_TOUCH_EB BR4
DISP_TOUCH_BSYNC1
DISP_TOUCH_EB MIPI1C_REXT E16

GPIO_CODEC_IRQ_L 18 46
MIPI1C_REXT
4 GND E11 MIPID_REXT MIPI1C_DPDATA0 B12 MIPI1C_CAM_FRONT_DATA_P<0> 25 47
MIPI1C_DNDATA0 C12 MIPI1C_CAM_FRONT_DATA_N<0> 25 47
R0950 1
MIPI1C_DPDATA1 B16 NC_MIPI1C_DATAP_1 4.02K
NO_TEST=1 1%
MIPI1C_DNDATA1 C16 NC_MIPI1C_DATAN_1 1/32W
NO_TEST=1 MF
01005
ROOM=SOC2
MIPI1C_DPCLK B14 MIPI1C_CAM_FRONT_CLK_P 25 47
MIPI1C_DNCLK A14 MIPI1C_CAM_FRONT_CLK_N 25 47
A
PAGE TITLE
SOC:MIPI AND ISP

DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

PAGE
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NOTE: D11 GROUNDED VDD12_LPDP_TX D

D
VDD12_PLL_LPDP:1.14-1.26V @3mA MAX
PP1V2_SOC VDD12_LPDP:1.14-1.26V @60mA MAX
48
1 C1013 1 C1001 1 C1004 1 C1005 1 C1002

2.2UF 2.2UF 0.1UF 0.01UF 15PF
20% 20% 20% 10% 5%
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R 2 16V
NP0-C0G
G25
G28
G30
G55
G58
G60
G62
VDD12_PLL_LPDP G23
0201 0201 01005 01005 01005-1
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
Desense for Wifi frequencies
VDD12_LPDP_TX
VDD12_LPDP_RX
U0700
CSP
A54 LPDPRX_RX_D0_P LPDP_TX0P B27 EDP_DATA_P<0> 32 47
SYM 4 OF 16
B54 LPDPRX_RX_D0_N LPDP_TX0N C27 EDP_DATA_N<0> 32 47
B56 LPDPRX_RX_D1_P LPDP_TX1P A29 EDP_DATA_P<1> 32 47

C56 LPDPRX_RX_D1_N LPDP_TX1N B29 EDP_DATA_N<1> 32 47
C C
A61 LPDPRX_RX_D2_P LPDP_TX2P B31 EDP_DATA_P<2> 32 47
B61 LPDPRX_RX_D2_N LPDP_TX2N C31 EDP_DATA_N<2> 32 47
NOTE: "NC" & GROUNDED PER SANJEEV MAHESHWARI

B63 LPDPRX_RX_D3_P LPDP_TX3P A33 EDP_DATA_P<3> 32 47
C63 LPDPRX_RX_D3_N LPDP_TX3N B33 EDP_DATA_N<3> 32 47
A64 LPDPRX_RX_D4_P
B64 LPDPRX_RX_D4_N
NC_AP_LPDPRX_AUX_DP_0 NO_TEST=1
D54 LPDPRX_AUX_D0_P LPDP_AUX_P D33 EDP_AUX_P 32
E56 LPDPRX_AUX_D1_P LPDP_AUX_N E33 EDP_AUX_N 32
D61 LPDPRX_AUX_D2_P CRITICAL 1
E63 LPDPRX_AUX_D3_P LPDP_CAL_DRV_OUT E35 LPDP_CAL_DRV_OUT 1 C1050 R1050
D64 LPDP_CAL_VSS_EXT 20PF 100
NC_AP_LPDPRX_AUX_DP_4 NO_TEST=1 LPDPRX_AUX_D4_P LPDP_CAL_VSS_EXT E31 5% 1%
1/32W
2 16V
C0G MF
B59 LPDPRX_BYP_CLK_P EDP_HPD BN3 EDP_HPD 32
01005 2 01005
C59 LPDPRX_BYP_CLK_N DP_WAKEUP AP2 NC_AP_DP_WAKEUP
NO_TEST=1
B B
NC_AP_LPDPRX_P_RCAL NO_TEST=1
A57 LPDPRX_RCAL_P
NC_AP_LPDPRX_N_RCAL NO_TEST=1
B57 LPDPRX_RCAL_N
NC_AP_LPDPRX_EXT_C NO_TEST=1
D57 LPDPRX_EXT_C
#24401637:Unconnect LPDPRX_EXT_C
A
PAGE TITLE
SOC:LPDP
DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

PAGE
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SOC - SERIAL INTERFACES
D D
R1103
33 BV65
47 18 I2S0_SOC_TO_BELFIELD_MCK 1 2 I2S0_SOC_TO_BELFIELD_MCK_R I2S0_MCK I2C0_SCL CK7 I2C0_SCL_1V8 4 10
5%
1/32W
47 18 I2S0_SOC_TO_BELFIELD_BCLK BY66 I2S0_BCLK U0700 I2C0_SDA CG12 I2C0_SDA_1V8 4 10
MF 47 18 I2S0_SOC_TO_BELFIELD_LRCK BU64 I2S0_LRCK CAYMAN-2GB-20NM-DDR-M

01005 BR64
ROOM=SOC 47 18 I2S0_BELFIELD_TO_SOC_DOUT I2S0_DIN CSP I2C1_SCL AG64 I2C1_SCL_1V8 4 10
47 18 I2S0_SOC_TO_BELFIELD_DOUT BU65 I2S0_DOUT I2C1_SDA AG66 I2C1_SDA_1V8 4 10

SYM 6 OF 16
R1170 R1171 I2C2_SCL U3 I2C2_SCL_1V8 4 10
I2S2_SOC_TO_SPKRAMP_BCLK 0.00 I2S2_BCLK_RC 33 NC_AP_I2S1_MCK NO_TEST=1

D48 I2S1_MCK I2C2_SDA U4 I2C2_SDA_1V8 4 10
20 19 1 2 1 2
NC_AP_I2S1_BCLK NO_TEST=1
E48 I2S1_BCLK
0% 5%
1/32W
MF
1 C1170 1/32W
MF
NC_AP_I2S1_LRCK NO_TEST=1
A46 I2S1_LRCK I2C3_SCL AE66 NC_AP_I2C3_SCL
01005 0.01UF 01005 NC_AP_I2S1_DIN NO_TEST=1
C46 I2S1_DIN I2C3_SDA AE65
NO_TEST=1
NC_AP_I2C3_SDA
10% ROOM=SOC NO_TEST=1
2 6.3V NC_AP_I2S1_DOUT NO_TEST=1
E46 I2S1_DOUT
X5R
01005
NOSTUFF
NC_AP_I2S2_MCK BU66 I2S2_MCK

R1172 R1173 I2S2_SOC_TO_SPKRAMP_BCLK_FILT
NO_TEST=1
BR66 I2S2_BCLK
I2S2_SOC_TO_SPKRAMP_LRCK 0.00 I2S2_LRCK_RC 33 BN64
20 19 1 2 1 2 I2S2_SOC_TO_SPKRAMP_LRCK_FILT I2S2_LRCK
0% 5% NC_AP_I2S2_DIN BN65 I2S2_DIN
1/32W
MF
1 C1171 1/32W
MF I2S2_SOC_TO_SPKRAMP_DOUT_FILT
NO_TEST=1
BJ64 I2S2_DOUT
01005 0.01UF 01005
10% ROOM=SOC
2 6.3V
X5R
01005
NOSTUFF NC_BB_JTAG_TCK CH11 I2S3_MCK SPI4_SCLK CJ12 NC_AP_SPI4_SCLK
NO_TEST=1
NC_I2S_SOC_TO_BB_BCLK CM7 I2S3_BCLK SPI4_MISO CG22
C R1174 R1175 NC_I2S_SOC_TO_BB_LRCK CK9 I2S3_LRCK SPI4_MOSI CM9
NO_TEST=1
NC_AP_SPI4_MISO
NC_AP_SPI4_MOSI
C
NO_TEST=1
I2S2_SOC_TO_SPKRAMP_DOUT 0.00 I2S2_DOUT_RC 33 NC_I2S_BB_TO_SOC_DOUT CG18 I2S3_DIN
20 19 1 2 1 2
NC_I2S_SOC_TO_BB_DOUT CJ9 I2S3_DOUT
0% 5%
1/32W
MF
1 C1172 1/32W
MF
I2C5_SCL CH16 I2C5_SCL 10
01005 0.01UF 01005 I2C5_SDA CJ14 I2C5_SDA 10

10% ROOM=SOC
2 6.3V
X5R
01005
NOSTUFF 4 GPIO_BRD_ID2 CB2 SPI0_MISO GPIO_42 CH20 NC_AP_GPIO_42
BY4 NO_TEST=1 PP1V8_EXT_SW1 4 7 8 10 39 48
4 GPIO_BRD_ID1 SPI0_MOSI GPIO_43 CH22 NC_AP_GPIO_43
NO_TEST=1
4 GPIO_BRD_ID0 BY3 SPI0_SCLK
1 1
4 GPIO_BRD_ID3 CB4 SPI0_SSIN R1113
47.0K
R1114
10K
5% 5%
1/32W 1/32W
MF MF
N2 01005 01005
SPI_BELFIELD_MISO SPI1_MISO 2 ROOM=SOC 2 ROOM=SOC
R1116 47 18
47 18 SPI_BELFIELD_MOSI N3 SPI1_MOSI PMU_SCLK AH65 SPI_SOC_TO_PMU_SCLK 39 46 47 PP1V8_ALWAYS 39 48

33 N4
47 18 SPI_BELFIELD_SCLK 1 2 SPI_BELFIELD_SCLK_R SPI1_SCLK PMU_MISO AH66 SPI_PMU_TO_SOC_DATA 39 47
5% SPI_BELFIELD_CS_L R3 SPI1_SSIN PMU_MOSI AK64 SPI_SOC_TO_PMU_DATA 1

1/32W
MF
18 39 47
R1166
47.0K
01005 DWI_CLK AK65 DWI_SOC_TO_BEACON2_CLK 44 47 5%
ROOM=SOC 1/32W
C44 DWI_DO AM64 DWI_SOC_TO_BEACON2_DATA 44 47 MF
SPI_MESA_MISO SPI2_MISO 01005
R1101 47 21
21 SPI_MESA_MOSI B44 SPI2_MOSI

2 ROOM=SOC
33 A44
21 SPI_MESA_SCLK 1 2 SPI_MESA_SCLK_R SPI2_SCLK DROOP AE3 SOCHOT0_PMU_TO_SOC_L 39 46
5% 21 GPIO_MESA_TO_SOC_IRQ D44 SPI2_SSIN GPU_TRIGGER BY2 THROTTLE_GPU_SOC_TO_PMU_L 43

1/32W
MF
01005
ROOM=SOC SOCHOT AG4 SOCHOT1_SOC_TO_PMU_L 39
R1150 46 27 SPI_GRAPE_MISO B42 SPI3_MISO R1117 33

A42 CLK32K_OUT AM66 CLK_SOC_TO_TOUCH_24MHZ_R
B 46 27 SPI_GRAPE_SCLK 1
33
2
46 27 SPI_GRAPE_MOSI
SPI_GRAPE_SCLK_R E44
SPI3_MOSI
SPI3_SCLK
5%
1
1/32W
ROOM=SOC
2
MF 01005
CLK_SOC_TO_TOUCH_24MHZ 27
B
5% 46 27 SPI_GRAPE_CS_L C42 SPI3_SSIN NAND_SYS_CLK BN66 CLK_SOC_TO_NAND_24MHZ_R 1 2 CLK_SOC_TO_NAND_24MHZ 5 47
1/32W
MF 5%
01005 1/32W
ROOM=SOC MF
01005
ROOM=SOC
33
R1118
PP1V8_EXT_SW1
I2C5 1
R1160 1
R1161 1
R1162 1
R1163 1
R1164 1
R1165 1
R1167 1
R1168
See Radar#25316444 for Details 2.2K
5%
2.2K
5%
2.2K
5%
2.2K
5%
2.2K
5%
2.2K
5%
2.2K
5%
2.2K
5%
1/32W 1/32W 1/32W 1/32W 1/32W 1/32W 1/32W 1/32W
MF MF MF MF MF MF MF MF
01005 01005 01005 01005 01005 01005 01005 01005
2 ROOM=SOC 2 ROOM=SOC 2 ROOM=SOC 2 ROOM=SOC 2 ROOM=SOC 2 ROOM=SOC 2 ROOM=SOC 2 ROOM=SOC
48 PP1V8_EXT_SW1
10 4 I2C0_SCL_1V8
1
A1
C1101
1.0UF
10 4 I2C0_SDA_1V8
20%
VCC
6.3V 10 4 I2C2_SCL_1V8
2 X5R
0201-1 I2C2_SDA_1V8
ROOM=SOC U1101 10 4
M34128-FCS6_P/T I2C5_SCL
A B1 SCL WLCSP SDA A2 I2C5_SDA 10
10
I2C5_SDA A
I2C5_SCL 10 To Cayman 10 SYNC_MASTER=J171/MLB_B
PAGE TITLE
SYNC_DATE=10/24/2018
VSS
ROOM=SOC 10 4 I2C1_SCL_1V8 SOC:SERIAL

B2
CRITICAL DRAWING NUMBER SIZE
10 4 I2C1_SDA_1V8 051-04464 D
Apple Inc. REVISION
4.0.0

PAGE
11 OF 121
SHEET
8 7 6 5 4 3 2 . 1
www.RepairLap.com
8 7 6 5 4 3 2 1
D D
SOC - GPIO INTERFACES
20 19 AUD_SPKRAMP_MODE_L BB64 GPIO_0

46 27 GPIO_GRAPE_IRQ_L BC65 GPIO_1 U0700
NC_AP_GPIO2 BB66 GPIO_2 CAYMAN-2GB-20NM-DDR-M
46 35 33 GPIO_SOC2WLAN_PCIE_DEV_WAKE AY65 GPIO_3 CSP
NC_AP_GPIO4 AY66 GPIO_4
46 18 GPIO_SOC2CODEC_RST_L AV65 GPIO_5 SYM 5 OF 16 TMR32_PWM0 AG2 GPIO_SOC_TO_3V3_TOUCH_EXT_SW_ON 42
NC_AP_GPIO6 AV67 GPIO_6 TMR32_PWM1 AH4 GPIO_SOC_TO_BELFIELD_RESET_L 18
25 GPIO_ALS1_IRQ_L AT67 GPIO_7 TMR32_PWM2 AH3 WLAN_TIME_SYNC 33
39 16 GPIO_TS_TO_SOC_TO_PMU_IRQ AT66 GPIO_8

GPIO_SOC_TO_1V8_TOUCH_EXT_SW_ON AT64 GPIO_9 UART0_RXD CL5 UART_DEBUG_TO_SOC_TX
C 42
NC_AP_GPIO10 AP66 GPIO_10 UART0_TXD CJ7 UART_SOC_TO_DEBUG_TX

16 46
16 46
C
46 28 27 GPIO_GRAPE_RST_L
NO_TEST=1
AP65 GPIO_11
39 GPIO_PMU_TO_SOC_IRQ_L AH64 GPIO_12 UART1_CTS* E39 NC_UART_GNSS_TO_AP_RTS_L
4 GPIO_BRD_REV0
AE4 GPIO_13 UART1_RTS* D39 NC_UART_AP_TO_GNSS_RTS_L
4 GPIO_BRD_REV1
AC3 GPIO_14 UART1_RXD C39 NC_UART_GNSS_TO_AP_TXD
4 GPIO_BRD_REV2 AE2 GPIO_15 UART1_TXD B39 NC_UART_AP_TO_GNSS_TXD
46 33 28 27 GPIO_SOC_TO_BT_TO_TOUCH_TS_SYNC BB2 GPIO_16
4 GPIO_BRD_REV3 BB4 GPIO_17 UART2_CTS* AM4 UART2_WLAN2SOC_RTS_L 33 46
4 GPIO_BOOT_CFG0 BC3 GPIO_18 UART2_RTS* AK3 UART2_SOC2WLAN_RTS_L 33 46
NC_AP_GPIO19 BC4 GPIO_19 UART2_RXD AK4 UART2_WLAN2SOC_TX 33 46
34 GPIO_SOC_TO_ROTTERDAM_DWLD_REQ BE2 GPIO_20 UART2_TXD AH2 UART2_SOC2WLAN_TX 33 46
34 GPIO_SOC_TO_ROTTERDAM_DEV_WAKE BE4 GPIO_21

NC_AP_GPIO22 BE3 GPIO_22 UART3_CTS* AA4 UART_BT2SOC_RTS_L 35 46
NC_AP_GPIO23 NO_TEST=1
BG2 GPIO_23 UART3_RTS* W2 UART_SOC2BT_RTS_L 35 46
NC_AP_GPIO24 NO_TEST=1
CJ11 GPIO_24 UART3_RXD W4 UART_BT2SOC_TX 35 46
4 GPIO_BOOT_CFG1 NO_TEST=1
CL9 GPIO_25 UART3_TXD U2 UART_SOC2BT_TX 35 46
46 39 GPIO_FORCE_DFU CH14 GPIO_26

46 TP_GPIO_DFU_STATUS CK11 GPIO_27 UART4_CTS* D37 UART_ROTTERDAM_TO_SOC_RTS_L 34
4 GPIO_BOOT_CFG2 CG20 GPIO_28 UART4_RTS* C37 UART_SOC_TO_ROTTERDAM_RTS_L 34
4 GPIO_BRD_ID4 AA2 GPIO_29 UART4_RXD B37 UART_ROTTERDAM_TO_SOC_TX 34
NC_AP_GPIO30 AA3 GPIO_30 UART4_TXD A37 UART_SOC_TO_ROTTERDAM_TX 34
NC_AP_GPIO31 D42 GPIO_31

5 GPIO_SOC_TO_NAND_FW_STRAP E42 GPIO_32 UART5_RTXD BG4 UART5_BATT_RTXD 39 45
46 35 GPIO_SOC2BT_WAKE A41 GPIO_33

24 GPIO_BTN_VOL_DOWN_L C41 GPIO_34
24 GPIO_BTN_VOL_UP_L E41 GPIO_35
B NC_AP_GPIO36 A39 GPIO_36 B
NC_AP_GPIO37 AT4 GPIO_37 UART6_RXD CG16 UART_ACC_TO_SOC_TX 16 46
NC_AP_GPIO38 AT2 GPIO_38 UART6_TXD CG14 UART_SOC_TO_ACC_TX 16 46
NC_AP_GPIO39 AV3 GPIO_39

AY2 UART_BELLATRIX2_TO_SOC_TX
NC_AP_GPIO40 GPIO_40 UART7_RXD AP3 16
NC_AP_GPIO41 AY3 GPIO_41 UART7_TXD AM2 UART_SOC_TO_BELLATRIX2_TX 16
47 39 PMU_TO_AP_BUF_BTN_ONOFF_L BU2 REQUEST_DFU1

47 39 PMU_TO_AP_BUF_BTN_HOME_L BU3 REQUEST_DFU2
A
PAGE TITLE
SOC:GPIO & UART

DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

PAGE
12 OF 121
SHEET
8 7 6 5 4 3 2 1
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8 7 6 5 4 3 2 1
SOC - AOP
U0700
CSP
D D
CM16 SYM 7 OF 16
47 39 GPIO_AOP_TO_PMU_SLEEP1_REQUEST AOP_DDR_REQ CFSB_AOP CH35 RESET_PMU_TO_SYSTEM_L 6 39 46
CM29
47 39 14 GPIO_PMU_TO_SYS_SLEEP1_READY AOP_DDR_RESET*
AWAKE_REQ CM31 GPIO_AOP_TO_PMU_ACTIVE_REQUEST 39 47
R1350
CK12 4.7K
17 SPI_AOP2COMPASS_CS_L AOP_FUNC_0 AWAKE_RESET* CJ37 GPIO_PMU_TO_SYSTEM_ACTIVE_READY_R 1 2 GPIO_PMU_TO_SYSTEM_ACTIVE_READY 6 16 39 47
17 COMPASS2AOP_INT CK16 AOP_FUNC_1 5%

CK18 AOP_PDM_CLK0 CM37 DMIC1_SCLK 17 1/32W
39 16 GPIO_ORION_TO_SOC_TO_PMU_IRQ AOP_FUNC_2 MF
NO_TEST=1
CJ29 AOP_PDM_DATA0 CH41 DMIC1_SD 17 01005
23 GPIO_KOBOL_TO_AOP_INT AOP_FUNC_3
CG31 AOP_PDM_DATA1 CK39 NC_AP_AOP_PDM_DATA1
23 SPI_AOP2KOBOL_CS_L AOP_FUNC_4 NO_TEST=1
23 GPIO_KOBOL_TO_AOP_MOTION_INT CH31 AOP_FUNC_5 RT_CLK32768 CM33 CLK_PMU_TO_AOP_32K 39 46
23 SPI_AOP2PHOS_CS_L CK20 AOP_FUNC_6

CJ31 AOP_SWD_TCK_OUT CL14 SWD_AP_TO_MANY_SWCLK 12
23 PHOS2AOP_INT AOP_FUNC_7
18 GPIO_BELFIELD_TO_SOC_IRQ_L CK27 AOP_FUNC_8
AOP_SWD_TMS0 CL16 NC_AP_SWD_TMS0
NC_AP_AOP_FUNC_9 CK24 AOP_FUNC_9
AOP_SWD_TMS1 CG35NO_TEST=1 NC_SWD_BB_SWDIO
NC_AP_AOP_FUNC_10
NO_TEST=1
CK29 AOP_FUNC_10
SWD_TMS2 BU4 SWD_AP_BI_NAND_SWDIO 5 12
NC_AP_AOP_FUNC_11
NO_TEST=1
CK22 AOP_FUNC_11
SWD_TMS3 BV3 SWD_KONA_SWDIO 12 27 46
NC_AP_AOP_FUNC_12
NO_TEST=1
CM12 AOP_FUNC_12
NC_AP_AOP_FUNC_13
NO_TEST=1
CK31 AOP_FUNC_13
NC_AP_AOP_FUNC_14
NO_TEST=1
CG33 AOP_FUNC_14
NC_AP_AOP_FUNC_15
NO_TEST=1
CJ33 AOP_FUNC_15
NO_TEST=1
R1305 NC_AP_AOP_I2C0_SCL CM11 AOP_I2C0_SCL

33 NO_TEST=1
CJ24
47 23 17 SPI_AOP_MOSI 1 2 NC_AP_AOP_I2C0_SDA AOP_I2C0_SDA
NO_TEST=1
5%
1/32W CJ18
MF 47 23 17 SPI_AOP_MISO AOP_SPI_MISO
01005 CJ27
ROOM=SOC SPI_AOP_MOSI_R AOP_SPI_MOSI
SPI_AOP_SCLK_R CJ16 AOP_SPI_SCLK
C C
R1306 NC_UART_BB_TO_AOP_TXD CK14 AOP_UART0_RXD
33 CJ20
47 23 17 SPI_AOP_SCLK 1 2 NC_UART_AOP_TO_BB_TXD AOP_UART0_TXD
5% CJ22
1/32W 46 33 AOP2RADIO_CONTEXT_B AOP_UART1_RXD
MF CL11
01005 46 33 AOP2RADIO_CONTEXT_A AOP_UART1_TXD
ROOM=SOC
NC_AP_AOP_UART2_RXD CG29 AOP_UART2_RXD
NC_AP_AOP_UART2_TXD
NO_TEST=1
CH29 AOP_UART2_TXD
R1307 NO_TEST=1
33 CL35
47 18 I2S_AOP_TO_CODEC_BCLK 1 2 I2S_AOP_TO_CODEC_BCLK_R AOP_I2S_BCLK
5% 47 18 I2S_CODEC_TO_AOP_DOUT CJ39 AOP_I2S_DIN
1/32W CM35
MF NC_AP_AOP_I2S_MCK AOP_I2S_MCK
01005 NO_TEST=1
CK37
ROOM=SOC 47 18 I2S_AOP_TO_CODEC_LRCK AOP_I2S_LRCK DOCK_ATTENTION CG41 NC_AP_AOP_DOCK_ATT
NO_TEST=1
47 18 I2S_AOP_TO_CODEC_DOUT CG39 AOP_I2S_DOUT DOCK_CONNECT CL37 NC_AP_AOP_DOCK_CON

NO_TEST=1
48 28 27 12 PP1V8_TOUCH_EXT_SW
48 12 5 PP1V8_EXT_SW1
48 12 5 PP1V8_EXT_SW1
NOSTUFF
C1390 1 1
R1304 1
R1038
0.1UF
20% 1.00K 1.00K
B 4V 2
X5R
01005
5%
1/32W
MF
5%
1/32W
MF
B
U1331
74AUP1G34GX
2 01005 2 01005
R1332
5
SOT1226
33 SWD_PER_NAND_SWCLK_R 2 4
12 SWD_AP_TO_MANY_SWCLK 1 2 SWD_NAND_SWCLK OUT 5 SWD_AP_BI_NAND_SWDIO
NC
5% 46 27 12 SWD_KONA_SWDIO
3
1/32W
1
MF
01005
NC
48 28 27 12 PP1V8_TOUCH_EXT_SW
C1391 1
0.1UF
20%
4V 2
X5R
01005
U1332
74AUP1G34GX
R1333
5
SOT1226
33 2 4
SWD_AP_TO_MANY_SWCLK 1 2 SWD_PER_KONA_SWCLK_R SWD_KONA_SWCLK
A 12 OUT 27 46
A
NC
5% SYNC_MASTER=J171/MLB_B SYNC_DATE=10/24/2018
3
1/32W PAGE TITLE

1
MF
01005
NC
SOC:AOP
DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

PAGE
13 OF 121
SHEET
8 7 6 5 4 3 2 1
www.RepairLap.com
8 7 6 5 4 3 2 1
SOC - CPU, GPU & SOC RAILS

PPVDD_CPU
48 PPVDD_S1_SOC 48
1.06V @17.4A MAX 0.80V @4.1A MAX

0.9V @tbd A MAX
0.67V @TBDA MAX
0.625V @tbd A MAX 1 C1436 1 C1444 1 C1403
10UF 10UF 10UF
20% 20% 20%
2 6.3V 2 6.3V 2 6.3V
CERM-X5R
1 CERM-X5R CERM-X5R
1 C1401 1 C1408 1 C1434 C1449 0402-9 0402-9 0402-9
D 20%
15UF
20%
15UF
20%
15UF 2.2UF
20%
6.3V
ROOM=SOC ROOM=SOC ROOM=SOC
D
2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 X5R-CERM
0402-1 0402-1 0402-1 0201
ROOM=SOC
1.03V @12.9A MAX

AD10 AB13 ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
0.92V @10.7A MAX
CRITICAL
CRITICAL
ROOM=SOC ROOM=SOC ROOM=SOC AD15 U0700 AB17 0.80V @TBD A MAX C1465 C1438 C1440 C1442
CAYMAN-2GB-20NM-DDR-M 0.67V @TBD A MAX 4.3UF 1UF 7.5UF 0.47UF
C1404 C1411 C1417 C1422 C1427 C1430 AD19
CSP
AB21
PPVDD_GPU 48
20%
4V
20%
4V
20%
4V
20%
6.3V
7.5UF 7.5UF 7.5UF 4.3UF 4.3UF 4.3UF AD23 AB25 CERM CERM CERM CERM
20% 20% 20% 20% 20% 20% 1 1 0402 0402 0402 0402
4V
CERM
4V
CERM
4V
CERM
4V
CERM
4V
CERM
4V
CERM
AF13 SYM 8 OF 16 AB43 1 C1414 C1466
2.2UF
C1448
2.2UF
1 3 1 3 1 3 1 3
0402 0402 0402 0402 0402 0402 AF17 AB47 15UF 20% 20%
1 3 1 3 1 3 1 3 1 3 1 3 20% 6.3V 6.3V
AJ23 AB51 2 6.3V 2 X5R-CERM 2 X5R-CERM 2 4 2 4 2 4 2 4
X5R 0201 0201
AL21 AB55 0402-1
2 4 2 4 2 4 2 4 2 4 2 4 AL8 AD40
AN10 AD45
AN19 AD49
AN23 AD53
AR13 AF55 ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
ROOM=SOC ROOM=SOC
CRITICAL
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC AR17 AJ40 C1402 C1409 C1452 C1454 C1416 C1421 C1426 C1432
4.3UF 4.3UF 4.3UF 4.3UF 7.5UF 7.5UF 7.5UF 7.5UF
C1405 C1412 C1418 C1423 C1428 C1431 AR21 AJ49 20%
4V
20%
4V
20%
4V
20%
4V
20%
4V
20%
4V
20%
4V
20%
4V AD28 BK45
4.3UF
20%
4.3UF
20%
1UF
20%
1UF
20%
1UF
20%
1UF
20%
AU10 AJ53 CERM
0402
CERM
0402
CERM
0402
CERM
0402
CERM
0402
CERM
0402
CERM
0402
CERM
0402 AD32 U0700 BK49
4V 4V 4V 4V 4V 4V AU15 J25 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 CAYMAN-2GB-20NM-DDR-M
CERM CERM CERM CERM CERM CERM AF60 BK53
0402 0402 0402 0402 0402 0402 AW13 J30 CSP
1 3 1 3 1 3 1 3 1 3 1 3 AJ28 BM55
AW17 J38 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 AJ32 BP15
AW21 J43 SYM 9 OF 16
2 4 2 4 2 4 2 4 2 4 2 4 AJ36 BP19
BA10 VDD_CPU J47
AL6 BP23
BA23 J51
AN28 BP28
C BD21
BD8
L15
L19
AN32 BP32 C
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC AN36 BP36
CRITICAL
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC BF10 L23 C1410 C1415 C1420 C1425 C1429 C1456 C1457 AN40 BP40
C1406 C1413 C1419 C1424 C1460 C1461 BF23 L28 1UF
20%
1UF
20%
1UF
20%
0.47UF
20%
0.47UF
20%
0.47UF
20%
0.47UF
20% AN45 BP45
0.47UF 0.47UF 0.47UF 0.47UF 7.5UF 7.5UF BH13 VDD_GPU L32 4V 4V 4V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 20% 20% CERM CERM CERM CERM CERM CERM CERM AN49 BP49
6.3V 6.3V 6.3V 6.3V 4V 4V BH17 L36 0402 0402 0402 0402 0402 0402 0402
CERM CERM CERM CERM CERM CERM 1 3 1 3 1 3 1 3 1 3 1 3 1 3 AN53 BP53
0402 0402 0402 0402 0402 0402 BH21 L40
1 3 1 3 1 3 1 3 1 3 1 3 AN58 BP58
BK10 L45
2 4 2 4 2 4 2 4 2 4 2 4 2 4 AR25 BT13
BK15 L49
2 4 2 4 2 4 2 4 2 4 2 4 AR30 BT17
AJ10 L53
AR34 BT21
P13
AR38 BT25
T15
AR43 BT30
T36
AR47 BT34
T40
AR51 BT38
T53
AR55 BT43
V13
1.06V @1.0A MAX AW30 BT47
V25
0.80V @TBDA MAX AW34 BT51
V34
AW38 BT55
V38
AW43 VDD_SOC BW10
48 PPVDD_CPU_SRAM AF8 V51 VDD_SOC
AW47 CA13
AN15 V55
ROOM=SOC ROOM=SOC
ROOM=SOC CRITICAL AW51 CA17
AR8 Y28
C1407 C1435 C1433 1 C1458 AU19
AW55 CA21
7.5UF 7.5UF 7.5UF 10UF VDD_CPU_SRAM AW60 CA25
20% 20% 20% 20% AW8
4V 4V 4V 2 6.3V BD25 CA30
CERM CERM CERM CERM-X5R BA15
0402 0402 0402 0402-9 BD30 CA34
1 3 ROOM=SOC BA19
1 3 1 3 BD34 CA38
BH8
B 2 4 2 4
BD38 CA43 B
2 4 BD43 CA47
BD47 CE13
BD51 CE17
AF43
BD55 CE45
AF47
BD6 J13
AF51
BD60 J21
P17 VDD_CPU_SENSE BK23 ADC_SOC_TO_PMU_VDD_CPU 39 47
BF28 J34
P21
BF32 P55
P25 VSS_CPU_SENSE BK21 AP_VSS_CPU_SENSE 47
BF36 T10
P30
BF45 T60
P34 VDD_GPU_SENSE AJ45 ADC_SOC_TO_PMU_VDD_GPU 39 47
BF49 V30
P38
1.03V @1.44A MAX BF53 Y10
P43 VDD_SOC_SENSE AL47 ADC_SOC_TO_PMU_VDD_SOC
0.92V @1.50A MAX VDD_GPU_SRAM
39
BF58 Y36
0.80V @TBD A MAX P47
BK28 Y60
P51 VSS_SENSE AJ47 AP_VSS_SENSE 47
48 PPVDD_GPU_SRAM BK32 BF40
Y15
BK36 J60
ROOM=SOC ROOM=SOC Y19
BK40 AW25
Y23
C1439 C1437 1 C1459 Y40
7.5UF 7.5UF 10UF
20% 20% 20% Y45
4V 4V 2 6.3V
CERM CERM CERM-X5R Y49
0402 0402 0402-9
1 3 ROOM=SOC Y53
1 3
2 4
2 4
A
PAGE TITLE
SOC:POWER (1/3)
DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

PAGE
14 OF 121
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SOC - POWER SUPPLIES

DDR IMPEDANCE CONTROL
48 14 PP1V1_S1_EXT_SW
1.06-1.17V @0.85A MAX
PP1V1_S1_EXT_SW 1 1 1 1
48 14
R1501 R1502 R1503 R1504 1 R1505 1 R1506
D 1
C1506 1
C1528 1
C1518 1
C1519 1
C1514 1
C1522 1%
240
1%
240
1%
240
1%
240 240
1%
240
1%
D
10UF 10UF 2.2UF 2.2UF 2.2UF 2.2UF 1/32W 1/32W 1/32W 1/32W 1/32W 1/32W
20% 20% 20% 20% 20% 20% MF MF MF MF MF MF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 2 01005 2 01005 2 01005 2 01005 01005 01005
2 CERM-X5R 2 CERM-X5R 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC 2 ROOM=SOC 2 ROOM=SOC
0402-9 0402-9 0201 0201 0201 0201
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
BE1 DDR0_RREF CD3 DDR0_RREF
BJ1 U0700 DDR1_RREF BY64 DDR1_RREF
BL1 CAYMAN-2GB-20NM-DDR-M DDR2_RREF K3 DDR2_RREF
TBD-TBDV @1.9A MAX BM8 CSP DDR3_RREF K65 DDR3_RREF
48 PPVDD_S1_FIXED BP6
SYM 11 OF 16
BT8 VDDIO11_DDR0 DDR0_ZQ BN2 DDR0_ZQ
BW6 DDR3_ZQ AA66 DDR3_ZQ
C1502 C1527 C1503 CA8
4.3UF 1UF 7.5UF AB30 BK6
20%
4V
20%
4V
20%
4V AB34 U0700 BM13
CC6 DDR0_RET* CF3 GPIO_PMU_TO_SYS_SLEEP1_READY 12 39 47
CERM CERM CERM CAYMAN-2GB-20NM-DDR-M CD1 DDR1_RET* CB65

0402 0402 0402 AB38 BM17
1 3 1 3 1 3 CSP CH1 DDR2_RET* K4
AD58 BM21
AF25 BM25 DDR3_RET* K64 FL1501
2 4 2 4 2 4 SYM 10 OF 16 VOLTAGE=1.1V 1.06 - 1.17V @4mA MAX 100OHM-25%-0.12A
AF30 BM30
VDDIO11_PLL_DDR0 CE8 PP1V1_DDR_PLL 1 2 PP1V1_S1_EXT_SW 48
AF34 BM34
VDDIO11_PLL_DDR1 BW60 01005
AF38 BM38
AF62 BM43 VDDIO11_PLL_DDR2 J8 1 C1508 1 C1509 1 C1523 1 C1510 ROOM=SOC
VDDIO11_PLL_DDR3 P58 0.22UF 0.22UF 0.22UF 0.22UF

AJ58 BM47 BE67 20% 20% 20% 20%
AL25 BM51 BH60 2 6.3V 2 6.3V 2 6.3V 2 6.3V
X5R X5R X5R X5R
1 C1501 AL30 BP10 BJ67 01005-1
ROOM=SOC
01005-1
ROOM=SOC
01005-1
ROOM=SOC
01005-1
ROOM=SOC
10UF AL34 BP60 BK62
20%
2 6.3V AL38 BW15 BL67
CERM-X5R
0402-9 AL43 BW19 BM60 VDDIO11_DDR1
ROOM=SOC
C AL51
AL55
BW23
BW28
BP62
BT60 CG3
(CURRENT INCLUDED IN VDD2) C
VDDIO11_RET_DDR0 PP1V1_S2 14 48
AL60 BW32 BW62 VDDIO11_RET_DDR1 CD65
AR60 BW36 CD67 VDDIO11_RET_DDR2 H4
AU28 BW40 CH67 VDDIO11_RET_DDR3 H64
AU32 BW45
AU36 BW49
AU40 BW53
AU45 BW58 DDR0_SYS_ALIVE CF4 SYSTEM_ALIVE 5 39
VDD_FIXED VDD_FIXED
AU49 BW8 DDR1_SYS_ALIVE CB64
AU53 CC10 DDR2_SYS_ALIVE H3
AB8
AU58 CC15 DDR3_SYS_ALIVE H65
AC1
AU6 CC19
AE1
BA28 CC23
AH1
BA32 CC28
E1
BA36 CC32 AM3
K1 VDDIO11_DDR2
BA40 CC45 AM65
L6
BA45 G32 BB3
P8
BA49 G36 BB65
T6
BA53 J17 BR1
V8
BA58 J23 BR67
Y6
BH25 J55 BV1
BH30 J62 BV67
BH34 L10 BY1
BH38 L58 BY67
BH43 L60 C2 1.06 - 1.17V @1.74A MAX
BH47 T32 C66 PP1V1_S2 14 48
B BH51 T58 AB60 VDD2 CJ2

B
BH55 T8 AC67 CJ66 1 C1512 1 C1513 1 C1507 1 C1529 1 C1511 1 C1515
BK58 Y58 AD62 CK2 10UF 10UF 2.2UF 2.2UF 2.2UF 2.2UF
20% 20% 20% 20% 20% 20%
Y8 AE67 CK66 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V
CERM-X5R CERM-X5R X5R-CERM X5R-CERM X5R-CERM X5R-CERM
AH67 D2 0402-9 0402-9 0201 0201 0201 0201
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
0.797-0.945V @9 mA MAX E67 D66
AW23 VDD_FIXED_CPU VDDIO11_DDR3
K67 N1
0.765-0.840V @60mA MAX P60 N67
48 PP0V8_S2_SOC_AOP CC36 T62 R1
CE30 VDD_LOW V60 R67
1 CE40 Y62 W1
C1504
2.2UF W67
20%
6.3V
2 X5R-CERM
0201
ROOM=SOC
A
PAGE TITLE
SOC:POWER (2/3)
DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

PAGE
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1.70-1.95V @134mA MAX
A12 AL23 B1 BL66 CA15 CH5 D20 L38 PP1V8_S2 AM1
A16 U0700 AL28 B3 U0700 BM10 CA19 U0700 CH52 D22 U0700 L43
48
AM67 U0700
CAYMAN-2GB-20NM-DDR-M CAYMAN-2GB-20NM-DDR-M CAYMAN-2GB-20NM-DDR-M CAYMAN-2GB-20NM-DDR-M 1 1 1 1
A2
CSP
AL32 B35
CSP
BM15 CA23
CSP
CH54 D24
CSP
L47 C1615
2.2UF
C1605
2.2UF
C1608
2.2UF
C1612
2.2UF
BB1 CAYMAN-2GB-20NM-DDR-M
A20 AL36 B41 BM19 CA28 CH56 D26 L51 20% 20% 20% 20% BB67 CSP
A24 AL40 B46 BM23 CA32 CH59 D27 SYM 16 OF 16 L55 6.3V 6.3V 6.3V 6.3V C3 VDD1
2 X5R-CERM 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM
D A27
SYM 13 OF 16
AL45 B52
SYM 14 OF 16
BM28 CA36
SYM 15 OF 16
CH61 D29 L62 0201
ROOM=SOC
0201
ROOM=SOC
0201
ROOM=SOC
0201
ROOM=SOC C65 SYM 12 OF 16
D
A31 AL53 B65 BM32 CA40 CH63 D3 L8 CK3
A35 AL58 B67 BM36 CA45 CH64 D31 M1 CK65
A5 AL62 BA13 BM40 CA49 CH65 D35 M2
A52 AN13 BA17 BM45 CA53 CH66 D4 M3
A56 AN17 BA21 BM49 CA58 CH7 D41 M4 CKPLUS_WAIVE=PWRTERM2GND
1.62-1.98V @43mA MAX CKPLUS_WAIVE=PWRTERM2GND
A59 AN21 BA30 BM53 CA6 CH9 D46 M64 48 PP1V8_EXT_SW1 AJ62 VDD18_EFUSE1 CG7
A63 AN25 BA34 BM58 CA62 CJ1 D5 M65 AN62 VDD18_EFUSE2 G34
1 1 1 1
A66 AN30 BA38 BM6 CB1 CJ3 D52 M66 C1602
10UF
C1607
2.2UF
C1610
2.2UF
C1614
2.2UF
AU62 VDDIO18_GRP1
A9 AN34 BA43 BM62 CB3 CJ4 D56 M67 20% 20% 20% 20% BA62
AA1 AN38 BA47 BN1 CB66 CJ41 D59 P10 6.3V 6.3V 6.3V 6.3V BF62
2 CERM-X5R 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM
AA67 AN43 BA51 BN67 CB67 CJ42 D63 P15 0402-9 0201 0201 0201
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
AB10 AN47 BA55 BP13 CC13 CJ46 D65 P19 G40
AB15 AN51 BA60 BP17 CC17 CJ5 D67 P23 G45
AB19 AN55 BA8 BP21 CC21 CJ50 D7 P28 G49 VDDIO18_GRP2
AB23 AN60 BC1 BP25 CC30 CJ54 D9 P32 G53
AB28 AN8 BC2 BP30 CC34 CJ57 E12 P36
AB32 AP1 BC66 BP34 CC38 CJ61 E14 P40 AD6
AB36 AP4 BC67 BP38 CC43 CJ64 E18 P45 AJ6
AB40 AP64 BD10 BP43 CL22 CJ65 E2 P49 AN6
VDDIO18_GRP3
AB45 AP67 BD23 BP47 T30 CJ67 E20 P53 BA6
AB49 AR10 BD28 BP51 CC8 CK4 E22 P6 BF6
AB53 AR15 BD32 BP55 CD2 CK41 E26 P62
AB58 AR19 BD36 BP8 CD4 CK42 E27 R2 CE19
AB6 AR28 BD40 BR3 CD64 CK46 E29 R4 CE23 VDDIO18_GRP4
AB62 AR32 BD45 BR65 CD66 CK5 E3 R64
AC2 AR36 BD49 BT10 CE10 CK50 E37 R66 1.62-1.98V @10mA MAX CE28
PP1V8_S2_SW3
C AC4 AR40 BD53 BT15 CE15 CK54 E4 T13
48
1 1 CE32 C
AC64 AR45 BD58 BT19 CE47 CK57 E5 T25 C1603
2.2UF
C1601
0.1UF CE34
AC66 AR49 BD62 BT23 CE53 CK61 E54 T34 20% 20% CE36 VDDIO18_GRP10
6.3V 6.3V
AD13 AR53 BF21 BT28 CE6 CK64 E57 T38 2 X5R-CERM 2 X5R-CERM CE43
VSS VSS VSS VSS VSS VSS VSS VSS 0201 01005
AD17 AR58 BF25 BT32 CE62 CL1 E59 T51 ROOM=SOC ROOM=SOC CE38
1
AD21 AR6 BF30 BT36 CF1 CL12 E61 T55 R1650
AD25 AR62 BF34 BT40 CF2 CL18 E64 U1 100 1.62-1.98V @2mA MAX AR23
1% VDD18_TSADC0
AD30 AT1 BF43 BT45 CF64 CL24 E65 U67 1/32W BK19
MF VDD18_TSADC1
AD34 AT3 BF47 BT49 CF65 CL27 E66 V10 2 01005 AF21 VDD18_TSADC2
AD43 AT65 BF51 BT53 CF66 CL3 E7 V15 PP1V8_S2_LPOSC J36 VDD18_TSADC3
AD47 AU13 BF55 BT58 CF67 CL33 E9 V28 CRITICAL VOLTAGE=1.8V CE21 VDD18_TSADC4
AD51 AU17 BF8 BT6 CG1 CL39 F1 V32 1 C1650
4UF
1 C1651
56PF
BF60 VDD18_TSADC5
AD55 AU21 BG1 BT62 CG11 CL4 F2 V36 20% 5%
AD60 AU25 BG3 BU1 CG2 CL41 F3 V40 6.3V 16V CG9
2 CER-X5R 2 NP0/C0G 1.62-1.98V @1mA MAX VDD18_FMON
AD8 AU30 BG65 BU67 CG24 CL44 F4 V53 0201 01005
ROOM=SOC ROOM=SOC
AF10 AU34 BG67 BV2 CG27 CL48 F64 V58 1.62-1.98V @1mA MAX CC40 VDD18_LPOSC
AF15 AU38 BH10 BV4 CG4 CL52 F65 V6
AF19 AU43 BH15 BV64 CG42 CL56 F66 V62 TBD-TBDV @30mA MAX AU23
48 PP1V2_BUFF VDD12_CPU_UVD
AF23 AU47 BH19 BV66 CG44 CL59 F67 W3 T28 VDD12_GPU_UVD
AF28 AU51 BH23 BW13 CG46 CL63 G38 W65 1 C1611 Y38 VDD12_SOC_UVD
AF32 AU55 BH28 BW17 CG48 CL65 G43 Y13 0.1UF
10%
AF36 AU60 BH32 BW21 CG5 CL67 G47 Y17 2 6.3V BA25
CERM-X5R VDD12_PLL_CPU
AF40 AU8 BH36 BW25 CG52 CL7 G51 Y21 0201
ROOM=SOC
AF45 AV1 BH40 BW30 CG54 CM18 G8 Y25 Y32
AF49 AV2 BH45 BW34 CG56 CM2 H1 Y30 R1602 VDD12_PLL_CPU:1.14-1.26V @13mA MAX AD36
AF53 AV4 BH49 BW38 CG59 CM24 H2 Y43 0.00 AD38 VDD12_PLL_SOC
48 PP1V2_SOC 1 2 PP1V2_PLL_CPU
B AF58 AV64 BH53 BW43 CG61 CM27 H66 Y47 0%
1/32W
VOLTAGE=1.2V Y34 B
AF6 AV66 BH58 BW47 CG64 CM39 H67 Y51 MF
01005
1 C1606
AG1 AW10 BH6 BW51 CG65 CM4 J10 Y55 ROOM=SOC 0.1UF
AG3 AW15 BH62 CE51 CG66 CM41 J15 BF38 20%
2 6.3V
AG65 AW19 BK13 BY65 CG67 CM44 J19 J58 X5R-CERM
01005
AG67 CH50 BK17 C11 CH12 CM48 J28 ROOM=SOC
AJ21 AW28 AL49 C14 CH18 CM5 J32

AJ25 AW32 BK25 C18 CH2 CM52 J40 R1601 VDD12_PLL_SOC:1.14-1.26V @31mA MAX
AJ30 AW36 BK30 C22 CH24 CM56 J45 0.00 PP1V2_PLL_SOC
1 2
AJ34 AW40 BK34 C26 CH27 CM59 J49 0% VOLTAGE=1.2V
1 1/32W
AJ38 AW45 BK38 C29 CH3 CM63 J53 C1604
2.2UF
MF
01005
1 C1609 1 C1613
AJ43 AW49 BK43 C33 CH33 CM66 J6 20% ROOM=SOC 0.1UF 0.1UF
AL10 AW53 BK47 C35 CH39 D1 K2 6.3V 20% 20%
X5R-CERM 2 2 6.3V 2 6.3V
AJ51 AW58 BK51 C4 CH4 D11 K66 0201 X5R-CERM X5R-CERM
ROOM=SOC 01005 01005
AJ55 AW6 BK55 C52 CH42 D12 L13 ROOM=SOC ROOM=SOC
AJ8 AW62 BK60 C54 CH44 D14 L17

AK1 AY1 BK8 C57 CH46 D16 L21
AK2 AY4 BL2 C61 CH48 D18 L25
AK66 AY64 BL4 C64 L30
AK67 AY67 BL64 C7 L34
CA10
A
PAGE TITLE
SOC:POWER (3/3)
DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

PAGE
16 OF 121
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343S0695 = TRISTAR 2, A3
343S0658 = TRISTAR 2, A1
Q1704
998-5855 = TRISTAR 2, TC
343S0639 = TRISTAR 2, A0
343S0614 = TRISTAR 1
NOTE: A2 ONLY USED ON IPHONES
TRISTAR A1
B1
D1
S1
S1
S1
CSD58900L
LGA
S2
S2
S2
A2
B2
D2
E1 S1 S2 E2
PP3V0_S2_TRISTAR
48
Q1705
1 C1720 1 C1700 1 C1760 C1 G1 G2 C2 EXT_PWRIN_EN2
S1
CSD58900L S2
8.2PF 0.1UF 1UF A1 A2
D 2
+/-0.5PF
16V
C0G
2
20%
6.3V
X5R-CERM
2
20%
10V
X5R
B1 S1
LGA
S2 B2 D
01005 01005 0201 D1 S1 S2 D2
E1 S1 S2 E2
PP1V8_S2 PPVDD_ACC_FET EXT_PWRIN_EN1 ACC_PWRIN_EN1 G2 C2

48 16 46 C1 G1
1 1 1 1 1
C1721 C1701 C1750 C1702 C1722
8.2PF 0.1UF 0.01UF 0.1UF 8.2PF ACC_PWRIN_EN2
+/-0.5PF 20% 10% 10% +/-0.5PF
ACC_PWR D5
VDD_1V8 F3
VDD_3V0 F4
16V 4V 6.3V CRITICAL 6.3V 16V
2 C0G 2 X5R 2 X5R 2 CERM-X5R 2 C0G
01005 01005 01005 0201 01005
46 41 PPVBUS_SYS PPVBUS_USB_RVP 16 41 46
PPVBUS_USB_RVP
16 41 46
1
CRITICAL C1723
D2
D1
C1
E1
E2
F2
U1700 1 C1761
2
1UF
10%
SYS_VBUS_PWR
EXT_PWRIN_EN1
EXT_PWRIN_EN2
ACC_PWRIN_EN1
ACC_PWRIN_EN2
EXT_VBUS_PWR
CBTL1610A3BUK 1UF
10%
25V
X5R
C3
DIG_DP
WLCSP F6 2 25V 0402
46 18 MIKEY_TS_P P_IN X5R
C4 C5 PPOUT_E75_ACC_ID1 0402
46 18 MIKEY_TS_N DIG_DN ACC1 30
E5 PPOUT_E75_ACC_ID2
A1 ACC2 30
90_USB_BB_R_P USB1_DP D3 F3 PPVBUS_ORION_RVP
TO USB BB MUX B1 A2 48 46 41 PPVCC_MAIN 16
90_USB_BB_R_N USB1_DN DP1 E75_DPAIR1_P 30
D4 F4
B2
39 USB_TS_TO_PMU_BRICKID
C2
BRICK_ID
DN1 E75_DPAIR1_N 30 1 C1790 D5 ACC_PWR F5 1 C1734
A4 1UF 0.1UF
46 6 USB_SOC_P
A3
USB0_DP
DP2
B4
E75_DPAIR2_P 30
2
20%
10V
D6 U1707 F6
2
10%
25V
B3 DN2 E75_DPAIR2_N 30 X5R E3 VP CD3257 X5R
46 6 USB_SOC_N USB0_DN 0201 E4 WCSP 0201
E3
E2 CON_DET_L TS_CON_DET_L IN 30
E5
46 11 UART_SOC_TO_ACC_TX UART0_TX R1733
ACCESSORY UART E1 D6 E6
46 11 UART_ACC_TO_SOC_TX UART0_RX POW_GATE_EN* TS_TO_ORION_OVP_SW_EN_L 16 0.00
0201
F2 E4 R1731 1 2 MF ORION_COMM_FILT_R
C AP DEBUG UART
46 11 UART_SOC_TO_DEBUG_TX
F1
UART1_TX SWITCH_EN
B6
GPIO_PMU_TO_SYSTEM_ACTIVE_READY IN 6 12 39 47
PP1V8_S2 0.00
16 PP1V8_INT_ORION A2
A4
VDD_INT_1V8 (1UF MIN) DATA A3 ORION_COMM_FILT 1/20W 1%
16
C
46 11 UART_DEBUG_TO_SOC_TX UART1_RX HOST_RESET RESET_TS_TO_PMU OUT 39 48 1 2 PP1V8_S2_ORION_R VDD_IO (1UF TYPICAL)
REVERSE VOLTAGE CURRENT LIMITING RESISTOR
D2 D3 1% NOSTUFF 1 C1792
27 UART_TOUCH_TO_DEBUG_TX UART2_TX SDA I2C0_SDA_1V8 BI 4 1/20W 1 VALUE : TBD
D1 D4
I2C0_SCL_1V8
MF
C1791 1.0UF
27 UART_DEBUG_TO_TOUCH_TX UART2_RX SCL IN 4 0201 20%
C6 2.2UF 6.3V
A5 INT GPIO_TS_TO_SOC_TO_PMU_IRQ OUT 11 39 2 20% 2 X5R
46 6 JTAG_SOC_TCK JTAG_CLK E6 4V 0201-1
B5 BYPASS TRISTAR_BYPASS X5R-CERM C4
46 6 JTAG_SOC_TMS JTAG_DIO VOLTAGE=3V 0201 HWEN (TO BE SET TO HIGH BY DEF)
DVSS
DVSS
DVSS
CRITICAL
1 C1703 39 IN
GPIO_PMU_TO_ORION_HWEN
1.0UF GPIO_ORION_TO_SOC_TO_PMU_IRQ A5
20% TRISTAR BYPASS FOR 3V LDO 39 12 OUT INT
F5
C1
A6
2 6.3V
X5R C5
0201-1 4 IN
I2C1_SCL_1V8 SCL
4 I2C1_SDA_1V8 B6 SDA GND/DFT C2 OK TO GND (KHALEEL)
BI
41 OUT
ORION_TO_CHARGER_OVP_SW_EN_L R1732 C6 VBUS_VALID* ACC_PWR_EN_L B2 ORION_ADC1
0.00
XW1700 TS_TO_ORION_OVP_SW_EN_L 1
01005
2 MF EXT_VBUS_VALID C3
16 EXT_VBUS_VALID* (INPUTS)
18 OUT BELFIELD_MBUS_REF 1 2
R1715 1/32W 0%
TP_ORION_CONN_STATUS B3 B1 ORION_ADC2
SM 1 2 CONN_STATUS* (OUTPUT) ACC_PWR_PRESENT_L/ADC_CH1
UART_BELLATRIX2_TO_SOC_TX B5
0.00 11 HS_RX_OUT
GND
01005 1 UART_SOC_TO_BELLATRIX2_TX B4 (I/O - HI-Z @ POR)
1/32W
MF R1799 11 HS_TX_IN
1 1
0% 3.3K
5% 0.00 0.00
A1
A6
F1
NOSTUFF 1/32W
MF
2 01005 1
R1718 0%
1/32W
MF
0%
1/32W
MF
R1719
ACC_PWR_MAX_1A
2 01005 2 01005
CRITICAL 100K
PP1V8_INT_ORION 5% R1717
R1780 16 1/32W
B 1
0.00 2
MF
01005 2 B
0%
1/10W
FF
0603
ORION REVERSE VOLTAGE PROTECTION
PPVBUS_ORION_RVP J1798
16 78171-0002
ACC_PWR_MAX_1P3A M-RT-SM
CRITICAL CRITICAL
L1706 3
FERR-120-OHM-3A
Q1770 CRITICAL 3
DZ1715 PPVBUS_ORION_FILT
DFN10062 PPVBUS_ORION_CONN
CSD68815W15
BGA R1723 1 Q1708 S
1 A K
16 1 2 16 1
2
PPVDD_ACC_FET 499 0603
S
B3 16 46 1% CSD68832L G 10V ZENER

1
C1724 2 NOSTUFF
PP3V3_ACC 1/10W
D
VOLTAGE=4.7V
C3 B2 LGA 15PF
48
ACC_PWR_MAX_1P3A
MF-LF
603 2 BZT52C10LP 5% DZ1713 4
C2 B1 1 ORION_RVP_G 25V ESDALC20-1BF4
C1 A3
C1770
0.1UF D 2 NPO
0201
0201
10% 1
A2 1 R1722
2
16V
2 X5R-CERM
220K
G
0201
1%
A1 1/20W
MF
J1799
16
PPVBUS_ORION_FILT 201 MM5829-2700
39 IN GPIO_PMU_TO_ACC_PWR_SW 2 L1702 F-ST-SM1
120-OHM-25%-250MA-0.5DCR 1
PP1V8_S2
ACC_PWR_MAX_1P3A
6 39 45 48
TRANSIENT SUPPRESSION 16 ORION_COMM_FILT_R 1 2 ORION_COMM_CONN
4
3
2
CRITICAL 01005 NOSTUFF
1
R1773 PPVBUS_ORION_CONN NOTE: MAKE SURE MAX LEAKAGE
1 C1726 2
U1770
FPF2195UCX
10K
5%
16
IS < 3V/3M K
RVP K
15PF
5%
DZ1714
1/32W C1725 1 D1702 D1703 16V 5V-22PF
PPVCC_MAIN WLCSP MF
1N4448HLP-7 1N4448HLP-7 2 NP0-C0G 0201
B2 VIN VOUT B1 01005 0.022UF 01005-1
A 48
2 10%
25V 3
DFN1006
A A
DFN1006
1 SYNC_MASTER=J171/MLB_B SYNC_DATE=11/14/2018 A
A2 ON FLAGB A1 GPIO_ACC_TO_PMU_PWR_SW_OC_L OUT 39 CER-X5R 2 PAGE TITLE
ACC_PWR_MAX_1P3A ACC_PWR_MAX_1P3A 0201
C1771 1 R1771 1 ISET C1 ACC_ISET O_T_DET_BASE 2
1
Q1706 IO: TRISTAR & ORION
GND
1UF 100K ACC_PWR_MAX_1P3A ZXTN3035CLP DRAWING NUMBER SIZE

20% 5% 1 R1720 DFN10063
10V 2 1/32W R1775 3.0K 2 051-04464 D
X5R MF
374 1% Apple Inc.
C2
0201 01005 2 REVISION

1%
1/20W
CURRENT LIMIT = 1.475A 1/32W
MF 1 4.0.0
MF 01005
2 201 NOTICE OF PROPRIETARY PROPERTY: BRANCH

PAGE
17 OF 121
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HP JACK B2B CONNECTOR

FL1801
120-OHM-25%-250MA-0.5DCR
48 24 PP1V8_S2 1 2
01005 J1800 MATCHES J171/FLEX_AJ_CELL_WIFI_0.1.0 29 AUG 2018
MLB: 516S1084
D 1 C1801 1 C1802 FLEX: 516S1085 D
1.0UF 8.2PF
20% +/-0.5PF
2 6.3V
X5R 2 16V
C0G
0201-1 01005
CRITICAL
J1800
AA07A-S014VA1
F-ST-SM
16 15
FL1800
01005 46 18 CONN_HP_HEADSET_DET_FILT 2 1 CONN_HP_RIGHT_FILT 18 46
OUT IN
240-OHM-25%-0.20A-1.0DCR PP1V8_S2_HALL_AJ_CONN 4 3 CONN_HP_LEFT_FILT 18 46
IN
1 2
GPIO_HALL_AJ_TO_PMU_IRQ_CONN 6 5
46 39 OUT
GPIO_HALL_AJ_TO_PMU_IRQ
8 7
10 9
46 18 CONN_HP_HS3_REF_FILT 12 11 CONN_HP_HS4_REF_FILT 18 46
OUT OUT
46 18 CONN_HP_HS3_FILT 14 13 CONN_HP_HS4_FILT 18 46
OUT OUT
18 17
C C
MICROPHONE / COMPASS FLEX B2B CONNECTOR

DMIC FILTERS MLB APN: 516S1084
FLEX APN: 516S1085
CRITICAL
FL1850 DCR 0.23
120-OHM-25%-450MA
12 IN
DMIC1_SCLK 1 2 DMIC1_FF_SCLK_FILT 17 46
J1810
0201
AA07A-S014VA1
F-ST-SM
2 CRITICAL
15 16
B 1 C1850 DZ1850 B
27PF PESD5V0V1BSF
5% SOD962 46 17 DMIC1_FF_SCLK_FILT 1 2 SPI_AOP_MISO 12 23 47
2 16V
NP0-C0G
CRITICAL
DMIC1_FF_SD_FILT 3 4 SPI_AOP_MOSI
01005-1 L1800 46 17
5 6 SPI_AOP_SCLK
12 23 47
12 23 47
1 PP1V8_S2_SW3 PP1V8_S2_DMIC_FILT
48
1 2 7 8 SPI_AOP2COMPASS_CS_L 12
VOLTAGE=1.8V
01005 9 10 COMPASS2AOP_INT 12
120-OHM-25%-250MA-0.5DCR
48 PP1V8_S2_SW3 11 12
CRITICAL 13 14
2 NC
CRITICAL
1 C1800 DZ1810
FL1851 DCR 0.23 27PF 12.8V-100PF
0201
17 18
120-OHM-25%-450MA 5%
1 2 2 16V
NP0-C0G
12 OUT
DMIC1_SD DMIC1_FF_SD_FILT 17 46 01005-1 1
0201
2 CRITICAL
1 C1851 DZ1851
27PF PESD5V0V1BSF
5% SOD962
2 16V
NP0-C0G
01005-1
1
PAGE TITLE
AUDIO: HP/DMIC FLEX CONNS

DRAWING NUMBER SIZE
051-04464 D
TABLE_ALT_HEAD Apple Inc. REVISION
PART NUMBER 4.0.0
TABLE_ALT_ITEM
RELEASED BY WWW.LAPTOP-SCHEMATICS.COM
377S0077 377S0111
THE INFORMATION CONTAINED HEREIN IS THE
DZ1850,DZ1851 THE POSESSOR AGREES TO THE FOLLOWING: PAGE
18 OF 121
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8 7 6 5 4 3 2 1
48 18 PP1V8_S2
1 1
R1998 R1999
10K 10K
5% 5%
1/32W 1/32W
MF MF
2 01005 2 01005
18 11 GPIO_SOC_TO_BELFIELD_RESET_L
46 18 11 GPIO_SOC2CODEC_RST_L PLACE_NEAR=U1900.A3:5MM PP1V8_S2 18 48
D 1 C1902 D
0.1UF
20%
CRITICAL 2 6.3V
X5R-CERM
1 C1951 01005
2.2UF
20%
2 6.3V
X5R-CERM
0201 PPVCC_MAIN 18 19 20 48
46 18 GND_AUDIO_CODEC CRITICAL CRITICAL CRITICAL
PP1V8_S2_VA_VCP
1 C1904 1 C1940 1 C1941 1 C1942
48
0.1UF 10UF 10UF 10UF
L83_PVCP 10% 20% 20% 20%
CRITICAL CRITICAL CRITICAL 2 6.3V
CERM-X5R 2 6.3V 2 6.3V 2 6.3V
1 C1901 1 C1903 1 C1909 L83_NVCP 0201 CERM-X5R
0402-9
CERM-X5R
0402-9
CERM-X5R
0402-9
4.7UF 0.1UF 2.2UF CRITICAL CRITICAL NC L1900 CRITICAL
20% 10% 20% FERR-33-OHM-0.8A-0.09-OHM
1 C1908 1 C1907
D6
D7
2 6.3V 2 6.3V 2 6.3V
B1
A7
A3
X5R CERM-X5R X5R-CERM 4.7UF 4.7UF 1 2
402 0201 0201 20% 20%
CONN_HP_LEFT_FILT OUT 17 46
VCP VA VD_FILT VL VP
2 6.3V
X5R 2 6.3V
X5R E6
0201
402 402 +VCP_FILT CRITICAL
G6 -VCP_FILT L1901 CRITICAL
D5
FERR-33-OHM-0.8A-0.09-OHM
F6 GNDCP
U1900 HPSENSA
R1919 CS42L83A HPOUTA E5 CODEC_HP_LEFT 1 2 CONN_HP_RIGHT_FILT OUT 17 46
10K C4 WLCSP-SKT 0201
48 20 19 18 PPVCC_MAIN 1 2 VL_SEL VL_SEL F5
5% MF HPSENSB
1/32W 01005 D4 DIGLDO_PDN* HPOUTB G5 CODEC_HP_RIGHT L1902 CRITICAL
FERR-33-OHM-0.8A-0.09-OHM
46 8 OUT GPIO_CODEC_IRQ_L B7 INT*
HS4 F1 CODEC_HP_HS4 1 2 CONN_HP_HS4_FILT 17 46
IN
GPIO_CODEC_TO_PMU_WAKE_L C6 WAKE* HS_CLAMP2 E2 SM 0201
46 39 OUT XW1906
HSIN+ E1 CODEC_HP_HSINP 1 2
46 18 11 IN
GPIO_SOC2CODEC_RST_L C5 RESET* G2 CODEC_HP_HS3 NO_XNET_CONNECTION=1 L1903 CRITICAL
HS3 FERR-33-OHM-0.8A-0.09-OHM
HS_CLAMP1 F2
C NC
A6 SPDIF_TX
HSIN- D1 CODEC_HP_HSINN 1
SM XW1907
2
1
0201
2 CONN_HP_HS3_FILT IN 17 46 C
NO_XNET_CONNECTION=1
D3 SWIRE_SEL L1904 CRITICAL
HS4_REF F4 CODEC_HP_HS4_REF FERR-33-OHM-0.8A-0.09-OHM
47 12 I2S_AOP_TO_CODEC_LRCK B5 ASP_LRCK/FSYNC
IN
HS3_REF G4 CODEC_HP_HS3_REF 1 2 CONN_HP_HS4_REF_FILT IN 17 46
I2S_AOP_TO_CODEC_DOUT A5 SWIRE_SD/ASP_SDIN RING_SENSE G3
R1911 47 12 IN NC 0201
I2S_CODEC_TO_AOP_DOUT 1
22 2 I2S_CLIFDEN_TO_SOC_DOUT_R A4 E4 CODEC_HP_DET
L1905 CRITICAL
47 12 OUT ASP_SDOUT TIP_SENSE FERR-33-OHM-0.8A-0.09-OHM
5%
1/32W 47 12 I2S_AOP_TO_CODEC_BCLK B4 SWIRE_CLK/ASP_SCLK 1 2 CONN_HP_HS3_REF_FILT 17 46
MF IN
HSBIAS_FILT F3 HSBIAS_FILT IN
01005 0201
HSBIAS_FILT_REF E3 HSBIAS_FILT_REF
C3 AD0 CRITICAL L1920
B2 AD1 C1912 1 R1920 240-OHM-0.2A-0.8-OHM
1
3.3K 2 1 2
A1 4.7UF CODEC_HP_DET_R CONN_HP_HEADSET_DET_FILT IN 17 46
4 BI
I2C0_SDA_1V8 SDA 20% NOSTUFF 0201-2
5% 1
4 IN
I2C0_SCL_1V8 A2 SCL
6.3V 2
X5R 1/32W C1920
402 MF 4700PF
E7 FLYP 01005 10% 1 1
CRITICAL
C1905 F7 FLYC 2 6.3V
X5R R1950 R1951
G7 01005 3.3K 3.3K
4.7UF FLYN 5% 5%
2 1 1/32W 1/32W
L83_FLYP C1 MF MF
L83_FILT FILT_P 2 01005 2 01005
20% GNDA GNDHS GNDD GNDL
6.3V
X5R 1 C1910
D2
C2
G1
C7
B6
B3
402 L83_FLYC
CRITICAL 10UF
20%
C1906 2 10V
X5R-CERM XW1900
4.7UF 0402-7 SM
2 1 L83_FLYN 1 2
20% 46 18 GND_AUDIO_CODEC
6.3V VOLTAGE=0V
X5R
402
B B
1 C1930
100PF
5%
48 20 19 18 PPVCC_MAIN PP1V8_S2 18 48
2 16V
NP0-C0G
C1962 1 NC
1 C1961 R1930 01005-1
0.1UF 1
12 2
0.1UF
A5
D5
B5
10% 20%
16V 2 6.3V 5% NOSTUFF
X5R-CERM 2 VP VD VD_FILT
X5R-CERM
01005 1/20W 1 C1931
0201 MF MIKEY_TS_P BI 16 46
201 100PF
U1950 5% MIKEY_TS_N BI 16 46
CS46L10 R1931 2 16V

NP0-C0G
WLCSP CRITICAL
1
12 2
01005-1
5%
39 OUT
GPIO_BELFIELD_TO_PMU_WAKE_L D2 WAKE* DIGLDO_PDN C3 1/20W
MF
12 GPIO_BELFIELD_TO_SOC_IRQ_L D3 INT* 201 1 C1932
OUT
R1960 18 11 IN
GPIO_SOC_TO_BELFIELD_RESET_L D4 RESET*
5%
100PF
0.00
0%
B1 2 16V
NP0-C0G
1/32W 47 10 IN
I2S0_SOC_TO_BELFIELD_MCK MCLK 01005-1
MF
01005
47 10 I2S0_SOC_TO_BELFIELD_BCLK 1 2 I2S0_SOC_TO_BELFIELD_BCLK_R A1 SCLK D+ D1 BELFIELD_MBUS_P
IN
47 10 I2S0_SOC_TO_BELFIELD_LRCK 1 2 I2S0_SOC_TO_BELFIELD_LRCK_R B2 LRCK/FSYNC D- C1 BELFIELD_MBUS_N
IN
01005 47 10 I2S0_BELFIELD_TO_SOC_DOUT A2 AD2/SDOUT
OUT
MF
1/32W 47 10 I2S0_SOC_TO_BELFIELD_DOUT A3 SDIN
0% IN
MBUS_REF C2
0.00 SPI_BELFIELD_CS_L B3 AD0/CS_L
A R1961
10
47 10
IN
IN
SPI_BELFIELD_SCLK A4 SCL/CCLK SYNC_MASTER=J171/MLB_B SYNC_DATE=10/24/2018 A
SPI_BELFIELD_MOSI C4 AD1/MOSI PAGE TITLE
47 10 IN BELFIELD_MBUS_REF
47 10 OUT
SPI_BELFIELD_MISO B4 SDA/MISO
IN 16
AUDIO: CLIFDEN & BELFIELD
DRAWING NUMBER SIZE
GND 051-04464 D
Apple Inc.
C5
REVISION
4.0.0

PAGE
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SPEAKER AMPLIFIERS
APN:353S4265
D D
TDM CHANNEL 1
48 20 19 18 PPVCC_MAIN
CRITICAL CRITICAL CRITICAL

1 C2052 1 C2055 1 C2059
1 C2050 1 C2051 10UF 0.1UF 8.2PF
22UF 22UF 20% 10% +/-0.5PF
20% 20%
2 6.3V 2 6.3V 2 10V
X5R-CERM 2 6.3V
CERM-X5R 2 16V
C0G
X5R-CERM-1 X5R-CERM-1 0402-4 0201 01005
603 603
NOSTUFF
OMIT_TABLE
R20401
A2
CRITICAL
0.00
VDD 0%
1/32W
MF
U2040 01005 2
MAX98357BEWL
R2000 WLP
AUD_SPKRAMP_MODE_L 0.00 AUD_SPKRAMP_MODE_L1_L (INTERNAL 100K PD) A1 SD_MODE*
20 19 11 1 2 OUTP A3 SPKRAMP_L1_OUT_P OUT 30 46
0% ROOM=AMP
1/32W C1 BCLK OUTN B3 SPKRAMP_L1_OUT_N 30 46
OUT
MF
01005 MAX98357_L1_GAIN
C3 LRCLK GAIN_SLOT B2
R2001 B1 DIN NOSTUFF
1
0.00 2
20 19 10 I2S2_SOC_TO_SPKRAMP_BCLK I2S2_SOC_TO_SPKRAMP_BCLK_L1 1 C2002
0%
1/32W
ROOM=AMP
GND R2041 1 15PF
C MF 0.00 5%
2 16V C
C2
01005 0% NP0-C0G
1/32W 01005-1
R2002 GAIN = 12DB MF
01005 2
1
0.00 2
NOSTUFF
20 19 10 I2S2_SOC_TO_SPKRAMP_LRCK I2S2_SOC_TO_SPKRAMP_LRCK_L1 C2003 1
0%
1/32W
ROOM=AMP 15PF
5%
MF 16V
01005 NP0-C0G 2
01005-1
R2003
1
0.00 2
20 19 10 I2S2_SOC_TO_SPKRAMP_DOUT I2S2_SOC_TO_SPKRAMP_DOUT_L1
0% ROOM=AMP
1/32W
MF
01005
1
R2050 1 R2051 1 R2052
100K 100K 100K
5% 5% 5%
1/32W 1/32W 1/32W
MF MF MF
2 01005 2 01005 2 01005 SD_MODE# TDM CHANNEL GAIN_SLOT
H 1 PULLED TO GND
H 2 PULLED WITH 0-OHM TO VDD
H 3 FLOAT
H 4 PULLED WITH 100K-OHM TO VDD
TDM CHANNEL 2

1 C2015 1 C2019
1 C2013 1 C2010 1 C2012 0.1UF 8.2PF
22UF 10UF 10UF
B 20%
2 6.3V
20%
2 10V
20%
2 10V
10%
2 6.3V
CERM-X5R 2 16V
C0G
+/-0.5PF
B
X5R-CERM-1 X5R-CERM X5R-CERM 0201 01005
603 0402-4 0402-4
OMIT_TABLE
R20201
A2
CRITICAL
0.00
VDD 0%
1/32W
MF
U2020 01005 2
MAX98357BEWL
R2010 WLP
AUD_SPKRAMP_MODE_L 0.00 AUD_SPKRAMP_MODE_L2_L A1 SD_MODE*
20 19 11 1 2 OUTP A3 SPKRAMP_L2_OUT_P OUT 30 46
0% ROOM=AMP
1/32W C1 BCLK OUTN B3 SPKRAMP_L2_OUT_N 30 46
OUT
MF
01005 MAX98357_L2_GAIN
1
0.00 2 NOSTUFF
20 19 10 I2S2_SOC_TO_SPKRAMP_BCLK I2S2_SOC_TO_SPKRAMP_BCLK_L2 1 C2000
0%
1/32W
ROOM=AMP
GND R2021 1 5%
15PF
MF 0.00 2 16V
C2
01005 0% NP0-C0G
1/32W 01005-1
01005 2
1
0.00 2
NOSTUFF
20 19 10 I2S2_SOC_TO_SPKRAMP_LRCK I2S2_SOC_TO_SPKRAMP_LRCK_L2 C2001 1
0%
1/32W
ROOM=AMP 15PF
5%
MF 16V 2
01005 NP0-C0G
01005-1
R2013
A 20 19 10 I2S2_SOC_TO_SPKRAMP_DOUT 1
0.00 2 I2S2_SOC_TO_SPKRAMP_DOUT_L2 SYNC_MASTER=J171/MLB_B SYNC_DATE=10/24/2018 A
0% PAGE TITLE
ROOM=AMP
1/32W
MF
01005
AUDIO: SPEAKER AMPS LEFT
DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

PAGE
20 OF 121
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SPEAKER AMPLIFIERS
APN:353S4265
D D
TDM CHANNEL 3

1 C2152 1 C2155 1 C2159
1 C2150 1 C2151 10UF 0.1UF 8.2PF
22UF 22UF 20% 10% +/-0.5PF
20% 20%
2 6.3V 2 6.3V 2 10V
X5R-CERM 2 6.3V
CERM-X5R 2 16V
C0G
X5R-CERM-1 X5R-CERM-1 0402-4 0201 01005
603 603
NOSTUFF
OMIT_TABLE
R21401
A2
CRITICAL
100K
VDD 5%
1/32W
MF
U2140 01005 2
MAX98357BEWL
R2100 WLP
AUD_SPKRAMP_MODE_L 0.00 AUD_SPKRAMP_MODE_R1_L A1 SD_MODE*
20 19 11 1 2 OUTP A3 SPKRAMP_R1_OUT_P OUT 30 46
0% ROOM=AMP
1/32W C1 BCLK OUTN B3 SPKRAMP_R1_OUT_N 30 46
OUT
MF
01005 MAX98357_R1_GAIN
C R2101 B1 DIN NOSTUFF C
1
0.00 2 NOSTUFF
20 19 10 I2S2_SOC_TO_SPKRAMP_BCLK I2S2_SOC_TO_SPKRAMP_BCLK_R1 1 C2102
1 15PF
0%
1/32W
ROOM=AMP
GND R2141 5%
MF 100K 2 16V
C2
01005 5% NP0-C0G
1/32W 01005-1
01005 2
1
0.00 2
NOSTUFF
20 19 10 I2S2_SOC_TO_SPKRAMP_LRCK I2S2_SOC_TO_SPKRAMP_LRCK_R1 C2103 1
0%
1/32W
ROOM=AMP 15PF
5%
MF 16V
01005 NP0-C0G 2
01005-1
R2103
1
0.00 2
20 19 10 I2S2_SOC_TO_SPKRAMP_DOUT I2S2_SOC_TO_SPKRAMP_DOUT_R1
0% ROOM=AMP
1/32W
MF
01005
SD_MODE# TDM CHANNEL GAIN_SLOT
H 1 PULLED TO GND
H 2 PULLED WITH 0-OHM TO VDD
H 3 FLOAT
TDM CHANNEL 4 H 4 PULLED WITH 100K-OHM TO VDD

1 C2115 1 C2119
1 C2110 1 C2111 1 C2112 0.1UF 8.2PF
22UF 10UF 10UF 10% +/-0.5PF
20% 20% 20%
2 6.3V 2 10V 2 10V 2 6.3V
CERM-X5R 2 16V
C0G
X5R-CERM-1 X5R-CERM X5R-CERM
B 603 0402-4 0402-4 0201 01005
B
OMIT_TABLE
R21201
A2
CRITICAL
100K
VDD 5%
1/32W
MF
U2120 01005 2
MAX98357BEWL
R2110 WLP
AUD_SPKRAMP_MODE_L 0.00 AUD_SPKRAMP_MODE_R2_L A1 SD_MODE*
20 19 11 1 2 OUTP A3 SPKRAMP_R2_OUT_P OUT 30 46
0% ROOM=AMP
1/32W C1 BCLK OUTN B3 SPKRAMP_R2_OUT_N 30 46
OUT
MF
01005 MAX98357_R2_GAIN
1
0.00 2 NOSTUFF
20 19 10 I2S2_SOC_TO_SPKRAMP_BCLK I2S2_SOC_TO_SPKRAMP_BCLK_R2 1 C2100
1 15PF
0%
1/32W
ROOM=AMP
GND R2121 5%
MF 100K 2 16V
C2
01005 5% NP0-C0G
1/32W 01005-1
01005 2
1
0.00 2
NOSTUFF
20 19 10 I2S2_SOC_TO_SPKRAMP_LRCK I2S2_SOC_TO_SPKRAMP_LRCK_R2 C2101 1
0%
1/32W
ROOM=AMP 15PF
5%
MF 16V
01005 NP0-C0G 2
01005-1
R2113
1
0.00 2
20 19 10 I2S2_SOC_TO_SPKRAMP_DOUT I2S2_SOC_TO_SPKRAMP_DOUT_R2
A 0%
1/32W
MF
ROOM=AMP
01005 PAGE TITLE
AUDIO: SPEAKER AMPS RIGHT

DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

PAGE
21 OF 121
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MESA SUPPORT
D D
FL2285
70-OHM-300MA
PP16V0_MESA PP16V0_MESA_CONN
22 1 2 46
01005-1
1 C2285 1 C2250
100PF 1UF
5% 10%
2 25V 2 25V
NP0-C0G X5R
01005 0402
C FL2286 C
70-OHM-300MA
PP3V1_S2_MESA PP3V1_S2_MESA_CONN
48 22 1 2 31 46
VOLTAGE=3V
01005-1
1 C2286 1 C2251
100PF 1.0UF
5% 20%
2 16V 2 6.3V
NP0-C0G X5R
01005-1 0201-1
FL2292
120-OHM-210MA
FL2287 SPI_MESA_MISO 1 2 SPI_MESA_MISO_CONN
70-OHM-300MA 47 10 31
PP1V825_S2_MESA PP1V825_S2_MESA_CONN
1 2 01005 1
48
01005-1
VOLTAGE=1.9V
31 46
C2292
12PF
5%
16V
1 C2252 1 C2287 1 C2253 2 NP0-C0G
01005-1
2.2UF 100PF 1.0UF
20% 5% 20%
2 6.3V 2 16V 2 6.3V
X5R-CERM NP0-C0G X5R
0201 01005-1 0201-1
B B
CRITICAL
FL2290
120-OHM-210MA
10 SPI_MESA_SCLK 1 2 SPI_MESA_SCLK_CONN 31
FL2295
120-OHM-210MA
01005 GPIO_MESA_TO_SOC_IRQ 1 2 GPIO_MESA_TO_SOC_IRQ_CONN
1 C2290 1
R2200 10 31
12PF 100K 01005 1

2
5%
16V
5%
1/32W
C2295
12PF
NP0-C0G MF 5%
01005-1 2 01005 16V
2 NP0-C0G
01005-1
FL2296
120-OHM-210MA
CRITICAL
GPIO_MESA_TO_BOOST_ENABLE 1 2 GPIO_MESA_TO_BOOST_ENABLE_CONN
FL2291 22
01005 1
31 46
120-OHM-210MA C2296
12PF
10 SPI_MESA_MOSI 1 2 SPI_MESA_MOSI_CONN 31 5%
16V
01005 2 NP0-C0G
1 C2291 01005-1
12PF
5%
2 16V
NP0-C0G
01005-1
PAGE TITLE
SENSOR: MESA SUPPORT

DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

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D D
MOJAVE (BOOST)
TABLE_5_HEAD

TABLE_5_ITEM
353S4207 1 IC,MOJAVE,LM3638,A1,CSP9 U2300 CRITICAL APN: 353S4207 (A1 MOJAVE POR FOR J171/J172)
VENDOR: TI
OMIT_TABLE
CRITICAL U2300
L2300 LM3638A0
C
C 1.0UH-20%-0.4A-0.636OHM BGA
PPVCC_MAIN PP18V0_MESA_SW B1
48 1 2 SW CRITICAL
VOLTAGE=18V
0403 A2 PP16V0_MESA
1 VIN VOUT C3
C2300
10UF PP3V1_S2_MESA U2300_EN_M CRITICAL
21
20% 1 2 B2 EN_M 1 1
6.3V
CERM-X5R 2
48 21
0% A3 EN_S
C2302
100PF
C2303
2.2UF
0402 1/32W 5% 20%
MF PP17V0_MESA_LDOIN 25V 25V
01005 C2 LDOIN PMID C1 2 NP0-C0G 2 X5R-CERM
VOLTAGE=17V 01005 0402-1
0.00 PGND AGND
NOSTUFF CRITICAL
R2350 1
R2351
1
C2301
A1
B3
0.00 2.2UF
20%
0% 25V
1/32W 2 X5R-CERM
MF 0402-1
2 01005
GPIO_MESA_TO_BOOST_ENABLE
21 IN
B B
A SYNC_MASTER=J71B_MLB_B1 SYNC_DATE=07/23/2018 A
PAGE TITLE
SENSOR: MESA BOOST

DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

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D D
PHOSPHORUS
APN 338S00334
FL2580
FERR-150OHM-25%-200MA
VOLTAGE=1.8V PP1V8_PHOS_F 2 1 PP1V8_S2_SW3 48
01005
C2580 1 1 C2581
1.0UF 0.1UF
20% 20%
6.3V 2 2 4V
X5R X5R
0201-1 01005
R2581 1
100K
5%
1/32W
R2580
6
MF 33
01005 2 VDD VDDIO CRITICAL 5%
1/32W
U2580 MF
01005
BMP284BA
47 23 17 12 SPI_AOP_MOSI 3 SDI LGA SDO 5 SPI_PHOSPHORUS_MISO 1 2 SPI_AOP_MISO 12 17 23 47
IN
SPI_AOP_SCLK 4 SCK
47 23 17 12 IN
IRQ 7
PHOS2AOP_INT 12
2 CS* OUT
12 IN SPI_AOP2PHOS_CS_L
GND
1
C C
KOBOL - ACCEL & GYRO APN: 338S00367

FL2520
120-OHM-25%-250MA-0.5DCR
PP1V8_S2_KOBOL_FILT 2 1 PP1V8_S2_SW3 48
01005
1 C2521 1 C2525 1 C2523
0.1UF 0.1UF 2.2UF
20% 20% 20%
1 2 6.3V 2 6.3V 2 6.3V
R2528 X5R-CERM
01005
X5R-CERM
01005
X5R-CERM
0201
100K
5% ROOM=KOBOL ROOM=KOBOL ROOM=KOBOL
1/32W
MF
16
01005 2
1
ROOM=KOBOL
VDD VDDIO
B B
CRITICAL
U2520
BMI282AA
LGA
12 SPI_AOP2KOBOL_CS_L 5 CS* SCLK 2 SPI_AOP_SCLK 12 17 23 47
IN IN
15 SM
MOSI 3 SPI_AOP_MOSI IN 12 17 23
6
47 33
12 OUT
GPIO_KOBOL_TO_AOP_INT INT MISO 4 SPI_AOP_MISO_KOBOL 1 2 MF SPI_AOP_MISO OUT 12 17 23 47
01005 5% 1/32W
12 GPIO_KOBOL_TO_AOP_MOTION_INT 7 MOTION_INT PLACE_NEAR=U2520.4:2MM
OUT
R2527
GND
8
9
10
11
12
13
14
PAGE TITLE
SENSOR: KOBOL, PHOS

DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

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D D
MLB APN:51S0692
FLEX APN:998-6442
L2610
BUTTON CONNECTOR J2610
FF18-6A-R11AD-B-3H
F-RT-SM
240-OHM-25%-0.20A-1.0DCR R2610 1
C 11 OUT
GPIO_BTN_VOL_DOWN_L 1 2 GPIO_BTN_VOL_DOWN_R_L 1
1.00K 2 46 GPIO_BTN_VOL_DOWN_L_FILT 2 C
01005 3
5% 46 GPIO_BTN_VOL_UP_L_FILT
L2611 1/32W
240-OHM-25%-0.20A-1.0DCR MF
01005
R2611 4
GPIO_BTN_VOL_UP_L 1 2 GPIO_BTN_VOL_UP_R_L 1
1.00K 2 46 GPIO_BTN_ONOFF_L_FILT 5
11 OUT
01005 6
5%
1/32W
MF
01005
L2613
240-OHM-25%-0.20A-1.0DCR R2613
GPIO_BTN_ONOFF_L 1 2 GPIO_BTN_ONOFF_R_L 1
1.00K 2
39 OUT
01005
5%
1/32W
MF 2
01005 DZ2610
0201
12.8V-100PF 2
1 C2610 1 C2611 1 DZ2611 DZ2613 2
C2613 0201
82PF 82PF 82PF 12.8V-100PF
0201
5% 5% 5% 1 12.8V-100PF
25V
2 C0G 2 25V
C0G 2 25V
C0G
0201 0201 0201 1 1
B FL2600
B
48 17 PP1V8_S2
120-OHM-25%-250MA-0.5DCR
1 2 46
24 PP1V8_S2_HALL_BUTTON_CONN
HES STANDALONE FLEX CONN
01005
J2620 MLB APN:51S0692
FF18-6A-R11AD-B-3H FLEX APN:998-6442
1 C2600 1 C2601 F-RT-SM
1.0UF 8.2PF 1
20% +/-0.5PF
2 6.3V
X5R 2 16V
C0G 46 24 PP1V8_S2_HALL_BUTTON_CONN 2
0201-1 01005 3
24 GPIO_HALL_BUTTON_TO_PMU_IRQ_CONN 4
5
6
FL2601
01005
240-OHM-25%-0.20A-1.0DCR
46 39 GPIO_HALL_BUTTON_TO_PMU_IRQ 1 2 GPIO_HALL_BUTTON_TO_PMU_IRQ_CONN 24
OUT
PAGE TITLE
IO: BUTTON FLEX CONN / HES

DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

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FRONT CAMERA CONNECTOR

J65 CAMERA CONNECTOR
APN:MLB 516S0876
APN:FLEX 516S0869
D
CRITICAL
J2700 D
503548-1820
F-ST-SM
20 19
25 CAM_ALS_SCL_1V8_F 2 1 CAM_ALS_SDA_1V8_F 25
25 GPIO_CAM_ALS2SOC_IRQ_L_F 4 3 ISP1_CAM_FRONT_CLK_F 25 46
25 PP3V0_ALS_FILT 6 5
8 7 ISP1_CAM_FRONT_SHUTDOWN_L_F 25 46
47 25 MIPI1C_CAM_FRONT_DATA_FILT_P<0> 10 9 ISP1_CAM_FRONT_SDA_F 25 46
GND_VOID=TRUE
47 25 MIPI1C_CAM_FRONT_DATA_FILT_N<0> 12 11 ISP1_CAM_FRONT_SCL_F 25 46
GND_VOID=TRUE
14 13 PP2V9_AVDD_CAM_FRONT_FILT 25 46
47 25 MIPI1C_CAM_FRONT_CLK_FILT_P 16 15 GND_AVDD_CAM_FRONT 25
GND_VOID=TRUE
MIPI1C_CAM_FRONT_CLK_FILT_N 18 17 PP1V8_CAM_FRONT_FILT
L2780 47 25
GND_VOID=TRUE
25 46
80-OHM-25%-500MA VOLTAGE=1.8V
PP1V8_CAM_FRONT_FILT 22 21
48 PP1V8_SW1 1 2 25 46
0201
1 C2780 1 C2781
100PF 1.0UF
5% 20%
XW2780 XW2781 2 16V
NP0-C0G 2 6.3V
X5R
SM SM 01005-1 0201-1
1 2 GND_PP1V8_CAM_FRONT 1 2
VOLTAGE=0V
L2700 CRITICAL
L2710 C
C PP2V9_CAM 1
80-OHM-25%-500MA
2 PP2V9_AVDD_CAM_FRONT_FILT
VOLTAGE=2.9V
47 25 MIPI1C_CAM_FRONT_CLK_FILT_P 2 3 MIPI1C_CAM_FRONT_CLK_P OUT 8 47
48 25 46 GND_VOID=TRUE GND_VOID=TRUE
0201
1 C2700 1 C2701 MIPI1C_CAM_FRONT_CLK_FILT_N 1 4 MIPI1C_CAM_FRONT_CLK_N
100PF 1.0UF 47 25
OUT 8 47
5% 20% SYM_VER-2
EXCX4CE
XW2700 XW2701 2 16V
NP0-C0G 2 6.3V
X5R 90-OHM-0.1A
SM SM 01005-1 0201-1
1 2 GND_PP2V9_CAM_FRONT 1 2 GND_AVDD_CAM_FRONT 25
VOLTAGE=0V VOLTAGE=0V
CRITICAL
L2711
47 25 MIPI1C_CAM_FRONT_DATA_FILT_P<0> 2 3 MIPI1C_CAM_FRONT_DATA_P<0> 8 47
OUT
MIPI1C_CAM_FRONT_DATA_FILT_N<0> 1 4 MIPI1C_CAM_FRONT_DATA_N<0>
L2702 47 25
GND_VOID=TRUE SYM_VER-2
EXCX4CE GND_VOID=TRUE
OUT 8 47
80-OHM-25%-500MA VOLTAGE=3.0V
90-OHM-0.1A
48 PP3V0_ALS 1 2 PP3V0_ALS_FILT 25
0201
1 C2706 1 C2707
100PF 1.0UF
5% 20%
2 16V
NP0-C0G 2 6.3V
X5R
01005-1 0201-1
B FL2730
B
70-OHM-300MA DCR 0.45 FL2750 DCR 0.45
I2C2_SCL_1V8 70-OHM-300MA
4
1 2 CAM_ALS_SCL_1V8_F 25
IN 1 2
8 IN
ISP1_CAM_FRONT_SCL ISP1_CAM_FRONT_SCL_F 25 46
01005-1
01005-1
1 C2730 1 C2750
27PF
5% 27PF
2 16V
NP0-C0G
5%
01005-1 2 16V
NP0-C0G
01005-1
FL2731 DCR 0.45 FL2751 FL2770

70-OHM-300MA DCR 0.45 DCR 0.45
70-OHM-300MA 70-OHM-300MA
4 IN
I2C2_SDA_1V8 1 2 CAM_ALS_SDA_1V8_F 25
8 ISP1_CAM_FRONT_SDA 1 2 ISP1_CAM_FRONT_SDA_F 25 46 11 GPIO_ALS1_IRQ_L 1 2 GPIO_CAM_ALS2SOC_IRQ_L_F 25
01005-1 IN IN
01005-1 01005-1
1 C2731 1 C2751
27PF
5% 27PF
2 16V
NP0-C0G
5%
01005-1 2 16V
NP0-C0G
01005-1
CRITICAL
FL2740
DCR 0.45
FL2760 DCR 0.70
70-OHM-300MA FERR-150OHM-25%-200MA
ISP1_CAM_FRONT_SHUTDOWN_L 1 2 ISP1_CAM_FRONT_SHUTDOWN_L_F 1 2
8 IN 25 46
8 IN
ISP1_CAM_FRONT_CLK ISP1_CAM_FRONT_CLK_F 25 46
A 01005-1 01005
1 PAGE TITLE
R2740 1 C2740
5%
100K
5%
27PF
1 C2760
56PF
CAMERA: FF AND ALS CONN
1/32W 5% DRAWING NUMBER SIZE
MF 2 16V 2 16V
2 01005
NP0-C0G
01005-1 NP0/C0G 051-04464 D
01005 Apple Inc. REVISION
4.0.0

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REAR CAMERA CONNECTOR

CRITICAL
U2900
D 400MHZ-0.1A-27PF
1208
D
46 8 IN
ISP0_CAM_REAR_CLK 1 IN1 OUT1 5
46 8 ISP0_CAM_REAR_SHUTDOWN_L 2 IN2 OUT2 6 ISP0_CAM_REAR_SHUTDOWN_FILT_L 26
CRITICAL
46 8
IN
BI
ISP0_CAM_REAR_SDA 3 IN3 OUT3 7 ISP0_CAM_REAR_SDA_FILT 26 47 MIPI0C_CAM_REAR_DATA_FILT_N<0> GND_VOID=TRUE
2 L2910 3 MIPI0C_CAM_REAR_DATA_N<0>
GND_VOID=TRUE OUT 8 47
46 8 IN
ISP0_CAM_REAR_SCL 4 IN4 OUT4 8 ISP0_CAM_REAR_SCL_FILT 26
GND 47 MIPI0C_CAM_REAR_DATA_FILT_P<0> 1 4 MIPI0C_CAM_REAR_DATA_P<0> 8 47

GND_VOID=TRUE GND_VOID=TRUE OUT
SYM_VER-2
APN: 516S00073
9
10
EXCX4CE
90-OHM-0.1A
PLUG: 516S0750
CRITICAL
CRITICAL
J2950 47 MIPI0C_CAM_REAR_DATA_FILT_N<1>
GND_VOID=TRUE
AA07A-S026VA1
F-ST-SM1
1 4
L2950 27 28 47 MIPI0C_CAM_REAR_DATA_FILT_P<1>
GND_VOID=TRUE
MIPI0C_CAM_REAR_DATA_P<1>
FERR-150OHM-25%-200MA SYM_VER-2
EXCX4CE
1 2 1 2 90-OHM-0.1A
ISP0_CAM_REAR_CLK_LC ISP0_CAM_REAR_CLK_F GND_VOID=TRUE
01005 3 4 GND_VOID=TRUE
CRITICAL
26 ISP0_CAM_REAR_SHUTDOWN_FILT_L 5 6
47 MIPI0C_CAM_REAR_CLK_FILT_N GND_VOID=TRUE
2 L2920 3
GND_VOID=TRUE
MIPI0C_CAM_REAR_CLK_N OUT 8 47
26 ISP0_CAM_REAR_SDA_FILT 7 8 GND_VOID=TRUE
26 ISP0_CAM_REAR_SCL_FILT 9 10 GND_VOID=TRUE
MIPI0C_CAM_REAR_CLK_FILT_P 1 4 MIPI0C_CAM_REAR_CLK_P
46 26 PP1V8_CAM_REAR_FILT 11 12 47
GND_VOID=TRUE
SYM_VER-2
PP2V6_CAM_REAR_AF_FILT 13 14 GND_VOID=TRUE EXCX4CE

46 26
15 16 GND_VOID=TRUE
90-OHM-0.1A
CRITICAL CRITICAL
PP1V25_CAM_REAR_FILT 17 18
L2913
46 26
19 20 GND_VOID=TRUE 47 MIPI0C_CAM_REAR_DATA_FILT_N<2>
GND_VOID=TRUE
47 8 MIPI0C_CAM_REAR_DATA_N<3> 2 3 47 MIPI0C_CAM_REAR_DATA_FILT_N<3> GND_VOID=TRUE 21 22 GND_VOID=TRUE

OUT GND_VOID=TRUE GND_VOID=TRUE
C GND_VOID=TRUE 23
25
24
26
47 MIPI0C_CAM_REAR_DATA_FILT_P<2> GND_VOID=TRUE
1 4 MIPI0C_CAM_REAR_DATA_P<2>
GND_VOID=TRUE OUT 8 47 C
47 8 MIPI0C_CAM_REAR_DATA_P<3> 1 4 47 MIPI0C_CAM_REAR_DATA_FILT_P<3> SYM_VER-2
EXCX4CE
OUT GND_VOID=TRUE GND_VOID=TRUE 1
SYM_VER-2
EXCX4CE R2950 PP2V9_AVDD_CAM_REAR_FILT 90-OHM-0.1A
100K 29 30 26 46
90-OHM-0.1A 5%
1/32W
MF
2 01005
L2900
80-OHM-25%-0.5A-0.13DCR
PP2V9_CAM 1 2 PP2V9_AVDD_CAM_REAR_FILT
48 26 46
VOLTAGE=2.9V
0201
1 C2900 1 C2901 1 C2902
56PF 1.0UF 1000PF
5% 20% 10%
2 16V
NP0/C0G
6.3V
2 X5R 2 6.3V
X5R-CERM
01005 0201-1 01005
L2902
80-OHM-25%-0.5A-0.13DCR
PP1V8_SW1 PP1V8_CAM_REAR_FILT
L2901
48
1 2 26 46 80-OHM-25%-0.5A-0.13DCR
VOLTAGE=1.8V
B 0201
1 C2906 1 C2907 1 C2908
46 26
PP2V6_CAM_REAR_AF_FILT
VOLTAGE=2.6V
1
0201
2 PP2V6_CAM_AF 48 B
56PF 1.0UF 1000PF
5% 20% 10% 1 C2903 1 C2904 1 C2905
2 16V
NP0/C0G 2 6.3V
X5R 2 6.3V
X5R-CERM 56PF 1.0UF 1000PF
01005 0201-1 01005 5% 20% 10%
2 16V
NP0/C0G 2 6.3V
X5R 2 6.3V
X5R-CERM
01005 0201-1 01005
L2903
80-OHM-25%-0.5A-0.13DCR
PP1V25_REAR_CAM 1 2 PP1V25_CAM_REAR_FILT
48 26 46
VOLTAGE=1.25V
0201
1 C2909 1 C2910 1 C2911
56PF 1.0UF 1000PF
5% 20% 10%
2 16V
NP0/C0G
6.3V
2 X5R 2 6.3V
X5R-CERM
01005 0201-1 01005
PAGE TITLE
CAMERA: REAR CONN & FILTERS

DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

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FL3004
U3000
BCM15900B0K
FERR-220-OHM VOLTAGE=3.3V
B4 48 PP3V3_TOUCH_EXT_SW 1 2 PP3V3_TOUCH_FILT
NC IFO_CLK_EXT BGA
0402
E11
AUXADC_REF
SYM 1 OF 2
PAD_I_TOUCH0
J5
GRAPE_DRIVE<0> 29
1 C3038 1 C3039 1 C3024 1 C3025 1 C3031 U3000
IN
H3
GRAPE_DRIVE<1> 330PF 12PF 0.22UF 0.22UF 0.47UF
G12 PAD_I_TOUCH1 IN 29 10% 5% 20% 20% 10% BCM15900B0K
AUXBUF_AIO_INPUT_3V J2 2 16V 2 16V 2 6.3V 2 6.3V 2 6.3V BGA
F13 PAD_I_TOUCH2 GRAPE_DRIVE<2> IN 29 CER-X7R NP0-C0G X5R X5R CERM-X5R
NC AUXBUF_AIO_OUTPUT J3 01005 01005-1 01005-1 01005-1 0201 E13 BOOST_VDDA SYM 2 OF 2 AUXBUF_AVSS F14
PAD_I_TOUCH3 GRAPE_DRIVE<3> IN 29
D10 J4
28 IN
KONA_S_TO_KONA_M_INT_L GPIO_ADC_00 PAD_I_TOUCH4 GRAPE_DRIVE<4> IN 29 R1 AFE_PMU_I_VDDA_3P3_EXT AUXADC_AVSS C10
D12 K5
NC D11 GPIO_ADC_01 PAD_I_TOUCH5 GRAPE_DRIVE<5> IN 29 48 28 27 12 PP1V8_TOUCH_EXT_SW R3 AFE_PMU_I_VDDLDO_1P8_EXT
K4 VSS D6
GPIO_ADC_02 PAD_I_TOUCH6 GRAPE_DRIVE<6> 1 1 1 1
NC F12 K3
IN 29
1 C3048 1 C3049 C3007 C3008 C3009 C3010 B9 AON_PAD_I_VDDIO_1P8_3P3_EXT VSS D8
D 16
TP_KONA_M_UART_RX
UART_DEBUG_TO_TOUCH_TX
E10
GPIO_ADC_03
GPIO_ADC_04
PAD_I_TOUCH7
PAD_I_TOUCH8
M5
GRAPE_DRIVE<7>
GRAPE_DRIVE<8>
IN 29
29
330PF
10%
12PF
5%
2.2UF
20%
6.3V
0.1UF
10%
6.3V
0.1UF
10%
6.3V
0.1UF
10%
6.3V
D7 AON_PAD_I_VDDIO_1P8_3P3_EXT VSS F6 D
IN IN
F10 L5 2 16V 2 16V 2 X5R-CERM 2 CER-X5R 2 CER-X5R 2 CER-X5R E6 AON_PAD_I_VDDIO_1P8_3P3_EXT VSS F9
16 OUT UART_TOUCH_TO_DEBUG_TX GPIO_ADC_05 PAD_I_TOUCH9 GRAPE_DRIVE<9> IN 29 CER-X7R NP0-C0G 0201 01005 01005 01005
G10 M1 01005 01005-1 VSS G8
46 33 28 11 IN GPIO_SOC_TO_BT_TO_TOUCH_TS_SYNC GPIO_ADC_06 PAD_I_TOUCH10 GRAPE_DRIVE<10> IN 29 A2 I2C_PAD_I_VDDIO_1P8_3P3_EXT
G9 K1 VSS H10
R3005
0.00
46 33 OUT GPIO_TOUCH_TO_BT_SYNC GPIO_ADC_07 PAD_I_TOUCH11
L6
GRAPE_DRIVE<11> IN 29
28 27 PP3V3_TOUCH_FILT C12 OTP_TMON_I_VDDA_3P3_EXT VSS K8
46 27 10 SPI_GRAPE_CS_L 1 2 F8 PAD_I_TOUCH12 GRAPE_DRIVE<12> 29
IN
1/32W MF 0% 01005
28 OUT
SPI_KONA_M_TO_KONA_S_SCLK
H11
GPIO_08
PAD_I_TOUCH13
N1
GRAPE_DRIVE<13>
IN
29
FL3003 G13 AUXBUF_PMU_I_VDDA_3P3_EXT
VSS A14
IN
28 OUT
SPI_KONA_M_TO_KONA_S_MOSI GPIO_09 P6 FERR-220-OHM VSS E14
J9 PAD_I_TOUCH14 GRAPE_DRIVE<14> 29 28 PP1V8_TOUCH_XTAL_FILT
R3060
0.00
28 IN
SPI_KONA_M_TO_KONA_S_MISO
H9
GPIO_10
PAD_I_TOUCH15
N6
GRAPE_DRIVE<15>
IN
29
48 28 27 12 PP1V8_TOUCH_EXT_SW 1 2
VOLTAGE=1.8V
J14 XTAL_PLL_AVDD1P8_I_VDDLDO_1P8_EXT VSS A1
IN
28 8 AP_DISP_TOUCH_BSYNC0 1 2 28 SPI_KONA_M_TO_KONA_S_CS_L GPIO_11 R7 0402 VSS A3
1/32W MF 0% 01005
OUT
46 KONA_M_GPIO_12
F7
GPIO_12
PAD_I_TOUCH16
N7
GRAPE_DRIVE<16> IN 29 1 C3027 1 C3028 F11 AUXADC_AVDDC_I_VDDIO_1P8_3P3_EXT
VSS B7
J10 PAD_I_TOUCH17 GRAPE_DRIVE<17> IN 29 0.22UF 0.1UF E12 AUXADC_AVDD_I_VDDIO_1P8_3P3_EXT
46 KONA_M_GPIO_13 GPIO_13 R8 20% 10% VSS H12
R3061
0.00 47 28 KONA_S_TO_KONA_M_RESET_DET_L
A6
GPIO_14
PAD_I_TOUCH18
M6
GRAPE_DRIVE<18> IN 29 2 6.3V
X5R
2 6.3V
CER-X5R C3 AFE_I_VDDANA_3P3_AFE_PMU VSS H13
IN
28 8 AP_DISP_TOUCH_BSYNC1 1 2 C6 PAD_I_TOUCH19 GRAPE_DRIVE<19> IN 29 01005-1 01005
KONA_M_GPIO_15 GPIO_15 P7 D5 AFE_I_VDDANA_3P3_AFE_PMU VSS K11
1/32W MF 0% 01005 D9 PAD_I_TOUCH20 GRAPE_DRIVE<20> IN 29
AP_DISP_TOUCH_BSYNC0_R GPIO_16 M7 H6 AFE_I_VDDANA_3P3_AFE_PMU VSS K12
E8 PAD_I_TOUCH21 GRAPE_DRIVE<21> 29
R3062
0.00
46 AP_DISP_TOUCH_BSYNC1_R
C9
GPIO_17
PAD_I_TOUCH22
N9
GRAPE_DRIVE<22>
IN
29
L4 AFE_I_VDDANA_3P3_AFE_PMU VSS K13
IN
28 8 AP_DISP_TOUCH_EB 1 2 AP_DISP_TOUCH_EB_R GPIO_18 P9 L3 AFE_I_VDDANA_3P3_AFE_PMU VSS D15
C5 PAD_I_TOUCH23 GRAPE_DRIVE<23> IN 29 PP2V8_KONA_M_VDDANA
1/32W MF 0% 01005
NC GPIO_19 M9 L8 AFE_I_VDDANA_3P3_AFE_PMU VSS E15
PAD_I_TOUCH24 GRAPE_DRIVE<24> 1 1 1 1 1 1 1 1
B5
H_ALT_CS* PAD_I_TOUCH25
R9
GRAPE_DRIVE<25>
IN 29
29
C3078
330PF
C3079
12PF
C3001
0.1UF
C3002
0.1UF
C3003
0.1UF
C3004
0.1UF
C3005
0.1UF
C3006
2.2UF
M2 AFE_I_VDDANA_3P3_AFE_PMU VSS F15
NC B6 N10
IN
10% 5% 10% 10% 10% 10% 10% 20% R11 AFE_I_VDDANA_3P3_AFE_PMU VSS G11
46 27 10 IN SPI_GRAPE_CS_L H_CS* PAD_I_TOUCH26 GRAPE_DRIVE<26> IN 29 16V 16V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V
A7 M10 2 CER-X7R 2 NP0-C0G 2 CER-X5R 2 CER-X5R 2 CER-X5R 2 CER-X5R 2 CER-X5R 2 X5R-CERM M8 AFE_I_VDDANA_3P3_AFE_PMU VSS J11
46 11 OUT GPIO_GRAPE_IRQ_L H_INT* PAD_I_TOUCH27 GRAPE_DRIVE<27> IN 29 01005 01005-1 01005 01005 01005 01005 01005 0201
A8 R10 N8 AFE_I_VDDANA_3P3_AFE_PMU VSS J12
46 10 IN SPI_GRAPE_SCLK H_SCLK PAD_I_TOUCH28 GRAPE_DRIVE<28> IN 29
A9 P10 J6 AFE_I_VDDANA_3P3_AFE_PMU VSS K10
46 10 IN SPI_GRAPE_MOSI H_SDI PAD_I_TOUCH29 GRAPE_DRIVE<29> IN 29
B8 D2 L11 AFE_I_VDDANA_3P3_AFE_PMU
46 10 OUT SPI_GRAPE_MISO H_SDO PAD_I_TOUCH30 GRAPE_DRIVE<30> IN 29 XTAL_AVSS H15
D1 L14 AFE_I_VDDANA_3P3_AFE_PMU
A5 PAD_I_TOUCH31 GRAPE_DRIVE<31> IN 29 XTAL_AVSS K14
I2C_SCL C2 R6 AFE_I_VDDANA_3P3_AFE_PMU
NC A4
I2C_SDA
PAD_I_TOUCH32
C1
GRAPE_DRIVE<32> IN 29 R3010
3.3 VOLTAGE=15V CORE_PMU_I_AVSS B10
NC PAD_I_TOUCH33 GRAPE_DRIVE<33> 29 27 PP15V0_TOUCH 1 2 PP15V0_TOUCH_FILT B3 AFE_I_VDDHV15_EXT
IN
A12 B1
C R3070
0.00
1
R3011
47 28 IN
KMSI_MISO
B13
KMSI_MISO PAD_I_TOUCH34
P3
GRAPE_DRIVE<34> IN 29 5%
1/20W
1
CRITICAL
C3021 1
C3022 1
C3023 1
C3032 C4 AFE_I_VDDHV15_EXT AUXBUF_PMU_I_AVSS H14 C
46 12 IN SWD_KONA_SWCLK 1 2 47 28 OUT
KMSI_MOSI KMSI_MOSI PAD_I_TOUCH35 GRAPE_DRIVE<35> IN 29 MF 0.47UF 0.47UF 0.47UF 0.47UF L7 AFE_I_VDDHV15_EXT
10K B12 N2 201 20% 20% 20% 20% PAD_I_AVSS B2
1/32W MF 0% 01005 5% 47 28 IN
KMSI_STRB_IN KMSI_STRB_IN PAD_I_TOUCH36 GRAPE_DRIVE<36> IN 29 25V 25V 25V 25V E5 AFE_I_VDDHV15_EXT
1/32W A13 P1 2 CER-X5R 2 CER-X5R 2 CER-X5R 2 CER-X5R PAD_I_AVSS E1
MF 47 28 OUT
KMSI_STRB_OUT KMSI_STRB_OUT PAD_I_TOUCH37 GRAPE_DRIVE<37> IN 29 0201 0201 0201 0201 M11 AFE_I_VDDHV15_EXT
2 01005 P2 PAD_I_AVSS J1
C14 PAD_I_TOUCH38 GRAPE_DRIVE<38> IN 29 H2 AFE_I_VDDHV15_EXT
47 28 BI
PSE_SYNC PSE_SYNC P4 PAD_I_AVSS N11
PAD_I_TOUCH39 GRAPE_DRIVE<39> IN 29 K6 AFE_I_VDDHV15_EXT
K9 G3 PAD_I_AVSS L2
KONA_M_TEST_MODE TEST_MODE PAD_I_TOUCH40 GRAPE_SENSE<0> OUT 29 L1 AFE_I_VDDHV15_EXT
D4 PAD_I_AVSS P15
E7 PAD_I_TOUCH41 GRAPE_SENSE<1> OUT 29 L9 AFE_I_VDDHV15_EXT
46 12 SWD_KONA_SWDIO JTAG_TMS D3 1 1 1 PAD_I_AVSS K2
BI
J7
PAD_I_TOUCH42
G4
GRAPE_SENSE<2> OUT 29 C3080
0.47UF
C3081
0.47UF
C3082
0.47UF
M3 AFE_I_VDDHV15_EXT
PAD_I_AVSS L10
SWD_KONA_SWCLK_R JTAG_TCK PAD_I_TOUCH43 GRAPE_SENSE<3> OUT 29 20% 20% 20% E2 AFE_I_VDDHV15_EXT
28 27 PP3V3_TOUCH_FILT G7 E4
GRAPE_SENSE<4> 25V 25V 25V PAD_I_AVSS L15
NC_KONA_JTAG_TDI JTAG_TDI PAD_I_TOUCH44 OUT 29 2 CER-X5R 2 CER-X5R 2 CER-X5R N3 AFE_I_VDDHV15_EXT
1 H8 E3 0201 0201 0201 PAD_I_AVSS M4
R3014 NC_KONA_JTAG_TDO
G6
JTAG_TDO PAD_I_TOUCH45
F1
GRAPE_SENSE<5> OUT 29 L12 AFE_I_VDDHV15_EXT
PAD_I_AVSS F5
1.00M NC_KONA_JTAG_TRST_L JTAG_TRST* PAD_I_TOUCH46 GRAPE_SENSE<6> OUT 29 G5 AFE_I_VDDHV15_EXT
5% F4 PAD_I_AVSS P5
1/32W H7 PAD_I_TOUCH47 GRAPE_SENSE<7> OUT 29 R15 AFE_I_VDDHV15_EXT
MF 46 28 11 IN GPIO_GRAPE_RST_L RESET* (INTERNAL PU) F3
GRAPE_SENSE<8> PAD_I_AVSS P8
2 01005 PAD_I_TOUCH48 OUT 29
B14 H5 R2 AFE_PMU_O_VDDANA_3P3_PMU PAD_I_AVSS H4
KONA_BOOST_ATEST BOOST_ATEST PAD_I_TOUCH49 GRAPE_SENSE<9> OUT 29
A15 F2
GRAPE_SENSE<10> KONA_M_VDDADC_CAP R4 AFE_PMU_O_AVDD1P2_CAP
27 PP15V0_TOUCH BOOST_FBIN PAD_I_TOUCH50 OUT 29
B15 G2
27 KONA_BOOST_ISENSE
D13
BOOST_ISENSE PAD_I_TOUCH51
G1
GRAPE_SENSE<11> OUT 29 1 C3029 NC G15 AUXBUF_PMU_O_VDD_AUX_CAP
27 KONA_BOOST_NGATE BOOST_NGATE PAD_I_TOUCH52 GRAPE_SENSE<12> OUT 29 1.0UF 28 27 PP3V3_TOUCH_FILT G14 AUXBUF_PMU_I_VDDHV_AUX_EXT
C15 H1 20%
27 KONA_BOOST_VBAT BOOST_VBAT PAD_I_TOUCH53 GRAPE_SENSE<13> OUT 29 2 6.3V
D14 P11
GRAPE_SENSE<14> X5R 48 28 27 12 PP1V8_TOUCH_EXT_SW C13 CORE_PAD_I_VDDIO_1P8_3P3_EXT
27 KONA_BOOST_EN BOOST_VBAT_EN PAD_I_TOUCH54 OUT 29 0201-1
K7 N15 C8 CORE_PAD_I_VDDIO_1P8_3P3_EXT
27 KONA_BOOT0_M BOOT_CFG_0 PAD_I_TOUCH55 GRAPE_SENSE<15> OUT 29
J8 N12 1 2 28 PP1V8_TOUCH_AON_RC B11 CORE_PMU_I_AON_VDDIO_1P8_3P3_EXT
27 KONA_BOOT1_M BOOT_CFG_1 PAD_I_TOUCH56 GRAPE_SENSE<16> OUT 29 VOLTAGE=1.8V
P13 A10 CORE_PMU_I_VDDLDO_1P8_EXT
E9 PAD_I_TOUCH57 GRAPE_SENSE<17> 29
R3050
C3016 NC C7 JTAG_RTCK
PAD_I_TOUCH58
P12
GRAPE_SENSE<18>
OUT
29 100
1 C3050
2.2UF
KONA_M_VDDCORE_CAP A11 CORE_PMU_O_VDDCORE_1P2_CAP
OUT
20PF NC JTAG_SRST* R12
GRAPE_SENSE<19>
1% 20%
5% 16V PAD_I_TOUCH59 29 1/32W 6.3V 1 1
C0G N13
OUT
MF 2 X5R-CERM C3018 C3019
B 1
01005
2
XW3001
SHORT-8L-0.091MM-SM
J15
NC K15 XTALN
PAD_I_TOUCH60
PAD_I_TOUCH61
M12
GRAPE_SENSE<20>
GRAPE_SENSE<21>
OUT 29
29
01005 0201 1.0UF
20%
6.3V
0.1UF
10%
6.3V
B
OUT
10 IN CLK_SOC_TO_TOUCH_24MHZ CLK_TOUCH_24MHZ_C 1 2 CLK_KONA_M_24MHZ XTALP R13
GRAPE_SENSE<22> 2 X5R 2 CER-X5R
J13 PAD_I_TOUCH62 29 0201-1 01005
1 C3017 NC XTAL_O_CLK_EXT
PAD_I_TOUCH63
L13
GRAPE_SENSE<23>
OUT
29
OUT
10PF R5 P14
GRAPE_SENSE<24>
XW3050 5% AFE_IO_BGBIAS PAD_I_TOUCH64 OUT 29
SHORT-8L-0.091MM-SM 16V M14
1 2 2 CERM PAD_I_TOUCH65 GRAPE_SENSE<25> OUT 29
28 OUT
CLK_KONA_S_24MHZ 01005 M13
PAD_I_TOUCH66 GRAPE_SENSE<26> OUT 29
TABLE_5_HEAD
N14 PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION

PAD_I_TOUCH67 GRAPE_SENSE<27> OUT 29
M15 TABLE_5_ITEM
NOSTUFF PAD_I_TOUCH68 GRAPE_SENSE<28> OUT 29 371S00117 1 DIODE,SCHOTTKY,40V,200MA,SOD523 D3001 CRITICAL

48 28 27 12 PP1V8_TOUCH_EXT_SW R14
C3091 1 PAD_I_TOUCH69 GRAPE_SENSE<29> OUT 29
NOSTUFF
C3090 1 4 NOSTUFF 20PF
5%
28 KONA_BGBIAS
BOOT OPTION
VDD 16V 2
0.1UF C0G
20% CRITICAL 01005 48 28 27 12 PP1V8_TOUCH_EXT_SW
6.3V 2
X5R-CERM
01005
U3090
24MHZ-25PPM-1.8V
NOSTUFF
1 1
1
2.0X1.6X0.7-SM
3
R3001
10K
R3003
10K
STANDBY OUT CLK_TOUCH_OSC_24MHZ N5 5% 5%
PAD_I_SELFCAPEXT 1/32W 1/32W
N4 NC MF MF
PAD_O_GUARDBUFFER NC 01005 01005
GND 2 2
C11
2 CRITICAL CORE_PMU_O_AON_TEST_PMU NC 27 KONA_BOOT0_M KONA_BOOT1_M 27
Q3001 1 1
NOSTUFF
SIA445EDJ
OMIT_TABLE
R3002
10K
R3004
10K
SC70-6L CRITICAL 5% 5%
R3008
L3001 CRITICAL
D3001
1/32W
MF
1/32W
MF
48 PPVCC_MAIN 7 22UH-20%-0.61A-0.6OHM SOD523
01005
2 2
01005
4 1 0.15 1 2 A K
D
S
KONA_BOOST_MAIN_GATED 1 2 KONA_BOOST_MAIN_R KONA_BOOST_LX PP15V0_TOUCH 27

CRITICAL CRITICAL
1% VLF504010-SM 1 1 1 1 1
1 C3026 1 C3020 1/8W 2 ZLLS350 C3012 C3013 C3014 C3015 C3068
A 10UF 10UF 10UF 10UF 180PF
SYNC_MASTER=J71B_MLB_B1 SYNC_DATE=07/23/2018
A
G
MF
R3007 1 C3011 1 0.1UF
10%
10UF
20%
2 0402 XW3003
SHORT-8L-0.091MM-SM
20%
25V
20%
25V
20%
25V
20%
25V
2%
50V PAGE TITLE
10K 1UF 2 25V 2 10V NO_XNET_CONNECTION=1 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM 2 NP0-C0G
5%
1/32W
MF
20%
16V
CER-X5R
2
3 X5R
0201
X5R-CERM
0402-7
XW3004
SHORT-8L-0.091MM-SM
1 3 CRITICAL
0603 0603 0603 0603 0201
TOUCH: KONA #1
01005
2
0201 NO_XNET_CONNECTION=1 1 Q3002 DRAWING NUMBER SIZE
D CSD17381F4 051-04464 D
27 KONA_BOOST_VBAT
0402
27 PP15V0_TOUCH Apple Inc. REVISION
MAKE_BASE=TRUE
27 KONA_BOOST_ISENSE
G
4.0.0
R3006 27 KONA_BOOST_NGATE 1 S NOTICE OF PROPRIETARY PROPERTY: BRANCH
27 KONA_BOOST_EN 1
1.00K
5%
1/32W
2 KONA_BOOST_EN_R
2
PAGE
30 OF 121
MF II NOT TO REPRODUCE OR COPY IT
01005 III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET

8 7 6 5 4 3 2 1
www.RepairLap.com
8 7 6 5 4 3 2 1
NOSTUFF NOSTUFF
CRITICAL
U3101
CRITICAL U3101
BCM15900B0K
BCM15900B0K BGA
BGA
NOSTUFF NOSTUFF NOSTUFF NOSTUFF SYM 2 OF 2
SYM 1 OF 2 B3
E11 J5 46 27 PP15V0_TOUCH_FILT AFE_I_VDDHV15_EXT AUXBUF_AVSS F14
AUXADC_REF PAD_I_TOUCH0 NC C4
H3 AFE_I_VDDHV15_EXT
PAD_I_TOUCH1 NC
1 C3111 1 C3112 1 C3113 1 C3117 L7 AFE_I_VDDHV15_EXT AUXADC_AVSS C10
G12 AUXBUF_AIO_INPUT_3V PAD_I_TOUCH2 J2 0.47UF 0.47UF 0.47UF 0.47UF
NC 20% 20% 20% 20% E5 AFE_I_VDDHV15_EXT
F13 AUXBUF_AIO_OUTPUT PAD_I_TOUCH3 J3 2 25V 2 25V 2 25V 2 25V VSS D6
NC NC CER-X5R CER-X5R CER-X5R CER-X5R M11 AFE_I_VDDHV15_EXT
PAD_I_TOUCH4 J4 0201 0201 0201 0201 VSS D8
NC H2 AFE_I_VDDHV15_EXT
D10 GPIO_ADC_00 PAD_I_TOUCH5 K5 VSS F6
NC NC NOSTUFF NOSTUFF NOSTUFF K6 AFE_I_VDDHV15_EXT
D12 GPIO_ADC_01 PAD_I_TOUCH6 K4 VSS F9
NC NC L1
D NC
D11 GPIO_ADC_02 PAD_I_TOUCH7 K3
NC
1 C3133 1 C3134 1 C3135 L9
AFE_I_VDDHV15_EXT
AFE_I_VDDHV15_EXT
VSS G8 D
47 TP_KONA_S_UART_RX F12 GPIO_ADC_03 PAD_I_TOUCH8 M5 0.47UF 0.47UF 0.47UF VSS H10
NC 20% 20% 20% M3 AFE_I_VDDHV15_EXT
TP_KONA_S_UART_TX E10 GPIO_ADC_04 PAD_I_TOUCH9 L5 2 25V 2 25V VSS K8
NOSTUFF 47
NC CER-X5R CER-X5R 2 25V E2 AFE_I_VDDHV15_EXT
R3108 NC
F10 GPIO_ADC_05 PAD_I_TOUCH10 M1
NC
0201 0201 CER-X5R
0201 N3 VSS A14
0.00 G10 K1 AFE_I_VDDHV15_EXT E14
46 33 27 11 IN
GPIO_SOC_TO_BT_TO_TOUCH_TS_SYNC 1 2 GPIO_SOC_TO_SYS_TS_SYNC_R GPIO_ADC_06 PAD_I_TOUCH11 NC L12 VSS
G9 L6 AFE_I_VDDHV15_EXT A1
0%
NC GPIO_ADC_07 PAD_I_TOUCH12 NC G5 VSS
1/32W
N1 AFE_I_VDDHV15_EXT A3
MF PAD_I_TOUCH13 NC R15 VSS
01005
F8 P6 AFE_I_VDDHV15_EXT B7
TP_KONA_IPC_EVENT_0
47 GPIO_08 PAD_I_TOUCH14 NC VSS
47 TP_KONA_IPC_EVENT_1
H11 GPIO_09 PAD_I_TOUCH15 N6 VSS H12
NC 27 PP3V3_TOUCH_FILT E13 BOOST_VDDA
J9 GPIO_10 PAD_I_TOUCH16 R7 NOSTUFF NOSTUFF NOSTUFF VSS H13
NC C12 OTP_TMON_I_VDDA_3P3_EXT
H9 GPIO_11 PAD_I_TOUCH17 N7 1 C3115 1 C3116 1 C3120 VSS K11
NC R1 AFE_PMU_I_VDDA_3P3_EXT
F7 GPIO_12 PAD_I_TOUCH18 R8 0.1UF 0.1UF 0.22UF VSS K12
NOSTUFF NC 10% 10% 20% G13 AUXBUF_PMU_I_VDDA_3P3_EXT
J10 GPIO_13 PAD_I_TOUCH19 M6 2 6.3V 2 6.3V 2 10V VSS K13
R3106 0.00 A6 P7
NC CER-X5R
01005
CER-X5R
01005
CERM-X5R
0201
G14 AUXBUF_PMU_I_VDDHV_AUX_EXT D15
27 8 IN
AP_DISP_TOUCH_BSYNC0 1 2 47 27 OUT
KONA_S_TO_KONA_M_RESET_DET_L GPIO_14 PAD_I_TOUCH20 NC G15 VSS
0% MF
C6 M7 NC AUXBUF_PMU_O_VDD_AUX_CAP E15
1/32W 01005
NC GPIO_15 PAD_I_TOUCH21 NC VSS
AP_DISP_TOUCH_BSYNC0_S_R D9 GPIO_16 PAD_I_TOUCH22 N9 VSS F15
R3107 NOSTUFF
0.00 E8 P9
NC PP2V8_KONA_S_VDDANA C3 AFE_I_VDDANA_3P3_AFE_PMU G11
27 8 IN
AP_DISP_TOUCH_BSYNC1 1 2 AP_DISP_TOUCH_BSYNC1_S_R GPIO_17 PAD_I_TOUCH23 NC NOSTUFF NOSTUFF NOSTUFF NOSTUFF D5 VSS
0% MF
C9 M9 AFE_I_VDDANA_3P3_AFE_PMU J11
1/32W 01005 AP_DISP_TOUCH_EB_S_R GPIO_18 PAD_I_TOUCH24 NC
1 C3178 1 C3179 1 C3102 1 C3103 H6 AFE_I_VDDANA_3P3_AFE_PMU
VSS
C5 GPIO_19 PAD_I_TOUCH25 R9 330PF 12PF 0.1UF 0.1UF VSS J12
NC NC 10% 5% 10% 10% L4 AFE_I_VDDANA_3P3_AFE_PMU
R3150 NOSTUFF
0.00 PAD_I_TOUCH26 N10
NC 2 16V
CER-X7R 2 25V
NP0-C0G 2 6.3V
CER-X5R 2 6.3V
CER-X5R L3 VSS K10
27 8 IN
AP_DISP_TOUCH_EB 1 2
A7 M10 01005 0201 01005 01005 AFE_I_VDDANA_3P3_AFE_PMU
0% MF 27 OUT
KONA_S_TO_KONA_M_INT_L H_INT* PAD_I_TOUCH27 NC L8
1/32W 01005
R10 AFE_I_VDDANA_3P3_AFE_PMU
PAD_I_TOUCH28 NC M2 XTAL_AVSS H15
A8 P10 AFE_I_VDDANA_3P3_AFE_PMU
27 IN
SPI_KONA_M_TO_KONA_S_SCLK H_SCLK PAD_I_TOUCH29 NC R11 XTAL_AVSS K14
A9 D2 NOSTUFF NOSTUFF NOSTUFF NOSTUFF AFE_I_VDDANA_3P3_AFE_PMU
27 SPI_KONA_M_TO_KONA_S_MOSI H_SDI PAD_I_TOUCH30 NC M8
IN
SPI_KONA_M_TO_KONA_S_MISO B8 H_SDO PAD_I_TOUCH31 D1
1 C3104 1 C3105 1 C3106 1 C3107 AFE_I_VDDANA_3P3_AFE_PMU
CORE_PMU_I_AVSS B10
27 OUT NC 0.1UF 0.1UF 0.1UF 2.2UF N8 AFE_I_VDDANA_3P3_AFE_PMU
27 SPI_KONA_M_TO_KONA_S_CS_L B6 H_CS* PAD_I_TOUCH32 C2 10% 10% 10% 10%
IN NC 2 6.3V 2 6.3V 2 6.3V 2 10V J6 AFE_I_VDDANA_3P3_AFE_PMU
B5 H_ALT_CS* PAD_I_TOUCH33 C1 CER-X5R CER-X5R CER-X5R X5R-CERM AUXBUF_PMU_I_AVSS H14
C NC
PAD_I_TOUCH34 B1
NC
NC
01005 01005 01005 0402 L11
L14
AFE_I_VDDANA_3P3_AFE_PMU C
A5 I2C_SCL P3 AFE_I_VDDANA_3P3_AFE_PMU B2
NC PAD_I_TOUCH35 NC R6 PAD_I_AVSS
A4 I2C_SDA N2 AFE_I_VDDANA_3P3_AFE_PMU E1
NC PAD_I_TOUCH36 NC R2 PAD_I_AVSS
P1 AFE_PMU_O_VDDANA_3P3_PMU J1
PAD_I_TOUCH37 NC R4 PAD_I_AVSS
A12 P2
KONA_S_VDDADC_CAP AFE_PMU_O_AVDD1P2_CAP N11
47 27 IN
KMSI_MOSI KMSI_MISO PAD_I_TOUCH38 NC NOSTUFF PAD_I_AVSS
47 27 KMSI_MISO B13 KMSI_MOSI PAD_I_TOUCH39 P4 1 C3118 PAD_I_AVSS L2
OUT NC
47 27 KMSI_STRB_OUT B12 KMSI_STRB_IN PAD_I_TOUCH40 G3 1UF PAD_I_AVSS P15
IN NC 10%
47 27 KMSI_STRB_IN A13 KMSI_STRB_OUT PAD_I_TOUCH41 D4 2 10V PAD_I_AVSS K2
OUT NC X5R-CERM
47 27 PSE_SYNC C14 PSE_SYNC PAD_I_TOUCH42 D3 0402 PAD_I_AVSS L10
BI NC
PAD_I_TOUCH43 G4 PAD_I_AVSS L15
NC
B14 BOOST_ATEST PAD_I_TOUCH44 E4 PAD_I_AVSS M4
NC NC
A15 BOOST_FBIN PAD_I_TOUCH45 E3 PAD_I_AVSS F5
NC NC
B15 BOOST_ISENSE PAD_I_TOUCH46 F1 PAD_I_AVSS P5
NC NC
D13 BOOST_NGATE PAD_I_TOUCH47 F4 PAD_I_AVSS P8
NC NC NOSTUFF
C15 BOOST_VBAT PAD_I_TOUCH48 F3 27 PP1V8_TOUCH_XTAL_FILT J14 XTAL_PLL_AVDD1P8_I_VDDLDO_1P8_EXT PAD_I_AVSS H4
NC NC
D14 BOOST_VBAT_EN PAD_I_TOUCH49 H5
NC
F2
NC 1 C3121 1 C3122 NOSTUFF
PAD_I_TOUCH50 NC 0.1UF 0.047UF
E9 G2 10% 10%
NC JTAG_RTCK PAD_I_TOUCH51 NC 2 6.3V 2 25V
J7 G1 CER-X5R X5R
NC JTAG_TCK PAD_I_TOUCH52 NC 01005 0201
E7 JTAG_TMS PAD_I_TOUCH53 H1
NC NC
G7 JTAG_TDI PAD_I_TOUCH54 P11
NC NC 48 28 27 12 PP1V8_TOUCH_EXT_SW F11 AUXADC_AVDDC_I_VDDIO_1P8_3P3_EXT
H8 JTAG_TDO PAD_I_TOUCH55 N15 NOSTUFF NOSTUFF NOSTUFF
NC NC E12 AUXADC_AVDD_I_VDDIO_1P8_3P3_EXT
G6 JTAG_TRST* PAD_I_TOUCH56 N12 1 C3108 1 C3109 1 C3110
NC NC R3 AFE_PMU_I_VDDLDO_1P8_EXT
C7 JTAG_SRST* PAD_I_TOUCH57 P13 0.1UF 0.1UF 0.1UF
NC NC 10% 10% 10% B9 AON_PAD_I_VDDIO_1P8_3P3_EXT
PAD_I_TOUCH58 P12 2 6.3V 2 6.3V 2 6.3V
NC CER-X5R CER-X5R CER-X5R D7 AON_PAD_I_VDDIO_1P8_3P3_EXT
46 27 11 GPIO_GRAPE_RST_L H7 RESET* PAD_I_TOUCH59 R12 01005 01005 01005
IN NC E6
B KONA_S_TEST_MODE K9 TEST_MODE PAD_I_TOUCH60 N13
NC A2
AON_PAD_I_VDDIO_1P8_3P3_EXT
I2C_PAD_I_VDDIO_1P8_3P3_EXT
B
NOSTUFF PAD_I_TOUCH61 M12
NC C13 CORE_PAD_I_VDDIO_1P8_3P3_EXT
R3105 1 28 KONA_BOOT0_S K7 BOOT_CFG_0 PAD_I_TOUCH62 R13
NC C8
10K J8 L13 CORE_PAD_I_VDDIO_1P8_3P3_EXT
5% 28 KONA_BOOT1_S BOOT_CFG_1 PAD_I_TOUCH63 NC B11
1/32W P14 27 PP1V8_TOUCH_AON_RC CORE_PMU_I_AON_VDDIO_1P8_3P3_EXT
MF PAD_I_TOUCH64 NC A10
01005 2 R5 M14 CORE_PMU_I_VDDLDO_1P8_EXT
27 KONA_BGBIAS AFE_IO_BGBIAS PAD_I_TOUCH65 NC A11
M13
KONA_S_VDDCORE_CAP CORE_PMU_O_VDDCORE_1P2_CAP
PAD_I_TOUCH66 NC NOSTUFF NOSTUFF
J15 XTALN PAD_I_TOUCH67 N14 1 C3125 1 C3114
NC NC
27 CLK_KONA_S_24MHZ K15 XTALP PAD_I_TOUCH68 M15 1UF 0.1UF
IN NC 10% 10%
NOSTUFF J13 XTAL_O_CLK_EXT PAD_I_TOUCH69 R14 2 10V 2 6.3V
NC NC X5R-CERM CER-X5R
C3101
10PF
1
B4 IFO_CLK_EXT
0402 01005
BOOT OPTION
5% NC 48 28 27 12 PP1V8_TOUCH_EXT_SW
16V
CERM 2 PAD_I_SELFCAPEXT N5 NC NOSTUFF NOSTUFF
1 1
01005 PAD_O_GUARDBUFFER N4 NC R3101 R3103
10K 10K
5% 5%
CORE_PMU_O_AON_TEST_PMU C11 NC 1/32W
MF
1/32W
MF
01005 2 2 01005
28 KONA_BOOT0_S KONA_BOOT1_S 28
NOSTUFF NOSTUFF
R3102 1 1
R3104
10K 10K
5% 5%
1/32W 1/32W
MF MF
01005 2 2 01005
PAGE TITLE
TOUCH: KONA #2
DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

PAGE
31 OF 121
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D D
MATCHES J171/GRAPE_SENSE_FLEX_ROT_051-04774_1.0.0 15 NOV 2018 MATCHES J171/GRAPE_DRIVE_FLEX_ROT_051-04775_0.3.0 30 NOV 2018
CRITICAL J0400 MLB APN: 516S00063

505066-5422 FLEX APN: 516S00064
CRITICAL J0401 MLB APN: 516S00224
FLEX APN: 516S00225
F-ST-SM
505066-4222
F-ST-SM
55 56
43 44
1 2
1 2
27 OUT
GRAPE_SENSE<0> 3 4 GRAPE_SENSE<8> OUT 27
27 GRAPE_DRIVE<39> 3 4 GRAPE_DRIVE<0> 27
5 6 IN IN
27 OUT
GRAPE_SENSE<1> GRAPE_SENSE<9> OUT 27
5 6
27 IN
GRAPE_DRIVE<38> GRAPE_DRIVE<1> IN 27
27 OUT
9 10 IN IN
27 OUT
9 10
GRAPE_DRIVE<36> GRAPE_DRIVE<3>
C 27 OUT
27
27
IN
IN
GRAPE_DRIVE<35> 11 12 GRAPE_DRIVE<4>
IN
IN
27
27
C
27 OUT
15 16 IN IN
27 OUT
15 16
27 IN
27 OUT
19 20 IN IN
27 OUT
19 20
27 IN
27 OUT
23 24 IN IN
27 OUT
23 24
27 IN
27 OUT
27 28 IN IN
27 OUT
27 28
27 IN
27 OUT
31 32 IN IN
27 OUT
31 32
27 IN
33 34
35 36 IN IN
37 38 IN IN
39 40 IN IN
41 42 IN IN
43 44 IN IN
45 46
45 46
47 48
49 50
51 52
53 54
57 58
B B
A SYNC_MASTER=J71B_MLB_B1 SYNC_DATE=07/23/2018 A
PAGE TITLE
TOUCH: CONNS
DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

PAGE
32 OF 121
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CRITICAL
FL3700
IO FLEX HOTBAR PADS FERR-33-OHM-3A-22-MOHM
1 2
MLB 998-5877 0402
FLEX 998-5876 VOLTAGE=5V
CRITICAL PPVBUS_USB_FILT 41 46
46 30 PPVBUS_E75_USB_CONN VOLTAGE=5V
FL3750
OMIT C3700 C3701 FERR-33-OHM-3A-22-MOHM 1
R3700 1 C3702 1 C3703
D J3700
2
DZ3700
1
27PF
1
0.01UF
1 2 100K
1%
27PF
5%
6.8PF
+/-0.25PF
D
PCB-X110 27V-100PF-4A 5% 10% 0402 1/20W 2 25V 2 25V
HB-SM 0402 2 25V 2 25V MF C0G C0G-CERM
C0G X7R 201 0201 0201
1 0201 402 2
2 1
3
4
5 E75_DPAIR1_CONN_N 30 46
6 BI
46 20 IN
SPKRAMP_R2_OUT_N 7 GND_VOID=TRUE
8
E75_DPAIR1_CONN_P BI 30 46
46 20 IN
SPKRAMP_R1_OUT_N 9 GND_VOID=TRUE
46 20 SPKRAMP_R2_OUT_P 10
IN 11
12
CONN_DET_L OUT 30 46
46 20 IN
SPKRAMP_R1_OUT_P 13 CRITICAL
46 19 IN
SPKRAMP_L1_OUT_P 14
15 PPOUT_E75_ACC_ID2_CONN 30 46
L3703
12OHM-0.1A-1.9-3.3GHZ
46 19 SPKRAMP_L2_OUT_P 16 TAM0605
IN 17 SYM_VER-1
46 19 SPKRAMP_L1_OUT_N 18 E75_DPAIR1_CONN_N 1 4 E75_DPAIR1_N

IN 19 46 30 16
46 19 SPKRAMP_L2_OUT_N 20 GND_VOID=TRUE GND_VOID=TRUE
IN 21
22
23 E75_DPAIR2_CONN_P 30 46 E75_DPAIR1_CONN_P 2 3 E75_DPAIR1_P
24 BI
GND_VOID=TRUE 46 30 16
25 E75_DPAIR2_CONN_N 30 46 GND_VOID=TRUE GND_VOID=TRUE
26 BI
46 30 PPOUT_E75_ACC_ID1_CONN 27 GND_VOID=TRUE
28 CRITICAL CRITICAL
29 2 2
30
46 30 PPVBUS_E75_USB_CONN 32
31 D3700
5.5V-0.28PF
D3702
5.5V-0.28PF
33 0201 0201
34
35 PPVBUS_E75_USB_CONN 30 46
36 1 1
37
38
39
40
41
42 CRITICAL
43
44
46
45 L3704
12OHM-0.1A-1.9-3.3GHZ
47
C E75_DPAIR2_CONN_P 1
TAM0605
SYM_VER-1
4 E75_DPAIR2_P
C
46 30 16
E75_DPAIR2_CONN_N 2 3 E75_DPAIR2_N
46 30 16
PINOUT MATCHES IO_FLEX 4.2.0 3/12/13 GND_VOID=TRUE GND_VOID=TRUE
CRITICAL CRITICAL
2 2
D3701
5.5V-0.28PF
D3703
5.5V-0.28PF
0201 0201
1 1
R3706
CONN_DET_L 10K TS_CON_DET_L
46 30 1 2 OUT 16
C CRITICAL 1% NOSTUFF
1 1/32W K
DZ3702 C3704
6.8PF
MF
01005 DZ3710
14.2V-6PF +/-0.25PF SC2
25V
0201-1 2 C0G-CERM DSF01S30SCAP
A 0201 A CRITICAL
B B
FL3701
FERR-22-OHM-1A-0.055OHM
VOLTAGE=3V
PPOUT_E75_ACC_ID1_CONN 1 2 PPOUT_E75_ACC_ID1
46 30 16
VOLTAGE=3V
C CRITICAL 0201
DZ3703 1 C3705
8.2PF
14.2V-6PF +/-0.5PF
2 16V
A 0201-1 C0G
01005
FL3702
FERR-22-OHM-1A-0.055OHM
VOLTAGE=3V
PPOUT_E75_ACC_ID2_CONN 1 2 PPOUT_E75_ACC_ID2
46 30 16
VOLTAGE=3V
C CRITICAL 0201
DZ3704 1 C3707
8.2PF
14.2V-6PF +/-0.5PF
2 16V
A 0201-1 C0G
A 01005
PAGE TITLE
IO: FLEX HOTBAR & FILTERS

DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

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HOME-BUTTON-MESA FLEX CONN

D D
518S0888 MLB
998-5374 ZIF FINGERS
CRITICAL
J3800
TF13BS-14S-0.4SH
F-RT-SM
FL3810 15
240-OHM-25%-0.20A-1.0DCR R3811
GPIO_BTN_HOME_L 1 2 GPIO_BTN_HOME_CONN_R_L 1
100 2 1
39 OUT
01005 5% 2
1/20W NC
1 3
C3811 MF
201 NC
4
27PF 46 GPIO_BTN_HOME_CONN_L
5% 5
2 16V 21 GPIO_MESA_TO_SOC_IRQ_CONN
NP0-C0G 6
01005-1 SPI_MESA_MISO_CONN
C 21
21 SPI_MESA_MOSI_CONN 7 C
46 21 GPIO_MESA_TO_BOOST_ENABLE_CONN 8
21 SPI_MESA_SCLK_CONN 9
10
PP16V0_MESA_CONN 11
46 21 PP3V1_S2_MESA_CONN 12
46 21 PP1V825_S2_MESA_CONN 13
14
16
B B
PAGE TITLE
BTN: HOME & MESA

DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

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EDP CONNECTOR SUPPORT

48 PPVCC_MAIN
1 C4140 1
0.1UF
C4139
10% 0.1UF
16V 10%
2 X5R-CERM 2 16V
1
0201 X5R-CERM
0201
VDD
U4100 CRITICAL
SLG5AP304V
TDFN L4101 D
D LCD_RAMP 7 CAP
CRITICAL
D 3 VOLTAGE=4.7V FERR-120-OHM-1.5A VOLTAGE=4.7V
39 GPIO_PMU2LCD_PWREN 2 ON S 5 32 PPVCC_MAIN_LCD_SW 1 2 PPVCC_MAIN_LCD_SW_CONN 32 46

IN
OMIT_TABLE 0402B
1
R4105 GND
100K 1 C4141 1 1 C4103 1
CRITICAL
C4102 1 C4130
1 C4132
8
5%
1/32W R4101 330PF
MF 3900PF 51.1K 0.1UF 10UF 180PF 10%
10% LAYOUT NOTE: 1% 10% 20% 2% 2 16V
2 01005 2 6.3V 1/32W 2 16V 2 6.3V 2 50V X7R
CERM-X5R PUT THERMAL VIAS AROUND U2200 IN CASE OF SHORTED CONDITION MF X5R-CERM CERM-X5R NP0-C0G 01005
01005 0201 0402 0201
2 01005
TABLE_5_HEAD
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION 32

PPVCC_MAIN_LCD_SW
TABLE_5_ITEM
353S4272 1 IC,SLG5AP1423V U4100 CRITICAL

NOSTUFF
1
R4140
100K
5%
1/32W
CRITICAL MF HPD VOLTAGE DIVIDER 2.5V TO 1.8V
2 01005 CRITICAL
EDP_AUX_P C4150 1 2 0.1UF EDP_AUX_EMI_P L4142 EDP_AUX_EMI_CONN_P L4190
9 IN
GND_VOID=TRUE GND_VOID=TRUE GND_VOID=TRUE 2 3 GND_VOID=TRUE
32
R4190 240-OHM-25%-0.20A-1.0DCR
01005 6.3V 20% X5R-CERM
1
7.5K 2 1 2
32 EDP_HPD_EMI_CONN EDP_HPD_EMI EDP_HPD 9
9 IN
EDP_AUX_N C4151 1 2 0.1UF EDP_AUX_EMI_N 1 4 EDP_AUX_EMI_CONN_N 32 5% 01005
OUT
GND_VOID=TRUE GND_VOID=TRUE GND_VOID=TRUE

TAM0605-4SM
SYM_VER-2 GND_VOID=TRUE
1/32W
1
01005 6.3V 20% X5R-CERM 1
R4141 1
R4143 3.25-OHM-0.1A-2.4GHZ
MF
01005 R4191 1 C4190
CRITICAL 100K 100K 20.0K 22PF
5% 5% 5% 5%
1/32W 1/32W 1/32W
MF 2 16V
C0G
C MF
2 01005
MF
2 01005 2 01005 01005
C
CRITICAL CRITICAL
47 9 IN
EDP_DATA_N<0> C4143
GND_VOID=TRUE
1 2 0.1UF
GND_VOID=TRUE
47 EDP_DATA_EMI_N<0> L4112 EDP_DATA_EMI_CONN_N<0> 32 47
01005 6.3V 20% X5R-CERM GND_VOID=TRUE
2 3 GND_VOID=TRUE
47 9 IN
EDP_DATA_P<0> C4142
GND_VOID=TRUE
1 2 0.1UF
GND_VOID=TRUE
47 EDP_DATA_EMI_P<0> GND_VOID=TRUE
1 4
GND_VOID=TRUE
EDP_DATA_EMI_CONN_P<0> 32 47
01005 6.3V 20% X5R-CERM TAM0605-4SM
SYM_VER-2
CRITICAL 3.25-OHM-0.1A-2.4GHZ
CRITICAL CRITICAL
EDP_DATA_N<1> C4144 1 2 0.1UF 47 EDP_DATA_EMI_N<1> L4122 EDP_DATA_EMI_CONN_N<1>
EDP CONNECTOR
47 9 IN 32 47
GND_VOID=TRUE GND_VOID=TRUE GND_VOID=TRUE GND_VOID=TRUE
01005 6.3V 20% X5R-CERM 2 3
47 9 IN
EDP_DATA_P<1> C4145
GND_VOID=TRUE
1 2 0.1UF
GND_VOID=TRUE
1 4
GND_VOID=TRUE
01005 6.3V 20% X5R-CERM TAM0605-4SM
SYM_VER-2
PINOUT MATCHES DISPLAY_EDP_FLEX 1.0.0 1/7/13
CRITICAL 3.25-OHM-0.1A-2.4GHZ APN 516S0784
CRITICAL
CRITICAL CRITICAL
C4146 1 2 0.1UF L4132 J4100
47 9 IN
EDP_DATA_N<2> GND_VOID=TRUE GND_VOID=TRUE
47 EDP_DATA_EMI_N<2> GND_VOID=TRUE GND_VOID=TRUE
EDP_DATA_EMI_CONN_N<2> 32 47 AA03-S042VA1
01005 6.3V 20% X5R-CERM 2 3 F-ST-SM
43 44
47 9 IN
EDP_DATA_P<2> C4147
GND_VOID=TRUE
1 2 0.1UF
GND_VOID=TRUE
1 4
GND_VOID=TRUE
01005 6.3V 20% X5R-CERM TAM0605-4SM
SYM_VER-2
1 2
R4180 CRITICAL 3.25-OHM-0.1A-2.4GHZ
LED_IO_1_B 3 4 LED_IO_6_A
1
1.00M 2 EDP_DATA_EMI_CONN_N<0>
46 44 OUT OUT 44 46
32 47
46 44 LED_IO_2_B 5 6 LED_IO_5_A 44 46
GND_VOID=TRUE OUT OUT
B 01005
C4148
CRITICAL
1 2 0.1UF
CRITICAL
L4102
46 44 OUT
LED_IO_3_B 7
9
8
10
LED_IO_4_A OUT 44 46 B
47 9 IN
EDP_DATA_N<3> GND_VOID=TRUE GND_VOID=TRUE
47 EDP_DATA_EMI_N<3> GND_VOID=TRUE GND_VOID=TRUE
EDP_DATA_EMI_CONN_N<3> 32 47 46 44 OUT
LED_IO_4_B LED_IO_3_A OUT 44 46
01005 6.3V 20% X5R-CERM 2 3 11 12
46 44 LED_IO_5_B LED_IO_2_A 44 46
R4181 OUT
LED_IO_6_B 13 14 LED_IO_1_A
OUT
1
1.00M 2 EDP_DATA_EMI_CONN_P<0> 47 9 IN
EDP_DATA_P<3> C4149 1 2 0.1UF 47 EDP_DATA_EMI_P<3> 1 4 EDP_DATA_EMI_CONN_P<3> 32 47
46 44 OUT OUT 44 46
32 47 GND_VOID=TRUE GND_VOID=TRUE GND_VOID=TRUE GND_VOID=TRUE 15 16 EDP_HPD_EMI_CONN 32
GND_VOID=TRUE 01005 6.3V 20% X5R-CERM TAM0605-4SM
SYM_VER-2
01005 PPVCC_MAIN_LCD_SW_CONN 17 18
CRITICAL 3.25-OHM-0.1A-2.4GHZ 46 32
19 20 GND_VOID=TRUE
EDP_DATA_EMI_CONN_N<0> 32 47
21 22 GND_VOID=TRUE
R4182 23 24
1
1.00M 2 EDP_DATA_EMI_CONN_N<1> 32 47 25 26 GND_VOID=TRUE
GND_VOID=TRUE
32 EDP_AUX_EMI_CONN_N GND_VOID=TRUE 29 30
CRITICAL
R4183 L4180 32 EDP_AUX_EMI_CONN_P GND_VOID=TRUE 31 32 GND_VOID=TRUE
1.00M 2 120-OHM-25%-450MA VOLTAGE=26V NC

33 34 GND_VOID=TRUE
1 EDP_DATA_EMI_CONN_P<1> 32 47 PPLED_BACK_REG_A 35 36
GND_VOID=TRUE 48 PPLED_OUT_B 1 2 PPLED_BACK_REG_B 32 46
46 32
EDP_DATA_EMI_CONN_N<3>
0201 32 47
1 1 PPLED_BACK_REG_B 39 40 EDP_DATA_EMI_CONN_P<3>
C4180 C4181 46 32
GND_VOID=TRUE
32 47
12PF 180PF 41 42
R4184 5% 2%
1.00M 2 2 50V
C0G-CERM 2 50V
NP0-C0G
1 EDP_DATA_EMI_CONN_N<2> 32 47 45 46
GND_VOID=TRUE
0201 0201
01005
R4185
1
1.00M 2 CRITICAL
EDP_DATA_EMI_CONN_P<2>
01005
GND_VOID=TRUE
32 47
L4185
120-OHM-25%-450MA
A 48 PPLED_OUT_A 1 2 PPLED_BACK_REG_A
VOLTAGE=26V
32 46 SYNC_MASTER=J171/MLB_B SYNC_DATE=10/24/2018 A
0201 PAGE TITLE
R4186
1
1.00M 2
1 C4185
12PF
1 C4186
180PF
DISPLAY: EDP CONN
GND_VOID=TRUE DRAWING NUMBER SIZE
01005 5% 2%
2 50V
C0G-CERM 2 50V
NP0-C0G 051-04464 D
0201 0201 Apple Inc. REVISION
R4187 4.0.0
1.00M 2 NOTICE OF PROPRIETARY PROPERTY: BRANCH
1 EDP_DATA_EMI_CONN_P<3> 32 47
GND_VOID=TRUE THE INFORMATION CONTAINED HEREIN IS THE
01005 PROPRIETARY PROPERTY OF APPLE INC.
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WLAN
48 35 33
PPVCC_MAIN PPVCC_MAIN 33 35 48
48
PP3V3_S2 PP3V3_S2 35
48
PP1V8_S2 PP1V8_S2 35
PMU_GPIO_WLAN_REG_ON PMU_GPIO_WLAN_REG_ON 35 46
D
39
39
PMU_GPIO_WLAN_HOST_WAKE
MAKE_BASE=TRUE
PMU_GPIO_WLAN_HOST_WAKE 35 46
D
MAKE_BASE=TRUE
46 35 33 11
GPIO_SOC2WLAN_PCIE_DEV_WAKE GPIO_SOC2WLAN_PCIE_DEV_WAKE 11 33 35 46
MAKE_BASE=TRUE
39
PMU_GPIO_CLK_32K_WLAN PMU_GPIO_CLK_32K_WLAN 35 46
MAKE_BASE=TRUE
NC_UART_COEX_BB_TO_WLAN_TXD MAKE_BASE=TRUE NC_UART_COEX_BB_TO_WLAN_TXD 35
NC_UART_COEX_WLAN_TO_BB_TXD MAKE_BASE=TRUE NC_UART_COEX_WLAN_TO_BB_TXD 35
46 12 IN
AOP2RADIO_CONTEXT_A MAKE_BASE=TRUE AOP2RADIO_CONTEXT_A OUT 35
46 12 IN
AOP2RADIO_CONTEXT_B MAKE_BASE=TRUE AOP2RADIO_CONTEXT_B OUT 35
46 11
UART2_SOC2WLAN_TX UART2_SOC2WLAN_TX 35
MAKE_BASE=TRUE
46 11
UART2_SOC2WLAN_RTS_L UART2_SOC2WLAN_RTS_L 35
MAKE_BASE=TRUE
46 11
UART2_WLAN2SOC_TX UART2_WLAN2SOC_TX 35
MAKE_BASE=TRUE
46 11
UART2_WLAN2SOC_RTS_L UART2_WLAN2SOC_RTS_L 35
CKPLUS_WAIVE=SINGLE_NODENET MAKE_BASE=TRUE
FUNC_TEST=1
46 TESTPOINT_JTAG_WLAN_TCK MAKE_BASE=TRUE TESTPOINT_JTAG_WLAN_TCK 35
46 TP_JTAG_WLAN_TMS MAKE_BASE=TRUE TP_JTAG_WLAN_TMS 35
11 WLAN_TIME_SYNC 1 2 JTAG_WLAN_TRST
46
MAKE_BASE=TRUE
JTAG_WLAN_TRST 35
0% MF
R4901 1/32W 01005 0.00
47 7 90_AP_PCIE3_REFCLK_P 90_AP_PCIE3_REFCLK_P 35
MAKE_BASE=TRUE
47 7
90_AP_PCIE3_REFCLK_N 90_AP_PCIE3_REFCLK_N 35
MAKE_BASE=TRUE
C C
46 7
AP_PCIE_CLKREQ3_L AP_PCIE_CLKREQ3_L 35
MAKE_BASE=TRUE
46 7 AP_PCIE_RESET3_L AP_PCIE_RESET3_L 35
MAKE_BASE=TRUE
39
PMU_GPIO_BT_HOST_WAKE PMU_GPIO_BT_HOST_WAKE 35 46
MAKE_BASE=TRUE
39
PMU_GPIO_BT_REG_ON PMU_GPIO_BT_REG_ON 35
MAKE_BASE=TRUE
46 27 GPIO_TOUCH_TO_BT_SYNC GPIO_TOUCH_TO_BT_SYNC OUT 35

MAKE_BASE=TRUE
46 28 27 11 GPIO_SOC_TO_BT_TO_TOUCH_TS_SYNC GPIO_SOC_TO_BT_TO_TOUCH_TS_SYNC
OUT 35
MAKE_BASE=TRUE
B GND_VOID=TRUE GND_VOID=TRUE B
46 7
90_AP_PCIE3_RXD_C_P C9160 1 2 0.1UF PCIE_WLAN2SOC_TX_P 35
20% 01005
X5R-CERM 6.3V
46 7
90_AP_PCIE3_RXD_C_N C9161 1 2 0.1UF PCIE_WLAN2SOC_TX_N
35
20% 01005
X5R-CERM 6.3V
GND_VOID=TRUE
GND_VOID=TRUE
90_AP_PCIE3_TXD_C_P C9162 1 2 0.1UF PCIE_SOC2WLAN_TX_P

7 35 46
20% 01005
X5R-CERM 6.3V
7
90_AP_PCIE3_TXD_C_N C9163 1 2 0.1UF PCIE_SOC2WLAN_TX_N 35 46
20% 01005
X5R-CERM 6.3V
GND_VOID=TRUE
GND_VOID=TRUE
PAGE TITLE
RADIOS: ALIASES
DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

PAGE
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VENUS
48 34 PP1V8_S2 PP1V8_S2 34 48
1 C203_S
0.22UF
48 34 PP1V8_S2 20% PP209_S
2 6.3V
D 1 C202_S 1 C214_S 1 C215_S
X5R
01005-1
P2MM-NSM
SM
1
D
NFC PP
2.2UF 2.2UF 2.2UF OMIT
20% 20% 20% PP_VDD_NFC_TVDD 34
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
0201 0201 0201
NFC NFC NFC
PP204_S
P2MM-NSM
PP_VDD_NFC_AVDD SM
VOLTAGE=1.8 1
PP
1 1 1 OMIT
C211_S C212_S C213_S
2.2UF 2.2UF 100PF
20% 20% 5%
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 16V
NP0-C0G PP_NFC_VDDBOOST
0201 0201 01005-1 PP_NFC_VDDC
NFC NFC NFC
PP_NFC_VDDNV
PP_NFC_VDDPLL
48 PPVCC_MAIN
PP_NFC_VHV
1 C270_S 1 C251_S 1 C252_S PP_NFC_VREF
NCNCNC
2.2UF 100PF 0.22UF NC 1 C204_S 1 C217_S 1 C207_S 1 C208_S 1 C209_S 1 C210_S
VUP G1
VDDA H5
VDDC C2
VDDCIN C1
VDDIO C3
VDDPA H2
VDDPLL H3
VREF D2
PMUVCC1 B5
PMUVCC2 B6
PMUVCC3 B7
SIMVCC1 A6
SIMVCC2 A7
SIMVCC3 A8
VBAT E1
VBATPWR A3
VDDBOOST B1
VDDIO_SE E5
VDDNV B3
VHV F1
20% 5% 20%
2 6.3V 2 16V 2 6.3V 0.22UF 2.2UF 0.22UF 0.22UF 0.22UF 0.22UF
X5R-CERM NP0-C0G X5R 20% 20% 20% 20% 20% 20%
0201 01005-1 01005-1 2 6.3V 6.3V
2 X5R-CERM 2 6.3V 2 6.3V 2 6.3V 2 6.3V
NFC NFC NFC X5R X5R X5R X5R X5R
01005-1 0201 01005-1 01005-1 01005-1 01005-1
NFC NFC NFC NFC NFC NFC
H8 SE_GPIO0 F8 NC
NFC_CLK_REQ
NC
J8 SE_GPIO1 D4 NC
GPIO_SOC_TO_ROTTERDAM_DWLD_REQ NFC_DWL_REQ
34 11
NFC_S
NC
E4
F3
NFC_GPIO0 SN100VUK-B20191
WLCSP
SE_I2C_SCL G8
SE_I2C_SDA F7
NC
NC
APN:338S00445
NFC_GPIO1
G6 NFC_GPIO2_AO SE_ISO_CLK D6
C NC
NC
G5 NFC_GPIO3_AO SE_ISO_IO D7
NC
NC
C
F2 SE_ISO_RST D3 NC
34 11 UART_SOC_TO_ROTTERDAM_RTS_L NFC_HSU_CTS
34 11 UART_ROTTERDAM_TO_SOC_RTS_L F5 NFC_HSU_RTS SE_SPI_CLK E8
NC
34 11 UART_SOC_TO_ROTTERDAM_TX E3 NFC_HSU_RX DIG NFC DIS SE SE_SPI_CS E6
NC
34 11 UART_ROTTERDAM_TO_SOC_TX F4 NFC_HSU_TX SE_SPI_MISO E7
NC
SE_SPI_MOSI D5
H7 NFC_IRQ NC
NC
A5 BOOST_LX A1 NC
NC NFC_SIM_SWIO1
B8 NFC_SIM_SWIO2
NC
C8 NFC_SIM_SWIO3
NC
34 11 GPIO_SOC_TO_ROTTERDAM_DEV_WAKE G7 NFC_WKUP_REQ
G3 NFC_CLK_32K
H6 NFC_XTAL1
NC
B4 NFC_SIM_SWCTRL1
NC ANALOG SIGNAL
C6 NFC_SIM_SWCTRL2
NC
J7 NFC_XTAL2
NC
J5 RXP
NC
J4 RXN
NC
J1 TX1
NC
J3 TX2
NC
NFC_TXVCASC G2 TXVCASC
B NFC_TXVCM H1 TXVCM B
VSS_PWR
VSS_PWR
VSS_PMU
C4
VSS_NFC
VSS_SUB
VSS_SUB
VSS_REF
VSS_DIG
VSS_DIG
VSS_DIG
VSS_PLL
39 34 GPIO_PMU_TO_ROTTERDAM_EN VEN
VSS_PA
VMID J6 RXVCM
C200_S 1
0.22UF C222_S 1 C5
C7
D8
G4
J2
H4
D1
A2
B2
E2
A4
F6
20%
6.3V 2 0.1UF
X5R 10% NOSTUFF
01005-1 6.3V
NFC 1 C201_S CER-X5R 2
NOSTUFF 01005
0.22UF NFC
20%
2 6.3V
X5R
01005-1
NFC
34 PP_VDD_NFC_TVDD NOSTUFF
PP200_S
P2MM-NSM
SM
34 11 UART_SOC_TO_ROTTERDAM_TX 1
PP
OMIT 34 11 GPIO_SOC_TO_ROTTERDAM_DEV_WAKE
PP201_S PP206_S
P2MM-NSM P2MM-NSM 34 11 GPIO_SOC_TO_ROTTERDAM_DWLD_REQ
SM SM
34 11 UART_ROTTERDAM_TO_SOC_TX 1 34 11 GPIO_SOC_TO_ROTTERDAM_DWLD_REQ 1
PP PP
39 34 GPIO_PMU_TO_ROTTERDAM_EN
OMIT OMIT
PP202_S PP207_S 1 1 1
P2MM-NSM P2MM-NSM R200_S R201_S R202_S
1
SM
1
SM 100K 100K 100K
34 11 UART_SOC_TO_ROTTERDAM_RTS_L PP 39 34 GPIO_PMU_TO_ROTTERDAM_EN PP 5% 5% 5%
1/32W 1/32W 1/32W
OMIT OMIT MF MF MF
PP203_S PP208_S 2 01005 2 01005 2 01005
P2MM-NSM P2MM-NSM NOSTUFF NOSTUFF BOMOPTION=NOSTUFF
SM SM
A 34 11 UART_ROTTERDAM_TO_SOC_RTS_L 1
PP 34 11 GPIO_SOC_TO_ROTTERDAM_DEV_WAKE 1
PP
OMIT OMIT PAGE TITLE
VENUS
DRAWING NUMBER SIZE
051-04464 D
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4.0.0

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WIFI/BT: J171: YEBISU MODULE, POWER, I/O

D 1 CRITICAL 111
D
3 U7500 112
6 LBEE5UE1YE-016 113
LGA
9 114
SYM 2 OF 2
12 115
18 OMIT_TABLE 116 R7513
21 117 1
0.00 2
33 PP1V8_S2 35 PP_WL_VDDIO PPVCC_MAIN 33 48
23 118 1% CRITICAL CRITICAL VOLTAGE=1.8V CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
1/20W
27 119 MF 1 C7501 1 C7500 1 C7584 1 C7585 1 C7586 1 C7587 1 C7590 1 C7591
0201
29 GND 120 12PF 0.01UF 10UF 10UF 27PF 0.01UF 3.0PF 12PF
5% 10% 20% 20% 5% 10% +/-0.1PF 5%
35 121 2 25V
NP0-C0G 2 6.3V
X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
NP0-C0G 2 6.3V
X5R 2 25V
NP0-C0G 2 25V
NP0-C0G
36 122 0201 01005 0402-2 0402-2 0201 01005 0201 0201
38 123
54 124 1 C7503 33 PP3V3_S2
56 125 3300PF CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL

10% 1 C7583 1 C7588 1 C7589 1 C7582 1 C7581
57 126 2 6.3V
X5R 10UF 10UF 4.7UF 12PF 0.01UF
VDDIO_1P8V 62
19
20
69
70
64 127 01005 20% 20% 10% 5% 10%
66 128 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
X5R-CERM 2 25V
NP0-C0G 2 10V
X7R-CERM
VBAT_VCC
VIN_3P3V
R7504 0402-2 0402-2 603 0201 0201
129 0.00 2 BT_GPIO_2 76 NC
33 PMU_GPIO_BT_REG_ON 1
130 IN
46 33 IN
PMU_GPIO_CLK_32K_WLAN 39 LPO_IN BT_GPIO_4 42 NC
0%
77 131 1/32W
MF 33 NC_UART_COEX_BB_TO_WLAN_TXD 43 SECI_RX
78 132 01005 IN
BT_DEV_WAKE 34 GPIO_SOC2BT_WAKE 11 46
33 NC_UART_COEX_WLAN_TO_BB_TXD 44 SECI_TX IN
79 133 OUT
35 PP_WL_VDDIO
80 134 CRITICAL CRITICAL BT_I2S_DI 95
VOLTAGE=1.8V NO STUFF NC
81 135 U7500 BT_I2S_DO 96
1 NC
82 136 R7501 46 33 PMU_GPIO_WLAN_REG_ON 25 WL_REG_ON LBEE5UE1YE-016 BT_I2S_CLK 97
10K IN NC
C 83
84 THRM_PAD
137
138
5%
1/20W 17 BT_REG_ON
LGA
SYM 1 OF 2
BT_I2S_WS 98
NC C
MF 46 GPIO_PMU2BT_REG_ON
85 139 2 201 OMIT_TABLE BT_UART_RXD 31 UART_SOC2BT_TX 11 46
R7506
IN
86 140 63 30 1
49.9 2
46 JTAG_WLAN_SEL JTAG_SEL BT_UART_TXD UART_BT2SOC_TX_R UART_BT2SOC_TX OUT 11 46
87 141 33 BI
TESTPOINT_JTAG_WLAN_TCK 48 JTAG_TCK BT_UART_CTS* 26 UART_SOC2BT_RTS_L IN 11 46 1%
THRM_PAD 1/32W
88 142 1CRITICAL TP_JTAG_WLAN_TMS 47 JTAG_TMS BT_UART_RTS* 32 UART_BT2SOC_RTS_R_L MF
R7500 33 BI
01005
89 143 10K 33 BI
JTAG_WLAN_TRST 53 JTAG_TRST*
90 144 5% 15 R7507
1/20W BT_PCM_CLK NC
91 145 MF 60 ANT_SWITCH_CORE1 14 1
49.9 2 UART_BT2SOC_RTS_L
2 201 NC BT_PCM_SYNC NC OUT 11 46
92 146 VOLTAGE=0V 61 ANT_SWITCH_CORE0 BT_PCM_OUT 13 1%
NC NC 1/32W
93 147 BT_PCM_IN 16 MF
NC 01005
94 148 33 IN
UART2_WLAN2SOC_TX 49 FAST_UART_TX
99 149 33 OUT
UART2_SOC2WLAN_TX 51 FAST_UART_RX
100 150
101 151
33 UART2_WLAN2SOC_RTS_L 52 FAST_UART_RTS_OUT
102 152 OUT
GPIO17 71 NC
103 153
33 UART2_SOC2WLAN_RTS_L 50 FAST_UART_CTS_IN
104 154 IN
105 155 46 33 11 IN
GPIO_SOC2WLAN_PCIE_DEV_WAKE 58 WL_DEV_WAKE WL_HOST_WAKE 59 PMU_GPIO_WLAN_HOST_WAKE
OUT 33 46
106 156
107 157 R7505
108 158 33 BT_HOST_WAKE 0.00 2
46 33 OUT
PMU_GPIO_BT_HOST_WAKE PCIE_CLKREQ* 68 PCIE_WLAN2SOC_CLKREQ_R_L 1 AP_PCIE_CLKREQ3_L BI 33
109 159 PCIE_PERST* 67 AP_PCIE_RESET3_L IN 33 0%
1/32W
110 160 NO_TEST=1 MF
RF_G_0_MOD_MATCH 28 2G_ANT_CORE0 PCI_PME* 2 NC
01005
36 BI
GND_VOID=TRUE
36 BI
RF_G_1_MOD_MATCH 65 2G_ANT_CORE1 PCIE_RDP 4 PCIE_SOC2WLAN_TX_P IN 33 46
NO_TEST=1
PCIE_RDN 5
B 36
NO_TEST=1
RF_A_0_MOD_MATCH 37 5G_ANT_CORE0 GND_VOID=TRUE
GND_VOID=TRUE
PCIE_SOC2WLAN_TX_N IN 33 46
B
BI
RF_A_1_MOD_MATCH 55 5G_ANT_CORE1 PCIE_TDP0 7 PCIE_WLAN2SOC_TX_P OUT 33
36 BI
NO_TEST=1 PCIE_TDN0 8 PCIE_WLAN2SOC_TX_N OUT 33
GND_VOID=TRUE
GND_VOID=TRUE
33 IN
GPIO_SOC_TO_BT_TO_TOUCH_TS_SYNC 41 BT_GPIO_3 PCIE_REFCLK_P 10 90_AP_PCIE3_REFCLK_P IN 33 CRITICAL
GPIO_TOUCH_TO_BT_SYNC 40 BT_GPIO_5 PCIE_REFCLK_N 11 90_AP_PCIE3_REFCLK_N
33 IN
GND_VOID=TRUE
IN 33 C7502
7.5UF
74 CXT_A_JTAG_TDI 46 AOP2RADIO_CONTEXT_A BI 33 20%
NC SPROM_CLK 4V
73 CXT_B_JTAG_TDO 45 AOP2RADIO_CONTEXT_B BI 33 CERM
NC SPROM_CS 0402
SWITCH_NODE=TRUE
72 SPROM_MISO SR_VLX 22 SRVLX 1 2 SRVLX1 1 3
NC DIDT=TRUE
75 SPROM_MOSI LQE2MKM-SM
NC VIN_LDO 24 2 4
2.2UH-20%-1.5A-0.2OHM
L7501
CRITICAL
VIN_LDO
MODULE: USI ALTERNATES FOR MUR

TABLE_ALT_HEAD

PART NUMBER
TABLE_ALT_ITEM
339S00447 339S00445 U7500 USI ALT FOR MUR

TABLE_ALT_ITEM
339S00448 339S00446 U7500 CIDRE USI ALT FOR MUR
MODULE: BOM OPTION FOR CIDRE IN MLB_A, NOT IN MLB_B LAST UPDATED: 06/15/2017
A PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
TABLE_5_HEAD
TABLE_5_ITEM PAGE TITLE
339S00445 1 YEBISU MURATA ES2 U7500 CRITICAL MLB_B
TABLE_5_ITEM
WIFI/BT: MODULE
339S00446 1 YEBISU CIDRE MURATA ES2 U7500 CRITICAL MLB_A DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

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WIFI/BT: J171 (WIFI/BT ONLY)RF FRONT END

D D
CRITICAL
L7602
1.3NH+/-0.1NH-1.1A WIFI/BT LEFT CHIN DUAL-BAND ANT (WF1) COAX CONNECTOR
RF_A_0_MOD_MATCH 1 2 RF_A_0_MOD_MATCH_DPLX
35 BI
0201 CRITICAL
CRITICAL OMIT
CRITICAL FL7600 CRITICAL
CRITICAL
1 C7603 1 C7605 DPX205950DT-9063B3SJ
C7614 J7602
0.2PF 0.3PF 0805 MM4829-2702B
+/-0.05PF +/-0.05PF 1.1NH-+/-0.05NH-1.1A-0.04OHM F-ST-SM
2 25V 2 25V 4
RF_0_LEFT_CHIN_ANT
COG-CERM
0201
C0G-CERM
0201 HI COM 2 RF_0_LEFT_CHIN_MATCH 1 2 1
CRITICAL 0201 NOSTUFF
6 LO CRITICAL
WIFI/BT CORE 0
4
3
2
GND
1 C7613 1 C7615
0.2PF 0.2PF
CRITICAL +/-0.05PF +/-0.05PF
1
3
5
2 25V
COG-CERM 2 25V
COG-CERM
L7606 0201 0201
1.7NH-+/-0.1NH-0.8A-0.07OHM
RF_G_0_MOD_MATCH 1 2 RF_G_0_MOD_MATCH_DPLX
35 BI
NOSTUFF 0201
CRITICAL CRITICAL
1 C7600 1 C7602
0.2PF 0.3PF
+/-0.05PF +/-0.05PF
2 25V
COG-CERM 2 25V
C0G-CERM
0201 0201
TABLE_5_HEAD
C 152S00150 1 IND,FILM,0.7NH,+/-0.05NH,1.1A,UH-Q,0201 C7614 CRITICAL

TABLE_5_ITEM
CRITICAL
L7604 WIFI RIGHT CHIN DUAL-BAND ANT (WF2) COAX CONNECTOR

1.0NH-+/-0.05NH-1.1A-0.04OHM
RF_A_1_MOD_MATCH 1 2 RF_A_1_MOD_MATCH_DPLX
35 BI
0201 CRITICAL
B NOSTUFF
CRITICAL CRITICAL
FL7601
DPX205950DT-9163A3SJ
CRITICAL CRITICAL
J7600
B
1 C7619 1 C7621 0805 L7603 MM4829-2702B
1.1NH-+/-0.05NH-1.1A-0.04OHM F-ST-SM
0.2PF 0.2PF RF_1_RIGHT_CHIN_MATCH
+/-0.05PF +/-0.05PF 6 HI COM 2 1 2 RF_1_RIGHT_CHIN_ANT 1
2 25V
COG-CERM 2 25V
COG-CERM 0201
0201 0201 4 CRITICAL
LO CRITICAL NOSTUFF
WIFI CORE 1
4
3
2
GND
1 C7622 1 C7624
0.2PF 0.2PF
+/-0.05PF +/-0.05PF
1
3
5
CRITICAL 2 25V
COG-CERM 2 25V
COG-CERM
L7605 0201 0201
1.5NH+/-0.1NH-1.0A
35 RF_G_1_MOD_MATCH 1 2 RF_G_1_MOD_MATCH_DPLX
BI
CRITICAL 0201 CRITICAL
NOSTUFF
1 C7616 1 C7618
0.2PF 0.4PF
+/-0.05PF +/-0.05PF
2 25V
COG-CERM 2 25V
C0G
0201 201
LAST UPDATED: 11/08/2018

A SYNC_MASTER=J171/MLB_A SYNC_DATE=10/24/2018 A
PAGE TITLE
WIFI/BT: J171 FRONT END

DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

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OMIT PPVDD_CPU
46 48
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
1 C8100 1 C8101 1 C8102 1 C8103 1 C8104 1 C8105 1 C8106
U8100 15UF
20%
15UF
20%
15UF
20%
15UF
20%
15UF
20%
15UF
20%
15UF
20%
D2365A080FOAVBA2 CRITICAL 2 4V 2 4V 2 4V 2 4V 2 4V 2 4V 2 4V
WLCSP CERM CERM CERM CERM CERM CERM CERM
48
PPVCC_MAIN E1 VDD_BUCK0_01 SYM 2 OF 6 BUCK0_LX0 D1 BUCK0_LX0
0.82UH-20%-4.7A-0.038OHM 1 2 L8100 0402 0402 0402 0402 0402 0402 0402
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL E2 VDD_BUCK0_01 D2 SWITCH_NODE=TRUE PIEA25201D
1 1 1 1 1 BUCK0_LX0 DIDT=TRUE CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
C81A0
10UF
C81A1
10UF
C81A2
10UF
C81A3
10UF
C81A4
10UF E3 VDD_BUCK0_01 BUCK0_LX0 D3 CRITICAL 1
C8107 1
C8108 1
C8109 1
C810A 1
C810B 1
C810C 1
C810D
20%
6.3V
20%
6.3V
20%
6.3V
20%
6.3V
20%
6.3V BUCK0_LX1 F1 BUCK0_LX1
0.82UH-20%-4.7A-0.038OHM 1 2 L8101 15UF
20%
15UF
20%
15UF
20%
15UF
20%
15UF
20%
15UF
20%
15UF
20%
2 CERM-X5R 2 CERM-X5R 2 CERM-X5R 2 CERM-X5R 2 CERM-X5R F2 SWITCH_NODE=TRUE PIEA25201D 4V 4V 4V 4V 4V 4V 4V
0402 0402 0402 0402 0402 BUCK0_LX1 DIDT=TRUE 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
J1 VDD_BUCK0_23 F3 CRITICAL 0402 0402 0402 0402 0402 0402 0402
BUCK0_LX1
J2 VDD_BUCK0_23 H1 0.82UH-20%-4.7A-0.038OHM 1 2 L8102 D
D J3 VDD_BUCK0_23
BUCK0_LX2
BUCK0_LX2 H2
BUCK0_LX2
SWITCH_NODE=TRUE
DIDT=TRUE
PIEA25201D
1
CRITICAL
C810E 1
CRITICAL
C810G
CRITICAL
1 C810H 1
CRITICAL
C810J 1
CRITICAL
C810K 1 C810F
H3 CRITICAL
BUCK0_LX2 15UF 15UF 15UF 15UF 15UF 100PF
BUCK0_LX3 K1 BUCK0_LX3
0.82UH-20%-4.7A-0.038OHM 1 2 L8103 2
20%
4V 2
20%
4V 2
20%
4V 2
20%
4V 2
20%
4V 2
5%
16V
PPVCC_MAIN N1 VDD_BUCK1_01 K2 SWITCH_NODE=TRUE PIEA25201D CERM CERM CERM CERM CERM NP0-C0G
48 BUCK0_LX3 DIDT=TRUE 0402 0402 0402 0402 0402 01005-1
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL N2 VDD_BUCK1_01 K3
1 1 1 1 1 BUCK0_LX3 XW8100
C81B0
10UF
C81B1
10UF
C81B2
10UF
C81B3
10UF
C81B4
10UF N3 VDD_BUCK1_01 BUCK0_FB F5 BUCK0_FB 1 2
20% 20% 20% 20% 20%
6.3V 6.3V 6.3V 6.3V 2 6.3V SM
2 CERM-X5R 2 CERM-X5R 2 CERM-X5R 2 CERM-X5R CERM-X5R
0402 0402 0402 0402 0402
U1 VDD_BUCK1_23
U2 VDD_BUCK1_23
U3 VDD_BUCK1_23 PPVDD_GPU
39 46 48
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
CRITICAL
0.82UH-20%-4.7A-0.038OHM 1 2 L8110 1 C8110 1 C8111 1 C8112 1 C8113 1 C8114 1 C8115 1 C8116
PPVCC_MAIN BUCK1_LX0 M1 BUCK1_LX0 15UF 15UF 15UF 15UF 15UF 15UF 15UF
48
V9 VDD_BUCK2 SWITCH_NODE=TRUE PIEA25201D 20% 20% 20% 20% 20% 20% 20%
CRITICAL CRITICAL BUCK1_LX0 M2 DIDT=TRUE 2 4V 2 4V 2 4V 2 4V 2 4V 2 4V 2 4V
1 1 W9 VDD_BUCK2 CRITICAL CERM CERM CERM CERM CERM CERM CERM
C81B8 C81B9 BUCK1_LX0 M3 0402 0402 0402 0402 0402 0402 0402
10UF
20%
10UF
20% BUCK1_LX1 P1 BUCK1_LX1
0.82UH-20%-4.7A-0.038OHM 1 2 L8111 CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
6.3V 6.3V PIEA25201D 1 1 1 1 1 1 1
VCC_MAIN
SWITCH_NODE=TRUE
2 CERM-X5R 2 CERM-X5R BUCK1_LX1 P2 DIDT=TRUE C8117 C8118 C8119 C811A C811B C811C C811D
A15 VDD_BUCK3
BUCK
0402 0402 P3 CRITICAL 15UF 15UF 15UF 15UF 15UF 15UF 15UF
B15 VDD_BUCK3 BUCK1_LX1 20% 20% 20% 20% 20% 20% 20%
BUCK1_LX2 T1 BUCK1_LX2
0.82UH-20%-4.7A-0.038OHM 1 2 L8112 2
4V
CERM 2
4V
CERM 2
4V
CERM 2
4V
CERM 2
4V
CERM
4V
2 CERM 2
4V
CERM
PPVCC_MAIN T2 SWITCH_NODE=TRUE PIEA25201D 0402 0402 0402 0402 0402 0402 0402
48 BUCK1_LX2 DIDT=TRUE
CRITICAL CRITICAL CRITICAL T3 CRITICAL
1
C81C0 1
C81C1 1
C81C2 1 C81CE 1 C81CF A7 VDD01_BUCK4 BUCK1_LX2
0.82UH-20%-4.7A-0.038OHM 1 2 L8113 CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
82PF 18PF BUCK1_LX3 V1 BUCK1_LX3 1 C811E 1 C811G 1 C811H 1 C811J 1 C811K 1 C811F
150UF 150UF 150UF 5% 5% B7 VDD01_BUCK4 SWITCH_NODE=TRUE PIEA25201D
20% 20% 20% 2 6.3V 2 16V BUCK1_LX3 V2 DIDT=TRUE 15UF 15UF 15UF 15UF 15UF 100PF
2 6.3V 2 6.3V 2 6.3V NP0-C0G NP0/C0G
V3 20% 20% 20% 20% 20% 5%
TANT-POLY TANT-POLY TANT-POLY 01005 01005 BUCK1_LX3 XW8110 2 4V 2 4V 2 4V 2 4V 2 4V 2 16V
CASE-B3-1 CASE-B3-1 CASE-B3-1 P5 CERM CERM CERM CERM CERM NP0-C0G
A11 VDD_BUCK57 BUCK1_FB BUCK1_FB 1 2 0402 0402 0402 0402 0402 01005-1
C 1
CRITICAL
C81D0 1
CRITICAL
C81D1 1
CRITICAL
C81D2 1 C81D3
CRITICAL
1
CRITICAL
C81D4 1
CRITICAL
C81D5 1
CRITICAL
C81D6 1
CRITICAL
C81D7 B11 VDD_BUCK57 SM C
10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF
20% 20% 20% 20% 20% 20% 20% 20%
2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V
CERM-X5R CERM-X5R CERM-X5R CERM-X5R CERM-X5R CERM-X5R CERM-X5R CERM-X5R
V13 VDD_BUCK6
0402 0402 0402 0402 0402 0402 0402 0402
W13 VDD_BUCK6
CRITICAL
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
1
C81D8 1
C81D9 1
C81DA 1
C81DB 1
C81DC 1
C81DD 1
C81DE 1
C81DF U15 VDD_BYP_BUCK6 BUCK2_LX0 V8 BUCK2_LX0
1UH-20%-3.51A-0.044OHM 1 2 L8120 PPVDD_S1_SOC
46 48
10UF 10UF 10UF 10UF 10UF 10UF 10UF 10UF V15 VDD_BYP_BUCK6 W8 SWITCH_NODE=TRUE PIEA021D-SM CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
20% 20% 20% 20% 20% 20% 20% 20% BUCK2_LX0 DIDT=TRUE 1 1 1 1 1
2
6.3V
CERM-X5R 2
6.3V
CERM-X5R 2
6.3V
CERM-X5R 2
6.3V
CERM-X5R 2
6.3V
CERM-X5R 2
6.3V
CERM-X5R 2
6.3V
CERM-X5R 2
6.3V
CERM-X5R
W15 VDD_BYP_BUCK6 BUCK2_LX1 V10 BUCK2_LX1
1UH-20%-3.51A-0.044OHM 1 2 L8121 C8120
15UF
C8121
15UF
C8122
15UF
C8123
15UF
C8124
15UF
0402 0402 0402 0402 0402 0402 0402 0402 W10 SWITCH_NODE=TRUE PIEA021D-SM 20% 20% 20% 20% 20%
BUCK2_LX1 DIDT=TRUE XW8120 4V 4V 4V 4V 4V
V5 VDD_BUCK8 BUCK2_FB R10 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM
CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL BUCK2_FB 1 2 0402 0402 0402 0402 0402
1 C81E0 1 C81E1 1 C81E2 1 C81E3 1 C81E4 1 C81E5 1 C81EA W5 VDD_BUCK8 SM
10UF 10UF 10UF 10UF 10UF 10UF 1.0UF U17 VDD_MAIN_S
2
20%
6.3V 2
20%
6.3V 2
20%
6.3V 2
20%
6.3V 2
20%
6.3V 2
20%
6.3V 2
20%
6.3V FOR THE PMU TO SENSE THE PLANE
1 C8125 1 C8126 1 C8180 1 C812F
CERM-X5R CERM-X5R CERM-X5R CERM-X5R CERM-X5R CERM-X5R X5R G13 15UF 15UF 15UF 100PF
0402 0402 0402 0402 0402 0402 0201-1 VDD_MAIN 20% 20% 20% 5%
G5 2 4V 2 4V 2 4V 2 16V
VDD_MAIN CERM CERM CERM NP0-C0G
R6 0402 0402 0402 01005-1
VDD_MAIN CRITICAL
V16 VDD_MAIN 1UH-20%-3.51A-0.044OHM 1 2 L8130 PP1V8_S2
V17 BUCK3_LX0 A14 BUCK3_LX0 46 48
VDD_MAIN SWITCH_NODE=TRUE PIEA021D-SM CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
V18 BUCK3_LX0 B14 DIDT=TRUE XW8130 1 1 1 1 1 1 1
VDD_MAIN
BUCK3_FB D14 BUCK3_FB 1 2
C8130
15UF
C8131
15UF
C8132
15UF
C8133
15UF
C8134
15UF
C8135
15UF
C813F
100PF
V19 VDD_MAIN 20% 20% 20% 20% 20% 20% 5%
SM 4V 4V 4V 4V 4V 4V 16V
2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 CERM 2 NP0-C0G
0402 0402 0402 0402 0402 0402 01005-1
B B
BUCK4_LX0 A8 BUCK4_LX0 43
BUCK4_LX0 B8 BUCK4_LX0 43
CRITICAL BUCK4_FB E7 BUCK4_FB 43
L8170
PPVDD_CPU_SRAM 1 2 1.0UH-3.33A-66MOHM A10
48 46 BUCK7_LX0 BUCK7_LX0
CRITICAL CRITICAL CRITICAL CRITICAL PILE20161D-SM SWITCH_NODE=TRUE
B10
1 1 1 1 1 XW8170 DIDT=TRUE BUCK7_LX0
C8170
15UF
C8171
15UF
C8172
15UF
C8173
15UF
C817F
100PF 1 2 BUCK7_FB E9 BUCK7_FB
20% 20% 20% 20% 5% SM
4V 4V 4V 4V 16V
2 CERM 2 CERM 2 CERM 2 CERM 2 NP0-C0G
0402 0402 0402 0402 01005-1
BUCK5_FB E10 BUCK5_FB 43
43 BUCK8_LX0 V6 BUCK8_LX0
43 BUCK8_LX0 W6 BUCK8_LX0
43 BUCK8_FB R7 BUCK8_FB L8160
VBUCK6_BYP U14
PP3V3_S2
VBUCK6_BYP V14 CRITICAL 46 48
1UH-20%-3.51A-0.044OHM CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
VBUCK6_BYP W14 1 1 1 1 1 1 1 1 1 1 1
BUCK6_LX0 1 2 C8160
15UF
C8161
15UF
C8162
15UF
C8163
15UF
C8164
15UF
C8165
15UF
C8166
15UF
C8181
15UF
C8182
15UF
C8183
15UF
C816A
100PF
BUCK6_LX0 V12 SWITCH_NODE=TRUE PIEA021D-SM 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 5%
DIDT=TRUE 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 16V
BUCK6_LX0 W12 XW8160 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 NP0-C0G
0402-1 0402-1 0402-1 0402-1 0402-1 0402-1 0402-1 0402-1 0402-1 0402-1 01005-1
BUCK6_FB R12 BUCK6_FB 1 2
A SM SYNC_MASTER=J171/MLB_B SYNC_DATE=10/24/2018 A
PAGE TITLE
POWER: ANGEL (1/5)

DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

PAGE
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8 7 6 5 4 3 2 1
CRITICAL
TABLE_ALT_HEAD

U8100 PART NUMBER
D2365A080FOAVBA2 VSS M19 TABLE_ALT_ITEM
WLCSP L5 CRITICAL 138S0703 138S0648 C8233 AND 7 MORE REFDES

SYM 6 OF 6 VSS
C1 VSS(VSS_BUCK0_0) VSS E11
C2 VSS(VSS_BUCK0_0) E12
C3 VSS(VSS_BUCK0_0)
VSS
VSS E6 LDO INPUTS U8100
D2365A080FOAVBA2
LDO OUTPUTS
VSS F10 PPVCC_MAIN WLCSP PP3V0_S2_TRISTAR
G1 VSS(VSS_BUCK0_12) 48
E14 VDD_LDO1 VLDO1 E15 (50MA; 2.5-3.3V) 46 48
VSS F11 PP1V8_S2 SYM 3 OF 6
G2 VSS(VSS_BUCK0_12) 48
E13 VDD_LDO2 VLDO2 F13 (100MA; 1.65-1.8V) 46 48
VSS F12 CRITICAL CRITICAL
G3 VSS(VSS_BUCK0_12) 1 1 D18 VDD_LDO34 PP1V8_S2_VA_VCP
G16 C8290 C8291 C8204 C8200
D L1 VSS(VSS_BUCK01)
VSS
VSS G18 1UF
10%
1UF
10%
1
20UF
1
2.2UF
ACTIVE - BYPASS MODE (1.8V) D
6.3V 6.3V F18 VDD_LDO5 20% 10% HIBERNATE - LDO MODE (1.7V)
L2 VSS(VSS_BUCK01) VSS H13 CERM 2 CERM 2 2 6.3V 2 6.3V
402 402 J18 VDD_LDO6 CERM-X5R X5R
L3 VSS(VSS_BUCK01) VSS H14
LDO OUTPUT
J15 0402 402
VDD_LDO7
LDO INPUT
VSS H18
R1 VSS(VSS_BUCK1_12) G14 VDD_LDO8
VSS P19 PP3V3_USB
R2 VSS(VSS_BUCK1_12) F16 VDD_LDO9 (50MA; 2.5-3.3V) VLDO3 C18 48
VSS J11 PP1V1_S2 PP3V0_ALS
R3 VSS(VSS_BUCK1_12) 48
B18 VDD_LDO10 VLDO4 D17 (50MA; 2.5-3.3V) 46 48
VSS J12 CRITICAL CRITICAL
1 B19 VDD_LDO10
W1 VSS(VSS_BUCK1_3) VSS J14 C8292 1 C8212 1 C8213
1UF F17 VDD_LDO11
W2 VSS(VSS_BUCK1_3) VSS J19 10% 2.2UF 2.2UF
6.3V J16 VDD_LDO13 10% 10%
W3 VSS(VSS_BUCK1_3) VSS K11 CERM 2 2 6.3V 2 6.3V
402 D19 VDD_LDO14 X5R X5R
VSS K12 402 402
V11 VSS(VSS0_BUCK26) F19 VDD_LDO15
VSS K13
W11 VSS(VSS0_BUCK26) F14 VDD_LDO16
VSS K14
V7 VSS(VSS_BUCK28) K15 (1000MA; 2.5-3.6V) VLDO5 E18 NC
VSS PP3V3_ACC
W7 VSS(VSS_BUCK28) L11 VLDO6 J17 (150MA; 2.5-3.6V) 46 48
VSS PP1V8_S2 A2 CRITICAL
L14 48 VBUCK3
A13 VSS(VSS0_BUCK35) VSS
1 1 A3 VBUCK3
1 C8220
VSS L15 C8293 C8295 10UF
B13 VSS(VSS0_BUCK35) 1.0UF 1.0UF 20%
VSS M11 20% 20% 2 6.3V
A9 VSS(VSS0_BUCK47) M14 6.3V 6.3V CERM-X5R
VSS X5R 2 X5R 2 0402
B9 VSS(VSS0_BUCK47) M15 0201-1 0201-1
VSS
VSS N10 PP3V0_S2_MISC
A5 VSS(VSS1_BUCK4) VLDO7 H15 (300MA; 2.5-3.3V)
VSS N11
B5 VSS(VSS1_BUCK4) VLDO8 G15 (300MA; 2.5-3.3V) 48
VSS N14 CRITICAL CRITICAL
PP1V1_S2 PP3V1_S2_MESA
SWITCHED INPUT
B16 VSS_LCM_SW VSS P10 48
B4 VBUCK4 1 C8228 1 C8224
VSS P11 1 10UF 10UF
VSS R8 C8294
1.0UF 2
20%
6.3V 2
20%
6.3V
C VSS U19
V4
20%
6.3V
X5R 2
CERM-X5R
0402-9
CERM-X5R
0402-9
NOSTUFF
C
VSS 0201-1
VSS W4 PP1V25_REAR_CAM
VLDO9 E16 (300MA; 1.2-3.0V) 48
VSS L4
C10 VSS_NC VLDO10 A17 (1335MA; 0.7-1.2V) 46 48
VSS C17 CRITICAL CRITICAL
C11 VSS_NC B1 VPUMP VLDO10 A18 PP0V9_NAND
C12 VSS_NC B2 VPUMP VLDO10 A19 1 C8236 1 C8233 1
C8232
C13 M4 PMU_VPUMP 10UF 4.7UF 100PF
VSS_NC VSS_NC 20% 20% 5%
C5 N16 2 6.3V 2 6.3V 2 16V
VSS_NC VSS_NC CERM-X5R X5R NP0-C0G
C6 N4 0402-9 402 01005-1
VSS_NC VSS_NC 1
C7 VSS_NC
C8299
0.1UF
C8 P4 10%
VSS_NC VSS_NC 6.3V
C9 R4 X5R 2
VSS_NC VSS_NC 0201
D10 T4 PP2V6_CAM_AF
VSS_NC VSS_NC VLDO11 E17 (300MA; 1.7-3.0V) 48
D11 VSS_NC VSS_NC U10 VLDO13 H16 (300MA; 1.7-3.0V) 46 48
D12 VSS_NC VSS_NC U11 CRITICAL CRITICAL PP2V9_CAM
C14 U12 1 1
VSS_NC VSS_NC C8244
10UF
C8240
10UF
D4 VSS_NC VSS_NC U13 20% 20%
F4 U4 6.3V 6.3V
VSS_NC VSS_NC 2 CERM-X5R 2 CERM-X5R
G4 U5 0402-9 0402-9
VSS_NC VSS_NC
H4 VSS_NC VSS_NC U6
J4 U7 PP1V2_SOC
VSS_NC VSS_NC VLDO14 C19 (300MA; 0.8-1.5V) 46 48
K4 VSS_NC VSS_NC U8 VLDO15 E19 (100MA; 0.7-1.2V) 46 48
VSS_NC U9 CRITICAL CRITICAL PP0V8_S2_SOC_AOP

1 1
C8252
1.0UF
C8248
2.2UF
20% 10%
6.3V 6.3V
VOLTAGE=0V 2 X5R 2 X5R
B 0201-1 402
B
PP1V825_S2_MESA
VLDO16 F15 (50MA; 1.7-3.0V) 48
ON_BUF R15 (10MA; 1.8V;) 46 48

CRITICAL CRITICAL
PP1V8_ALWAYS
1 C8260 1 C8256
0.22UF 4.7UF
20% 20%
2 6.3V 2 6.3V
X5R X5R
0201 402
BUCK3_SW1 A1
E4 PP1V8_SW1
BUCK3_SW1 46 48
BUCK3_SW2 A4
NC PP1V8_S2_SW3
BUCK3_SW3 B3 46 48
SWITCHED OUTPUT
1 C8278 1 C8270
1.0UF 1UF
20% 10%
2 6.3V 2 6.3V
X5R CERM
0201-1 402
BUCK4_SW2 C4 NC
PAGE TITLE
POWER: ANGEL (2/5)

DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

PAGE
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8 7 6 5 4 3 2 1
48 45 39 16 6 PP1V8_S2
48 10 PP1V8_ALWAYS 1
R8399
0.00
R8390
100K
16 USB_TS_TO_PMU_BRICKID 1 2 1 5% CRITICAL
IN
0%
R8391
100K
1/32W
MF
1/32W 5% 01005
MF 1/32W 2
01005
C8301 1 MF
01005
U8100
0.01UF 2 D2365A080FOAVBA2
10% P9 WLCSP
6.3V 31 IN GPIO_BTN_HOME_L BUTTON1 SYM 5 OF 6 IREF J13 PMU_IREF
X5R 2 P8
01005 24 IN GPIO_BTN_ONOFF_L BUTTON2 VREF N15 PMU_VREF
NC_PMU_BTN3 P7 BUTTON3 DIGITAL INPUT REFERENCES
NC_PMU_BTN4
NO_TEST=1
P6 BUTTON4 VDD_REF R14 PMU_VDD_REF
PP1V8_S2 NO_TEST=1
D
48 45 39 16 6
PP1V8_EXT_SW1
USB_TS_TO_PMU_BRICKID_R R13 BRICK_ID
VDD_REF_A T15
1 C8307
1.0UF
1
C8399
1.0UF
D
48 10 8 7 4
L13 ADC_IN7 ANALOG INPUT 20% 20%
M13 ADC_IN31 VDD_RTC P14 PMU_VDD_RTC 6.3V 6.3V 1
NOSTUFF
1
1
R8370 1 C8306 2 X5R
0201-1
2 X5R
0201-1 1
R8303
R8372
100K
10K
5% SOCHOT0_PMU_TO_SOC_L_R P12 PRE_UVLO 0.22UF
C8305
0.1UF
200K
0.5%
5% 1/32W (SYS_ALIVE) T5 SYS_ALIVE* 20% 10% 1/20W
1/32W MF 2 6.3V 6.3V MF
MF 01005 M10 CRASH* X5R 2 CERM-X5R 2 0201
01005 2 NC_PMU_CRASH 0201 0201
2
R8371
0.00 NC_BUCK_LDO_UOV
NO_TEST=1
L12 BUCK_LDO_UOV
46 10 OUT SOCHOT0_PMU_TO_SOC_L 1 2 MF NO_TEST=1
M12 BUCK_SLPD_MUX 32K CLK OUT_32K H17 PMU_GPIO_CLK_32K_WLAN OUT 33
01005 0% 1/32W NC_BUCK_SLPD_MUX
14 5 SYSTEM_ALIVE
SLEEP_32K G17
OUT NO_TEST=1
K10 CLK_PMU_TO_AOP_32K OUT 12 46

43 OUT GPIO_PMU_TO_SOC_GPU_UV_WARN_L BUCK01_UV_WARN*
43 GPIO_PMU_TO_SOC_GPU_IPEAK_L L10 BUCK01_IPEAK*
OUT
XW8391 47 39 13 ADC_SOC_TO_PMU_VDD_GPU J5 BUCK01_SNSN GPIO1 M7 GPIO_HALL_BUTTON_TO_PMU_IRQ 24 46
IN IN
PPVDD_GPU SM VOLTAGE=1.2V
K5 L7
48 46 37 1 2 PPVDD_BUCK1_SENSE BUCK01_SNSP GPIO2 GPIO_PMU_TO_ACC_PWR_SW OUT 16
GPIO3 M6 GPIO_ACC_TO_PMU_PWR_SW_OC_L 16
IN
(INTERNAL PD)
6 GPIO_SOC_TO_PMU_WDOG_RESET R9 RESET_IN1 GPIO4 L9 GPIO_BELFIELD_TO_PMU_WAKE_L 18
IN IN
16 RESET_TS_TO_PMU R11 RESET_IN2 GPIO5 M8 NC_PMU_GPIO5
IN
10 SOCHOT1_SOC_TO_PMU_L R5 RESET_IN3 GPIO6 L6 UART5_BATT_RTXD 11 45
IN BI
46 12 6 RESET_PMU_TO_SYSTEM_L N12 RESET* GPIO7 L8 PMU_GPIO_BT_HOST_WAKE 33
OUT IN
(PU IN SOC)
11 GPIO_PMU_TO_SOC_IRQ_L H12 IRQ* RESET GPIO GPIO8 M9 PMU_GPIO_WLAN_HOST_WAKE 33
OUT IN
4 NC_PMU_SHUTDOWN G12 SHDWN GPIO9 K8 NC_PMU_GPIO_BB2PMU_HOST_WAKE
IN
GPIO10 K9 GPIO_CODEC_TO_PMU_WAKE_L 18 46
47 12 GPIO_AOP_TO_PMU_SLEEP1_REQUEST M5 SLEEP1_REQ
IN
IN
GPIO11 K7 GPIO_HALL_AJ_TO_PMU_IRQ 17 46
47 14 12 GPIO_PMU_TO_SYS_SLEEP1_READY N5 SLEEP_1_RDY
IN
OUT
GPIO12 K6 GPIO_TS_TO_SOC_TO_PMU_IRQ 11 16
47 12 GPIO_AOP_TO_PMU_ACTIVE_REQUEST H5 ACTIVE_REQ
IN
IN
GPIO13 J7 GPIO_ORION_TO_SOC_TO_PMU_IRQ 12 16
47 16 12 6 GPIO_PMU_TO_SYSTEM_ACTIVE_READY J6 ACTIVE_RDY
IN
OUT
GPIO14 J8 PMU_GPIO_BT_REG_ON 33
OUT
4 I2C0_SCL_1V8 G10 SCL GPIO15 G7 PMU_GPIO_WLAN_REG_ON 33
IN OUT
C 4 BI I2C0_SDA_1V8 G11 SDA GPIO16 G8

G9
GPIO_PMU_TO_NAND_LOW_BATT_L OUT 5 OTP FOR GPIO16 SHOULD BE OUTPUT LOW C
H10 MOSI I2C&SPI GPIO17 GPIO_PMU_TO_ROTTERDAM_EN OUT 34
47 10 IN SPI_SOC_TO_PMU_DATA J9
H11 MISO GPIO18 GPIO_FORCE_DFU OUT 11 46
47 10 OUT SPI_PMU_TO_SOC_DATA J10
F9 SCK GPIO19 GPIO_PMU2BEACON_EN OUT 44
47 46 10 IN SPI_SOC_TO_PMU_SCLK H6
GPIO20 GPIO_PMU_TO_1V1_EXT_SW_ON OUT 42
GPIO21 H7 GPIO_PMU_TO_ORION_HWEN 16
NC_PA_NTC T13 TDEV1 OUT
GPIO22 H8 GPIO_PMU_TO_3V3_EXT_SW_ON 42
OUT
GPIO23 G6 GPIO_PMU2LCD_PWREN 32
OUT
1 H9
GPIO24 NC_PMU_GPIO24
CRITICAL
1
100K 1
R8392 2 MF
R8328 C8328
100PF BOARD_TEMP2_P T12 TDEV2 01005 5% 1/32W
XW8328 D9
10KOHM-1%-0.31MA 5% SHORT-10L-0.1MM-SM AMUX_A0 ADC_SOC_TO_PMU_ANALOGMUX_OUT 6
0201 16V 1 2 D8
NO_XNET_CONNECTION=1 2 NP0-C0G BOARD_TEMP2_N AMUX_A1 ADC_SOC_TO_PMU_VDD_CPU 13 47
01005-1 D7
2 NO_XNET_CONNECTION=1 NO_XNET_CONNECTION=1 AMUX_A2 ADC_SOC_TO_PMU_VDD_GPU 13 39 47
(TEMP2 - NEAR DISPLAY CONN) PLACE CAPS AND XWS NEAR PMU AMUX_A3 D6 ADC_SOC_TO_PMU_VDD_SOC 13
T11 TDEV3 ANALOG MUX AMUX_AY D5 NC_AMUX_AY NO_TEST=1
1 E8
AMUX_B0 NC_AMUX_B0 NO_TEST=1
CRITICAL F8
R8321 1 C8321 AMUX_B1 NC_AMUX_B1 NO_TEST=1
100PF 46 BOARD_TEMP3_P XW8321 AMUX_B2 F7 NC_AMUX_B2 NO_TEST=1

10KOHM-1%-0.31MA 5% SHORT-10L-0.1MM-SM T10 TDEV4 F6
2 16V 1 2 AMUX_B3 NC_AMUX_B3 NO_TEST=1
0201 NP0-C0G BOARD_TEMP3_N E5
NO_XNET_CONNECTION=1 01005-1 AMUX_BY NC_AMUX_BY NO_TEST=1
2 NO_XNET_CONNECTION=1 NO_XNET_CONNECTION=1 TEMPERATURE
(TEMP3 - NEAR WIFI) G19
XTAL1 PMU_EXTAL
CRYSTAL H19
T9 TDEV5 XTAL2 PMU_XTAL CRITICAL
1 Y8300
32.768K-20PPM-12.5PF
CRITICAL BUTTONO1 N8 PMU_TO_AP_BUF_BTN_HOME_L 11 47 1 2
R8322 C8322 BUTTONO2 N7 PMU_TO_AP_BUF_BTN_ONOFF_L
B 1
100PF
46 BOARD_TEMP4_P XW8322
SHORT-10L-0.1MM-SM
DIGITAL OUTPUT
BUTTONO3 N6 NC_PMU_BUTTONO3
11 47
CRITICAL
2012-1
CRITICAL
B
10KOHM-1%-0.31MA 5% BOARD_TEMP4_N 1 2
0201 2 16V T8 TDEV6 NO_TEST=1
1 C8316 C8315 1
NP0-C0G
FORCE_SYNC N9
NO_XNET_CONNECTION=1 NO_XNET_CONNECTION=1
2 01005-1 NC_PMU_FORCE_SYNC 18PF 18PF
NO_XNET_CONNECTION=1 NOTE: INTERNAL PU/PD PROGRAMMABLE NO_TEST=1 5% 5%
(TEMP4 - NEAR FRONT CAM) 2 25V 25V 2
C0G-CERM C0G-CERM
0201 0201
T7 TDEV7
1
CRITICAL 46 BOARD_TEMP5_P
R8323 1 C8323 XW8323
SHORT-10L-0.1MM-SM
100PF 1 2
10KOHM-1%-0.31MA 5% BOARD_TEMP5_N
2 16V T6 TDEV8
0201 NP0-C0G NO_XNET_CONNECTION=1
NO_XNET_CONNECTION=1 01005-1
2 NO_XNET_CONNECTION=1
(TEMP5 - NEAR NAND) N13 TBAT

46 45 BATT_NTC
1 PMU_TCAL P13 TCAL V1V2_BUFF D15 PP1V2_BUFF 48
CRITICAL CRITICAL
R8324 1 C8324 46 BOARD_TEMP6_P
1
2
R8340 1 C8350
XW8324
10KOHM-1%-0.31MA
100PF
5%
SHORT-10L-0.1MM-SM C8340
100PF 3.92K
0.1%
0.22UF
20%
2 16V BOARD_TEMP6_N 1 2 5% 0201 2 6.3V
0201 NP0-C0G 16V 1/20W X5R
NO_XNET_CONNECTION=1 01005-1 NO_XNET_CONNECTION=1 NP0-C0G 2 MF 01005-1
2 NO_XNET_CONNECTION=1 01005-1 1
(TEMP6 - NEAR REAR CAM) RESISTOR FOR TEMP CALIBRATION
1
CRITICAL
R8325 1 C8325 BOARD_TEMP7_P
46 XW8325
100PF SHORT-10L-0.1MM-SM
10KOHM-1%-0.31MA 5% 1 2
2 16V BOARD_TEMP7_N
A NO_XNET_CONNECTION=1
0201 NP0-C0G
01005-1 NO_XNET_CONNECTION=1 SYNC_MASTER=J171/MLB_B SYNC_DATE=10/24/2018 A
2 NO_XNET_CONNECTION=1
PAGE TITLE
(TEMP7 - NEAR PMU) TABLE_ALT_HEAD
PART NUMBER ALTERNATE FOR

PART NUMBER
BOM OPTION REF DES COMMENTS:
POWER: ANGEL (3/5)
1 TABLE_ALT_ITEM
DRAWING NUMBER SIZE

197S0399 197S0392 Y8300 RDAR://PROBLEM/9936684
CRITICAL 051-04464 D
R8326 1
C8326 Apple Inc. REVISION
100PF 46 BOARD_TEMP8_P
10KOHM-1%-0.31MA
5%
16V
XW8326
SHORT-10L-0.1MM-SM 118S0764 118S0717 R8340
RDAR://PROBLEM/8380367
TABLE_ALT_ITEM
4.0.0
0201 2 NP0-C0G NOTICE OF PROPRIETARY PROPERTY: BRANCH
NO_XNET_CONNECTION=1 01005-1 BOARD_TEMP8_N 1 2 R8321-R8328 RDAR://PROBLEM/8380367
TABLE_ALT_ITEM
2 NO_XNET_CONNECTION=1 107S0150 107S0208 THE INFORMATION CONTAINED HEREIN IS THE

NO_XNET_CONNECTION=1 PROPRIETARY PROPERTY OF APPLE INC.
(TEMP8 - NEAR SOC) THE POSESSOR AGREES TO THE FOLLOWING: PAGE
83 OF 121
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D D
CRITICAL
U8100
D2365A080FOAVBA2
N18 VDD_HI WLCSP PPVCC_MAIN
41 PMU_VCENTER SYM 4 OF 6 VDD_LCM_SW B17 42 48
VDD_BOOST_LCM C16 NC_PMU_BOOST_LCM

NO_TEST=1
BOOST_LCM_LX A16 NC_PMU_BOOST_LCM_LX

C NO_TEST=1
C
LCM/GRAPE
VDD_LCM D16 NC_PMU_VDD_LCM
NO_TEST=1
VLCM1 C15 NC_PMU_VLCM1

NO_TEST=1
LCM2_EN D13
B B
PAGE TITLE
POWER: ANGEL (4/5)

DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

PAGE
84 OF 121
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CRITICAL
L8512
1UH-20%-6.5A-0.026OHM CRITICAL
PPVCC_MAIN 1 2
48 46 16 SW_CHGA
PIEA041D-SM CRITICAL K U8100
D8500 DIDT=TRUE
D2365A080FOAVBA2
SOD-123W SWITCH_NODE=TRUE WLCSP
D 1 2 3
PMEG4030ER
A K19 CHG_LX0
SYM 1 OF 6 D
S L19 CHG_LX1
4 G CRITICAL R19 CHG_LX2
Q8504 T19 CHG_LX3
FDMC6688P
MLP3.3X3.3
R8572
0
46 45 BATT_SNS 1 2 BATT_SNS_R P15 VBAT
5% 1 NOSTUFF 1 U18 IBAT_S
D 1/20W
RDSON=0.0136@VGS=-2.5V
ID=12.0A
5 MF
0201
C8549
0.022UF
R8573 W16 IBAT0
2 10% 499 W17
25V 1% IBAT1
X7R 1/20W W18
0402 2 MF IBAT2
PPBATT_VCC 201 W19
48 46 41 IBAT3
ACT_DIO U16 ACT_DIO
K18 VCENTER0
XW8514 LAYOUT NOTE: PLACE L18 VCENTER1
SM VOLTAGE=6.0V
M18 VCENTER2
USB_VBUS_DETECT 1 2
RIGHT AT THE PIN
6 PMU_VCENTER
OMIT OMIT
P18 VCENTER4
1 C8547 1 C8548 R18 VCENTER5
TABLE_5_HEAD

20% 20% T18 VCENTER6
2 35V
X5R-CERM 2 35V
X5R-CERM
USB/BAT
TABLE_5_ITEM
138S0709 2 CAP,CER,4.7UF,10%,X5R,35V,0603,H1P0 C8547,C8548 CRITICAL 0603 0603
PPVBUS_SYS K16
46 16 IN VBUS0
VOLTAGE=5V
CRITICAL K17 VBUS1
USB REVERSE VOLTAGE PROTECTION C8545 L16 VBUS2
C 1
2.2UF L17 VBUS3
C
10% M17
PPVBUS_USB_RVP 2 25V VBUS4
46 16 X5R-CERM N17
603 VBUS5
CRITICAL DZ8550
DFN10062
P17 VBUS6
R16 VBUS7
A K
R17 VBUS8
T16 VBUS9
BZT52C10LP
3
1
2
NOTE: 10V ZENER T17 VBUS10
S M16 VBUS9
CRITICAL P16
USB_RVP_G VBUS10
4 G POWERDI3333
1 DMP3013SFV-X-55 R8546
R8550
220K Q8550 16 ORION_TO_CHARGER_OVP_SW_EN_L 1
4.7K
2 ORION_TO_CHARGER_OVP_SW_EN_L_R T14 VBUS_OVP_OFF
IN
1% D
1/20W 5% N19 HV_CHG_DIS
MF 1/32W NC_PMU_HV_CHG
201 MF NO_TEST=1
5
2 01005
PPVBUS_USB_FILT
46 30 IN
NOTE: FOR NO BATTERY SITUATION

PPBATT_VCC PPBATT_VCC
48 46 41 48 46 41
CRITICAL CRITICAL
1 C85FF 1 C8575 1 C8576 1 C8559 C8593 1
C8594 1
18PF 22UF 22UF 22UF 10UF 10UF
B 2
5%
25V
C0G-CERM
2
20%
6.3V
X5R-CERM-1
2
20%
6.3V
X5R-CERM-1
2
20%
6.3V
X5R-CERM-1
20%
6.3V
CERM-X5R 2
20%
6.3V
CERM-X5R 2 VOLTAGE=4.7V
B
0201 603 603 603 0402-9 0402-9
PPBATT_POS_RC
1
R8500
0.5
1%
1/16W
MF
402 2
PAGE TITLE
POWER: ANGEL (5/5)

DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

PAGE
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PP1V8_S2 PP1V1_S2
48 42 48
PPVCC_MAIN PPVCC_MAIN
48 42 40 1 48 42 40 1
C8601
1.0UF
C8606
1.0UF
1 C8600 20%
6.3V
1 C8605 20%
6.3V
0.1UF 2 X5R 0.1UF 2 X5R
1
10% 0201-1 10% 0201-1
2 16V VDD 2 16V VDD
X5R-CERM X5R-CERM
0201 U8600 0201
U8605
SLG5AP1443V SLG5AP1630V
TDFN 7 STDFN 3
D
EXT_SW_1V8_RAMP 7 CAP
CRITICAL
D 3
PP1V8_EXT_SW1
EXT_SW_1V1_RAMP CAP
CRITICAL
D
PP1V1_S1_EXT_SW
D
48 PP1V8_SW1 2 ON S 5 46 48 39 GPIO_PMU_TO_1V1_EXT_SW_ON 2 ON S 5 46 48
IN
CRITICAL GND
1 C8602 1 R8602 GND 1 C8604 1 C8681 1 C8607 1 R8607 1 C8609
4700PF 100K 10UF 100PF 2200PF 100K 10UF
8
10% 5% 20% 5% 10% 5% 20%
2 10V 1/32W 2 6.3V 2 25V 2 16V 1/32W 2 6.3V
X7R MF CERM-X5R C0G X5R-CERM MF CERM-X5R
201 01005 0402-9 0201 01005 01005 0402-9
2 2
PP1V8_S2
48 42
PPVCC_MAIN
48 42 40 1
C8621
1.0UF
1 C8620 20%
6.3V
0.1UF 2 X5R
1
10% 0201-1
2 16V VDD
X5R-CERM
0201 U8620
SLG5AP1531V
7 TDFN 3
TOUCH_1V8_SW_RAMP CAP D
2 CRITICAL 5 PP1V8_TOUCH_EXT_SW
11 IN GPIO_SOC_TO_1V8_TOUCH_EXT_SW_ON ON S 46 48
CRITICAL CRITICAL
1 C8622 1 R8622 GND 1 C8624
4700PF 100K 10UF
8
10% 5% 20%
2 10V 1/32W 2 6.3V
X7R MF CERM-X5R
201 01005 0402-9
2
PP3V3_S2
C 48 42 C
PPVCC_MAIN
48 42 40 1
C8626
1.0UF
1 C8625 20%
6.3V
0.1UF 2 X5R
1
10% 0201-1
2 16V VDD
X5R-CERM
0201 U8625
SLG5AP1443V
TDFN
TOUCH_3V3_SW_RAMP 7 CAP D 3
CRITICAL
PP3V3_TOUCH_EXT_SW
11 IN GPIO_SOC_TO_3V3_TOUCH_EXT_SW_ON 2 ON S 5 46 48
CRITICAL
CRITICAL
1 C8627 1 R8627 GND 1 C8629
4700PF 100K 10UF
8
10% 5% 20%
2 6.3V 1/32W 2 6.3V
X5R MF CERM-X5R
01005 01005 0402-9
2
PP3V3_S2
48 42
PPVCC_MAIN
48 42 40 1
C8676
1.0UF
1 C8675 20%
6.3V
B 0.1UF 2 X5R
B
1
10% 0201-1
2 16V VDD
X5R-CERM
0201 U8675
SLG5AP1443V
TDFN
NAND_3V3_SW_RAMP 7 CAP D 3
CRITICAL
PP3V3_EXT_SW
39 IN GPIO_PMU_TO_3V3_EXT_SW_ON 2 ON S 5 46 48
CRITICAL
CRITICAL
1 C8677 1 R8677 GND 1 C8679 1 C8680
4700PF 100K 10UF 100PF
8
10% 5% 20% 5%
2 6.3V 1/32W 2 6.3V 2 25V
X5R MF CERM-X5R C0G
01005 01005 0402-9 0201
2
PAGE TITLE
POWER: EXTERNAL SWITCHES & LDOS

DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

PAGE
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NOSTUFF
R8700
0.00
39 GPIO_PMU_TO_SOC_GPU_UV_WARN_L 1 2 THROTTLE_GPU_SOC_TO_PMU_L 10 43
0%
1/32W
NOSTUFF
R8701
MF
01005
NOTE: JOSE TO DECIDE
0.00
39 GPIO_PMU_TO_SOC_GPU_IPEAK_L 1 2 THROTTLE_GPU_SOC_TO_PMU_L 10 43
0%
1/32W
MF
01005
L8740
1UH-20%-3.51A-0.044OHM
BUCK4
CRITICAL
MAKE_BASE=TRUE 1 2 PP1V1_S2
37 BUCK4_LX0 BUCK4_LX0 46 48
SWITCH_NODE=TRUE PIEA021D-SM CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL CRITICAL
BUCK4_LX0 1 1 1 1 1 1 1 1
37 DIDT=TRUE
C8740
15UF
C8741
15UF
C8742
15UF
C8743
15UF
C8744
15UF
C8745
15UF
C8746
15UF
1 C8760 C874F
100PF
20% 20% 20% 20% 20% 20% 20% 0.1UF 5%
L8742 2
4V
CERM 2
4V
CERM 2
4V
CERM 2
4V
CERM 2
4V
CERM 2
4V
CERM 2
4V
CERM
20%
2 6.3V 2
16V
NP0-C0G
1UH-20%-3.51A-0.044OHM
CRITICAL 0402 0402 0402 0402 0402 0402 0402 X5R-CERM 01005-1
01005
37 BUCK4_LX1 MAKE_BASE=TRUE BUCK4_LX1 1 2
DIDT=TRUE
37 BUCK4_LX1 SWITCH_NODE=TRUE PIEA021D-SM
XW8740
37 BUCK4_FB MAKE_BASE=TRUE BUCK4_FB 1 2
SM
C C
L8750 BUCK5
1.0UH-3.33A-66MOHM
CRITICAL
PPVDD_S1_FIXED
37 BUCK5_LX0 MAKE_BASE=TRUE BUCK5_LX0 1 2 46 48
DIDT=TRUE
37 BUCK5_LX0 SWITCH_NODE=TRUE PILE20161D-SM CRITICAL CRITICAL CRITICAL CRITICAL
37 BUCK5_FB MAKE_BASE=TRUE BUCK5_FB 1
XW8750
2
1 C8750 1 C8751 1 C8752 1 C8753 1 C875F
15UF 15UF 15UF 15UF 100PF
SM 20% 20% 20% 20% 5%
2 4V 2 4V 2 4V 2 4V 2 16V
CERM CERM CERM CERM NP0-C0G
0402 0402 0402 0402 01005-1
L8180
1.0UH-3.33A-66MOHM
BUCK8
CRITICAL
MAKE_BASE=TRUE 1 2 PPVDD_GPU_SRAM
37 BUCK8_LX0 BUCK8_LX0 46 48
SWITCH_NODE=TRUE PILE20161D-SM CRITICAL CRITICAL CRITICAL CRITICAL
37 BUCK8_LX0 DIDT=TRUE 1 1 1 1 1
C8780
15UF
C8781
15UF
C8782
15UF
C8783
15UF
C878F
100PF
20% 20% 20% 20% 5%
4V 4V 4V 4V 16V
2 CERM 2 CERM 2 CERM 2 CERM 2 NP0-C0G
XW8780 0402 0402 0402 0402 01005-1
MAKE_BASE=TRUE
37 BUCK8_FB BUCK8_FB 1 2
SM
B B
PAGE TITLE
POWER: BUCKS 4,5,8

DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

PAGE
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BEACON 2
D CRITICAL CRITICAL D
L8801 D8801 PPLED_OUT_A PPLED_OUT_A MAKE_BASE=TRUE
10UH-20%-2.4A-0.27OHM PMEG4010BEA 44 OUT 46 48
48 44
PPVCC_MAIN 1 2 LX_BCN_A PPLED_OUT_A 44 44 LED_IO_1_A LED_IO_1_A MAKE_BASE=TRUE
32 46
A K IN
PIME051D-SM CRITICAL CRITICAL CRITICAL
44 LED_IO_2_A LED_IO_2_A MAKE_BASE=TRUE
32 46
1 C8820 1 C8801 1 C8803 1 C8830 SOD-323 1 C8853 1 C8808 1 C8861 IN
220PF 10UF 10UF 180PF 4.7UF 4.7UF 4.7UF 44 LED_IO_3_A LED_IO_3_A MAKE_BASE=TRUE
IN 32 46
5% 20% 20% 5% NOSTUFF 10% 10% 10%
2 16V 2 6.3V 6.3V
2 CERM-X5R 2 25V 1 C8827 2 35V
X5R-CERM 2 35V
X5R-CERM 2 35V
X5R-CERM 44 LED_IO_4_A LED_IO_4_A MAKE_BASE=TRUE
IN 32 46
C0G CERM-X5R COG 0603 0603 0603
01005 0402-9 0402-9 01005 180PF 44 LED_IO_5_A LED_IO_5_A MAKE_BASE=TRUE
IN 32 46
2%
2 50V
NP0-C0G 44 LED_IO_6_A LED_IO_6_A MAKE_BASE=TRUE
32 46
IN
48 PP1V8_EXT_SW1 0201
A4
A3
B3
CRITICAL CRITICAL
1 C8802 VDDIO VDD
1 C8811 1 C8809 1 C8850
180PF 4.7UF 4.7UF
1UF 2% 10% 10%
10% 50V
2 NP0-C0G 2 35V 2 35V
2 6.3V SW_A E6 X5R-CERM X5R-CERM 1 C8870 1 C8871 1 C8872 1 C8873 1 C8874 1 C8875
CERM 0201 0603 0603
402 SW_A F6 180PF 180PF 180PF 180PF 180PF 180PF
CRITICAL 2% 2% 2% 2% 2% 2%
FB_A E4 2 50V 2 50V 2 50V 2 50V 2 50V 2 50V
NP0-C0G NP0-C0G NP0-C0G NP0-C0G NP0-C0G NP0-C0G
U8801 TEST_A C4
TP_BEACON_TEST_B TP8805
1
0201 0201 0201 0201 0201 0201
TP-P5 A
PLP8566A0YFQR A6
LED1 LED_IO_1_A 44
DSBGA A5
B4 LED2 LED_IO_2_A
39
GPIO_PMU2BEACON_EN EN B6
44
IN
D2 LED3 LED_IO_3_A 44
47 10
DWI_SOC_TO_BEACON2_DATA SDI B5
IN
C2 LED4 LED_IO_4_A 44
47 10 DWI_SOC_TO_BEACON2_CLK SCK C6
IN
D5 LED5 LED_IO_5_A
4
I2C0_SDA_1V8 SDA D6
44
BI
C5 LED6 LED_IO_6_A
4
I2C0_SCL_1V8 SCL A1
44
IN LED7 LED_IO_1_B 44
C LED8 A2
B1
LED_IO_2_B 44 C
LED9 LED_IO_3_B 44
LED10 B2
LED_IO_4_B 44
LED11 C1
LED_IO_5_B 44
LED12 D1
LED_IO_6_B 44
TEST_B C3
TP_BEACON_TEST_A TP8806
1
E3 A
I2C ADDRESS DEFAULT = 26H FB_B
TP-P5
PPLED_OUT_B 44
SW_B F1
ALTERNATE = 37H E1
SW_B
GND_SW_A GND GND_SW_B
1 C8806 1 C8862 1 C8812
4.7UF 4.7UF 4.7UF PPLED_OUT_B
E5
F4
F5
D3
D4
E2
F2
F3
10% 10% 10% 44 PPLED_OUT_B MAKE_BASE=TRUE

46 48
OUT
STAR-ROUTE 2 35V
X5R-CERM 2 35V
X5R-CERM 2 35V
X5R-CERM
GND_SW_A AND GND_SW_B 0603 0603 0603
BEFORE TYING TO GND CRITICAL 44 LED_IO_1_B LED_IO_1_B MAKE_BASE=TRUE
IN 32 46
D8802 44 LED_IO_2_B LED_IO_2_B MAKE_BASE=TRUE

IN 32 46
PMEG4010BEA 44 LED_IO_3_B LED_IO_3_B MAKE_BASE=TRUE
32 46
IN
A K 44 LED_IO_4_B LED_IO_4_B MAKE_BASE=TRUE
32 46
IN
CRITICAL CRITICAL
SOD-323 LED_IO_5_B LED_IO_5_B MAKE_BASE=TRUE
1 C8826 1 C8810 1 C8807 44 IN 32 46
L8802 180PF 4.7UF 4.7UF 44 LED_IO_6_B LED_IO_6_B MAKE_BASE=TRUE

IN 32 46
10UH-20%-2.4A-0.27OHM 2% 10% 10%
2 50V 2 35V
X5R-CERM 2 35V
X5R-CERM
48 44
PPVCC_MAIN 1 2 NP0-C0G
0201 0603 0603
PIME051D-SM LX_BCN_B
1 C8829 1 C8821 1 C8804 1 C8805 NOSTUFF
180PF 5%
220PF 10UF
20%
10UF
20%
1 C8828
5% 180PF 1 C8880 1 C8881 1 C8882 1 C8883 1 C8884 1 C8885
2 25V 2 16V 2 6.3V 6.3V
2 CERM-X5R
B COG
01005
C0G
01005
CERM-X5R
0402-9 0402-9
2%
50V
2 NP0-C0G 2%
180PF
2%
180PF
2%
180PF
2%
180PF
2%
180PF
2%
180PF B
0201 2 50V 2 50V 2 50V 2 50V 2 50V 2 50V
NP0-C0G NP0-C0G NP0-C0G NP0-C0G NP0-C0G NP0-C0G
0201 0201 0201 0201 0201 0201
PAGE TITLE
BEACON2
DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0
DIODE ALTERNATE NOTICE OF PROPRIETARY PROPERTY: BRANCH
RELEASED BY WWW.LAPTOP-SCHEMATICS.COM PART NUMBER ALTERNATE FOR

PART NUMBER
BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD THE INFORMATION CONTAINED HEREIN IS THE
PAGE
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D D
48 39 16 6 PP1V8_S2 CRITICAL
CRITICAL J8900
1
R8900 Q8900 CRITICAL BATT-J72
4.7K F-ST-TH
SSM3K16CTAP FL8900
1
5% VER-1
1/32W
G
MF SOT883L 240-OHM-0.2A-0.8-OHM 6
2 01005 0201-2
C 39 11 BI
UART5_BATT_RTXD BATT_SWI_FL 1 2 46 BATT_SWI_CONN 1 HDQ
C
3
D
S
2 THERM
3 PACK_NEG
4 PACK_POS
5 SENSE
46 39 BI
BATT_NTC
7
48 PPBATT_VCC
1 C8922 1 C8923 1 C8924 1 C8925 1 C8926 1 C8927 1 C8928

33PF 33PF 18PF 56PF 68PF 82PF 56PF
5% 5% 5% 5% 5% 5% 5%
APN:516-0254
2 25V
NP0-C0G 2 25V
NP0-C0G 2 25V
C0G 2 25V
NP0-C0G 2 50V
CERM 2 50V
CERM 2 25V
NP0-C0G
0201 0201 0201 0201 0402 0402 0201
46 41 BATT_SNS
B B
PAGE TITLE
POWER: BATTERY CONNECTOR

DRAWING NUMBER SIZE
051-04464 D
Apple Inc. REVISION
4.0.0

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TP9300 1
AUDIO
GPIO_CODEC_IRQ_L POWER STANDOFF P/N 806-19627
A 8 18
SOC
TP-P5 TP9391
TP931B A
1 PP0V8_S2_SOC_AOP 38 48
A
1
TP-P5
GPIO_SOC2CODEC_RST_L 11 18
TP9389
TP-P5
STD9302
A
1 PP1V1_S2 43 48 STDOFF-3.3X1.8R-0.89H-TH-0.32-1.6
TP-P5 TP93G9 1
TP9390 A SOC_TESTMODE 4 6
A
1 PP1V1_S1_EXT_SW 42 48 TP-P5 1
TP-P5 TP93I1 BATTERY
A
1 AP_JTAG_TDO 6
TP9304 TP9388 TP-P5
1 GPIO_CODEC_TO_PMU_WAKE_L A
1 PP1V2_SOC 38 48
A 18 39 TP-P5
TP9320 1
TP-P5
CONN_HP_HEADSET_DET_FILT
TP93A3
A
1 PP1V2_PLL_SOC 15
NEAR U0600
TP93I4
A
1 UART_DEBUG_TO_SOC_TX 11 16
DUMMY RF TEST POINTS
A TP-P5
17 18 TP-P5
TP93I5
TP-P5
TP9321 TP93A5 NEAR U1700 1 UART_SOC_TO_DEBUG_TX TP93FA 1
A
1 CONN_HP_HS3_FILT 17 18 A
1 PP1V2_PLL_CPU 15 A TP-P5
11 16
TP_UART_BB_TO_AOP_TXD
TP-P5 TP-P5 A
D
TP9322
A
1
TP-P5
CONN_HP_HS3_REF_FILT 17 18 TP9395
A
1 PP1V8_ALWAYS 38 48
NEAR U0600
TP93I8 1 UART_ACC_TO_SOC_TX
TP93F9
A
1
TP-P5
TP_UART_AOP_TO_BB_TXD D
TP9323 TP93A0
TP-P5 A TP-P5
11 16
TP93F8
TP-P5
A
1 CONN_HP_HS4_FILT 17 18 1 PP1V8_EXT_SW1 NEAR U1700 TP93I9 1
TP_I2S_SOC_TO_BB_LRCK
TP-P5 A TP-P5
42 48
A
1 UART_SOC_TO_ACC_TX 11 16 A TP-P5
TP9324 TP-P5 TP93F7
A
1 CONN_HP_HS4_REF_FILT 17 18 TP93A4 1 TP_I2S_SOC_TO_BB_DOUT
TP-P5
A
1 PP1V8_S2 37 48 TP93J0 A TP-P5
TP9325 1 CONN_HP_LEFT_FILT TP-P5 1 USB_SOC_N TP93E2
A 17 18 46
TP93A6
A TP-P5
6 16
1 TP_I2S_BB_TO_SOC_DOUT
TP9326 1
TP-P5 1 PP1V8_S2_SW3 TP93J1 A TP-P5
CONN_HP_RIGHT_FILT A TP-P5
38 48
A
1 USB_SOC_P 6 16 TP93F6
A 17 18 46 TP-P5 1 TP_I2S_SOC_TO_BB_BCLK
TP93O4 1
TP-P5
CONN_HP_LEFT_FILT
TP93A2
A
1 PP1V8_TOUCH_EXT_SW 42 48 TP9360 1 JTAG_SOC_SEL
A
TP93E1
TP-P5
TP_AP_TO_BB_RESET_L
860-1595
A TP-P5
17 18 46
TP93A9
TP-P5 A TP-P5
4 6
A
1
TP93O5 1 TP9361 TP-P5

A TP-P5
CONN_HP_RIGHT_FILT 17 18 46 A
1
TP-P5
PP1V1_XTAL 6
A
1
TP-P5
JTAG_SOC_TCK 6 16 STD9300
TP9362 1 AP_JTAG_TDI STDOFF-3.3X1.8R1.17H-SM-1
A TP-P5
6
TP9337 TP93C1 1 TP9363 1 GRAPE
A
1 GND_AUDIO_CODEC 18 A PP3V0_S2_TRISTAR 38 48 A
1 JTAG_SOC_TMS 6 16
TP-P5 TP-P5 TP-P5
TP93MC 1 TP93C3 1 TP9364
A DMIC1_FF_SCLK_FILT 17 PP3V3_ACC A
1 AP_JTAG_TRST_L 6
TP-P5 A TP-P5
38 48
TP933A
TP-P5
TP9309
A
1 DMIC1_FF_SD_FILT 17
TP93C4 1
A PP3V3_S2 37 48 A
1
TP-P5
USB_ID 6 STD9301
TP931C 1
TP-P5
TP93C5 1
TP-P5
TP9343 STDOFF-3.3X1.8R1.17H-SM-1
A MIKEY_TS_N 16 18 A PP3V3_EXT_SW 42 48 A
1 GPIO_FORCE_DFU 11 39
TP-P5 TP-P5 TP-P5 1 DISPLAY
TP931D 1 TP93G6 1 RESET_PMU_TO_SYSTEM_L
A MIKEY_TS_P 16 18 A 6 12 39
TP-P5 TP-P5
TP93H5 1
A SPKRAMP_L1_OUT_N 19 30 TP9384
TP-P5 NEAR U0600 1 CLK_PMU_TO_AOP_32K
TP93H6 1
A SPKRAMP_L1_OUT_P 19 30 TP93D5 1
A TP-P5
12 39
STD9303
TP-P5
A PPVCC_MAIN 16 41 48 STDOFF-3.3X1.8R1.17H-SM-1
TP9370 TP-P5 NEAR U8100 TP9329 1 SPI_SOC_TO_PMU_SCLK
A
1 SPKRAMP_L2_OUT_N 19 30 TP93D6 1 P4MM SM PP 10 39 47
TP-P5
A PPVCC_MAIN_LCD_SW_CONN 32 1 BATTERY
TP9371 TP-P5
A
1 SPKRAMP_L2_OUT_P 19 30 TP93D7 1
TP-P5 PPVDD_CPU TP93NC 1
TP93H7 1 A TP-P5
37 48
A SOCHOT0_PMU_TO_SOC_L 10 39
A SPKRAMP_R1_OUT_N 20 30 TP93D8 1 TP-P5
TP-P5
A PPVDD_GPU 37 39 48
TP93H8 1 TP-P5 TP93ND 1
A
TP93MA 1
TP-P5
SPKRAMP_R1_OUT_P 20 30 TP93D9 1
A PPVDD_S1_SOC 37 48 A TP-P5
TP_GPIO_DFU_STATUS 11 STD9350
A SPKRAMP_R2_OUT_N 20 30
TP-P5 STDOFF-3.3X1.8R1.17H-SM-1
TP-P5
TP93MB 1 1
A TP-P5
SPKRAMP_R2_OUT_P 20 30
WIFI TEST POINTS
C TP9393 1 PP1V8_S2_VA_VCP TP93C9 1
PPBATT_VCC C
A TP-P5
38 48 A
TP93CA 1
A
TP93CB 1
TP-P5
TP-P5
PPBATT_VCC
PPBATT_VCC
41 46 48
41 46 48 E75 NEAR U7500

NEAR U7500
A
A
TP93K0
TP93K1
1
1
TP-P5
TP-P5
PCIE_SOC2WLAN_TX_P
PCIE_SOC2WLAN_TX_N
33 35
33 35
A 41 46 48
TP93N0 1 TP93K2
BUTTONS
TP-P5
TP93CC 1 A CONN_DET_L 30 NEAR U0600 A
1
90_AP_PCIE3_RXD_C_P 7 33
A PPBATT_VCC 41 46 48 TP-P5 TP-P5
TP-P5 TP93D1 1 NEAR U0600 TP93K3 90_AP_PCIE3_RXD_C_N
TP93CD 1 A PPOUT_E75_ACC_ID1_CONN 30 46 A
1
7 33
TP9338 A PPBATT_VCC 41 46 48 TP-P5 TP-P5
TP93D2 1 TP93M4 1
A
TP9339
1
TP-P5
GPIO_BTN_HOME_CONN_L 31
TP93CE 1
TP-P5
PPBATT_VCC A TP-P5
PPOUT_E75_ACC_ID2_CONN 30 46 A TP-P5
PMU_GPIO_CLK_32K_WLAN 33 35 46 STD9360
1 GPIO_BTN_ONOFF_L_FILT A TP-P5
41 46 48
TP93O2 1 NEAR U7500 TP93K5 STDOFF-3.3X1.8R1.17H-SM-1
A TP-P5
24
A PPOUT_E75_ACC_ID1_CONN 30 46 A
1 UART2_SOC2WLAN_TX 11 33
TP9340 TP-P5 TP-P5
TP9341 1
TP93O3 1 TP93K6 1 BUTTON FLEX
1 GPIO_BTN_VOL_DOWN_L_FILT A TP-P5 PPOUT_E75_ACC_ID2_CONN NEAR U0600 1 UART2_WLAN2SOC_TX
A TP-P5
24
TP9336 1
A TP-P5
30 46 A TP-P5
11 33
TP9342 A TP93D4 1
A
1 GPIO_BTN_VOL_UP_L_FILT 24 TP-P5
PPVBUS_USB_FILT
TP-P5 TP9392 1 A TP-P5
30 41
A TP93DA 1 DELETE ONE IF CAN'T PLACE TP93K8
TP-P5
PPVBUS_E75_USB_CONN NEAR U0600 A
1 UART2_WLAN2SOC_RTS_L 11 33
TP9394 1 A 30 46 TP-P5
CAMERAS
TP-P5 TP93K9
A TP-P5 TP93DC 1 1 PMU_GPIO_WLAN_REG_ON
TP9396 PPVBUS_E75_USB_CONN A TP-P5
33 35
A
1 A TP-P5
30 46
TP93KA 1
TP93JA TP-P5
A GPIO_PMU2BT_REG_ON 35
1 PP2V9_CAM TP9397 TP93DD 1 TP-P5
A TP-P5
38 48
A
1
A PPVBUS_E75_USB_CONN 30 46
TP-P5 TP-P5
TP930A TP9398 TP93DE 1
A
1 PP2V9_AVDD_CAM_FRONT_FILT 25 A
1
PPVBUS_E75_USB_CONN TP93KC 1
TP-P5 TP-P5 A TP-P5
30 46
A GPIO_SOC2WLAN_PCIE_DEV_WAKE 11 33 35
TP93J3 TP9399 1 TP-P5
1 PP2V9_AVDD_CAM_REAR_FILT A NEAR U7500 TP93KD 1
A TP-P5
26 TP-P5
A UART2_SOC2WLAN_RTS_L 11 33
TP93B1 TP939A 1 TP9330 TP-P5
1 PP2V6_CAM_REAR_AF_FILT A 1 E75_DPAIR1_CONN_N TP93KE 1
A TP-P5
26 TP-P5 A TP-P5
30
A TP_JTAG_WLAN_TMS 33
TP93A7 TP939B 1 TP9331 TP-P5
1 PP1V8_SW1 A 1 E75_DPAIR1_CONN_P TP93KF 1
A TP-P5
38 48 TP-P5 A TP-P5
30
A JTAG_WLAN_TRST 33
TP9301 TP9332 TP-P5
A
1
TP-P5
PP1V8_CAM_FRONT_FILT 25 TP93N7 1
PPVDD_CPU_SRAM A
1
TP-P5
E75_DPAIR2_CONN_N 30
A
TP93L2 1 PMU_GPIO_BT_HOST_WAKE 33 35
PLATED THROUGH HOLES
TP93NB 1
A TP-P5
37 48
TP9333 TP93L3
TP-P5
DRILL SIZE: 1.1MM X 0.4MM
PP1V8_CAM_REAR_FILT TP93N8 1 A
1 E75_DPAIR2_CONN_P 30 1 GPIO_SOC2BT_WAKE
A TP-P5
26
A PPVDD_GPU_SRAM 43 48 TP-P5 A TP-P5
11 35
PLATING SIZE: 1.4MM X 0.7MM
TP93JC TP-P5 TP93L4
1 PP1V25_CAM_REAR_FILT TP93N9 1 NEAR U7500 1 UART_SOC2BT_TX
A TP-P5
26
A PPVDD_S1_FIXED 43 48 A TP-P5
11 35
TP-P5 TP93O6 1 TP93L5
TP93B0 TP93NA 1 PPVDD_ACC_FET NEAR U0600 1 UART_BT2SOC_TX
A
1 ISP0_CAM_REAR_CLK 8 26 A PP0V9_NAND 38 48 A TP-P5
16 A TP-P5
11 35
TP-P5 TP-P5 TP93O7 1 TP93L6 UART_SOC2BT_RTS_L
B A
TP9353 1
TP-P5
ISP0_CAM_REAR_SCL 8 26
A
TP93O8 1
TP-P5
PPVBUS_USB_RVP 16 41 NEAR U7500
NEAR U0600
A
TP93L7
1
1
TP-P5
UART_BT2SOC_RTS_L
11 35
B
TP9354 PPVBUS_SYS A 11 35
A
1 ISP0_CAM_REAR_SDA TP93NE 1 A 16 41 TP-P5
TP9355
TP-P5
8 26
A TP-P5
BATT_SWI_CONN 45
TP-P5
SL9303
TH-NSP
1 ISP0_CAM_REAR_SHUTDOWN_L
A 8 26 TP93NF 1 TP9365 1
TP-P5
A BATT_SNS 41 45 A
1 JTAG_WLAN_SEL 35
TP-P5 TP-P5
TP93JB
A
1 ISP1_CAM_FRONT_CLK_F 25 SL-1.1X0.4-1.4X0.7
TP-P5
TP93JE
A
1 ISP1_CAM_FRONT_SCL_F 25
TP-P5
TP93JF TP93LC 1
1 ISP1_CAM_FRONT_SDA_F
A
A
TP93HE 1
TP-P5
TP-P5
ISP1_CAM_FRONT_SHUTDOWN_L_F
25
25
TP93J9
SENSORS TOUCH A
A
TP93LD 1
TP93LE
TP-P5
TP-P5
AOP2RADIO_CONTEXT_A
AOP2RADIO_CONTEXT_B
PMU_GPIO_WLAN_HOST_WAKE
12 33
12 33
A
1 PP3V0_ALS 38 48 TP9328 A
1
33 35
TP-P5
A
1 GPIO_SOC_TO_BT_TO_TOUCH_TS_SYNC 11 27 28 33 TP-P5
A
TP9372 1
DISPLAY
LED_IO_1_A 32 44 A
TP937E
A
TP937F 1
1
TP-P5
PP1V8_PHOS_F
PP1V825_S2_MESA_CONN
23
21 31
TP9344
A
TP9346
1
TP-P5
TP-P5
GPIO_GRAPE_IRQ_L 11 27
A
A
TP93M1 1
TP93M0 1
TP-P5
TP-P5
AP_PCIE_CLKREQ3_L
AP_PCIE_RESET3_L
7 33
7 33
TP-P5 TP-P5
A
1 GPIO_TOUCH_TO_BT_SYNC 27 33 TP93M3 1
TP9373 TP931E TP-P5 TESTPOINT_JTAG_WLAN_TCK
A
1 LED_IO_2_A 32 44 1 PP3V1_S2_MESA_CONN A TP-P5
33
TP-P5 A 21 31 TP9345
TP9374 TP-P5
A
1 GPIO_GRAPE_RST_L 11 27 28
A
1 LED_IO_3_A 32 44 TP931F TP-P5
TP-P5
A
1 PP16V0_MESA_CONN 21
TP9375 TP-P5
A
1 LED_IO_4_A 32 44
TP-P5 TP93N4 1
TP9376 A GPIO_MESA_TO_BOOST_ENABLE_CONN 21 31 TP9307
A
1 LED_IO_5_A 32 44 TP-P5
A
1 CLK_KONA_M_24MHZ 27
TP-P5 TP-P5
TP9377
A
A
TP9378
1
1
TP-P5
TP-P5
LED_IO_6_A
LED_IO_1_B
32 44
32 44
TP93N5 1
A
TP930C 1
TP-P5
PP1V8_S2_HALL_BUTTON_CONN 24
A
A
TP9308
TP930B
1
1
TP-P5
TP-P5
PP3V3_TOUCH_EXT_SW
PP15V0_TOUCH_FILT
42 48
27 28
TP -> PP
1
TP9379 GPIO_HALL_BUTTON_TO_PMU_IRQ TP930E
TP93K4 PP
PMU_GPIO_CLK_32K_WLAN 33 35 46
A
1 LED_IO_2_B 32 44 A TP-P5
24 39
1 PP2V8_KONA_M_VDDANA P4MM SM
TP937A
TP-P5
TP93N2 1
A TP-P5
27
A
1 LED_IO_3_B 32 44 A GPIO_HALL_AJ_TO_PMU_IRQ 17 39 TP930F
TP-P5 TP-P5
A
1 SWD_KONA_SWCLK 12 27
TP937B TP-P5
A
1 LED_IO_4_B 32 44
TP-P5 TP9310
TP937C 1 1 SWD_KONA_SWDIO
A A 12 27
A
A
TP937D 1
A
TP-P5
TP-P5
LED_IO_5_B
LED_IO_6_B
32 44
32 44
TP9303
THERMAL
BATT_NTC
A
TP9311 1
TP-P5
TP-P5
AP_DISP_TOUCH_BSYNC1_R 27
SYNC_MASTER=J171/MLB_B
PAGE TITLE
SYNC_DATE=10/24/2018
A
TP9305 1
TP-P5
PPLED_OUT_A 44 48
A
TP9312
1
1
TP-P5
BOARD_TEMP3_P
39 45
A
TP9319 1
TP-P5
KONA_M_GPIO_12 27 TEST: TP/HOLES/FIDUCIALS
TP93JD
A TP-P5
39
TP931A DRAWING NUMBER SIZE
1 PPLED_OUT_B TP9313 A
1 KONA_M_GPIO_13 27
A TP-P5
44 48
A
1 BOARD_TEMP4_P 39 TP-P5 051-04464 D
A
TP93DB 1
PPLED_BACK_REG_B 32 46 TP9314 1
TP-P5
BOARD_TEMP5_P NEAR U4000 A
TP93H1 1
SPI_GRAPE_CS_L 10 27
Apple Inc. REVISION
TP-P5 A 39 TP-P5
TP93D0 1
PPLED_BACK_REG_A TP9315
TP-P5
NEAR U0600
A
TP93H2 1
SPI_GRAPE_MISO 10 27
4.0.0
A TP-P5
32 46
A
1 BOARD_TEMP6_P 39 TP-P5
NOTICE OF PROPRIETARY PROPERTY:
TP93H3 1 BRANCH
TP-P5
TP9316 NEAR U4000 A SPI_GRAPE_MOSI 10 27
TP93O0 1 A
1 BOARD_TEMP7_P 39 TP-P5 THE INFORMATION CONTAINED HEREIN IS THE
PPLED_BACK_REG_B TP-P5 NEAR U4000 TP93H4 1 PROPRIETARY PROPERTY OF APPLE INC.
A TP-P5
32 46
TP9317 A SPI_GRAPE_SCLK 10 27
A
1 BOARD_TEMP8_P 39 TP-P5
TP93O1 1
A TP-P5
PPLED_BACK_REG_A 32 46
TP-P5 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
93 OF 121
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EE CHARACTERIZATION PP
NAND AUDIO
PLACE NEAR U1900 PP9421
P4MM SM
PP
1 I2S0_SOC_TO_BELFIELD_MCK 10 18
PLACE NEAR U1900 PP9422 PP

1 I2S0_SOC_TO_BELFIELD_BCLK 10 18
PLACE NEAR U0601 P4MM SM
PP9402 PP
1 90_PCIE_AP_TO_NAND_REFCLK_P 5 7 PP9423 1 I2S0_SOC_TO_BELFIELD_LRCK 10 18
P4MM SM PLACE NEAR U1900 P4MM SM
PP
PP9403 1 90_PCIE_AP_TO_NAND_REFCLK_N PP9424 1
D P4MM SM
PP 5 7
PLACE NEAR U1900
P4MM SM
PP
I2S0_SOC_TO_BELFIELD_DOUT 10 18
D
PP9434
P4MM SM
PP
1 CLK_SOC_TO_NAND_24MHZ 5 10
P4MM SM
PP
1 I2S0_BELFIELD_TO_SOC_DOUT 10 18

P4MM SM
PP
1 SPI_BELFIELD_SCLK 10 18

P4MM SM
PP
1 SPI_BELFIELD_MOSI 10 18

P4MM SM
PP
1 SPI_BELFIELD_MISO 10 18

P4MM SM
PP
1 I2S_AOP_TO_CODEC_BCLK 12 18

P4MM SM
PP
1 I2S_AOP_TO_CODEC_LRCK 12 18

P4MM SM
PP
1 I2S_AOP_TO_CODEC_DOUT 12 18
PMU/BEACON2 SPI/DWI PLACE NEAR U0600 PP9463

P4MM SM
PP
1 I2S_CODEC_TO_AOP_DOUT 12 18
PLACE NEAR U8100 PP9407 PP

1 SPI_SOC_TO_PMU_DATA 10 39
P4MM SM
P4MM SM
PP
1 I2S2_SOC_TO_SPKRAMP_BCLK_L1 19
PP9408 PP
1 DWI_SOC_TO_BEACON2_CLK 10 44 PLACE NEAR U2040 PP9465
P4MM SM
PP
1 I2S2_SOC_TO_SPKRAMP_LRCK_L1 19
PP9409 PP
1 DWI_SOC_TO_BEACON2_DATA 10 44
P4MM SM
PP
1 I2S2_SOC_TO_SPKRAMP_DOUT_L1 19
P4MM SM
PP940A PP
1 SPI_SOC_TO_PMU_SCLK 10 39 46
PP940B
P4MM SM
PP
1 SPI_PMU_TO_SOC_DATA 10 39
PP9441 PP
1 GPIO_AOP_TO_PMU_SLEEP1_REQUEST 12 39
SENSORS SOC
C P4MM
PP9442
P4MM
SM
SM
PP
1 GPIO_PMU_TO_SYS_SLEEP1_READY 12 14 39
P4MM SM
PP
1 SPI_AOP_SCLK 12 17 23 47 PP9450
P4MM SM
PP
1 ADC_SOC_TO_PMU_VDD_CPU 13 39 C
PP9443 PP
1 GPIO_AOP_TO_PMU_ACTIVE_REQUEST 12 39
P4MM SM
PP
1 SPI_AOP_MOSI 12 17 23 47 PP9451
P4MM SM
PP
1 AP_VSS_CPU_SENSE 13
P4MM SM
PP9444 PP
1 GPIO_PMU_TO_SYSTEM_ACTIVE_READY 6 12 16 39
P4MM SM
PP
1 SPI_AOP_SCLK 12 17 23 47 PP9452
P4MM SM
PP
1 ADC_SOC_TO_PMU_VDD_GPU 13 39
P4MM SM
P4MM SM
PP
1 SPI_AOP_MOSI 12 17 23 47 PP9453
P4MM SM
PP
1 AP_VSS_SENSE 13

P4MM SM
PP
1 SPI_AOP_MISO 12 17 23
PP9480 1 PMU_TO_AP_BUF_BTN_HOME_L
PP 11 39
P4MM SM
PP9481
P4MM SM
PP
1 PMU_TO_AP_BUF_BTN_ONOFF_L 11 39
MESA SPI TOUCH

PLACE NEAR U0600 PP940C
P4MM SM
PP
1 SPI_MESA_MISO 10 21
PP9454 1 TP_KONA_S_UART_RX
PP 28
P4MM SM
PP9455
P4MM SM
PP
1 TP_KONA_S_UART_TX
28
PP9456
P4MM SM
PP
1 TP_KONA_IPC_EVENT_0 28
CAMERA - FRONT PP9457

P4MM SM
PP
28
PP940D
P4MM SM
PP
1 MIPI1C_CAM_FRONT_CLK_P 8 25 47 PP9458
P4MM SM
PP
PP940E
P4MM SM
PP
1 MIPI1C_CAM_FRONT_CLK_N 8 25 47 PP9459 PP
P4MM SM
PLACE NEAR U0600
PP940F 1 MIPI1C_CAM_FRONT_DATA_P<0>
PP945A
P4MM SM
PP
PP 8 25 47
P4MM SM
PP9410 PP
1 MIPI1C_CAM_FRONT_DATA_N<0> 8 25 47
PP945B
P4MM SM
PP
P4MM SM
PP945C
P4MM SM
PP
1 KONA_S_TO_KONA_M_RESET_DET_L 27 28
PP945D
P4MM SM
PP
1 KMSI_MISO 27 28
CAMERA - REAR PP945E 1 KMSI_MOSI

PP9411 1 MIPI0C_CAM_REAR_CLK_P 8 26 47 P4MM SM
PP 27 28
B P4MM
PP9412
SM
PP
PP
1 MIPI0C_CAM_REAR_CLK_N 8 26 47
PP945F
P4MM SM
PP
1 KMSI_STRB_IN 27 28 B
P4MM SM
P4MM SM
PP
1 KMSI_STRB_OUT 27 28
PP9413
P4MM SM
PP
1 MIPI0C_CAM_REAR_DATA_P<0> 8 26 47
PP9471 1 PSE_SYNC
PP 27 28
PP9414
P4MM SM
PP
1 MIPI0C_CAM_REAR_DATA_N<0> 8 26 47
P4MM SM
WIFI
PP9417 PP
1 90_AP_PCIE3_REFCLK_P 7 33
PP9418 1 90_AP_PCIE3_REFCLK_N 7 33
PP
P4MM SM
HIGH SPEED, NO TEST

MIPI0C_CAM_REAR_CLK_P NO_TEST=1 8 26 47
I141
MIPI0C_CAM_REAR_CLK_N NO_TEST=1 8 26 47
I140
MIPI0C_CAM_REAR_DATA_P<0..3> NO_TEST=TRUE 8 26 47
I139
MIPI0C_CAM_REAR_DATA_N<0..3> NO_TEST=TRUE 8 26 47
I138
MIPI0C_CAM_REAR_CLK_FILT_P NO_TEST=1 26
I142
MIPI0C_CAM_REAR_CLK_FILT_N NO_TEST=1 26
I144
MIPI0C_CAM_REAR_DATA_FILT_P<0..3> NO_TEST=TRUE 26
I145
MIPI0C_CAM_REAR_DATA_FILT_N<0..3> NO_TEST=TRUE 26
I143
MIPI1C_CAM_FRONT_CLK_P NO_TEST=1 8 25 47
I146
MIPI1C_CAM_FRONT_CLK_N NO_TEST=1 8 25 47
A
I149
I150
I148
MIPI1C_CAM_FRONT_DATA_P<0>
MIPI1C_CAM_FRONT_DATA_N<0>
NO_TEST=1
NO_TEST=1
8 25 47
8 25 47
MIPI1C_CAM_FRONT_CLK_FILT_P NO_TEST=1 25
PAGE TITLE
I147
I152
I151
MIPI1C_CAM_FRONT_CLK_FILT_N
MIPI1C_CAM_FRONT_DATA_FILT_P<0>
NO_TEST=1
NO_TEST=1
25
25
TEST: EE TP/PP
MIPI1C_CAM_FRONT_DATA_FILT_N<0> NO_TEST=1 25
DRAWING NUMBER SIZE
I153
051-04464 D
EDP_DATA_P<0..3> NO_TEST=TRUE 9 32
Apple Inc. REVISION
I187
I185
EDP_DATA_N<0..3> NO_TEST=TRUE
NO_TEST=TRUE
9 32 4.0.0
I186
EDP_DATA_EMI_P<0..3> 32
EDP_DATA_EMI_N<0..3> NO_TEST=TRUE 32
I188
EDP_DATA_EMI_CONN_P<0..3> NO_TEST=TRUE 32
I190 PROPRIETARY PROPERTY OF APPLE INC.
EDP_DATA_EMI_CONN_N<0..3> NO_TEST=TRUE 32 THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I189
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POWER CONNECTIONS
BUCK0 (ACTIVE) LDO7 (SPARE) CHARGER MAIN
46 37 PPVDD_CPU PPVDD_CPU
12400MA
13
BUCK4 (SLEEP2) 638MA
15MA 46 41 16 PPVCC_MAIN
MAKE_BASE=TRUE
PPVCC_MAIN
2930MA
2741MA
37
MAKE_BASE=TRUE 46 43 PP1V1_S2 PP1V1_S2 42 VOLTAGE=4.5V PPVCC_MAIN 37

VOLTAGE=1.0V MAKE_BASE=TRUE 1051MA 449MA
VOLTAGE=1.1V PP1V1_S2 38 PPVCC_MAIN 37
0MA
PP1V1_S2 38 PPVCC_MAIN 37
1300MA 1264MA
D
PP1V1_S2 14 PPVCC_MAIN 38
D
BUCK1 (SW CONTROL) 8300MA
PPVCC_MAIN
237MA
1371MA
32
PPVDD_GPU PPVDD_GPU PPVCC_MAIN

46 39 37
MAKE_BASE=TRUE
VOLTAGE=0.8V
13
BUCK4_EXT_SW (SLEEP1) 635MA PPVCC_MAIN
5MA
44
22
46 42 PP1V1_S1_EXT_SW PP1V1_S1_EXT_SW 14 300MA
MAKE_BASE=TRUE 3MA PPVCC_MAIN 33 35
VOLTAGE=1.1V PP1V1_S1_EXT_SW 14 1000MA
BUCK2 (SLEEP1) PP1V1_S1_EXT_SW 6
46 37 PPVDD_S1_SOC
MAKE_BASE=TRUE
PPVDD_S1_SOC
1524MA
13 LDO8 (SLEEP2) 73MA
PPVCC_MAIN 40 42
5-10MA
VOLTAGE=0.9V 38 PP3V1_S2_MESA PP3V1_S2_MESA 21 22 PPVCC_MAIN 34
MAKE_BASE=TRUE
VOLTAGE=3.05V
BUCK5 (SLEEP1) PPVCC_MAIN 16

46 43 PPVDD_S1_FIXED
MAKE_BASE=TRUE
PPVDD_S1_FIXED
11MA
7
PPVCC_MAIN 27
46 37 PP1V8_S2 PP1V8_S2 15 VOLTAGE=0.9V PPVDD_S1_FIXED 8 PPVCC_MAIN 18 19 20

MAKE_BASE=TRUE 1MA 1430MA
VOLTAGE=1.8V PP1V8_S2 16 PPVDD_S1_FIXED 14
1MA
PP1V8_S2 17 24 PPVDD_S1_FIXED 6
8MA
PP1V8_S2 6 16 39 45
BATTERY
PP1V8_S2
PP1V8_S2
36.4MA
42
38
LDO9 (SW CONTROL) 360MA
46 41 PPBATT_VCC
MAKE_BASE=TRUE
PPBATT_VCC
2890MA
45
430MA 38 PP1V25_REAR_CAM PP1V25_REAR_CAM 26 VOLTAGE=4.7V

PP1V8_S2 38 MAKE_BASE=TRUE
60MA VOLTAGE=1.25V
PP1V8_S2 16

1MA 46 37 PP3V3_S2 PP3V3_S2 33
PP1V8_S2 34 MAKE_BASE=TRUE
VOLTAGE=3.3V PP3V3_S2 42
C C
PP1V8_S2
20MA
25.5MA
33 LDO10 (ACTIVE) 1007MA
PP1V8_S2 18 EXT SW (ACTIVE) 1100MA
46 38 PP0V9_NAND
MAKE_BASE=TRUE
PP0V9_NAND 5
46 42 PP3V3_EXT_SW PP3V3_EXT_SW 5 VOLTAGE=0.9V

MAKE_BASE=TRUE
VOLTAGE=3.3V
TOUCH EXT SW (SW CONTROL) ON_BUF

46 42 PP3V3_TOUCH_EXT_SW PP3V3_TOUCH_EXT_SW 27
MAKE_BASE=TRUE 46 38 PP1V8_ALWAYS PP1V8_ALWAYS 10 39
VOLTAGE=3.3V MAKE_BASE=TRUE
VOLTAGE=1.8V
LDO11 (ACTIVE) 80MA

PP2V6_CAM_AF PP2V6_CAM_AF
BUCK3_SW
38
MAKE_BASE=TRUE
VOLTAGE=2.6V
26
BACKLIGHT BOOST 150MA
PPLED_OUT_A PPLED_OUT_A
BUCK3_SW1 (ACTIVE) 46 44
MAKE_BASE=TRUE
VOLTAGE=26V
32
46 38 PP1V8_SW1
MAKE_BASE=TRUE
VOLTAGE=1.8V PP1V8_SW1
0MA
42
BUCK7 (ACTIVE) 354MA
46 44 PPLED_OUT_B
MAKE_BASE=TRUE
PPLED_OUT_B 32
46 37 PPVDD_CPU_SRAM PPVDD_CPU_SRAM 13 VOLTAGE=26V

MAKE_BASE=TRUE
1MA VOLTAGE=1.06V
PP1V8_SW1 25
1MA
PP1V8_SW1 26
BUCK8 (SW CONTROL) 360MA
46 43 PPVDD_GPU_SRAM
MAKE_BASE=TRUE
PPVDD_GPU_SRAM 13
LDO13 (ACTIVE) 47MA
BUCK3_EXT_SW1 (ACTIVE) 9MA
VOLTAGE=0.92V
46 38 PP2V9_CAM
MAKE_BASE=TRUE
PP2V9_CAM 26
46 42 PP1V8_EXT_SW1 PP1V8_EXT_SW1 15 VOLTAGE=2.1V PP2V9_CAM 25

MAKE_BASE=TRUE 2MA
VOLTAGE=1.8V
8MA
PP1V8_EXT_SW1 8
B PP1V8_EXT_SW1
20MA
315MA
6 LDO1 (SLEEP2) 3MA LDO14 (ACTIVE) B
PP1V8_EXT_SW1 5 12 46 38 PP3V0_S2_TRISTAR PP3V0_S2_TRISTAR 16 1MA
5MA MAKE_BASE=TRUE 46 38 PP1V2_SOC PP1V2_SOC 9
PP1V8_EXT_SW1 10 VOLTAGE=3.0V MAKE_BASE=TRUE 22MA
10MA VOLTAGE=1.2V PP1V2_SOC 15
PP1V8_EXT_SW1 4 7 8 10 39 37MA
4MA PP1V2_SOC 7
PP1V8_EXT_SW1 6
10MA
PP1V8_EXT_SW1 44
LDO2 10MA
46 38 PP1V8_S2_VA_VCP PP1V8_S2_VA_VCP 18
MAKE_BASE=TRUE
VOLTAGE=1.8V
LDO3 5MA
38 PP3V3_USB
MAKE_BASE=TRUE
VOLTAGE=3.3V
PP3V3_USB 6
LDO15 (SLEEP2) 44MA
46 38 PP0V8_S2_SOC_AOP PP0V8_S2_SOC_AOP 14
MAKE_BASE=TRUE
VOLTAGE=0.8V
LDO4 (SW CONTROL) 1MA LDO16 (SLEEP2)

46 38 PP3V0_ALS PP3V0_ALS 25 1MA
PP1V825_S2_MESA PP1V825_S2_MESA
BUCK3_SW3 (SLEEP2) 5MA
MAKE_BASE=TRUE
VOLTAGE=3.0V
38
MAKE_BASE=TRUE
VOLTAGE=1.9V
21
46 38 PP1V8_S2_SW3 PP1V8_S2_SW3 23
MAKE_BASE=TRUE 1.2MA
VOLTAGE=1.8V PP1V8_S2_SW3 23
16MA
PP1V8_S2_SW3 17
PP1V8_S2_SW3
9MA
15
1V2_BUFF (ACTIVE) 1MA
PP1V8_S2_SW3
???
17
LDO5 (SPARE) 39 PP1V2_BUFF
MAKE_BASE=TRUE
VOLTAGE=1.2V
PP1V2_BUFF 15
PAGE TITLE
POWER: ALIASES
BUCK3 EXT SW TOUCH DRAWING NUMBER SIZE
46 42 PP1V8_TOUCH_EXT_SW PP1V8_TOUCH_EXT_SW 12 27 28 051-04464 D

MAKE_BASE=TRUE
VOLTAGE=1.8V LDO6 (SW CONTROL) 1000MA
Apple Inc. REVISION
46 38 PP3V3_ACC
MAKE_BASE=TRUE
PP3V3_ACC 16 4.0.0
VOLTAGE=3.3V

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820-01686 Schematic Diagram - LO

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820-01686 Schematic Diagram - LO

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8 7 6 5 4 3 2 1

PAGE CSA CONTENTS SYNC DATE

051-04464 1 SCHEM,MLB-A,YN,J171 SCH1 CRITICAL THE INFORMATION CONTAINED HEREIN IS THE

PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:

Power aliases required by this page: TABLE_ALT_HEAD TABLE_ALT_ITEM

Signal aliases required by this page: 339S00487 339S00485 U0700 2GB,HYNIX,BN1,B1A12

339S00488 339S00485 U0700 2GB,MICRON,BNX,B1A12 TABLE_ALT_ITEM

138S00048 138S00003 C8160,C8161,... 15UF

339S00489 339S00485 U0700 2GB,HYNIX,BNX,B1A12

D 339S00612 339S00485 U0700 3GB,MICRON,BN1,B1DEV

138S0945 138S0739 C1760,... 1UF

138S0706 138S0739 C1760,... 1UF

339S00614 339S00485 U0700 3GB,MICRON,BNX,B1DEV 376S00071 376S00070 Q8504

339S00615 339S00485 U0700 3GB,HYNIX,BNX,B1DEV TABLE_ALT_ITEM

339S00367 339S00485 U0700 2GB,HYNIX,BN1,B1DEV TABLE_ALT_ITEM

376S0948 376S00076 Q8900

339S00369 339S00485 U0700 2GB,HYNIX,BN1,B1DEV TABLE_ALT_ITEM

155S00097 155S0664 FL2780,... FILTER_2P RDAR #23399925

155S00341 155S0755 FL4190 FERRITE BEAD RDAR #23169091

155S00016 155S0686 L1800,... FILTER_2P

155S00342 155S0453 FL2290-FL2292,FL2295,FL2296 FILTER_2P

155S00200 155S00400 FL2580,... FILTER_2P

138S0786 138S0847 C5905 10UF RDAR #24161406

138S0864 138S0709 C8547,... 4.7UF RDAR #23320528

138S0875 138S0678 C81A0,... 10UF

335S00013 335S0894 U5403 EEPROM

335S00066 335S0946 U1103 EEPROM

131S00150 131S0890 C2285,C2302

132S00088 132S0639 C3023,C3032

138S00086 138S0884 C8204

C1437,40,60-61; C1503, C7502

639-06887 PCBA,MLB-A,BETTER,YN,X1596 COMMON,ALTERNATE,MLB_A,EEEE_J171_BTR,ACC_PWR_MAX_1A,32GB 371S00118 371S00117 D3001

639-06888 PCBA,MLB-A,BEST,YN,X1596 COMMON,ALTERNATE,MLB_A,EEEE_J171_BEST,ACC_PWR_MAX_1A,64GB TABLE_ALT_ITEM

639-06889 PCBA,MLB-A,ULTIMATE,YN,X1596 COMMON,ALTERNATE,MLB_A,EEEE_J171_ULT,ACC_PWR_MAX_1A,128GB TABLE_ALT_ITEM

377S0116 377S00132 DZ3700

128S00067 128S00094 C81C0,C81C1,C81C2

FLASH CONFIGURATIONS 132S00154 132S0683 C30001-05,08-10,19,28

WESTERN DIGITAL 335S00311 1 NAND,3DV3,64GBT,XXX,S3E,128G,SD,SLGA70 U0601 CRITICAL 64GB TABLE_ALT_ITEM

197S00120 197S0612 Y0700

B TOSHIBA 335S00314 1 NAND,3DV3,128GBT,XXX,S3E,256G,T,SLGA70 U0601 CRITICAL 128GB

197S00118 197S0612 Y0700

HYNIX 335S00156 1 NAND,3DV3,256GBT,S3E,256G,H,SLGA70 U0601 CRITICAL 256GB TABLE_ALT_ITEM

138S0867 5 CAP,X5R,10UF,20%,6.3V,0.65MM,HRZTL,0402 C0648,C0613,C0616,C0621,C0633 CRITICAL 32GB TABLE_ALT_ITEM

138S00003 5 CAP,X5R,15UF,20%,6.3V,0.65MM,HRZTL,0402 C0648,C0613,C0616,C0621,C0633 CRITICAL 64GB TABLE_ALT_ITEM

371S00173 371S0644 D8500

138S00003 5 CAP,X5R,15UF,20%,6.3V,0.65MM,HRZTL,0402 C0648,C0613,C0616,C0621,C0633 CRITICAL 256GB 371S00172 371S0490 D8801,D8802

PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:

PART NUMBER 376S00181 376S1211 Q8550 RADAR #38811594

335S00346 335S00314 U0601 WD 128G 3DV3 RADAR #37810147

ALTS ADDED FOR P1 OK2FAB

806-19792 1 FENCE,AP_BCUT,YN,J171 PD_FENCE_AP CRITICAL 131S00173 131S00164 ALL

806-13581 1 CAN,TINY,J71B PD_TINY_CAN CRITICAL 131S00366 131S00229 ALL

806-13579 806-19792 ALL

BARCODE LABEL/EEEE CODES

825-7639 1 EEEE FOR BETTER L2K8 CRITICAL EEEE_J171_BTR

PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION

825-7639 1 EEEE FOR BEST L2KM CRITICAL EEEE_J171_BEST TABLE_5_ITEM

343S00314 1 IC,PMU,ANGEL,D2365A0,OTP-DC,WLCSP361 U8100 CRITICAL 051-04464 D

Apple Inc. REVISION

RELEASED BY WWW.LAPTOP-SCHEMATICS.COM THE INFORMATION CONTAINED HEREIN IS THE

BOOT CONFIG ID MAKE_BASE=TRUE

11 OUT GPIO_BOOT_CFG2 I2C0_SDA_1V8 BI 18

BOOT_CFG[2:0] MODE S/W READ FLOW 1%