ELECTRICAL ENGINEERING DEPARTMENT

ACADEMIC SESSION: _____________

DEE20033 – DIGITAL ELECTRONICS

TITLE:
PRACTICAL WORK : ______

LECTURER’S NAME:

GROUP NO. : CLASS:

TOTAL
STUDENT ID & NAME : MARKS
(100%)

1.

2.

3.

4.
 Digital Electronics

EXPERIMENT 4: JK FLIP-FLOP

1.0 OUTCOMES

At the completion of the work in this experiment, students should be able to :

i. Test various configurations for a JK Flip Flop, including asynchronous and

synchronous input.

2.0 EQUIPMENT

i. Digital trainer
ii. IC 7476
iii. Jumper wires

3.0 THEORY

The JK flip flop is basically a gated SR Flip-flop with the addition of a clock input
circuitry that prevents the illegal or invalid output condition that can occur when both
inputs S and R are equal to logic level “1″. Due to this additional clocked input, a JK flip-flop
has four possible input combinations, “logic 1″, “logic 0″, “no change” and “toggle”. The
symbol for a JK flip flop is similar to that of an SR Flip-flop .

INPUTS OUTPUTS
STATES Asynchronous Synchronous
Qt+1
Preset Clear J K Clock
Set 0 1 x x x 1
Reset 1 0 x x x 0
Invalid 0 0 x x x Q t+1(invalid)
Hold 1 1 0 0 Qt
Reset 1 1 0 1 0
Set 1 1 1 0 1
Toggle 1 1 1 1 Qt
Table 4.1: The truth table for a negatively triggered JK flip-flop

4.0 PROCEDURE
B. JK FLIP FLOP

1. Using IC 7476 construct the figure as shown in figure 4.1 Make sure pin 5 ( VCC ) is fixed to
+5V and pin 13 ( GND ) is earthed .
2. Use the data switch SW1, SW2, SW3 and SW4 to act as the input for J,K, Preset and Clear.
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3. The clock is fixed to PULSE SWITCH and the output circuit to LED 1 and LED 2.

Figure : 4.1 Note:

Pin 5 – Vcc
Pin 13 - Gnd

4. Set the value for PRESET ( pin 2 / SW3 ) and ( pin 3 / SW4 ) CLEAR to logic 1 ( non
active state ).
5. Enter the logic value 0 to input J and K, followed by the clock is set to pulse switch A.
The steps must be repeated with different inputs.
6. Record the value in table 4.1 which is the truth table for JK Clocked flip flop.

INPUT OUTPUT
OPERATION
J K CLK Q Q

0 0

0 1

1 0

1 1

Table 4.1 – Truth Table for JK Clocked Flip Flop

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7. Upon completion of the steps above, now change the PRESET to logic 0 by switching OFF
SW3. Now record the new value for JK clocked flip flop in table 4.2.

INPUT OUTPUT
OPERATION
J K CLK Q Q

0 0

0 1

1 0

1 1

Table 4.2 – Truth Table for JK Clocked Flip Flop

5.0 DISCUSSION :

a) What are the differences between SR flip flop and JK Flip Flop?

6.0 CONCLUSION :
Summarize your experiment by relating to the outcome of this practical work.

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APPENDIX

IC PIN-OUT DIAGRAMS

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 DEE 20033 DIGITAL ELECTRONICS
PRACTICAL SKILL ASSESSMENT (PLO5/P4/CLS3a, 3c/CLO2)
PRACTICAL WORK :
NO NAME: STUDENT ID
1

STUDENTS
Criteria 1 2 3 4 5 SCORE
1 2 3 4
Student was able to
Student was able to Student was able to identify x2
Student was unable to identify and select more Student was able to
IC Selection & identify and select less and select all IC’s quickly
identify and select any than half but less than identify and select all
Identification than half of the IC and without the help of the
IC three quarter of the IC needed IC’s
needed lecturer
needed
Student was able to Student was able to Student was able to
Circuit Student failed to Student constructed construct part of the construct all the circuits construct all the circuits x5
Construction construct the circuits the circuits incorrectly circuits correctly under correctly under excellently without the help
supervision of the lecturer supervision of the lecturer of the lecturer

1 2 3
Functional of
Circuit x5
Circuit was not
Circuit was partly operational Circuit was fully operational
working
Student was able to
Student was unable to Student performed the Student was able to Student was able to do
Trouble troubleshoot the circuit
Shooting
perform any trouble troubleshooting perform part of the
with the help of the
troubleshooting without the x4
shooting incorrectly troubleshooting correctly help of the lecturer
lecturer
Student demonstrated
Student demonstrated
Student did not Student only Student demonstrated proper safety practices most
Practice of some safety practices
Safety
demonstrate proper demonstrated some
after he/she was reminded
proper safety practices of the times and ensured x1
safety practices safety practices most of the times they were practiced by
by the lecturer
others in the group
Clean-up procedures Clean-up Clean-up
Clean-up procedures Clean-up procedures are
Housekeeping are seldom used
are often missed generally used
procedures are procedures are most x1
consistently used consistently used
(A) Total 80

(B) Total = Result (10 MARKS) + Discussion (5 MARKS) + Conclusion (5 Marks) 20

Total (A) + (B) 100

 DEE 20033 DIGITAL ELECTRONICS
INDIVIDUAL AND TEAMWORK (CLO3 , A3 , PLO9)
PRACTICAL WORK :
NO NAME: STUDENT ID
1
2
3
4

Student
Very Weak Weak Fair Good Very Good
ttribute Subattribute
(1) (2) (3) (4) (5)
1 2 3 4
High ability to foster
No clear evidence of ability Able to foster relationship and Able to foster relationship
Able to foster good good relationship and
to foster good relationships work together with other group and work together with other
relationship and work work together
Foster good and work together members towards goal group members towards
together with other group effectively with other
relationship effectively with other group achievement but with limited goal achievement with some
members towards goal group members
members towards goal effect and require effect(s) and require minor
achievement towards goal
achievement. improvement improvements
achievement
TEAMWORK

Able to demonstrate in Able to demonstrate in Show clear evidence

No clear evidence of ability
to assume alternate roles
Alternate
as a group leader and
Roles
group members
demonstrated in practice
Attempt to demonstrate in
practice the ability to practice the ability to to assume alternate
practice the ability to alternate
assume alternate roles as a assume roles as a group
roles as a group leader and
group leader and group alternate roles as a group leader and a group
group members but with
members with some effect(s) leader and a group member
limited effect and require
and require minor member demonstrated in
improvements
improvements to achieve the same goal practice

Able to very well

Not able to respect and Limited respect and Able to well respect and
Respect and Able to respect and accept respect and accept
accept opinion of others acceptance of others’ opinions accept opinion of others in
accept opinion of others in opinion of others in
that leads in achievement group’s achieving group’s
opinions achieving group’s objectives achieving group’s
to conflicts objectives objectives
objectives

Total Marks: [15m]

 PRACTICAL SKILL ASSESSMENT (PLO5/P4/CLS3a, 3c/CLO2) ONLINE

Score Description
Stud. Stud. Stud. Stud.
Aspect Score
1 2 3 4
1 2 3 4 5

Student was able to

Student was able to identify and select Student was able to identify
Student was unable Student was able to x2
IC Selection & identify and select more than half but and select all IC’s quickly
to identify and select identify and select all
Identification less than half of the less than three and without the help of the
any IC needed IC’s
IC needed quarter of the IC lecturer
needed

Student was able to Student was able to

Student was able to
construct part of the construct all the x5
Circuit Student failed to Student constructed construct all the circuits
circuits correctly circuits correctly
Construction construct the circuits the circuits incorrectly excellently without the help
under supervision of under supervision of
of the lecturer
the lecturer the lecturer

1 2 3
Functional of
x5
Circuit Circuit was not
Circuit was partly operational Circuit was fully operational
working

Student was able to Student was able to Student was able to do

Student was unable Student performed
Procedure perform part of the perform the perform the simulation x4
to perform any of the the simulation
(Simulation) simulation procedure simulation procedure procedure without any
simulation procedure procedure incorrectly
correctly with minimal errors. errors

Student recorded x2
Record the Student did not Student only recorded Student results were Student recorded the results
the results with
results record the results some results not fully recorded without any errors.
minimal errors

(A) Total 80

(B) Total = Result (10 MARKS) + Discussion (5 MARKS) + Conclusion (5 Marks) 20

Total (A) + (B) 100

Digital Electronics

Name:……………………………….…………………….. Registration No.: ………………………...

Class:……………………………………………………… Date :……………………………………...

EXPERIMENT :4
TOPIC : JK FLIP-FLOP

RESULTS

A. JK FLIP-FLOP

INPUT OUTPUT
OPERATION
J K CLK Q Q

0 0

0 1

1 0

1 1

Table 4.1 Truth Table for JK Clocked Flip Flop

INPUT OUTPUT
OPERATION
J K CLK Q Q

0 0

0 1

1 0

1 1

Table 4.1 – Truth Table for JK Clocked Flip Flop

Experiment 4: JK Flip-Flop Page - 1 -

Digital Electronics

DISCUSSIONS

a. What are the differences between SR flip flop and JK Flip Flop?

CONCLUSION

Experiment 4: JK Flip-Flop Page - 2 -