Time Allowed: 45 min

Mid term Exam CCE Students

Total Marks: 20
Digital Design 2040 - 2041

Solve the following Questions

First Question:

(a) Design a sequential circuit using the state diagram shown in figure 1, use D-flip flops.
XY
(b) Draw (ONLY ) the following circuits: Z
 4-bit up-down Synchronous counter.
10/0
 4-bit register with load control. 00/1
11/0
 3-bit shift left register. 01/0
0
(c) Define the following: 10/0
 Flip flop. 1 11/1
 n-bit register. 00/1
 n-bit counter. 01/0 Figure 1
 Serial and parallel loading (compare in a table).
(12 marks)

Second Question:

A building consists of 4 stages with an underground stage ( ‫)مبىن ممىن مأربعىن مواببىن ممىن موررمأرىىن‬,
labeled 0, 1, 2, 3, 4. It is needed to design the counter circuit for its lifter (‫)مصعد‬, hence;
o Draw the state diagram for the counter count sequence.
o Design the counter circuit using (J-K flip flop).
(8 marks)

With Best Wishes