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    This document is a final exam for a computer architecture course consisting of 7 questions testing various concepts: 1) Drawing hardware for register operations and memory addressing. 2) Explaining the structure and operations of memory units including address registers, data registers, and reading/writing memory. 3) Showing the contents of accumulator and index registers after a program stops executing based on initial register values and memory contents. 4) Illustrating the structure of a 3-bit bus connecting 4 registers. 5) Describing the steps of an instruction cycle and deriving the control logic for reading memory. 6) Executing the next instruction in a basic computer given register and memory contents. 7)

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    This document is a final exam for a computer architecture course consisting of 7 questions testing various concepts: 1) Drawing hardware for register operations and memory addressing. 2) Explaining the structure and operations of memory units including address registers, data registers, and reading/writing memory. 3) Showing the contents of accumulator and index registers after a program stops executing based on initial register values and memory contents. 4) Illustrating the structure of a 3-bit bus connecting 4 registers. 5) Describing the steps of an instruction cycle and deriving the control logic for reading memory. 6) Executing the next instruction in a basic computer given register and memory contents. 7)

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    7 views2 pages

    Cce Summer Cop Arch Report

    Uploaded by

    mohamed ahmed
    This document is a final exam for a computer architecture course consisting of 7 questions testing various concepts: 1) Drawing hardware for register operations and memory addressing. 2) Explaining the structure and operations of memory units including address registers, data registers, and reading/writing memory. 3) Showing the contents of accumulator and index registers after a program stops executing based on initial register values and memory contents. 4) Illustrating the structure of a 3-bit bus connecting 4 registers. 5) Describing the steps of an instruction cycle and deriving the control logic for reading memory. 6) Executing the next instruction in a basic computer given register and memory contents. 7)

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    of 2

    Computer architecture

    report
    Time Allowed: 2 Hours

    Final Exam Total Marks: 50


    Code: CSE 213
    Computer Architecture CCE Students
    1/6/2023
    Solve the following Questions
    address Contents
    (1) Draw the hardware for: 20 1555
    X1X3: R1R1+1, R3 0, R4R4+1, R2shr R2 21 2222
    22 7020
    X1X2: R2R1+R3 , R4R1 23 (5 marks)
    7010
    X1X2: R4R1+R3, R2 R3 24 7080
    (6 marks) 25 4027
    26 7001
    (2) What is the purpose of memory unit, then:
    27 0666
     Show the structure of 64X5 memory, what is the size of 28 7200
    29 C777
    the used AR and DR?
    30 4026
     What is the memory operation in the following: 31 7008
    32 7200
    o R2M[R1].
    222 F334
    o M[R2]R1. (6 marks) 555 0002
    666 FFFF
    (3) Consider the following memory contents: 777 0030

    Where: PC=20, AC=AB21, E=0. Show the contents of AC and E when the program stops.
    (10 marks)

    (4) Show in details the structure of 3-bit Bus using 4 registers each of 3-bit size.

    (6 marks)
    (5) For the basic computer:
    o Explain the steps of instruction cycle.
    o Derive the control logic gates for the Read terminal of the memory. (6 marks)

    (6) In the basic computer, AC=A22B, PC=20, M[20]=8200, M[200]=0111, M[111]=AB23.


    Show how the computer executes the next instruction.
    (6 marks)

    (7) Write assembly program for:

    a. Calculating the following logic operation: F=XY'Z'+X'YZ'+(X+Y'+Z)'.


    b. Perform the following arithmetic operations:
     F=2*A+B-C.
     F=A*B+C.
    c. Calculating the sum of elements of a vector starting from address 500 with length=100
    elements. (10 marks)
    With Best Wishes
    Prof. Dr Ahmed Ibrahim Saleh

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