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Institute of Technology
Class Test, February 2021
B.Tech. (CSE), Semester – IV
2CS401: Computer Architecture
Q.2 Replace the two memory instructions of the Basic computer by [07]
the following instructions:
ADM (opcode: 001) : M[AR] <- AC + (M[AR]’)
BR (opcode: 101) : If (AC > 0) then PC <- AR + 1
Give the sequence of microoperations needed to execute the
above instructions during the execute phase. Note that the
content of AC should not be changed unless it is specified in the
instruction. Use minimum number of timing signals for executing
each instruction.
Q.3 Show the contents in hexadecimal of registers PC, AR, DR, IR [07]
and SC of the basic computer when an instruction is fetched
from memory and executed. The initial content of PC is 3FF. The
content of memory at address 3FF is DA9F. The content of
memory at address A9F is 7C42. The content of memory at
address C42 is F328. The content of memory at address 328 is
0B94. Show the contents of the registers after the positive
transition of each clock pulse.
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Q.4 Design an arithmetic circuit with two selection variables S1 and [07]
S0 that generates the following arithmetic operations. Draw the
logic diagram of two typical stages.
S1 S0 Cin = 0 Cin = 1
0 0 F = A’ + B’ F = A’ + B’ + 1
0 1 F=B F=B+1
1 0 F = B’ – A’ – 1 F = B’ – A’
1 1 F = A + B’ F = A + B’ + 1
Q.5 The content of PC in the basic computer is 6B9. The content of AC [07]
is E726. The content of memory at address 6B9 is B435. The
content of memory at address 435 is 82D1. The content of
memory at address 2D1 is 384C.
a) What is the instruction that will be fetched and executed
next?
b) Show the final content of AC after instruction execution.
c) Give the contents of registers PC, AR, DR, AC and IR in
hexadecimal and the values of E, I and SC in binary at the
end of the instruction cycle.
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