Electronics and Microprocessor Lab

ECE 326 and CCE 329

Lecture 4

Dr. Emad Badry

Lecturer at faculty of Engineering, Suez Canal University
emad.badry@eng.suez.edu.eg
 Basic Hardware Troubleshooting Methods

When a problem occurs, the list of potential causes is usually quite large. You must gather a sufficient amount of detailed
information and systematically narrow the list of potential causes to determine the problem. As a general guide to
troubleshooting a system, the following steps should be followed:
1. Gather information on the problem.
2. Identify the symptoms and possible failures.
3. Isolate point(s) of failure.
4. Apply proper tools to determine the cause of the problem.
5. Fix the problem.
Check the Obvious
After collecting information on the problem, make sure to first check for obvious faults: absence of DC power, blown
fuses, tripped circuit breakers, faulty burned-out indicators such as lamps, loose connectors, broken or loose wires,
switches in the wrong position, physical damages, boards not properly inserted.
Replacement
Assume that a given system has multiple circuit boards. The simplest and quickest way to fix a problem is by replacing the
circuit boards one by one with a known good board until the problem is corrected. This approach, of course, requires that
duplicate boards be available. Another drawback to this approach is that an outside source may be causing the fault, such as a
short in a connector; and by replacing the board, the fault is transferred to the new board.
Half-Splitting Method

In this procedure, you check for the presence or absence of a signal at a point halfway between input and output. If the signal is
present, you know the fault is in the second half. If the signal is absent, you know the fault is in the first half. Then you split
the defective half in half and check for a signal. The process is continued until a certain area of the system has been isolated.
This may be a single circuit board in a system with many circuit boards or a component on a given circuit board. In a large
system, this procedure can save a lot of time over moving down the line checking each block or stage as you go.
Signal-Tracing Method

Signal tracing is the procedure of tracking signals as they progress through a system from input to output. Signal tracing can
be used with half-splitting, where you check for a signal at each point from where the absence of a signal was detected.
Signal tracing can also begin at the output where there is an incorrect or absent signal and go back toward the input from
point to point until a correct signal is found. Also, you can begin at the input and check the signal and move toward the
output from point to point until the correct signal is lost. In both cases, the fault would be between the point and the output.
Of course, you must know what the signal is supposed to look like in order to know if anything is wrong.
Signal Substitution and Injection

Signal substitution is used when the system being tested has been separated from its signal source. A generator signal is
used to replace the normal signal that comes from the source when the system or portion of a system is recombined with
the part that normally produces the input signal. Signal injection can be used to insert a signal at certain points in the
system using the half-splitting approach.
 Field-Programmable Gate Arrays (FPGAs)

FPGAs are ICs that contain an array of identical logic blocks with programmable interconnections. The user can
program the functions realized by each logic block and the connections between the blocks. FPGAs have
revolutionized the way prototyping and designing is done in the world. The flexibility offered by reprogrammable
FPGAs has enhanced the design process. While different kinds of programmable devices had been around, when
Xilinx used SRAM storage elements to create programmable logic blocks and introduced its family of XC2000 devices
in 1985. There are a variety of FPGA products available in the market now. Xilinx, Altera, Lattice Semiconductor, and
Microsemi, are examples of companies that design and sell FPGAs.
The capacities of some FPGAs are specified in a number of look-up tables (LUTs). Due to the large capacity, it is
possible to prototype or even manufacture large systems in a single FPGA.
Organization of FPGAs
The interior of FPGAs typically contains three elements that are
programmable:
• Programmable logic blocks
• Programmable input/output blocks
• Programmable routing resources
Arrays of programmable logic blocks are distributed within the
FPGA. These logic blocks are surrounded by input/output (I/O)
interface blocks. These I/O blocks can be considered to be on
the periphery of the chip. They connect the logic signals to
FPGA pins. The space between the logic blocks is used to route
connections between the logic blocks. Programmable logic
blocks are created by using multiplexers, look-up tables, and
AND-OR or NAND-NAND arrays. For a programmable
interconnect, “programming” means making or breaking
specific connections. This is required to interconnect various
blocks in the chip and to connect specific I/O pins to specific
logic blocks. Programmable I/O blocks denote blocks that can
be programmed to be input, output, or bidirectional lines.
Typically, they can also be “programmed” to adjust the
properties of their buffers such as inverting/non-inverting,
tristate, passive pull-up, or even to adjust the slew rate, which is
the rate of change of signals on that pin.
Different FPGA manufacturers use different names (often trademarked) to denote their logic blocks. In the Xilinx literature,
a programmable logic block is called a Configurable Logic Block (CLB). Altera calls their basic blocks Logic Elements
(LE) and a collection of 8 or 10 of them Logic Array Blocks (LABs).
Many look-up-table–based FPGAs use a 4-variable look-up table plus a flip-flop as
the basic element and then combine several of them in various topologies.
FPGA-based System Design

The flow starts with the design specifications. The functional

description of the system is written in a hardware description
language (VHDL or Verilog) in the behavioral modelling style.
The functionality is checked by performing behavioral
simulation using a set of test vectors. The next step is to perform
synthesis. The synthesis step translates the behavioral netlist
into a gate level netlist. The synthesis step requires the
behavioral netlist, the selected device family (e.g., Spartan,
Virtex) name, and other synthesis directives. The gate level
netlist is again checked for functionality. The user constraints
are to be specified for timing, power, etc. Then using the user
constraints and gate level netlist, the implementation step is
performed. In the implementation step, the mapping of the logic
gates are done to the available functional blocks in the FPGA,
and the placement and routing are done to complete the
implementation.
Next, the bitstream file is generated which contains the programming data. The bitstream file is downloaded through the
JTAG cable into the FPGA device. Downloading the bitstream into the FPGA device is often referred to as FPGA
programming. The final step is to test the FPGA device in the system, and debug for any problems in functionality.
 Hardware Description Language (HDL)

Hardware description languages (HDLs) are a popular mode of design entry for digital circuits and systems. There are
two popular HDLs—VHDL and Verilog. Before the advent of HDLs, designers used graphical schematics and
schematic capture tools to document and simulate digital circuits. A need was felt to create a textual method of
documenting circuits and feeding them into simulators in the textual form as opposed to a graphic form.

Verilog is a hardware description language used to describe the behavior and/ or structure of digital systems. Verilog
is a general-purpose hardware description language that can be used to describe and simulate the operation of a wide
variety of digital systems, ranging in complexity from a few gates to an interconnection of many complex integrated
circuits.
 Verilog

The general structure of a Verilog code is a module description.

A module is a basic building block that declares the input and
output signals and specifies the internal operation of the
module. The module declaration has the name two_gates and
specifies the inputs and outputs. A, B, and D are input signals,
and E is an output signal. The signal C is declared within the
module as a wire since it is an internal signal. The two
concurrent statements that describe the gates are placed and the
module ends with endmodule. All the input and output signals
are listed in the module statement without specifying whether
they are input or output

The module I/O declaration part can be considered as the black

box picture of the module being designed and its external
interface; that is, it represents the interconnections from this
module to the external world.

Input port signals are of keyword input, output port signals are of keyword output,
In the port-declarations section, we can declare internal signals that are used within the module. The module contains other
module instances that describe the operation of the module.