Debugging

Debugging, in computer programming and engineering, is a multistep process that

involves identifying a problem, isolating the source of the problem and then either
correcting the problem or determining a way to work around it.

In hardware development, the debugging process looks for hardware components

that are not installed or configured correctly. For example, an engineer might run a
joint test connection to debug connections on an integrated circuit.

White Box Testing

White Box Testing is a testing technique in which software’s internal structure,

design, and coding are tested to verify input-output flow and improve design,
usability, and security. In white box testing, code is visible to testers, so it is also
called Clear box testing, Open box testing, Transparent box testing, Code-based
testing, and Glass box testing. The term “WhiteBox” was used because of the see-
through box concept.

Black box

Black box testing involves testing a system with no prior knowledge of its internal
workings. A tester provides an input, and observes the output generated by the
system under test. This makes it possible to identify how the system responds to
expected and unexpected user actions, its response time, usability issues and
reliability issues.

Black box testing is a powerful testing technique because it exercises a system end-
to-end.

Alphanumeric codes (also known as character codes) are defined as binary

codes used to represent alphanumeric data. The codes write alphanumeric
data, including letters of the alphabet, mathematical symbols, numbers,
and punctuation marks, in a form that is easily understood by a computer.
Input-output devices such as keyboards, monitors, and mouse can be
interfaced using these codes.

integrated circuit

An integrated circuit or monolithic integrated circuit (also referred to as

an IC, a chip, or a microchip) is a set of electronic circuits on one small flat
piece (or "chip") of semiconductor material, usually silicon. Large numbers
of miniaturized transistors and other electronic components are integrated
together on the chip. This result in circuits that are orders of magnitude
smaller, faster, and less expensive than those constructed of discrete
components, allowing a large transistor count.

7400 IC

The IC 7400 can be used to build a number of devices, which consists of

four nand gates. The extended family of digital ICs is 7400 series ICs. This
series ICs mainly include different discreet logic chips like logic gates along
with different registers, RAM units, and decoders.

System configuration

System configuration is a term in systems engineering that defines the

computer hardware, the processes as well as the various devices that
comprise the entire system and its boundaries
HDL

A hardware description language (HDL) is a language used to describe the

behaviour or structure of digital circuits (ICs). HDLs are also used to
stimulate the circuit and check its response. Many HDLs are available, but
VHDL and Verilog are by far the most popular.

-- VHDL Code for AND gate

-- Header file declaration

library IEEE;
use IEEE.std_logic_1164.all;

-- Entity declaration

entity andGate is

port(A : in std_logic; -- AND gate input

B : in std_logic; -- AND gate input
Y : out std_logic); -- AND gate output

end andGate;

-- Dataflow Modelling Style

-- Architecture definition

architecture andLogic of andGate is

begin

Y <= A AND B;

end andLogic;

-- VHDL Code for OR gate

-- Header file declaration

library IEEE;
use IEEE.std_logic_1164.all;
-- Entity declaration

entity orGate is

port(A : in std_logic; -- OR gate input

B : in std_logic; -- OR gate input
Y : out std_logic); -- OR gate output

end orGate;

-- Dataflow Modelling Style

-- Architecture definition

architecture orLogic of orGate is

begin

Y <= A OR B;

end orLogic;

Half adder

library IEEE;
use IEEE.std_logic_1164.all;
entity half_adder is
port(A,B: in std_logic;
sum,carryout: out std_logic
);
end half_adder;
architecture flow of half_adder is
begin
sum<= A xor B;
carryout<=A and B;
end flow;
Behavioral Modeling of 4:1 mux

library ieee;

use ieee.std_logic_1164.all;

entity MUX4_1 is

port ( Sel : in std_logic_vector(1 downto 0);

A, B, C, D : in std_logic;

Y : out std_logic );

end MUX4_1;

architecture behavior of MUX4_1 is

begin

process (Sel, A, B, C, D)

begin

if (Sel = "00") then

Y<= A;

elsif (Sel = "01") then

Y<= B;

elsif (Sel = "10") then

Y<= C;

else

Y<= D;

end if;

end process;

end behavior;