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Chapter 4
INTEL 8085
MICROPROCESSOR
INSTRUCTION SET AND
PROGRAMMING
Dr. Marwa Gamal
PROGRAM STATUS WORD
The PSW may be pushed on to stack to save
the ACC and flags status during interrupt
execution and subroutine execution.
The 8085 has single-byte, two-byte and
three-byte instructions. In case of two- or
three-byte instructions
The lower-order byte/bytes contain data or
address. Thus the first byte contains the
operation code, while the other bytes contain
the operand data or address.
INSTRUCTIONS FORMAT
ADDRESSING MODES
Immediate addressing
Register addressing
(The data is stored in a register or in the register pair
specified.)
Direct addressing
Register indirect addressing
There are two instructions (LDAX and STAX) for transfer of
data from and to memory pointed by the address stored
in register pairs B–C and D–E.
Register indirect addressing
INSTRUCTION SET
Symbols and Abbreviations (Table page
128)
Data Transfer Instructions
MOV r1, r2..........(Move Register)
MOV r, M..........(Move from Memory)
MOV M, r..........(Move to Memory)
MVI r, data….(Move to Register Immediate)
MVI M, data........(Move to Memory
Immediate)
Data Transfer Instructions
LXI rp, data 16...(Load Register pair
Immediate)
LDA addr............(Load Accumulator Direct)
STA addr............(Store Accumulator Direct)
LHLD addr.........(Load H and L Direct)
SHLD addr..........(Store H and L Direct)
LDAX rp.............(Load Accumulator Indirect)
STAX rp.............(Store Accumulator Indirect)
XCHG.........(Exchange H and L with D and E)
Data Transfer Instructions
Arithmetic Instructions
All instructions in this group affect the Zero, Sign,
Parity, Carry, and Auxiliary Carry flags according to
the standard rules.
The arithmetic instructions are given below:
ADD r..........(Add Register)
ADD M..........(Add Memory)
ADI data..........(Add Immediate)
ADC r..........(Add Register with Carry)
ADC M..........(Add Memory with Carry)
ACI data..........(Add Register with Carry)
SUB r............(Subtract Register)
Arithmetic Instructions
SUB M..........(Subtract Memory)
SUI data..........(Subtract Immediate)
SBB r..........(Subtract Register with Borrow)
SBB M..........(Subtract Memory with Borrow)
SBI data..........(Subtract Immediate with
Borrow)
INR r..........(Increment Register)
INR M..........(Increment Memory)
DCR r..........(Decrement Register)
DCR M..........(Decrement Memory)
Arithmetic Instructions
INX rp..........(Increment Register pair)
DCX rp..........(Decrement Register pair)
DAD rp..........(Add Register pair to H and L)
DAA..........(Decimal Adjust Accumulator)
1. If the value of the least significant 4-bits of the accumulator
is greater than 9 or if the AC flag is set, 6 is added to the
accumulator.
2. If the value of the most significant 4-bits of the accumulator
is now greater than 9, or if the CY flag is set, 6 is added to the
most significant 4-bits of the accumulator.
Arithmetic Instructions
Logical Instructions
ANA r............(AND Register)
ANA M............(AND Memory)
ANI data............(AND Immediate)
XRA r............(Exclusive OR Register)
XRA M............(Exclusive OR Memory)
XRI data............(Exclusive OR Immediate)
ORA r............(OR Register)
ORA M............(OR Memory)
ORI data............(OR Immediate)
Logical Instructions
CMP r............(Compare Register)
CMP M............(Compare Memory)
CPI data............(Compare Immediate)
RLC...............(Rotate Left)
RRC............(Rotate Right)
RAL............(Rotate Left through Carry)
RAR............(Rotate Right through Carry)
CMA............(Complement Accumulator)
CMC............(Complement Carry)
STC............(Set Carry)
Logical Instructions
EXAMPLE
Branch Instructions
There are two types of branch instructions—
unconditional and conditional.
unconditional branch, the branch address
(i.e. the address of the memory location to
which the jump is made) is loaded into the
program counter (PC),
Conditional branch, the branch address is
loaded into the PC, only if the specified
condition is satisfied.
Branch Instructions
JMP addr...........(Jump)
J Condition addr...........(Conditional Jump)
CHL...........(Jump H and L Indirect – Move H and L to
PC)
Subroutine call and return instructions
Other types of branch instructions like
CALL,
C.Condition,
RET,
R. Condition,
and RST.
These instructions allow the program to jump to a certain
place to execute a number of instructions and then return
to the same original place.
storing the address of memory location from where the
jump was made (called return address) in stack.
Subroutine call and return instructions
Subroutine call and return instructions
Subroutine call and return instructions
CALL addr (Call)
C Condition addr...........(Conditional Call)
RET...........(Return)
R Condition...........(Conditional Return)
RST n...........(Restart)
Subroutine call and return instructions
Stack I/O and Machine Control Instructions
PUSH rp.............(Push)
PUSH PSW.............(Push Program Status Word)
POP rp.............(Pop)
OP PSW.............(Pop Program Status Word)
XTHL.............(Exchange Stack top with H and L)
SPHL.............(Move HL to SP)
IN port.............(Input)
OUT port.............(Output)
EI.............(Enable Interrupts)
DI.............(Disable Interrupts)
Stack I/O and Machine Control Instructions
HLT.............(Halt)
NOP.............(No Operation)
RIM.............(Read Interrupt Mask)
Stack I/O and Machine Control Instructions