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A Power Management System for Energy Harvesting and

Wireless Sensor Networks Application Based on a Novel
Charge Pump Circuit
ab b a b b a
R. Aloulou , P-O Lucas De Peslouan , H. Mnif , F. Alicalapa , Lan Sun Luk & M. Loulou
a
LETI Lab,University of Sfax, Tunisia.
b
LE2P Lab, University of La Reunion Saint Denis, Reunion (France)
Accepted author version posted online: 15 Jul 2015.

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To cite this article: R. Aloulou, P-O Lucas De Peslouan, H. Mnif, F. Alicalapa, Lan Sun Luk & M. Loulou (2015): A Power
Management System for Energy Harvesting and Wireless Sensor Networks Application Based on a Novel Charge Pump Circuit,
International Journal of Electronics, DOI: 10.1080/00207217.2015.1072848

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 Publisher: Taylor & Francis

Journal: International Journal of Electronics

DOI: 10.1080/00207217.2015.1072848
A Power Management System for Energy Harvesting and Wireless Sensor Networks
Application Based on a Novel Charge Pump Circuit
R. Alouloua,b, P-O Lucas De Peslouanb, H. Mnifa, F. Alicalapab, J. D. Lan Sun Lukb and M. Louloua

t
a
LETI Lab,University of Sfax, Tunisia.

ip
aloulourahma@yahoo.fr, hassene.mnif@ieee.org, mourad.loulou@ieee.org
b
LE2P Lab, University of La Reunion Saint Denis, Reunion (France)
po.peslouan@gmail.com, frederic.alicalapa@univ-reunion.fr, lanson@univ-reunion.fr

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Abstract

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Energy Harvesting (EHV) circuits are developed as an alternative solution to supply energy to
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autonomous sensor nodes in Wireless Sensor Networks (WSN). In this context, this paper presents a
micro-power management system for multi energy sources based on a novel design of charge pump circuit

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(CPC) to allow the total autonomy of self-powered sensors. This work proposes a low-voltage and high
performance charge pump suitable for implementation in standard CMOS technologies. The charge
pump (CP) design was implemented using Cadence Virtuoso with AMS 0.35μm CMOS technology
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parameters. Its active area is 0.112mm². Consistent results were obtained between the measured findings
of the chip testing and the simulation results. The circuit can operate with an 800 mV supply and generate
a boosted output voltage of 2.835V with 1MHz as frequency.
Index terms—Wireless Sensor Networks (WSN); Energy harvesting (EHV); micro-power management
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system; charge pump circuit (CPC).

1. INTRODUCTION
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In recent years, much research has been oriented for Wireless Sensor Networks (WSN) due to
their wide application range in a variety of fields such as military, medical, environmental and
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industrial.
Sensor networks are the spatial distribution of large numbers of sensors with their
computation and communication capabilities (Freudiger, Jadliwala, Hubaux, Niemi, &
Ac

Ginzboorg, 2013). Since these nodes are deployed in various environments, including remote
and dangerous environments such as volcanic regions, the major problem in WSN has
become how to power a wireless transmission that requires higher power levels from limited-
power resources (Belleville, et al 2010). Consequently, energy is the key issue that WSN
deals with. Therefore, the concept of energy harvesting from the environment (light,
vibration, radio frequency radiation) has gained popularity in recent years. (Iskender, & Genc,
2010). Since, the harvested energy level is very small, a power management subsystem should
 be carefully designed to extract as much power as possible from the transducers and transfer it
to the electronic devices (Shao, Tsui, & Ki, 2010). Hence, main critical constraints have to be
taken into consideration: low-power consumption, low- cost process integration within a
minimum chip area at a high generated output voltage (Do, 2011).
The remaining of this paper is organized as follows: in section two a review of the basic
concept of energy harvesting sources is investigated. The third section, detailed the block
diagrams of the proposed energy harvesting micro-power system. As the power management

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circuit was mainly built in a CPC, section four proposes a novel and efficient design of a
charge pump. This new design is also detailed and discussed in section four. In order to prove

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the availability of the new design of CP, the circuit implemented using AMS 0.35µm CMOS
process is simulated as described in section five. Section six, however, is devoted to describe

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the experimental results and to discuss their concordances with the simulation findings
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presented in section five. Finally, conclusions are drawn in section seven.

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2. ENERGY HARVESTING SOURCES

Energy harvesting can be defined as capturing energy in order to provide electricity to supply
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devices directly or to be stored in capacitors or batteries for later use.
Energy harvesting sources such as light, radio frequency (RF) radiation, thermal, and
vibration energy may enable wireless sensor nodes to be completely battery independent and
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self powered (Viehweger, Keutel, & Kanoun, 2014). Table1 presents a general overview of
the concept of the basic concept of environmental energy harvesting sources and their
estimated harvested power (Chang, et al, 2010, Ramadass, & Chandrakasan, 2010).
pt

Table 1: Comparison of baisic,ambient energy sources and their estimated,harvested power

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Energy,harvesting Energy transducers Estimated power density

resources
Light,intensity Solar cell or PVcell - Indoor:10 μW/cm2
- outdoor :10 mW/cm2
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Thermal Thermo-electric,Generator - Human:40 μW/cm2

(Temperature differences) (TEG) - Industrial :10 mW/cm2
Vibrations/Motions Piezoelectric cell (PZ) - ~ 200 μW
(Variability of vibration) Electrostatic cell(ES) - 50 - 100 μW
Electromagnetic cell(EM) - Less than 1μW
RF/Micro Wave Transmitter (rectenna) - 0.1-100 μW/cm2
(RF emission)

3. ENERGY HARVESTING MICRO-POWER SYSTEM

 To guarantee an autonomous self-powered sensor network, ambient energy is harvested to
supply the system load. This harvested energy, however, is not suitable to be directly used as
a power supply due to the random environmental conditions and the availability of resources
over time (Lopez, Ortega & Jurado, 2015). Therefore, the key component in a micro power
harvesting system is the power management unit (PMU) that provides a hybridization of
diverse energy sources, and a maximization of the DC regulated voltage level to supply the
load unit and store energy for later use (Vullers, van Schaijk, Doms, Van Hoof, & Mertens,

t
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2009, Chapman, 2009). This storage operation is controlled by a voltage regulator, which is
responsible for monitoring the voltage storage level as described in figure 1.

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There are two main alternatives to store the regulated harvested energy, namely, the super-
capacitors and the rechargeable battery (Roundy, Otis, Chee, Rabaey, & Wright, 2003). In the

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context of wireless sensor networks and energy harvesting application where sensor nodes are
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deployed in remote and dangerous environments, the lifetime of the remote sensors is greatly
important in such an application. Therefore, the super-capacitor is used as a storage device in
this work (Figure 1). an
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Receiver power Power Management Storage System
Unit (PRU) Unit (PMU) Unit (SU) Load Unit
Energy
Transducers Charge pump Voltage E/R
-PV Regulator
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-TEG Buffer µP
-RF Clock generator Storage device Sensor
-VIB (super-capacitor)
Bandgap ….
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Figure 1: Block diagrams of the proposed energy harvesting Micro-power system

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As described in table 1 where some estimation of the harvested power levels are given, the
choice of energy harvesting source is critical. It requires an in-depth understanding of several
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design constraints and tradeoffs, such as power requirement, cost, and area.
For these various considerations, light and thermal resources can be significant energy
harvesting sources and can guarantee a tradeoff between different design requirements
(Kalogirou, 2013).
Accordingly, a solar cell of type (ASI) from SCHOTT Company (Table 2) and a Peltier cell
from Advanced Thermoelectric Company (Table 3), were used for the experimental test
bench. The measured characteristics of each cells display a good agreement with the
 manufacturer's data (Aloulou, et al, 2014).

Table 2 Specifications of the PV Cell (Aloulou, et al,2014)

Company SCHOTT Company
Cell type ASi :Amorphous silicon

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Size 21 cm² (7cm x 3cm)

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Standard STD AM1.5G
Maximum Power MPP [mW] 98
Short circuit Current ISC [mA] 35

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Open Circuit Voltage VOC [V] 4.9
Current, max power Impp [mA] 28

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Voltage, max power Vmpp [V] 3.5
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Table 3 Thermoelectric Module Characteristics (Palacios & Li,1998)

Description Thermoelectric Cooling Module
Company
Size
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Maximum Current, Imax [A]
Advanced Thermoelectric
1.5 inch (40mm x 40mm)
6
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Maximum Voltage, Vmax [V] 15.5
Cooling Capacity, Qmax [W] 53
Maximum Delta T, ΔT max [°C] 70
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4. POWER MANAGEMENT UNIT (PMU)

Since the energy extracted from harvesting sources is very low, an efficient power
management unit is required to boost the output energy of transducers. This is to meet the
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required amount of power by the system or to be stored in an super-capacitor. This paper

proposes a power management system mainly based on a novel charge pump as DC/DC
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converter (Figure 2). This new circuit of pump is driven by a clock generator and a voltage
reference designed and detailed in (Aloulou, et al, 2015).
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Figure 2. Architecture of the proposed Power Management Unit (PMU)

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To validate the circuit, we set up the output voltages of the PV cell or the TEG modules to

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800 mV or higher to avoid the problem of threshold in charge pump circuit. When the voltage
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extracted from the transducers reaches 0.8V, the oscillator starts operation and generates two
anti-phase pumping clocks in order to drive the charge pump through the buffer.
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As the CPC is the key component in the micro-scale energy the next section is given to present
a novel design of charge pump.
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5. CHARGE PUMP DESIGN

The charge pump circuit as a DC power converter is the key element in a micro-scale energy
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harvesting system to adjust the transducers’ voltages (often less than 1V) into suitable levels to
be stored in a the super-capacitor (Kimball, Flowers, & Chapman, 2004). Thus, in this work,
the main challenge was to design a novel design of charge pump able to generate a high
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enough output voltage level to supply the autonomous sensors nodes

5.1. BASIC,CONCEPT, AND,OPERATION OF CHARGE PUMP CIRCUIT

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Most MOS charge pumps are based on the circuit proposed by Dickson ( Dickson, 1976). This
circuit consists of two anti-phase pumping clocks, Clk and Clk_bar, which have the same
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voltage amplitude of Vclk as presented in figure 3. The diode-connected NMOS transistors

operate as switches characterized by the MOS threshold voltage Vtn (Wu, Chang, 1998,
Aloulou, Mnif, Alicalapa, & Loulou, 2011).
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Figure 3. Dickson charge pump circuit

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In steady state, the output voltage is given by
V = V + N( V −V )−V (1)

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Where Vin is the input voltage, and N is the number of stages (Chang, & Hu, 2006, Tanzawa,

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& Tanaka, 1997).
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However, the successive increase of the voltage on internal nodes causes an increase between
the substrate and the sources of NMOS transistors and consequently an increase in the
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threshold voltage of each switch, due to the body effect. This causes the degradation of the
voltage gain as expressed by (1) (Choi, Park, Kim, Jung, & Suh, 1997). To solve this problem,
various technological solutions, have been proposed, such as creating individual wells to
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separate the substrates of transistors or using transistors with zero threshold voltage (Alicalapa,
Lan Sun Luk, Aloulou, Mnif, & Loulou, 2012). Despite, the good results generated by such
ed

solutions, we notice that such a process is rather expensive and technologically complicated.
To overcome this aforementioned limitation, in (Wu, Chang, 1998), the authors suggested
using MOS switches with backward control by using the established high voltage of the next
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stage. These switches named CTS (Charge Transfer Switch) are used to increase the voltage
pumping gain (Aloulou, Mnif, Alicalapa, & Loulou, 2011). These structures are called NCP-1
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and NCP-2. In our previous work (Aloulou, Mnif, Alicalapa, & Loulou, 2011) and (Alicalapa,
Lan Sun Luk, Aloulou, Mnif, & Loulou, 2012) more details are given.
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5.2. PROPOSED CHARGE PUMP CIRCUIT

In order to reach a better performance in the context of energy harvesting application and low
voltage circuit, a new charge pump was proposed and presented in figure 4.
 t
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Figure 4. The proposed charge pump design

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As mentioned in our previous researche in (Aloulou, Mnif, Alicalapa, & Loulou, 2011) and
(Alicalapa, Lan Sun Luk, Aloulou, Mnif, & Loulou, 2012), the NCP-1 is the most suitable

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circuit for low voltage operation. Therefore, in the proposed circuit, the idea was to design a
heterogeneous design of CP (NCP-1/NCP-2) in order to benefit from both advantages. In the

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novel design, the first two stages consist only of the charge pump NCP-1 to boost the low input
voltage harvested from transducers. This improvement on the design allows a new circuit that
is far less complicated than the conventional structure (NCP-2), in order to decrease the circuit
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size and achieve a better performance. Hence, the proposed CP exploits a dynamic charge
pumping control scheme where the pass transistors (MN and MP) are introduced only at the
third stage to control each of CTS switches that can be turned off completely when required.
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On the other hand, the conventional charge pump suffers from increased drain-source voltage
drop across every charge transfer MOS switch. Hence, if the problem of limitation of the
configured output stage diode can be solved; a better pumping performance can be achieved
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(Aloulou, Mnif, Alicalapa, & Loulou, 2011). Therefore, in the proposed design the switch of
the output stage is replaced by a single PMOS switch, MP_out to avoid the problems in the
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inner CTSs of the output stage.

Referring to figure 4, the control of the MP_out switch is obtained by connecting the gate of
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MP_out to the CTS MOS switch of the previous stage. The operation of the modified output
stage can be explained as follows: when Clk goes high, voltage at stage 7 is settled to the
highest level. This high potential allows MN5 to be turned on, MP5 to be turned off, and MS7
to be turned off. Hence the transistor MP_out is forced to be turned on. Equation (2), justifies
that the activation of this output transistor MP_out guarantees high voltage transfer efficiency
and provides a maximum boosted output voltage.
≈( + )− ( _ ) (2)
 Since ( _ ) was very small, no voltage gain has been lost in the output switch. This
improvement guarantees a maximum transfer of charge to the output stage when the MP_out
is turned on and also led to the decrease of the total size area. Conversely, for low Clk, MN5
is turned off, MP5 is turned on, and MS7 is turned on. Consequently the transistor MP_out is
turned off and led to the isolation of the output capacity from the forestage. To understand
better the operation of the proposed design, Table 4 reveals the details of each voltage node at
different pumping clock cycles.

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Table 4. Voltage nodes at different clock cycles

When CLK goes low When CLK goes High

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V2 is changed to V2+ΔV V1 is changed to V1+ ΔV
V4 is changed to V4+ ΔV V3 is changed to V3+ ΔV
V6 is changed to V6+ ΔV V5 is changed to V5+ ΔV

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Vj : the highest voltage V7 is changed to V7+ ΔV

(Vj= VCj+ ΔV) (j ∈2,4,6) Vi : the highest voltage
MN2 MN4 are ON (Vi= VCi+ ΔV) (i ∈1,3,5,7)
MP2 MP4 are OFF
MS1 MS3 MS5 are OFF
MP_OUT is OFF
an MN1 MN3 MN5 ON
MP1 MP3 MP5 OFF
MS2 MS4 MS6 OFF
C1 C3 C5 C7 is charged C2 C4 C6 is charged
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Cout is isolated from the forestage MP_OUT is ON maximum transfer of charge

The operation of the proposed structure can be summarized as follows: As the clock CLK1 is
ed

low, the switch MD1 is turned ON and the voltage at node 2 is higher than node 1.
Afterwards, MP1 is closed (turned on) and forces the transistor MS1 to be connected to node
2. Consequently, the switch MS1 is completely closed and the voltage drop is avoided. Also,
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in this condition MN1 is turned OFF and the voltage at node 1 is equal to the input harvested
voltage VIN. For the next clock half cycle, where CLK is high, the switch MD1 turns OFF,
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then, both the voltage at node 2 and node 1 are equal and thereafter MP1 is turned OFF.
Since, the voltage at node 1 is higher than VIN. So, MN1 is turned on, the gate of MS1 is
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forced to be connected to VIN and consequently to be OFF. Hence, the problem of reverse
charge sharing was solved, and the efficiency was improved.

6. SIMULATIONS RESULTS

In order to evaluate the proposed CP design and compare it to the conventional structures,
various simulations are performed using 0.35μm CMOS process parameters. All the
simulations were carried out at 1MHz. The values of output capacity and pumping capacitors
 in all the circuits are 150pF and 10pF, respectively. The number of pumping stages is N=7
and the supply voltage is 800 mV.
Figure 5 displays the simulation comparison results for Dickson, NCP-2, and the proposed
charge pump.
3.5

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2.5

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Output Voltage (V)

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1.5

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0.5

0
Dicks_CP NCP2_CP Proposed_CP

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Figure 5. Output voltages of various seven-stage charge pumps

As illustrated in Figure 5, we can observe that the output voltage for the proposed design is
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the highest for the same stage number and input voltage compared to previous architectures.
The output can reach above 2.835V for 0.8V input voltage. Under the same condition, the
output voltage is 2.1V for the Dickson charge pump and is 2.3V for the NCP-2.
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As a result, through the proposed charge pump, the number of stages and chip areas could be
reduced for the applications where high output voltage and low voltage input are required.
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Figure 6 shows Spice simulation comparison results of output voltage at different low supply
voltages. The circuit’s parameters are identical to those used in the simulations for Figure 5.
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 8

Pro p o s e d C P
7
N C P-2 C P

6 D i cks o n C P

Ou p u t Vo l ta g e (V)
5

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3

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2

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1
0 .8 1 1 .2 1 .4 1 .6 1 .8 2
Su p p l y Vo l ta g e (V)

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Figure 6. Comparisons results of output voltages versus supply voltage
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From figure 6, it can be seen that the novel design presents the best performance for low

system.
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voltage design which is very beneficial in the quest of such applications for energy harvesting

In this same context, low power design is also essential for energy-constrained systems.
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Therefore, efficiency and power dissipations have been investigated for charge pumps
topologies. Table 5 provides data which tend to indicate that the proposed design reaches the
best efficiency for the smallest area. Also, this table gives a comparison between the figures
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of merit FOM (Equation 3) which reflects the advantages of the proposed structure.
Pout . η (3)
FOM =
total area
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Table 5: Comparison results of area and efficiency

NCP-2 Proposed design

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Area of transistors 1023,75 µm² 266 µm²=25% of initial area =>

gain of 75% of silicium surface
Area of capacity Ci 8 * 0.039330mm² 7 * 0.039330mm²
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Efficiency 35% 86%

FOM 0.097 2.218

These results prove that the proposed circuit improves the output voltage gain with 75% area
decrease.
Consequently, the proposed design allows the decrease in both size and power consumption
and produces a high voltage output and maximum charge transfer.
 7. EXPERIMENTAL RESULTS

To validate the above findings, the proposed circuit was designed, fabricated, and measured.
The test chip was fabricated using 0.35µm standard CMOS technology. Figure 7 show the
microphotograph of the proposed design.

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Figure 7. Die photo of the proposed circuit
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The summary of the measurement results is presented in Table 6. The measurements are
carried out with an external load capacitor of 150 pF.

Table 6. The measurement result summary of the proposed CPC

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Parameters Measured
Supply voltage range (V) 0.8-1.5
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Output voltage (V) 2.59-4

Pumping Frequency (MHz) 1
Area of the layout (mm²) 0.112
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Technology 0.35-µm CMOS

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Figure 8, is given to compare the simulated results to the measured findings of output voltages
as function of the supply voltages. However, Figure 9 is introduced to compare simulated and
measured output voltages versus the output currents.
 9

Si m u l a ti o n re s u l ts
7
Me a s u re m e n t re s u l ts
6

Vo u t (V)
4

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2

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0
0 .7 0 .8 0 .9 1 1 .1 1 .2 1 .3 1 .4 1 .5
Vi n (V)

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Figure 8. Output voltage of the proposed CP as a Vin function
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5 .5

Si m u l a ti o n re s u l ts Vi n =0 .8 V

4 .5
5
an Me a s u re m e n t re s u l ts Vi n =0 .8 V
Si m u l a ti o n re s u l ts Vi n =0 .9 V
Me a s u re m e n t re s u l ts Vi n =0 .9 V
Si m u l a ti o n re s u l ts Vi n =1 V
Me a s u re m e n t re s u l ts Vi n =1 V
4
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Vout (V)

3 .5

3
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2 .5

2
pt

1 .5
0 0 .5 1 1 .5 2 2 .5 3 3 .5
Io u t (µA)
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Figure 9. Output voltage of the proposed CP as a function of the output current

Referring to these figures and relying on the experimental tests, we can conclude, that
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measurement results display a good agreement with the simulated findings. The slight offset
observed between the simulated and the measured performances can be justified by the effect
of parasitic (resistances and capacitances) associated with metal wires, bonding pad and
bonding wires (Baker, 2011).
To show the reliability of the proposed CPC, the novel design is compared to other structures
in the literature. These comparisons are summarized in Table 7.
 Table 7. Performance comparison with other designs reported in the literature

(Dickson, (Jia, Ni, (Shin, (Lee, Kim, Song, (Ker, Chen, This
1976) Shi, & Dai, Chung, Park Kim, Kim & & Tsai, 2004) work
2007) & Min, 2000) Yoo, 2006)
Vin 14 0.9~2 1.4 3.3 1.8 0.8-1.5
Vout 3.9 3.2~6 11.4 4.5~5 8.39 2.59-4
Nb_stage 7 - 16 - 4 7
Freq (Hz) 1M 20M 3M 400K~600k - 1M
Ci(F) 2p 2p - - 1p 10p

t
Cload(F) 10p 20p - - 1p 150p

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Iout (A) 3.9µ 2µ 1µ - 5µ 2.55µ
area mm² 0.14 - - 0.25 - 0.112
Process - 0.35µm 1.5µm 0.13µm 0.35µm 0.35µm

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8. CONCLUSION

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Extracting energy from an ultra-low voltage source of harvesting energy requires an efficient
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micro power management system. In this context, this paper proposes a micro power
management circuit for multi energy sources based on a novel design of charge pump circuit
an
as a DC-DC converter to allow autonomous powered sensors and bring an environmentally-
friendly design with lower circuits costs.
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This charge pump is the key component in the micro power management design. It is
introduced to boost the output voltage of the transducers to a suitable level that enables energy
storage in an super-capacitor.
ed

This paper describes an improved and high performance charge pump design suitable for low
voltage operations and wireless sensor applications. Therefore theoretical analyses have been
presented to prove that the proposed design does not suffer from problems of conventional
pt

structures. This new charge pump can, therefore, reduce the threshold voltage drop, eliminate
the body effect completely, and then improve the pumping gain.
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From simulation results, it has been asserted that the novel charge pump generates higher
voltage than conventional circuits for the same stage number, which makes it very interesting
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to low power supply applications. Hence, it can be concluded, that the proposed design
follows the performance predicted by the theoretical analysis. The circuit provides a boosted
more effective voltage level than the other circuits with a 75% optimization design in terms of
die area compared to the basic structure.
Finally, the chip testing, proved that the proposed DC/DC charge pump generates a stable DC
(2.59 V) voltage from 800 mV supply for harvesting energy applications with low power
dissipation and high pumping efficiency reaching as high as 86%.
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t
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