Professional Documents
Culture Documents
PERFORMANCE ENHANCING
TECHNIQUES -SESSION-2
Ms.P.Latha M.E(Ph.D)
Associate Professor,
Department Of Electronics and Communication Engineering,
R.M.K. Engineering College
1
RECAP & OUTLINE
Recap of previous webinar
• Components Of Computer
• Performance Enhancing ideas
• Performance Measurement Equations
Outline Of Today’s Webinar
• Performance calculations
• Power walls
• MIPS Instructions
2
Problems on Performance:
Problem 1)
3
Problem 2)
4
Problem 3)
5
Problem 4)
6
7
Power wall
Clock rate and Power for Intel x86 microprocessors over eight generations and 25 years.
8
Power Wall Contd..
The graph shows the increase in clock rate and power of eight generations of Intel microprocessors
over 30 years. Both clock rate and power increased rapidly for decades, and then flattened off
recently. The reason they grew together is that they are correlated, and the reason for their recent
slowing is that we have run into the practical power limit for cooling commodity microprocessors.
Just as measuring time in seconds is a safer measure of program performance than a rate, the energy
metric joules is a better measure than a power rate like watts, which is just joules/second.
The dominant technology for integrated circuits is called CMOS (complementary metal oxide
semiconductor). For CMOS, the primary source of energy consumption is so-called dynamic energy—
that is, energy that is consumed when transistors switch states from 0 to 1 and vice versa. The
dynamic energy depends on the capacitive loading of each transistor and the voltage applied:
Energy ∝ Capacitive load xVoltage2
9
Power Wall Contd..
This equation is the energy of a pulse during the logic transition of 0 → 1 → 0 or 1
→ 0 → 1. The energy of a single transition is then
Energy ∝ 1/2xCapacitive load xVoltage2
The power required per transistor is just the product of energy of a transition and the
frequency of transitions:
Power ∝ 1/2xCapacitive load xVoltage2 x Frequency switched
Frequency switched is a function of the clock rate. The capacitive load per transistor
is a function of both the number of transistors connected to an output (called the
fanout) and the technology, which determines the capacitance of both wires and
transistors.
10
Power Wall Contd..
Energy and thus power can be reduced by lowering the voltage, which occurred with each new generation
of technology, and power is a function of the voltage squared. Typically, the voltage was reduced about 15%
per generation. In 20 years, voltages have gone from 5 V to 1 V, which is why the increase in power is only
30 times.
Further lowering of the voltage appears to make the transistors too leaky, like water outlets that cannot be
completely shut off. Even today about 40% of the power consumption in server chips is due to leakage.
Solution to Power problem:
• designers have already attached large devices to increase cooling,
• they turn off parts of the chip that are not used in a given clock cycle.
• Although there are many more expensive ways to cool chips and thereby raise their power to, say, 300
watts, these techniques are generally too expensive for personal computers and even servers.
11
Uniprocessors to multiprocessors
Rather than continuing to decrease the response time of a single program running on the
single processor, as of 2006 all desktop and server companies are shipping microprocessors with
multiple processors per chip, where the benefit is often more on throughput than on response time.
To reduce confusion between the words processor and microprocessor, companies refer to
processors as "cores;' and such microprocessors are generically called multicore microprocessors.
Hence, a "quad core" microprocessor is a chip that contains four processors or four cores.
Programmers could rely on innovations in hardware, architecture, and compilers to double
performance of their programs every 18 months without having to change a line of code. Today, for
programmers to get significant improvement in response time, they need to rewrite their
programs to take advantage of multiple processors. Moreover, to get the historic benefit of running faster
on new microprocessors, programmers will have to continue to improve performance of their code as the
number of cores increases.
12
Parallelism has always been critical to performance in computing, but it was often hidden.
Pipelining, an elegant technique that runs programs faster by overlapping the execution of
instructions. This is one example of instruction-level parallelism, where the parallel nature of the
hardware is abstracted away so the programmer and compiler can think of the hardware as
executing instructions sequentially. It forces programmers to be aware of the parallel hardware and
to explicitly rewrite their programs to be parallel.
The name little-endian is used for the opposite ordering, where the lower
byte addresses are used for the less significant bytes (the rightmost bytes) of
the word
16
Hardware and Software
These layers of software are organized primarily in a hierarchical fashion, with applications being
the outermost ring and a variety of systems software sitting between the hardware and applications
software.
There are many types of systems software, but two types of systems software are central to every
computer system today: an operating system and a compiler.
17
Operating System (OS)
An operating system interfaces between a user’s program and the hardware and provides a
variety of services and supervisory functions. Among the most
important functions are:
➢ Handling basic input and output operations
➢ Allocating storage and memory
➢ Providing for protected sharing of the computer among multiple applications using it
simultaneously.
Examples of operating systems in use today are Linux, iOS, and Windows.
18
Systems software → Soft ware that provides services that are commonly useful, including operating
systems, compilers, loaders, and assemblers.
Compiler → A program that translates high-level language statements into assembly language
statements.
19
Compilation of C program into machine language
20
Instructions
The words of a computer’s language are called instructions, and its vocabulary is called an instruction set.
The chosen instruction set comes from MIPS (Microprocessor without Interlocked Pipelined Stages)
Technologies, and is an elegant example of the instruction sets designed since the 1980s. To demonstrate how easy
it is to pick up other instruction sets, we will take a quick look at three other popular instruction sets.
1. ARMv7 is similar to MIPS. More than 9 billion chips with ARM processors were manufactured in 2011,
making it the most popular instruction set in the world.
2. The second example is the Intel x86, which powers both the PC and the cloud of the PostPC Era.
3. The third example is ARMv8, which extends the address size of the ARMv7 from 32 bits to 64 bits.
Ironically, as we shall see, this 2013 instruction set is closer to MIPS than it is to ARMv7.
21
Operations and Operands
Operations in Computer Hardware
Every computer must be able to perform arithmetic. The MIPS(Microprocessor without Interlocked
Pipelined Stages) assembly language notation
add a, b, c
(a= b+c)
It instructs a computer to add the two variables b and c and to put their sum in a.
This notation is rigid in that each MIPS arithmetic instruction performs only one operation and must always
have exactly three variables. For example, suppose we want to place the sum of four variables b, c, d, and e into
variable a.
The following sequence of instructions adds the four variables:
23
Compiling Two C Assignment Statements into MIPS
This segment of a C program contains the five variables a, b, c, d, and e. Since Java evolved from C,
this example and the next few work for either high-level programming language:
a = b + c;
d = a – e;
The translation from C to MIPS assembly language instructions is performed by the compiler. Show the
MIPS code produced by a compiler. A MIPS instruction operates on two source operands and places the
result in one destination operand. Hence, the two simple statements above compile directly into these two
MIPS assembly language instructions:
add a, b, c
sub d, a, e
24
Compiling a Complex C Assignment into MIPS
A somewhat complex statement contains the five variables f, g, h, i, and j:
f = (g + h) – (i + j);
What might a C compiler produce?
The compiler must break this statement into several assembly instructions, since only one operation is
performed per MIPS instruction. The first MIPS instruction calculates the sum of g and h, then place the
result somewhere, so the compiler creates a temporary variable, called t0:
Although the next operation is subtract, need to calculate the sum of i and j before do subtraction. Thus,
the second instruction places the sum of i and j in another temporary variable created by the compiler,
called t1:
Finally, the subtract instruction subtracts the second sum from the first and places the difference in the
variable f, completing the compiled code:
sub f, t0, t1 # f get to - t1, which is (g + h) - (i + j)
25
Operands in Computer Hardware
26
MIPS Registers
27
MIPS Word
• Word : The natural unit of access in a computer, usually a group of 32 bits; corresponds to the
size of a register in the MIPS architecture.
• One major difference between the variables of a programming language and registers is
the limited number of registers, typically 32 on current computers, like MIPS.
• The reason for the limit of 32 registers may be found in the second of our three underlying
design principles of hardware technology:
• Design Principle 2: Smaller is faster.
• A very large number of registers may increase the clock cycle time simply because it takes
electronic signals longer when they must travel farther. Although we could simply write
instructions using numbers for registers, from 0 to 31, the MIPS convention is to use two-
character names following a dollar sign to represent a register. Now, we will use $s0,$s1, ... for
registers that correspond to variables in C and Java programs and $to, $t1, ... for temporary
registers needed to compile the program into MIPS instructions
28
Compiling a C Assignment Using Registers
• It is the compiler’s job to associate program variables with registers. Take, for instance, the
assignment statement from our earlier example:
• f = (g + h) - (i + j);
• The variables f, g, h, i ,and j are assigned to the registers $s0,$sl,$s2, $s3, and $s4,
respectively. What is the compiled MIPS code?
• The compiled program is very similar to the prior example, except we replace the variables
with the register names mentioned above plus two temporary registers, $t0 and $t1, which
correspond to the temporary variables above:
• add $t0,$s1,$s2 # register $t0 contains g + h
• add $t1,$s3,$s4 # register $t1 contains i + j
• sub $s0,$t0,$t1 # f gets $t0 – $t1, which is (g + h)–(i + j)
29
Memory Operands
• Programming languages have simple variables that contain single data elements
but they also have more complex data structures—arrays and structures. These
complex data structures can contain many more data elements than there are
registers in a computer.
• The processor can keep only a small amount of data in registers, but computer
memory contains billions of data elements. Hence, data structures (arrays and
structures) are kept in memory.
31
Memory addresses and contents of memory at those locations
The data transfer instruction that copies data from memory to a register is
traditionally called load.
The format of the load instruction is the name of the operation followed by the
register to be loaded, then a constant and register
used to access memory.
The sum of the constant portion of the instruction and the contents of the second
register forms the memory address.
The actual MIPS name for this instruction is lw, standing for load word.
32
Compiling an Assignment When an Operand Is in Memory
Let’s assume that A is an array of 100 words and that the compiler has associated the
variables g and h with the registers $s1 and $s2 as before. Let’s also assume that the
starting address, or base address, of the array is in $s3. Compile this C assignment
statement:
g = h + A[8];
Although there is a single operation in this assignment statement, one of the operands is
in memory, so we must first transfer A[8] to a register. The address of this array element
is the sum of the base of the array A, found in register $s3, plus the number to select
element 8. The data should be placed in a temporary register for use in the next
instruction.
33
MIPS Assembly Language:
lw $t0,32($s3) # Temporary reg $t0 gets A[8]
add $s1,$s2,$t0 # g = h + A[8]
The first instruction – load word
Although there is a single operation in this assignment statement, one of the
operands is in memory, so we must first transfer A[8] to a register.
The address of this array element is the sum of the base of the array A, found in
register $s3, plus the number to select element (8 * 4 = 32).
The data should be placed in a temporary register for use in the next instruction. The
constant in a data transfer instruction (32) is called the offset, and the register added
to form the address ($s3) is called the base register 34
Eg.2) Compiling Using Load and Store
Assume variable h is associated with register $s2 and the base address of the array A is
in $s3. What is the MIPS assembly code for the C assignment statement below?
A[12] = h + A[8];
35
Constant or Immediate Operands
Many times a program will use a constant in an operation-for example, incrementing an index to point to the next element
of an array.
This quick add instruction with one constant operand is called add immediate or add i. To add 4 to register $s3, we just
write
The constant zero has another role, which is to simplify the instruction set by offering useful variations. For example,
the move operation is just an add instruction where one operand is zero. Hence, MIPS dedicates a register $ zero to be
hard-wired to the value zero.
36