mraza.buke@bahria.edu.pkWhat we will learn? ce Kea) ideal transistor sit $V aracteristics of diffe wer transistors List of Characteristics, Describe the swit Describe the Tingle) Deserib tn fate ea reqiremead ‘and models of power transist dy Design di/dt and dv/dt protection/ti its for transistors Determine the gate drive oy ristics and requirement of BJTs, MOSFETs, and IGBTs Describe the isolat ig gs between the high level power circuit and the low’ ate drive circuit. on of transistors switc] ECTRONICSPower Transistor ¢. & Power transistors have-dgntrolled turn-on and tui aD characteristics. ae ‘The transistors, Nive used as switch ents, are operated in the saturatign yon, resulting in a a voltage drop. The switchinig speed of. n transist uch higher than that of thyristors afid they ate extensively employed in DC-DC and DC: AC converters, with inverse alec diodes to provide bidirectional current flow. However, their voltage and cu: ratings are lower than those of thyristors and transistors a1 ally used in low to medium power applications. IG. cing increasingly used in high- power applications. The power transis AY classified broadly following categories: 1. Metal oxide s ‘tor field-effect transistors (MOSFETs) 2. Bipolar junction transistors (BUTs) 5. Insulated-gate bipolar transistors (IGBTs) 4. Stat jon transistors (SITs) SOHN OOOoa & Power Transistor tt Tere + The gating circuit is a Ke part of a power cae consists of power se ctor devices. + The output of a cinverter fet depends on Qe ne circuit drives the swit¢hing devices is a direct oe of the switching. * Gate Driver - IR2110: ridge » UCC21542: Isolated Half bridge » STGAP2HS: Isolated Single G: » STGAP2D: Isolated Half Brit ECTRONICSPower MOSFETs Ge A power MOSFET is er controlled device ang 4 may a small input current. The switching s a very high, and the aa times are of the 01 order of nanos MOSFETs have the tomy of elect discharge and require special cae ih hand! as It is relatively difficult to prote: under short-circuited fault conditions. The two types of ry andeNY Depletion MOSFETs any Enhancement MOS)Power MOSFETs + An n-channel depletion-(ype MOSFET is formed = type jeilicon doped f h two heavily dope silicon sections for low resiStance » The gat lated e es channel bYpa thin oxi er, Bane aructore (#) r-Channel depletion type MOSFET The gate-ie-couree voltae cia Vgs could be either positive or & negative. . . : | Oy If Vgs is made negative enough, the + If Vgs is negative, som channel becomes completely depleted, electrons in the n-chai offering a high value of Rds, and no prea ereleepeled Sl a current flows from the drain to source, below the onide tty Tds = 0. The value of VGS when this yw the oxide x i : : resulting ia narhorer appens is called pinch-off voltage Vp. effective channel and a high resista) ‘the drain to source ECTRONICSey, Power MOSFETs ce a oe : IU ral nviDs increases due to red in RDS. » With a p-chann ‘tion-type MOSFET. larities of VDS, IDS, and VGS arejreversed C > §p bo g i. “F 4s Vop== + Basic structure Symbol (b) p-Channel depletion-type MOSFET.few . B- Power MOSFETs ce & ».wZ » An n-channel enhance: type MOSFET has no ‘sical channel. « I£VGS is positiv ann luced voltage attracts ctrons from the p-substrate anc umulates them at the surfac@beneath the oxide layer. & + IfVGS is greater than-or équal to a valtellinown as threshold voltage suffici x of e| ns are accumulated to form a virtual n*channel, an e CUIT s from the drain to source. = Yoo rae 5 YR. g Fy Yas £ He $s Vos Ip Vos e 2 Basie structure ‘Symbor (@) 1-Channel enhancement-type MOS ECTRONICSMOSFET: Characteristics ah 2 ‘The MOSFETs are valent devices and very high input impedance. The gate are small leakage snaey , onthe order of nanoamperes, ‘The current gain, which i on the tio of drain current TD toi ay ut. gate Soon Hows cured ishot an i om parameter. The men eh which is, tio of drain current to gate voltage, defines the transfer cl teristics and is a very important parameter. The transfer characteri for n-channel enhancement MOSFETs can be letermine the on-state drain current id equation. in = Ky (tas — Vr)? for ves > Vr and vps = (vas ~ Vr) e where K,, is the MOS constant, A/V? vasis the gate-to-source voltage, V Vris the threshold voltage, V ECTRONICSMOSFET: Ghanacterescs np oe 0} Vr, ~ip gine p-channel rd os (b) Enhancement-type MOSFETMOSFET: Characteristics » The output characteri: iQ pFan n-channel enhan: MOSFET. There ai regions of serie yO Cutoff Region : » Pinch-off or rad ion etl > Linear region?) ps = Vas — Vri » vm room e Vps = Vos — Vr Rp __ Pinch-off region or saturation region where ip = Vpp/Rp at vps “4 r Ry ly and Ups = Vppatip ~ e ‘ ; Tm ip ECTRONICSMOSFET: Characteristics + RD is the load resista Ralarge resistance RG in se of megohms is connected between the gate and 5 “tetas the gate voltage toa level. RS << RG limit ging currents Prout internal peecuer OSFET. mice defined as CS ¥ Tp 5 ) » Sn AV6s|Vp¢= constant Sy & 2 + ‘Thus, gm depends on Vi i w=. * The transco ECTRONICS#. ae MOSFET: Characteristics Se Goes » The output resistance, 1S, which is defined Ax very high in the pin ar region, typically on Aer or megohms i inear region, typicall fe order of and is very smal milliohms. for vgs > VrMOSFET: Characteristics » The internal built-in eG often called the body diod + The switching s; the body diode is much slower than that of the MOSFET? ) > Ifbody ‘Sage allo onduet, then a high peak current’can occ during the diode turn-off transition) Most MOSFETs are not rate; handle these currents, failure can occur. To avi situation, external serie! antiparallel diodes added & jee ® oy RS, Ip Ga Cos ==MOSFET: Characteristic Ss + The turn-on delay td(onpig” ) the time that is requi charge the input capacitatice to threshold volta; ce ihe The turn-off delay time 2, is the time required for the input capacitance to discharge from the overdrive ° ()» gate voltage V1 to the pineh- off region. VGS mus' decrease significan' VDS begins to rise. The fall time tfis ime that is required for the input i ischarge from 7 iy Naot) ECTRONICSfew R BI-Polar Junction ‘Transistor a + A bipolar transistor is @gbd by adding a second pepe Wegion to a ‘n-funiction diode. WAINpvo hresioné and on es junctions are for itis known as an istor. + With two p-re; and one n-region, it is mas a PNP- transistor, & 9 Collector And c n Pp Je Bas B I oP oa => 2 B n Ip P Jp E E Emitter © Emitter QS N-transistor (b) PNP-transistor ECTRONICSBI-Polar Transistor: Characteristics + Although there are thre&pdssible configurations ab. ain common base, and common emitter—the com! configuration, fo -transistor, is gener: ed in switching applications. Q \¥ ECTRONICSoa B TEES BI-Polar Transistor: Characteristics & Vee = Ves + Vee RS Sa Veele The maximum oe current Vex = Oand We = Vor i We vin Tero Ve - = a QD) se lige eMewn sat) Br les se Re Ip 15 ODF = 7 2gt BI-Polar Transistor: Characteristics a> ia + A forward-biased pn-jundtign exhibits two parallel ances: a depletion-layer cap ips capacitance. Und se capacitances do not play an; nditions, they IE owever, under transi a) moe -off bel Pot the transistor. < e and a diffusion capaéitai + On the other han@s,a'¥everse-biased pn-junetion has only depletion Ader endy-tate conditions he (b) Model with transconductance ECTRONICSBI-Polar Transistor Characteristics * Due to internal capacitances, eh transistor does not turn on instantly. + As the input voltage VI from zero to V1 and the base cui ses to wh the collector currenit/do} es not rei immediately. Pe * There is a delay, known as delay time td, before any collector current flows. Sy * This delay is required to charge w 0 capacitance of the BEJ to the bias voltage VBE (approxi! Vv). ° After this delay, the co! rises to the steady-state The rise time tr depends on the time constant dete x) y BES Di Icy ECTRONICSBI-Polar Transistor: Characteristics the transistor. ‘The base current is nol more than that requi ‘ored in the base As a result, the minority carrier ch: region. The higher the ODF, the greater is mount of extra charge storet e base.Lhis extra chi hich is called the saturai mal ay ‘ess base drive and the correspondi SS ban Ips(ODF — 1) Saturating charge Q. 'slps(ODF — 1) where ts is known storage time constant of the transistor. When the input voltage is reversed from V1 to -V2 and the base current is algo changed to -IB2, the collector eurrent does not change for a til alled the storage time. The ts is required to remove charge from the base. ECTRONICSBI-Polar Transistor: Characteristics it will take a longer ti ‘0 recover the stored, higher storage til + ‘The higher the “orn Garent, the higher is the * Once the extra charge is removed, the BBE ince charges to the input voltage -V2, andthe base curry s to zero. The fall time tf depends on t! e Constant, is determined by the capacitante.of the re idsed BI + The turn-on time tn is the sum Qu time td and rise time tr: fat ty * and the turn-off tis is the sum of storage time ts and fall time tf ECTRONICSSwitching Limits cS base, producing s hot spots. If the ener; ese hot spots is sufficient, pete Noe ve localized heatingay famage the Sena ae fo pocondary breakdown is d by a localized thermal nike Tes! packs om high coment el concentrations. The SB ocer ow? oe acs ions ON e, tent concen and time. Second breakdown he SB, which is a dest 4 phenomenon, resu the current flow to aes of the 2 Bose iased safe erating ae a rncoa, During turn-on and on-state conditions, the avg neiieh (FB temperature and second breakdown limit the andling capability of a transistor. FBSOA indi oN Ic-Vce limits of the transistor; for reliable operation the axe istor must not be subjected to greater shown by the FBSOA curve. Reverse-bias: ating area (RBSOA). During turn-off, a high current and high voltage must be sustained by the transistor, in most cases with the base-to-emitter junction reverse biased. The collector. ter voltage must be held to a safe level at, or below, a ified value of collector current. power dissipation ECTRONICSSwitching Limits cS & + Breakdown voltages A breakdown voltage is detingdas = absolute maximum between two term’ the third terminal open, s or biased in either ro reverse direction. At breakdown the voltage remaifis relatively constant, hagrises rapidly. where the "a * The fol reak vo Ova by the manufacturers: » VEBO: tl aximum re be dimen ter terminal and base terminal with collector terminal » VCEV or VCEX: the maximum. ook between the collector terminal and emitter terminal at a specific tage applied between base and TEES emitter. VCEO(SUS): the mee voltage between the collector terminal and emittog tetgfpdll with the base open cireited. This rating is specified as the maxi collector current and voltage, appearing simultaneously the device with a specified value of load inductance. SOHN OOOfew R > IGBTs on-state » An IGBT combines th (Gartages of BJTs and rt An IGBT has high input dance, like MOSFE ndtow conduction losse: ITs. » However, thereis n6 second breakdown prabign, as with BJTs. e “<< is controlled to » The equivale) ‘ain-to-soi behave at a)o IGBIs e > Me + An IGBT is a voltage- lled device similar to a Wriosrer. Like a MOSFET, w e gate is made posi FNeespect to the emitter for areca riers are drawn into annel near the t It has ny er hing J > An any? is inherently faster thai * Three terminals are gate, collector, and emitter. Bite signal nei) gate region; thi in a forward bias se of the NPN- transistor, ae nn on. ron lower than MOSFETs + The current ratin, a single IGBT can up to 6500 V, { and the switching y frequency can be up to 20 XN)Collector current (A) ECTRONICS 4 6 Gate-emitter voltagefootw P Derating of Pewer Transi ey ower Derating 0: ywwer ‘Transistors & ZZ + Ifthe total average po} 68s is PT, the case temp, AR is: AY? Te = Ty ~ Prig QaRtgnssin yn gover 4 The sinker ae ete normally specified at TC + Ifthe ambient oO temperature is * “The ambieptitempera Ritmaxd = 180°G, the transistor can dissipate T= ee zero power. Ty — Tap Ric + Res + Rea) + RJC = thermal resistagedGQm junction a le , 5 to case, °C/W; * RCS = thermal resistance from case to sink, °C/W; e ° ‘istance from sink to ECTRONICSPower Derating of Power Transistors ra VJs chi Numerical: The maxi junction eae e bipolar transistor is TI i ii = ind the ambient te: MOric TA = 20°C. If the thermal sai are RJC = 0.45" CS = 0.05°C/W, calculate the al resistance of ney RSA. The power dissipation o} “ON 254. medi/dt and dv/dt Limitations ‘Transistors require cel urn-on and turn-off ti During turn-on, RX ctor current rises a dt is During one ‘ollector-emitter voltage must rise in relation to tl of the colle ty dv/dt is ans dit & deo _ Vs _ Ves dt Up teSnubber Circuit ce eee: + Protection cirouits are nota required to kee oe difat and dv/dt within the ‘able limits of the tr; * The RC networ! the transistor is ki — snubber circuit, or snubber, and limits the dv/dt T! aurton Ls, which limits the aifat, 8 sometit ree a se) ubber. g)/Protection circuits (b) Waveforms ECTRONICSSnubber Circuit ce During Turn On di _V, dt L, Due to the energy st circuit is bona critical damping, > ae bad co During Tae Sa =} CG=> oe mn] sonant circuit. The RLC oscillations. For unity L,=Snubber Circuit ce discharge through the =i this nt rating of the transi wae + ‘The capacitor Cs has to increases the peak cu + ‘The discharge the transistor can S d by placing 's instead of sn tigdes Ts SS as Ds. = e Vi s, the oats hate time, RsCs = ts should arge Ht e-third the switching ly adequate. R= Cy oO —-z = toe. e MOSFET Gate Drives, a> ‘The turn-on time of an(MOSFET depends on the cheng time of the input or gate caj nee. The turn-on ti reduced by connecting an R it to charge the gate ca, ce faster, When the gate {oltage is turned on, the it +harging current of the capacitahee)is nw VY mA z . Rs 8 : Ve RGVc and the steady-state value of gz age is GS Rs +R, + Rg Where Rs is the interna! . resistance of gate drive » Rp source. oe q pene ae - tS H ECTRONICSMOSFET: Gate Drive, To achieve switching on the order of 100 3 Ber , the gate- drive circuit should low-output imped: ere ability to sink and source ly large currents. A to le arrangement that is capable reing and sinking a ws ent can be used. ae act as oS Sime. and offer a & hes ‘These transistors operatéiin the linear region instead of the saturation mode, thereby minimizing the delay time. Feedback via the capaci ay regulates the rate of ris all of the gate voltage, controfling the rate ok ige and fall of the MOSFET rent, Diode across the capacitor Cc véltage to Change ECTRONICSJFET Gate Driver ce * The SiC JFET is a vol! Kdontrolled device and is iy on. A negative gate— sour yee, which should b Eoiken the pinch-off voltages seated to keep this devic e off-state. » During the onstage ‘of the SiC JFET, the oj it of the buffer, Vg, equals 0 V, and) e device is conductin jaximum current, IDss. VY ae) &Y Normally on SiC JFETJFET Gate Driver Ce vo When the JFET is tui oiF the buffer voltage Vgvi itched from 0 V to the negative voltage Vs. eee ‘The peak gate ¢ flows through the g or Rg and the capacitor C. pacitange*df the gate-soliree junction Cgs is ‘he vol ‘op across apacitor C equals the voltage difference betwéen —Vs a) rreakdown voltage of the gate. During the steady-state opetation in the off-state, a low current is only required to keep t off and this current is supplied through the resistor R; ‘order of megohms is normally connected e source in order to provide a fixed impedance so that \Cgs can discharge its voltage. ° ‘ive should be protected from the possibly destructive ‘h in case the power supply for the gate driver is lost. ECTRONICSJFET Gate Driver ‘The normally-off SiC JF substantial gate currentis required during th, obtain a reasonal aerate resistance. It also requires(a bigh-peak current to the the gate-source capacitance\of the device%, Atwo ce pie arin resistors is Shown in thi igure. Gm The dynamic one with a standard driver and a oy RB2, which provides hig] voltage, and thus high. “C1 peaks, during a sho tine period to turn the JI and off rapidly. ‘The second stage is the static ic’step-down , and a resistor one wit! ECTRONICS is a voltage controlled #. > 4> Sees to so that the recharge of ster.JFET Gate Driver Ge a> + ‘The auxiliary BUT is tuned on when the dynamic ie eerie + The static stage i to supply a gate a of the JFET. ing the on-state ire spee acitor, which might beat e to ated charging andBJT Gate Drive ‘The switching speed sa Raicesned by reducing ey & ks time Eun and turn-off time tof The ton can end by allowing base c eaking during turn-on, an nea low ine B(BF) at the beg ing. After turn-ony fens rane ently high value to maintai! hranidt quasi cet region. ‘The toff can be reduced by reve ase current and allowing base current peaking during “> Increasing the value agit os current IB2 seem so ‘time, Apart from a fixed SS base current, the forced 6 m: controlled the collector ECTRONICSBJT Gate Drive: Turgegn control a + ‘The base current pe sila be provided by the ci on When the input stays Be Gee vice ay eNG esc By resistor R1 a the initial value of base curre — Vor 1 and the » alue of the Ets isBJT Gate Drive: Turneon control a s to a final value of _& 1 + Re » The capacitor C1 char; he capacttbnis approximately + Once the input voltage yB becdmes zero, the base-emitter junction is reverse biased and C ges through R2. The discharging time constant is 12 = + To allow sufficient ing and discharging times, the width of the base pulse must >= 5t1 and the off-period of the pulse must be t2 >= 512. The maximum switching frequency is = VT = 1(t +b) = 02/(m +») ECTRONICSc > ww + Ifthe input voltage in, prévibits circuit is changed t Bene” turn-off, the capacit tage Ve is added to V: verse voltage across the “eC ere will be base curre ing during turn-off. » As the capa a diss es, the an can be reduced toa cae te Ifdifferent turn-on ave) rn-off oe ristics are required, a turn- BJT Gate Drive: Turneoff control off circuit (using C2, R3, and R- ry be added. C > I Dy ECTRONICSgt BJT Gate Drive: Propertional base contre di This type of control wv tages over the const: e circuit. a) e * Ifthe collector ct ges due to chang: demand, the base drive currents thanged in proportiomto thecollector current. , a pulse cu f short duration f transis ; and Q1 is turned on ECTRONICSBJT Gate Drive: Propertional base control & . TEES Once the collector cur: arts to flow, a co! ase current is induced di the transformer as The ann on itself, and ~~ tured off. The turns ratio is =IC/IB=B. For proper operation uit, ths etizing current, which must be small e coll ‘urrent, should be as small as possible. small-signal transistor, and an additional circuitry is neces: discharge capacitor C1 and to reset the transformer ¢ ing turn-off of the power transistor. ECTRONICSBJT Gate Drive: Anti, If the transistor is dri rd, the storage time, proportional to the Ouran, increases an is reduced. » The storage wie be reduced by operate transistor in soft saturation intstoa of “ nw This cane compl - vr =a Pa clamping the collector NS emitter voltage to a predetermined level and thi S&S collector current is een Ry ms Vp ECTRONICSBJT Gate Drive: Antisaturation control Tease ranys ‘The base current See whichis aden transistor hard, can. d from Va — Var LL ~ sasha And ny corresponding collector t Y Tc = Bla ia the After the collector current risesthe transistor is turned on, and the clamping takes place (due, fact that D2 gets forward biased and conducts). Then Vee + Vin — Vaz The load current cys tee ~ Vee _ Veo — Ver — Van + Vin Re ReBJT Gate Drive: Antisaturation control and the collector currentqvith clamping is Se = Bi — ier aat + 1g For cating on wet Ci ashe complished by For dating wo or mor des in xr D1. The load resistance RC should satisfy the condition BlpRe Or - - Vin + Vin) The clamping a¢tion,résults in a reduced collector current and almost elimination of the storage time. mettime, a fast turn-on is accomplished. However, due to E, the on-state power dissipation in the transistor is hereas the switching power loss is decreased. ECTRONICSIsolation of Gate a Drives » There are basically tw: 's of floating or isolati et ets gate signal with res Pulse sien CY » Optocouplers - Pulse oes e primal fing and can have one or more see mn dary windings allow ora iS gatnde sii é ‘to seri and parallel-connected transistors. SS The transformer should havéyY very small leakage outeel the rise time of the ge should be very sm At a relatively ise — low switching frequency, the ae ould saturate and be distorted. ECTRONICS#. ae Isolation of Gate and Base Drives & * Optocouplers combine, aminfrared light-emitting di, Ais silicon phototransistor. ut is taken from the phototrans! $F. D> + ‘The input sign lied to the LED “~sIsolation of Gate and Base Drives ‘The rise and fall times ofpHictotransistors are ver ‘ypieal values of — nme th = 9'to Bia: 300 ns. These turn-on and turn-off times limit the applications” ) Sony The Phalsisisor ed Darlington pair. ‘The phototransistors require se power supply and add to the complexity and cost and weig he drive circuits. ‘The low-level gate circ fedleclatéd from tha High level power circuit through isolatioy 's or techniques such as optocouplers and pulse transfor era ECTRONICSoe . & Gate-Drive ICs & + The gate-drive see a MOSFET or an IGBT switch, are OY High voltage rail A : Fipg Hah we Gate voltage mus‘ “ou 15 V higher than the source or soup My ee tage. Because the power drive i ghnpectod i the main higt fh Voltage rail c gate voltage aust b higher ail v é é Af Fate + The gate vi is normally melee to ground must be controllable from circuit. Thus, the control signal ° set level shifted to the source teri the power device, which in mos! ations swings between the two r: A low-side power degi egarerally drives the high-side power de it is connected to the high ae is one high-side and one low-si vice. The power absorbed Source id be low and it> at Thank you fase time Ss Oy