Chapter 5

Memories

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 Introduction

• With a flip-flop it is possible to store information on a single bit .

• With a register it is possible to memorize information on

n bits .

• If you want to memorize large pieces of information  you

must use a memory .

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 Hardware architecture of a machine
(Von Neumann architecture)

Von Neumann's architecture is composed of:

•From a central memory,

•A central processing unit (UC) or CPU (Central Processing Unit),
processor.
•This architecture is the basis of computer architectures.

CPU Memory
Processor Central

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 The Central Unit (UC)
• The role of the central unit (also called processor) is to
execute programs.
• The CPU is composed of an arithmetic and logic unit (ALU)
and a control unit.
- The arithmetic and logic unit performs an elementary
operation (addition, subtraction, multiplication, etc.) at each
clock top.
- The control unit controls memory operations (read/write) and
the operations to be performed by the ALU, depending on the
instruction to be executed.
• To perform operations on data and execute programs, the CU
needs a workspace. This workspace is called the central
memory.

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 2. What is a memory?
• A memory is a device capable of :
• Recording information,
• Storing it (memorizing)
• Restoring it (reading or retrieving it later).
Example of a memory :
- Main memory
- Hard disk
- Floppy disk
- Flash disk
- ..............
• The memory can be in the processor (registers), internal
(central or main memory) or external (secondary memory).

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 Registers

Cache Memory

Capacity
Central Memory
Access Time

Cost
Support Memory

Auxiliary Memory

Memory hierarchy
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Registers: These are memory elements located in the central
processing unit (Central Processing Unity ). Characterized by high
speed, they are mainly used for storing operands and
intermediate results .

Central Memory : It is the main organ for storing information

used by the CPU, the access time to central memory is much
greater than that of the registers. Central memory contains the
instructions and data of the program to be executed, as well as
part of the operating system necessary for the proper functioning
of the computer .

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Cache Memory: It is a low capacity memory used as a buffer
between the CPU and central memory. It allows the CPU to make
fewer accesses to central memory, thus saving time .

Support Memory : It is an intermediate memory between the

central memory and the auxiliary memories. It is present in the
most advanced computers and makes it possible to increase the
speed of exchange of information between these two levels .

Auxiliary Memories : or mass memories, these are peripheral

memories of large capacity and relatively low cost. They serve as a
permanent storage element and use magnetic and optical media
(external hard drives, CDs, DVDs) for this purpose.

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3. Memory characteristics
3.1. The capacity of a memory
• The capacity (size) of a memory is the number (quantity) of
information that can be recorded (memorized) in this memory.
• Capacity can be expressed as:
- Bit : a bit is the basic element for representing information - - Byte : 1
Byte = 8 bits
- kilobyte (KB): 1 kilobyte (KB) = 1024 bytes = 2 10 bytes
- Megabyte (MB): 1 Megabyte (MB) = 1024 KB = 2 20 bytes
- Gigabyte (GB): Gigabyte (GB)=1024 MB = 2 30 bytes
- Terabyte (TB): 1 terabyte (TB) = 1024 GB = 2 40 bytes
- Peta -byte (PB): 1Petabytes = 1024 T bytes=2 50 bytes= 2 50 x8bits.
- Exa -bytes ( Eo ): 1Exa - bytes = 1024 P bytes=2 60 bytes= 2 60 x8bits.
- Zeta-bytes ( Zo ): 1Zeta-bytes = 1024 E bytes=2 70 bytes= 2 70 x8bits
- Y otta -bytes ( Yo ): 1Yotta-bytes = 1024 Z bytes=2 80 bytes= 2 80 x8bits.

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• Capacity can be expressed as:
- Bit : a bit is the basic element for representing information - -
Byte : 1 Byte = 8 bits
- kilobyte (KB): 1 kilobyte (KB) = 1024 bytes = 2 10 bytes
- Megabyte (MB): 1 Megabyte (MB) = 1024 KB = 2 20 bytes
- Gigabyte (GB): Gigabyte (GB)=1024 MB = 2 30 bytes
- Terabyte (TB): 1 terabyte (TB) = 1024 GB = 2 40 bytes
- Peta byte (PB): 1 Petabytes = 1024 T bytes=2 50 bytes=
2 50 x8bits.
- Exa bytes ( Eo ): 1 Exa bytes = 1024 P bytes=2 60 bytes=
2 60 x8bits.
- Zeta bytes ( Zo ): 1 Zeta bytes = 1024 E bytes=2 70 bytes=
2 70 x8bits
- Yotta bytes ( Yo ): 1 Yotta bytes = 1024 Z bytes=2 80 bytes=
2 80 x8bits.

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3. Memory characteristics
3.2 Memory organization

- Memory is organized in words, a word is made up of a

certain number of binary elements, each word is
identified by an address which gives its rank in the
memory.

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3. Memory characteristics
3.3.Volatility

• If a memory loses its contents (information) when the power

source is cut off then the memory is said to be volatile .

• If a memory does not lose (retains) its contents when the

power source is cut off then the memory is said to be non-
volatile (permanent or stable memory) .

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3.Memory characteristics
3.4. Information access mode (read/write)

• On a memory you can perform the operation of:

• reading : recover/restore information from memory.

• write : record new information or modify information
already existing in memory.

• There are memories that offer both read/write modes, these

memories are called random access memories .

• There are memories that only offer the possibility of reading

(it is not possible to modify the content). These memories are
called dead memories .

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3. Memory characteristics
3.5 Access time : the time required to perform a read/write
operation

Speed Capacity
Registers
Cache Memory
Central Memory
Mass Memory

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3.6 Flow rate (débit en frensh) : the quantity of
information read/written per unit of time:
expressed in bit/s, MB/s
3.7 The memory cycle : The memory cycle
represents the minimum time interval between 2
successive memory accesses .

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3.Memory characteristics
3.8 Location of memories

Cache
Memory

Registers
Auxiliary
Central Memory
Memory
Processor

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3. Characteristics of memories
3.9 Methods of access to information

• Sequential access : to access information you must go

through all the information that precedes it: magnetic strip
• Direct access: each information has an address that can
be accessed directly: central memory
• Semi-sequential access: intermediate between
sequential and direct: HDD hard drive (direct to track and
sequential to sector)
• Associative access: information is identified by its key:
cache memory

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Magnetic Strip

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Hard disk HDD (Hard Disc Drive)

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SSD hard drive (Solid State Drive)

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 Central memory
RAM: Random Access
Memory

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Definitions and characteristics

• RAM (Central Memory) is a direct access memory ,

it represents the work space of the computer,

• It is the main organ for storing information used by

the processor.

• In a machine (computer / calculator) to execute a

program it must be loaded (copy) into central
memory.

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 Definitions and characteristics

• The access time to the central memory and its

capacity are two elements which influence the
execution time of a program (performance of a
machine).
• The capacity of a central memory is limited but
there is always the possibility of expansion .
• For communication with other parts of the
computer, the central memory uses buses (address
bus, data bus and control bus)
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Types of RAM
• SRAM static memories : are based on D flip-flops, they
have a low integration rate, but a fast access time. The
information contained in this memory is maintained as
long as the circuit is powered; it consumes less energy
than DRAM.
• DRAM dynamic memories : are based on capacitors,
these memories have a very high integration rate, they
are simple than static memories, but have a longer
access time .

DRAM Requires refreshing

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Note: Memory refreshing is a process of
periodically reading information from a
computer memory and immediately rewriting it
without modification, in order to prevent the
loss of this information,

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 4. Logical view of central memory
An address
•Central memory can be seen as a large
vector (array) of words or bytes . 0000
0001100
•A memory word stores information in n bits.
0011100 0001
•a memory word contains several memory
cells . 0111100 0002
•single- bit storage memory cell . 0001100 …….
•Each word has its own address . 0001100 …….
•An address is a unique number that provides
access to a memory word. ……..
•Addresses are sequential (consecutive) Content of a
•The size of the address (the number of bits) memory box (one
depends on the capacity of the memory. word)

FFFF

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 5. Physical structure of a central memory
•MAR (Memory address register): this
CS
register stores the address of the word to
R /W
read or write.
•MBR (Memory Information Register):
stores information read from memory or D
E
information to be written to memory. V

M S

•Decoder : allows you to select a memory Address bus

O
A D Structure
word. R E
internal
u

•R/W : read/write command, this R

E
command allows you to read or write to
the memory (if R/W=1 then read
otherwise write)
•Address bus of size k bits MBR
•n-bit data bus
Data bus
•CS (Chip Select): allows you to enable
or disable RAM
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RAM is made up of m words of n bits called
binary cells . The expression which represents
this RAM is: RAM m x n

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• Example: RAM 8X 4
0123

If R/W = 1
Reading

If R/W = 0
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writing
Memory operations
a - Reading
-Load the address into the MAR register: MAR @
- Start the read command:
-The information is available in the MBR: MBR Memo

b - Writing

- Load into the MAR the address of the word where the writing will
take place: MAR @
-Place the information to be written in the MBR: MBR Data
-Run the write command: MBR memo

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 How to calculate the capacity of a MC?

• Let k be the size of the address bus (size of the MAR register)
• Let n be the size of the data bus (size of the MBR register or the size of a
memory word)
• We can express the capacity of the central memory either in number of
memory words or in bits (bytes, kilobytes, etc.)
– Capacity = 2 k memory words
– Capacity = 2 k * n Bits
Example :
In a memory the size of the address bus K=14 and the size of the data bus n=4.
Calculate the capacity of this memory?

C=2 14 words of 4 bits= 16384 word of 4-bits

C= 2 14 * 4 = 65536 Bits = 8192 Bytes = 8 KB

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 Memory expansion
• To create large capacity memories, you can use small capacity
memories and connect them together.

• If we want to increase the number of words we connect the

memories in parallel by increasing the address bus .

• If we want to increase the length of the memory word we

connect the memories in series by increasing the data bus.

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A/Increase in address space ( number of words)
• If we want to increase the address space of a RAM, we must
connect several RAMs in parallel; for this they must have words of
the same length .

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Example 1: making 1K x 8 RAM from 512 x 8-bit
RAM
The number of RAM required :
P=2 10 / 2 9 = 2 lines (2 RAM in parallel )
Q=8/8=1 column
• MAR of 10 bits A0……A9
• MBR of 8-bit B0...B7

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 It is the
complementary
address bit A9
that selects
which RAM
should be
activated.

If A9 = 0 it is the
first RAM which
is active

if A9 = 1 it is the
second RAM
which is active

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Example 2: Creating 1K x 8-bit RAM from 256 x 8 RAM bits

• 1K0=2 10 x8bits, 256x8its=2 8 x8bits

• ( m,n )=(1024.8): the size of the address bus is 10 bits
A 0 …….A 9 , the size of the data bus is 8 bits .
• MAR=10 bits
• MBR=8 bits
• (m ' ,n')=(256.8): the size of the address bus is 8 bits A 0 …….At 7
, the size of the data bus is 8 bits.
• Calculate the two row and column extension factors:
• P=m/m ' =1024/256=4 (lines extension).
• Q=n/n ' =8/8=1 (column extension).
• The total number of boxes is PQ=4

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B/ Increase in word length

 If we want to increase the length of a memory word,

we must connect several boxes in series; for this
they must have the same number of words.

 To create a RAM (2 n x P) using RAM (2 n x Q) you

must first define:

• the number of RAM (2 n x Q) required: P / Q

• The MAR is n bits
• P - bit MBR
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Example 1
Realise 8x16 RAM using 8x4 RAM
The number of RAM required is: 16/4=4
The size of MAR is 3 bits (8=23)
The size of the MBR (Data Bus) becomes 16 bits
R/W

M RAM RAM RAM RAM

A a a a 8x4 8x4 8x4 8x4
2 1 0
R

CS

MBR
B 15
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Example 2: Realise 1K x 8 RAM from 1K x 4 RAM

• The number of RAM required is: 8 / 4 = 2 RAM

• MAR is 10 bits: 10 bits (1 K=2 10 )
• MBR is : 8bits

the same Chip Select

(CS) for the 2 RAMs
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C/ Increase in address space and word length

• Example: We want to realize 1K x 8bit RAM from

256 x 4bit RAM boxes
• The number of RAM boxes required is:
• P= 1024 /256 =4 (rows) Q= 8 / 4 = 2 (columns)

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 R.W.

B7 B4

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 ROM
Read Only Memory

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• ROM (Read Only Memory) is a non-volatile, read-only permanent
memory unlike RAM.
• This type of memory is used to store information that is never
erased even when the power is turned off. However, it is slower
than RAM, it contains the first instructions necessary for the
machine to start (Bios).
• The ROM is made from diodes or small fuses. When the fuse is
intact it lets the current flow, and then represents a 1, when the
fuse is blown, the current no longer flows, we then have a 0.
• The diode when it passes current we obtain a 1 and when it is
blocked it is a 0.

• There are several types of ROMs

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 The different types of ROM:

• PROM (Programmable Read Only Memory) : identical

to ROM, except that the manufacturer does not write
anything into it and leaves the possibility of writing a
program or data only once, this process is " burning ".

• EPROM ( Erasable Programmable Read Only Memory)

: The principle is the same as that of PROM, but it also
offers the possibility of being erased a certain number
of times (thanks to UV).
• EEPROM ( Electrically Erasable Programmable Read
Only Memory) : It can be written and erased
electrically. It is used by the computer's motherboard,
it contains the BIOS.

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Classic ROM

The information is recorded irreversibly (finally) during manufacturing,

the principle of production of these memories is the diode network
(electronic component where the current only passes in one direction)

Example : Consider a 4x3 ROM (4 3-bit words)

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• Example of 4 x 3 ROM

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• Exercise
We have a one-bit full adder which adds
between 3 variables a, b and c
1. Establish TV
2. give your ROM diagram
3. Determine ROM size

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Exercise
Realise a comparator of two numbers on 2 bits
each using a ROM
A 1A 0 B 1B 0

Comparator

S I E

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