CpE 351 Drill Chapter #5

How many pins does the MC68K have? How many in each category, like Data, Address, etc.

The MC68K does not have a pin for Interrupt Acknowledgement, how does the interrupting device
know it is being acknowledged?

Why don’t we see A0 on the MC68K pins?

Which is faster and more flexible, the synchronous or asynchronous transfer mode ?

Who cares about the function codes?

What is the bus arbitration control and why do we need it?

How much current do you think draws from the voltage supply?

What is the minimum and max clock frequency? What about the E output clock

What does the MC68K do on power up?

Explain the conditions that one might want to report as buss errors?

How does the MC68K differentiate between maskable and non maskable interrupts

How many interpreting devices can the MC68K handle? Explain

What is the difference between vectored and auto-vectored interrupt services? How does the MC68K
know which one to go for when interrupted?

What is the best and worst case synchronous cycles length? What is the average? How long it takes on
the average if CLK is 20 MHz?

Which CPU came first, the 16-bit MC68000 or the 8-bit MC68008 ? And which one is more complex?

Define the following terms using words and plots: Signal rise times, Signal fall time, Latch setup time,
Latch hold time, Propagation delay, Response time, Memory access time

Draw a timing diagram showing the basic read bus cycle with one wait cycle, marking AS*, DS*, CS*
DTACK*, R/W* along with the memory and processor parameters. Then show the formula that relates
all those with frequency

A system with 2-stage decoding has the following system parameters, and find the number of wait
cycles for the ROM and RAM to run at full speed of 20 MHz, and the maximum clock frequency to
run without any wait state
CPU: tCLAV = 60 ns and tDICL = 10 ns
ROM: tAA = 240 ns and RAM: tAA = 70 ns
DEC: tDEC= 10 ns
CpE 351 Drill Chapter #5

What is the purpose of buffers? When do you use unidirectional and bidirectional ones?

Two consecutive read from different chips may cause contention. How do you resolve this issue

Explain the buffer contention problem and how to resolve it

Design a decoding circuit to split the MC68K space into 4 partitions, and further split the first partition
into 4 small ones for memory chips. Find the size of each small partition, the address range of each
small partition, the number of addresses per location if the chip is 1/4 the size of the small partition

If we are to design a microprocessor system with relatively small memory capacity, like 32 KB ROM
& 32 KB RAM, design a decoding subsystem that makes all memory accesses fast (an example of
hardware-software co-design)

If the second partition is decoded to select one of the synchronous devices, write the logical expression
of the VPA*, and the address range of the first small partition

What do you do with the input signals and output signals that you don’t use in your design? Explain
why

Why do serial communications use ±12V drivers and receivers ?

A serial communication chip is used to transmit and receive at 38.4 Kbps using an internal divide by
16 setting. If it is driven by some frequency divider whose input is E, compute the best clock
frequency to work with if the MC68K max is 16 MHz

Why do we go for serial communication when parallel is better as it transmits many bits at once?

Design a DTACK* generation circuit if ROM requires 2 wait cycles while RAM does not need any

Why do we place large electrolytic capacitor or more and small ceramic capacitor or more between the
power and ground lines of every chip?

What is the significance of using reset input with programmable input/outputs devices

Why do we have to use drivers with LEDs, Motors, etc.?

Can any programmable input/output devices drive an LED directly?

Can an open collector driver like 74LS05 drive an LED in any mode? Common anode or common
cathode? Why or why not

A 74LS05 inverter is used to drive two LEDs in the common anode configuration. Assuming max sink
current of 16 mA and the output low voltage of 0.4 V, compute the current liming resistor for the two
LEDs in a 5 V system.
Green LED rated at 2.6 V / 10 mA
CpE 351 Drill Chapter #5

Red LED rated at 1.8 V / 20 mA

Redo the previous problem if the available resistors are 10% tolerance with values in Ohms: 100, 120,
140, 160, 180, 200, 220, 240, 260, 280, 300, 330

We can connect two or three red LEDs in series in a 5 V system but we cannot do that with green or
blue LEDs. Why?

What is LED? What is the difference between various colors? physical sizes?

Why do we drive LEDs in common anode configuration most of the time

Two LED’s in series anode-to-anode or cathode-to-cathode will never work. Why?

A green LED requires 2.4 V / 20 mA for full light, compute the 10% tolerance current limiting resistor
value in a 15 V system

A white LED with 3.6 V forward voltage drop is connected via a 300 Ω current limiting resistor to 80
mWH / 6 V Battery, where X is student number. How many minutes does it take the battery to get out
of juice?

A white LED with 4 V forward voltage drop is connected via a 300 Ω current limiting resistor to 1246
mWH / 6 V Battery. How many minutes does it take the battery to get out of juice?

Given a violet 4.4V LED and a 300 Ω current limiting resistor in a 8V system. Compute the power
consumption of the LED if it is ON one tenth of the time

We want to design a controller for traffic lights, what kind of microprocessor will pick regarding: data
bus, address bus, number of cores, number of pins, power consumption, clock frequency and cost.

A 18-bit address bus 8-bit processor uses a 3-to-8 decoder to partition the memory space. What is the
size partition size

Explain why some systems have crystals with frequencies that look strange; like 32.7680 KHz, 1.8432
MHz, 2.4576 MHz or 14.7456 MHz

Show a decoding circuit that splits the Z80 memory space into two equal partitions

The input/output lines of an I/O NMOS chip are driven by darlington pairs and hence are capable of
sinking and sourcing 10mA.
If one of the output lines is used to drive a blue 3V LED, compute the value of current limiting
resistor?

A white LED with 3.6 V forward voltage drop is connected via a 300 Ω current limiting resistor to X
µWH / 6 V Battery, where X is student number. How many minutes does it take the battery to get out
of juice?
CpE 351 Drill Chapter #5

A 7414 Schmitt trigger inverter, with 16 mA sink current capability, is driving 3 Red LEDs connected
in series and working fine. When we replaced one of them by Blue LED and another by Green LED
for fun, it did not work at all. Using your very own words, explain why

A 50% duty cycle 3.6 GHz clock signal appeared non-inverted at the output of an inverter. Explain

Given a violet 4.4V LED and a 300 Ω current limiting resistor in a 8V system. Compute the power
consumption of the LED if it is ON one tenth of the time

Two LEDs in series with a resistor are driven by an out pin of a chip. It was noticed that they never lit
when the output is made low or high. What could be the reason?

LEDs are commonly used in design to indicate a status. Why do we drive LEDs using a TTL gate and
not directly by VLSI chip?

Why do we put them in common anode mode instead of common cathode? How do we calculate the
current limiting resistor to be used?

How do we know if the processor is in the supervisor mode or user mode? And how do we know if the
processor is acknowledging an interrupt

An MC68008 is to run at full speed of 16 MHz with no wait, compute the maximum memory access
time that works well, assuming only multiple of 10 available; 10, 20, 30, ...

Design a circuit that splits the memory space of an MC68008 into 4 quadrants; ROM, RAMS, RAMU
and SYNC. The synchronous subspace SYNC is to be divided into 4 quadrants: PIO, SIO, PTC and
RES, where RES is to be reserved for future expansion. The following conditions have to be reported
as bus error:
Writing to read only memory
Accessing unused partition
Accessing RAMS while in the user mode

Co-design implies involving hardware and software in the design process to maximize performance. A
single 2-to-4 decoder is used to select 32KB ROM, 32KB RAM, PIA & PTM for a transaction with
the MC68008 in a controller. Draw the decoder and show its inputs and outputs properly and make
sure to generate the signals the processor needs.

Compute the VIA access time that allows an MC68008 with 60 ns address strobe latency and 10 ns
data read setup time operate at full speed of 10 MHz if controlled by the second stage of a 5 ns delay
decoder.

What is gate propagation delay, fan-in, fan-out, noise margin, signal rise time, signal fall time, data
setup time, data hold time, head seek time, rotational latency time
CpE 351 Drill Chapter #5

To reset the MC68K µP, we need to assert both RST* & HLT* some minimal time. This time
requirement is100 ms on power up and only 10 µs if it is already powered. Why that much time on
power up?

In complex printed circuit board (PCB), every chip has to have two capacitors between the power lines
(VCC and GND), to filer ripples due to high frequency switching and to act as fast power supply when
needed. Typically, a large electorate capacitor of 1 microfarad and a small ceramic capacitor of 1
nanofarad. Now since these two capacitors are in parallel, the total is equal to the sum, 1 microfarad
plus 1 nanofarad is almost 1 microfarad (1.001 microfarad to be exact). This means that it is the
capacitance that we are after. Explain why do we do this then?

An LED (2.1 V / 25 mA) in series with a resistor R in a 5 V system driven by a 7414 inverter with 14
mA max sink current and 0.3 V low output voltage. Compute the value and power rating of R, stating
units properly

The microprocessor requires capacitors close to the power pins to meet the surge demand on current and bypass
high frequency noise. Beside the 0.2 µF ceramic disc, we need large electrolytic capacitor(s). Which of the
following sets is best: (10µF, 10µF, 10µF), (15µF, 15µF), (10µF, 20µF) and (30µF)

An MC68000 based system with serial interface, with 16 internal divider, using 115.2 Kbps bit rate, what is the
frequency of choice if the max clock frequency of the processor is 8 MHz

A 5 V driver with 0.2 V / 16 mA low level state and 4.8 V / 1.6 mA high level state is used to drive a 1.7 V / 14
mA red LED. Compute the current limiting resistor value

A 5 V driver with 0.2 V / 16 mA low level state and 4.8 V / 1.6 mA high level state is used to drive a 2.4 V / 18
mA green LED. Compute the current limiting resistor value